WO2016048364A1 - Données de topologie de segment logique - Google Patents

Données de topologie de segment logique Download PDF

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Publication number
WO2016048364A1
WO2016048364A1 PCT/US2014/057786 US2014057786W WO2016048364A1 WO 2016048364 A1 WO2016048364 A1 WO 2016048364A1 US 2014057786 W US2014057786 W US 2014057786W WO 2016048364 A1 WO2016048364 A1 WO 2016048364A1
Authority
WO
WIPO (PCT)
Prior art keywords
segment
logical
topology data
data
add
Prior art date
Application number
PCT/US2014/057786
Other languages
English (en)
Inventor
Andrew C Cartes
Craig M Belusar
Yovita Iskandar
David K ALTOBELLI
Original Assignee
Hewlett Packard Enterprise Development Lp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hewlett Packard Enterprise Development Lp filed Critical Hewlett Packard Enterprise Development Lp
Priority to PCT/US2014/057786 priority Critical patent/WO2016048364A1/fr
Publication of WO2016048364A1 publication Critical patent/WO2016048364A1/fr

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Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/177—Initialisation or configuration control

Definitions

  • FIG. 1 is block diagram illustrating a computer system 100 that may utilize techniques for updating system segment topology data with logical segment topology data stored on an add-on device.
  • the system 100 may represent a network device, such as a server, router, switch, and the like.
  • the network device may represent any suitable computer device, such as a desktop, laptop, game console, set top box, tablet, mobile phone, or the like.
  • the computer system 100 may include a management controller 140 and a host environment 150.
  • the computer-readable storage device 142 may also store system segment topology data 145.
  • the system segment topology data 145 may include data (e.g., records) characterizing the segments of the management bus.
  • the management bus topology data 145 may include data that indicates a number of segments in which the management bus is divided into and data relating to each of the segments.
  • the management bus topology data may be stored as a proprietary scheme, a JavaScript Object Notation (JSON) encoding, a text file, or any other suitable scheme.
  • JSON JavaScript Object Notation

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Information Retrieval, Db Structures And Fs Structures Therefor (AREA)

Abstract

L'invention concerne des techniques destinées à des contrôleurs assurant une gestion. Selon un aspect, un processeur de gestion peut obtenir des données de topologie de segment logique en provenance d'un dispositif d'ajout qui est couplé à un segment de système d'un bus de gestion de manière à communiquer avec lui. Ces données de topologie de segment logique peuvent spécifier un segment logique trouvé dans le dispositif d'ajout. Le processeur de gestion peut ensuite mettre à jour les données de topologie de segment de système caractérisant le bus de gestion afin d'y inclure le segment logique. Le processeur de gestion peut mettre à jour les données de topologie de segment de système en faisant du segment logique une extension du segment de système listé par les données de topologie de segment de système.
PCT/US2014/057786 2014-09-26 2014-09-26 Données de topologie de segment logique WO2016048364A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
PCT/US2014/057786 WO2016048364A1 (fr) 2014-09-26 2014-09-26 Données de topologie de segment logique

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/US2014/057786 WO2016048364A1 (fr) 2014-09-26 2014-09-26 Données de topologie de segment logique

Publications (1)

Publication Number Publication Date
WO2016048364A1 true WO2016048364A1 (fr) 2016-03-31

Family

ID=55581680

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2014/057786 WO2016048364A1 (fr) 2014-09-26 2014-09-26 Données de topologie de segment logique

Country Status (1)

Country Link
WO (1) WO2016048364A1 (fr)

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5684796A (en) * 1994-05-03 1997-11-04 Bay Networks Group, Inc. Method and apparatus for determining and maintaining agent topology information in a multi-segment network
US20040098514A1 (en) * 2000-09-29 2004-05-20 Armin Schuster Method and device for establishing the network topology of a bus system
US6745270B1 (en) * 2001-01-31 2004-06-01 International Business Machines Corporation Dynamically allocating I2C addresses using self bus switching device
US6795403B1 (en) * 2000-03-31 2004-09-21 Cisco Technology, Inc. Automatic discovery of switch devices in a network
US20110113179A1 (en) * 2008-07-01 2011-05-12 Andrew Cartes Segmenting bus topology

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5684796A (en) * 1994-05-03 1997-11-04 Bay Networks Group, Inc. Method and apparatus for determining and maintaining agent topology information in a multi-segment network
US6795403B1 (en) * 2000-03-31 2004-09-21 Cisco Technology, Inc. Automatic discovery of switch devices in a network
US20040098514A1 (en) * 2000-09-29 2004-05-20 Armin Schuster Method and device for establishing the network topology of a bus system
US6745270B1 (en) * 2001-01-31 2004-06-01 International Business Machines Corporation Dynamically allocating I2C addresses using self bus switching device
US20110113179A1 (en) * 2008-07-01 2011-05-12 Andrew Cartes Segmenting bus topology

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