WO2016041467A1 - Electrical stimulation device and control circuit therefor - Google Patents

Electrical stimulation device and control circuit therefor Download PDF

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Publication number
WO2016041467A1
WO2016041467A1 PCT/CN2015/089421 CN2015089421W WO2016041467A1 WO 2016041467 A1 WO2016041467 A1 WO 2016041467A1 CN 2015089421 W CN2015089421 W CN 2015089421W WO 2016041467 A1 WO2016041467 A1 WO 2016041467A1
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WO
WIPO (PCT)
Prior art keywords
control circuit
resistor
transistor
output
npn
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PCT/CN2015/089421
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French (fr)
Chinese (zh)
Inventor
赵荣建
孙通
温飞
贾月超
薛军
Original Assignee
深圳市艾尔曼医疗电子仪器有限公司
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Application filed by 深圳市艾尔曼医疗电子仪器有限公司 filed Critical 深圳市艾尔曼医疗电子仪器有限公司
Publication of WO2016041467A1 publication Critical patent/WO2016041467A1/en

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Classifications

    • AHUMAN NECESSITIES
    • A61MEDICAL OR VETERINARY SCIENCE; HYGIENE
    • A61NELECTROTHERAPY; MAGNETOTHERAPY; RADIATION THERAPY; ULTRASOUND THERAPY
    • A61N1/00Electrotherapy; Circuits therefor
    • A61N1/18Applying electric currents by contact electrodes
    • A61N1/32Applying electric currents by contact electrodes alternating or intermittent currents
    • A61N1/36Applying electric currents by contact electrodes alternating or intermittent currents for stimulation
    • A61N1/36014External stimulators, e.g. with patch electrodes
    • A61N1/3603Control systems
    • AHUMAN NECESSITIES
    • A61MEDICAL OR VETERINARY SCIENCE; HYGIENE
    • A61NELECTROTHERAPY; MAGNETOTHERAPY; RADIATION THERAPY; ULTRASOUND THERAPY
    • A61N1/00Electrotherapy; Circuits therefor
    • A61N1/18Applying electric currents by contact electrodes
    • A61N1/32Applying electric currents by contact electrodes alternating or intermittent currents
    • A61N1/36Applying electric currents by contact electrodes alternating or intermittent currents for stimulation
    • AHUMAN NECESSITIES
    • A61MEDICAL OR VETERINARY SCIENCE; HYGIENE
    • A61NELECTROTHERAPY; MAGNETOTHERAPY; RADIATION THERAPY; ULTRASOUND THERAPY
    • A61N1/00Electrotherapy; Circuits therefor
    • A61N1/18Applying electric currents by contact electrodes
    • A61N1/32Applying electric currents by contact electrodes alternating or intermittent currents
    • A61N1/36Applying electric currents by contact electrodes alternating or intermittent currents for stimulation
    • A61N1/36003Applying electric currents by contact electrodes alternating or intermittent currents for stimulation of motor muscles, e.g. for walking assistance

Definitions

  • the invention belongs to the field of electricity, and in particular relates to an electrical stimulation device and a control circuit thereof.
  • Electrical stimulation belongs to the category of neuromuscular electrical stimulation. It uses a certain intensity of low-frequency pulse current to stimulate one or more groups of muscles through a preset procedure, induce muscle movement or simulate normal autonomous movement to achieve improvement or recovery. The purpose of stimulating muscle or muscle function.
  • an electrical stimulation device the device used in electrical stimulation therapy is called an electrical stimulation device.
  • the control circuit of the prior art electrical stimulation device typically includes a total enable control module and a boost module, the total enable control module controls the total output voltage, and the boost module boosts the supply voltage to the desired voltage.
  • the output of the control circuit of the prior art electrical stimulation device is not adjustable, and there is a problem that the control is cumbersome.
  • the present invention provides a control circuit for an electrical stimulation device, the control circuit comprising a total enable control module and a boost module, the control circuit further comprising a waveform control module and an MCU
  • the total enable control module, the boost module and the waveform control module are sequentially connected, and the total enable control module, the boost module and the waveform control module are respectively connected to the MCU, and the waveform control module includes the MCU.
  • Two different duty cycle signals are output to control two parallel and symmetrical waveform control circuits.
  • each waveform control circuit includes a parallel switching circuit and an output logic control circuit.
  • the total enable control module includes a first NPN switch transistor, a second PMOS transistor, and a second resistor, wherein the first The base of the NPN switch transistor is connected to the MCU. The emitter of the first NPN switch transistor is grounded. The collector of the first NPN switch transistor is connected to one end of the second resistor and the second PMOS. The gate of the tube, the drain of the second PMOS transistor is connected to the input voltage terminal of the boost module, the source of the second PMOS transistor is connected to the other end of the second resistor, and the voltage input terminal of the control circuit of the electrical stimulation device, the second PMOS The drain of the tube acts as the output of the total enable control module.
  • the total enable control module further includes a first resistor, and the base of the first NPN switch transistor is connected to the MCU through the first resistor .
  • the boost module includes an input inductor, a transient suppression diode, a freewheeling diode, and a third NMOS
  • the switch tube, the output filter capacitor, the third resistor, the fourth resistor and the fifth resistor are formed.
  • the front end of the input inductor is connected to the output terminal of the total enable control module and the negative pole of the transient suppression diode, and the end of the input inductor is connected to the third NMOS.
  • the drain of the switch transistor and the anode of the freewheeling diode, the gate of the third NMOS switch transistor is connected to the control terminal of the MCU, and the third NMOS
  • the source of the switch tube is grounded, the negative pole of the freewheeling diode is connected to one end of the output filter capacitor, the third resistor and the feedback network composed of the fourth resistor and the fifth resistor connected in series are connected to both ends of the output filter capacitor, and both ends of the third resistor
  • the waveform control module is connected.
  • the two parallel and symmetrical waveform control circuits include a first waveform control circuit and a second waveform control circuit, and the first waveform control circuit and the second waveform control circuit each include a parallel switch circuit and an output logic control circuit.
  • the switching circuit of the first waveform control circuit includes a fifth NPN transistor and a sixth resistor, and a fifth NPN
  • the base of the triode is connected to the MCU, one end of the sixth resistor is connected to the output end of the booster circuit, and the other end of the sixth resistor is connected to the collector of the fifth NPN transistor, the fifth NPN The emitter of the transistor is connected to the second input of the second waveform control circuit;
  • the output logic control circuit of the first waveform control circuit includes a fourth NPN transistor and a sixth PNP a transistor, an eighth resistor, and a third diode.
  • the collector of the fourth NPN transistor is connected to one end of the sixth resistor and the output end of the booster circuit, and the base of the fourth NPN transistor is connected to the other end of the sixth resistor, fourth NPN
  • the collector of the triode is connected as a first output end of the first waveform control circuit to the first input end of the second waveform control circuit, and the fourth NPN
  • the emitter of the triode is connected to one end of the eighth resistor, the other end of the eighth resistor is connected to the first voltage output terminal and the anode of the third diode, and the cathode of the third diode is connected to the collector of the sixth PNP transistor, sixth PNP
  • the base of the triode is connected to the collector of the fifth NPN transistor, and the emitter of the sixth NPN transistor is connected to the second input of the second waveform control circuit
  • the switching circuit of the second waveform control circuit includes an eighth NPN transistor and a seventh resistor, and an eighth NPN
  • the base of the triode is connected to the MCU, one end of the seventh resistor is connected to the output end of the booster circuit and the first output end of the first waveform control circuit, and the other end of the seventh resistor is connected to the collector of the eighth NPN transistor, and the eighth NPN The emitter of the triode is connected to the second output end of the first waveform control circuit;
  • the output logic control circuit of the second waveform control circuit includes a seventh NPN transistor, a ninth PNP a transistor, a ninth resistor and a fourth diode, a collector of the seventh NPN transistor connected to one end of the seventh resistor, an output of the booster circuit, and a first output of the first waveform control circuit, a seventh NPN
  • the base of the triode is connected to the other end of the seventh resistor
  • the emitter of the seventh NPN transistor is connected to one end of the ninth resistor
  • the other end of the ninth resistor is connected to the anode of the second voltage output terminal and the fourth diode
  • the fourth The negative pole of the pole tube is connected to the ninth
  • the collector of the PNP transistor, the base of the ninth PNP transistor is connected to the collector of the eighth NPN transistor, and the emitter of the ninth PNP transistor is connected to the eighth NPN The emitter of the transistor and the second output of the first waveform control circuit.
  • the invention provides an electrical stimulation device comprising a control circuit of the electrical stimulation device described above.
  • the control circuit of the electrical stimulation device comprises a waveform control module and an MCU, and the waveform control module comprises an MCU Two different duty cycle signals are output to control two parallel and symmetrical waveform control circuits. Therefore, the output waveform of the control circuit of the electrical stimulation device is symmetrical, and the output control is easy; and the MCU is passed through Two different duty cycle signals are output, and a square wave signal of arbitrary peak value and arbitrary duty ratio can be obtained at the output of the control circuit of the electrical stimulation device.
  • the eighth resistor can be appropriately modulated according to the amplitude of the output waveform and the magnitude of the load, the desired output voltage amplitude is obtained, and the eighth resistor has an overcurrent and no-load protection function, on the one hand, preventing the load from being short-circuited and causing excessive current burnout. Circuit components, on the other hand, prevent the no-load output voltage amplitude from being too high, and the third diode can prevent current from passing through the sixth PNP transistor reflow.
  • FIG. 1 is a schematic structural diagram of a control circuit of an electrical stimulation device according to an embodiment of the present invention.
  • FIG. 2 is a specific circuit diagram of a control circuit of an electrical stimulation device according to an embodiment of the present invention.
  • the control circuit of the electrical stimulation device includes a total enable control module 11 and a boost module 12 .
  • the waveform control module 13 and the MCU 14 wherein the total enable control module 11 , the boost module 12 and the waveform control module 13 are sequentially connected, and the total enable control module 11 and the boost module 12 And the waveform control module 13 are also connected to the MCU 14 respectively.
  • the total enable control module 11 controls the total output voltage
  • the boost module 12 is used to raise the supply voltage to the required voltage.
  • the waveform control module 13 Two parallel and symmetrical waveform control circuits are controlled that are controlled by two different duty cycle signals output by the MCU 14.
  • the control circuit of the electrical stimulation device includes a waveform control module 13 and an MCU 14 and a waveform control module 13
  • Two parallel and symmetrical waveform control circuits are controlled that are controlled by two different duty cycle signals output by the MCU 14. Therefore, the output waveform of the control circuit of the electrical stimulation device is symmetrical, and the output control is easy to perform;
  • the two different duty cycle signals output by the MCU 14 can obtain square wave signals of arbitrary peak and arbitrary duty ratio at the output of the control circuit of the electrical stimulation device.
  • FIG. 2 is a specific circuit diagram of a control circuit of an electrical stimulation device according to an embodiment of the present invention.
  • the total enable control module 11 includes a first NPN switch transistor Q1, a second PMOS transistor Q2, and a first resistor R1. And a second resistor R2, wherein one end of the first resistor R1 is connected to the MCU, and the other end of the first resistor R1 is connected to the base of the first NPN switch transistor Q1, and the first resistor R1 Used for current limiting to prevent the base current of the first NPN switch transistor Q1 from being too large, the emitter of the first NPN switch transistor Q1 is grounded, and the first NPN switch transistor Q1
  • the collector is connected to one end of the second resistor R2 and the gate of the second PMOS transistor Q2, and the drain of the second PMOS transistor Q2 is connected to the input voltage terminal of the boost module 12, and the second PMOS transistor
  • the source of Q2 is connected to the other end of the second resistor R2 and the voltage input terminal Vin of the control circuit of the electrical stimulation device, and the drain of the second PMOS transistor Q2 serves as the output of the total enable control module 11.
  • the total enable control module 11 may also include the first resistor R1, and then the first The base of the NPN switch transistor Q1 is directly connected to the MCU.
  • the boost module 12 includes an input inductor L1, a transient suppression diode D1, a freewheeling diode D2, and a third NMOS.
  • the switch tube Q3, the output filter capacitor C1, the third resistor R3, the fourth resistor R4, and the fifth resistor R5 are formed.
  • the fourth resistor R4 and the fifth resistor R5 connected in series constitute a boost module 12 Feedback network.
  • the input inductor L1 of the boost module 12 is connected to the output of the total enable control module 11 and the negative terminal of the transient suppression diode D1.
  • the end of the input inductor L1 is connected to the third NMOS.
  • the negative pole of D2 is connected to the output filter capacitor C1, and the third resistor R3 and the fourth resistor R4 and the fifth resistor R5 connected in series are connected to the output filter capacitor C1.
  • the third NMOS switch Q3 When MCU When the gate of the third NMOS switch Q3 outputs a high level, the third NMOS switch Q3 is turned on, and the power supply charges the input inductor L1; when the MCU passes the third NMOS When the gate of the switch Q3 outputs a low level, the third NMOS switch Q3 is turned off, and the input inductor L1 and the power supply pass through the freewheeling diode D2 at the same time. Discharge is performed to achieve the purpose of boosting. Among them, the third resistor R3 is a dummy load to prevent the circuit from being unloaded, and at the same time save the energy of the circuit.
  • the feedback network passes through two voltage dividers, a fourth resistor, R4 and a fifth resistor.
  • R5 divides the output
  • MCU detects the fifth resistor R5
  • the voltage at the terminal when the voltage at this point is greater than the required voltage, the duty ratio of the output high level is reduced, the charging time is less, so that the output voltage is reduced; when the voltage is less than the required voltage, the output is high.
  • the duty ratio of the level is increased, and the charging time is increased, thereby increasing the output voltage.
  • Passing the fourth resistance to the feedback network The detection feedback of R4 and the fifth resistor R5 stabilizes the amplitude of the output voltage.
  • Both ends of the third resistor R3 are connected to the waveform control module 13 as an output terminal of the booster circuit 12.
  • Waveform Control Module 13 included by MCU Two different duty cycle signals are output to control two parallel and symmetrical waveform control circuits.
  • the two parallel and symmetric waveform control circuits include a first waveform control circuit and a second waveform control circuit.
  • the first waveform control circuit and the second waveform control circuit each include a parallel switch circuit and an output logic control circuit.
  • the switching circuit of the first waveform control circuit comprises a fifth NPN transistor Q5 and a sixth resistor R6, a fifth NPN
  • the base of the transistor Q5 is connected to the MCU, the MCU controls the on and off of the fifth NPN transistor Q5, and one end of the sixth resistor R6 is connected to the output of the booster circuit 12, and the sixth resistor R6 The other end is connected to the collector of the fifth NPN transistor Q5, limiting the current flowing through the emitter and collector of the fifth NPN transistor Q5.
  • Fifth NPN Transistor Q5 The emitter is connected to the second input of the second waveform control circuit.
  • the output logic control circuit of the first waveform control circuit includes a fourth NPN transistor Q4, a sixth PNP transistor Q6, and an eighth resistor R8.
  • the collector of the fourth NPN transistor Q4 is connected to one end of the sixth resistor R6 and the output of the booster circuit 12, and the base of the fourth NPN transistor Q4 is connected to the sixth resistor.
  • the collector of the fourth NPN transistor Q4 serves as the first output of the first waveform control circuit and is connected to the first input of the second waveform control circuit, and the fourth NPN transistor Q4
  • the emitter is connected to one end of the eighth resistor R8, and the other end of the eighth resistor R8 is connected to the anode of the first voltage output terminal OUT1 and the third diode D3, and the cathode of the third diode D3 is connected to the sixth PNP.
  • the collector of the transistor Q6, the base of the sixth PNP transistor Q6 is connected to the collector of the fifth NPN transistor Q5, and the sixth NPN transistor Q6
  • the emitter is connected to the second input of the second waveform control circuit as a second output of the first waveform control circuit.
  • the eighth resistor R8 can be appropriately modulated according to the amplitude of the output waveform and the magnitude of the load to obtain the desired output voltage amplitude.
  • Eightth resistor The R8 has overcurrent and no-load protection functions. On the one hand, it prevents the load from short-circuiting and the current is too large to burn out the circuit components. On the other hand, it prevents the no-load output voltage from being too high.
  • the third diode D3 prevents current from passing through the sixth PNP Transistor Q6 reflows.
  • the switching circuit of the second waveform control circuit includes an eighth NPN transistor Q8 and a seventh resistor R7, and an eighth NPN transistor
  • the base of Q8 is connected to the MCU, the MCU controls the on and off of the eighth NPN transistor Q8, and the seventh resistor R7 is connected to the boost circuit at one end.
  • the output is connected to the first output of the first waveform control circuit, and the other end of the seventh resistor R7 is connected to the collector of the eighth NPN transistor Q8, and is limited to flow through the eighth NPN transistor Q8.
  • the emitter of the eighth NPN transistor Q8 is connected to the second output of the first waveform control circuit.
  • the output logic control circuit of the second waveform control circuit includes a seventh NPN transistor Q7 , ninth PNP transistor Q9, ninth resistor R9 and fourth diode D4.
  • the collector of the seventh NPN transistor Q7 is connected to one end of the seventh resistor R7, and the boosting circuit 12
  • the output end is connected to the first output of the first waveform control circuit
  • the base of the seventh NPN transistor Q7 is connected to the other end of the seventh resistor R7
  • the emitter of the seventh NPN transistor Q7 is connected to the ninth resistor R9.
  • the other end of the ninth resistor R9 is connected to the second voltage output terminal OUT2 and the anode of the fourth diode D4, and the cathode of the fourth diode D4 is connected to the collector of the ninth PNP transistor Q9, ninth.
  • the base of the PNP transistor Q9 is connected to the collector of the eighth NPN transistor Q8, and the emitter of the ninth PNP transistor Q9 is connected to the eighth NPN transistor Q8. The emitter and the second output of the first waveform control circuit.
  • the ninth resistor R9 can be appropriately modulated according to the amplitude of the output waveform and the magnitude of the load to obtain the desired output voltage amplitude.
  • Ninth resistor R9 has overcurrent and no-load protection functions. On the one hand, it prevents the load from short-circuiting and the current is too large to burn out the circuit components. On the other hand, it prevents the no-load output voltage from being too high.
  • the fourth diode D4 prevents current from passing through the ninth PNP Transistor Q9 is reflowed.
  • An embodiment of the present invention further provides an electrical stimulation device including a control circuit of an electrical stimulation device provided by an embodiment of the present invention.

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Abstract

An electrical stimulation device and a control circuit therefor. The control circuit comprises an always-enabled control module (11) and a boost module (12), characterized in that the control circuit further comprises a waveform control module (13) and an MCU (14), wherein the always-enabled control module (11), the boost module (12) and the waveform control module (13) are connected in sequence; the always-enabled control module (11), the boost module (12) and the waveform control module (13) are further connected to the MCU (14) respectively; and the waveform control module (13) comprises two parallel and symmetrical waveform control circuits which are controlled by two different duty ratio signals output by the MCU (14). An output waveform of a control circuit of the electrical stimulation device has symmetry, and it is easy to perform output control thereon; and a square-wave signal having any peak value and any duty ratio can be obtained at an output end of the control circuit of the electrical stimulation device via two different duty ratio signals output by an MCU (14).

Description

一种电刺激装置及其控制电路Electric stimulation device and control circuit thereof 技术领域Technical field
本发明属于电学领域,尤其涉及一种电刺激装置及其控制电路。 The invention belongs to the field of electricity, and in particular relates to an electrical stimulation device and a control circuit thereof.
背景技术Background technique
电刺激属于神经肌肉电刺激的范畴,是利用一定强度的低频脉冲电流,通过预先设定的程序来刺激一组或多组肌肉,诱发肌肉运动或模拟正常的自主运动,以达到改善或恢复被刺激肌肉或肌群功能的目的。目前电刺激疗法的研究与应用已涉及临床医疗的各个领域,电刺激疗法所采用的装置称为电刺激装置。 Electrical stimulation belongs to the category of neuromuscular electrical stimulation. It uses a certain intensity of low-frequency pulse current to stimulate one or more groups of muscles through a preset procedure, induce muscle movement or simulate normal autonomous movement to achieve improvement or recovery. The purpose of stimulating muscle or muscle function. At present, the research and application of electrical stimulation therapy has been involved in various fields of clinical medicine, and the device used in electrical stimulation therapy is called an electrical stimulation device.
现有技术的电刺激装置的控制电路通常包括总使能控制模块和升压模块,总使能控制模块控制总的输出电压,升压模块将电源电压升到所需要的电压。然而,现有技术的电刺激装置的控制电路输出单一不可调,存在控制比较繁琐的问题。 The control circuit of the prior art electrical stimulation device typically includes a total enable control module and a boost module, the total enable control module controls the total output voltage, and the boost module boosts the supply voltage to the desired voltage. However, the output of the control circuit of the prior art electrical stimulation device is not adjustable, and there is a problem that the control is cumbersome.
技术问题technical problem
本发明的目的在于提供一种电刺激装置及其控制电路,旨在解决现有技术的电刺激装置的控制电路输出单一不可调,存在控制比较繁琐的问题。 It is an object of the present invention to provide an electrical stimulation device and a control circuit thereof, which aim to solve the problem that the control circuit output of the prior art electrical stimulation device is not adjustable at all, and the control is relatively cumbersome.
技术解决方案Technical solution
第一方面,本发明提供了一种电刺激装置的控制电路,所述控制电路包括总使能控制模块和升压模块,所述控制电路还包括波形控制模块和 MCU ,其中,总使能控制模块、升压模块和波形控制模块依次连接,总使能控制模块、升压模块和波形控制模块还分别与 MCU 连接,波形控制模块包括由 MCU 输出的两个不同的占空比信号来控制的两个并联且对称的波形控制电路。 In a first aspect, the present invention provides a control circuit for an electrical stimulation device, the control circuit comprising a total enable control module and a boost module, the control circuit further comprising a waveform control module and an MCU The total enable control module, the boost module and the waveform control module are sequentially connected, and the total enable control module, the boost module and the waveform control module are respectively connected to the MCU, and the waveform control module includes the MCU. Two different duty cycle signals are output to control two parallel and symmetrical waveform control circuits.
进一步地,每个波形控制电路包括并联的开关电路和输出逻辑控制电路。 Further, each waveform control circuit includes a parallel switching circuit and an output logic control circuit.
进一步地,总使能控制模块包括第一 NPN 开关三极管、第二 PMOS 管和第二电阻,其中,第一 NPN 开关三极管的基极接 MCU ,第一 NPN 开关三极管的发射极接地,第一 NPN 开关三极管的集电极分别接第二电阻的一端和第二 PMOS 管的栅极,第二 PMOS 管的漏极接升压模块的输入电压端,第二 PMOS 管的源极接第二电阻的另一端以及电刺激装置的控制电路的电压输入端,第二 PMOS 管的漏极作为总使能控制模块的输出端。 Further, the total enable control module includes a first NPN switch transistor, a second PMOS transistor, and a second resistor, wherein the first The base of the NPN switch transistor is connected to the MCU. The emitter of the first NPN switch transistor is grounded. The collector of the first NPN switch transistor is connected to one end of the second resistor and the second PMOS. The gate of the tube, the drain of the second PMOS transistor is connected to the input voltage terminal of the boost module, the source of the second PMOS transistor is connected to the other end of the second resistor, and the voltage input terminal of the control circuit of the electrical stimulation device, the second PMOS The drain of the tube acts as the output of the total enable control module.
进一步地,总使能控制模块还包括第一电阻,第一 NPN 开关三极管的基极通过第一电阻接 MCU 。 Further, the total enable control module further includes a first resistor, and the base of the first NPN switch transistor is connected to the MCU through the first resistor .
进一步地,升压模块包括输入电感、瞬态抑制二极管、续流二极管、第三 NMOS 开关管、输出滤波电容、第三电阻、第四电阻和第五电阻组成,输入电感的前端接总使能控制模块的输出端以及瞬态抑制二极管的负极,输入电感的末端接第三 NMOS 开关管的漏极和续流二极管的正极,第三 NMOS 开关管的栅极接 MCU 的控制端,第三 NMOS 开关管的源极接地,续流二极管的负极接输出滤波电容的一端,第三电阻以及串联的第四电阻和第五电阻组成的反馈网络接输出滤波电容的两端,第三电阻的两端作为升压电路的输出端接波形控制模块。 Further, the boost module includes an input inductor, a transient suppression diode, a freewheeling diode, and a third NMOS The switch tube, the output filter capacitor, the third resistor, the fourth resistor and the fifth resistor are formed. The front end of the input inductor is connected to the output terminal of the total enable control module and the negative pole of the transient suppression diode, and the end of the input inductor is connected to the third NMOS. The drain of the switch transistor and the anode of the freewheeling diode, the gate of the third NMOS switch transistor is connected to the control terminal of the MCU, and the third NMOS The source of the switch tube is grounded, the negative pole of the freewheeling diode is connected to one end of the output filter capacitor, the third resistor and the feedback network composed of the fourth resistor and the fifth resistor connected in series are connected to both ends of the output filter capacitor, and both ends of the third resistor As the output of the boost circuit, the waveform control module is connected.
进一步地,两个并联且对称的波形控制电路包括第一波形控制电路和第二波形控制电路,第一波形控制电路和第二波形控制电路均包括并联的开关电路和输出逻辑控制电路。 Further, the two parallel and symmetrical waveform control circuits include a first waveform control circuit and a second waveform control circuit, and the first waveform control circuit and the second waveform control circuit each include a parallel switch circuit and an output logic control circuit.
进一步地,第一波形控制电路的开关电路包括第五 NPN 三极管和第六电阻,第五 NPN 三极管的基极接 MCU ,第六电阻的一端接升压电路的输出端,第六电阻的另一端接第五 NPN 三极管的集电极,第五 NPN 三极管的发射极接第二波形控制电路的第二输入端; Further, the switching circuit of the first waveform control circuit includes a fifth NPN transistor and a sixth resistor, and a fifth NPN The base of the triode is connected to the MCU, one end of the sixth resistor is connected to the output end of the booster circuit, and the other end of the sixth resistor is connected to the collector of the fifth NPN transistor, the fifth NPN The emitter of the transistor is connected to the second input of the second waveform control circuit;
第一波形控制电路的输出逻辑控制电路包括第四 NPN 三极管、第六 PNP 三极管、第八电阻和第三二极管,第四 NPN 三极管的集电极接第六电阻的一端和升压电路的输出端,第四 NPN 三极管的基极接第六电阻的另一端,第四 NPN 三极管的集电极作为第一波形控制电路的第一输出端接第二波形控制电路的第一输入端,第四 NPN 三极管的发射极接第八电阻的一端,第八电阻的另一端接第一电压输出端和第三二极管的正极,第三二极管的负极接第六 PNP 三极管的集电极,第六 PNP 三极管的基极接第五 NPN 三极管的集电极,第六 NPN 三极管的发射极作为第一波形控制电路的第二输出端接第二波形控制电路的第二输入端。 The output logic control circuit of the first waveform control circuit includes a fourth NPN transistor and a sixth PNP a transistor, an eighth resistor, and a third diode. The collector of the fourth NPN transistor is connected to one end of the sixth resistor and the output end of the booster circuit, and the base of the fourth NPN transistor is connected to the other end of the sixth resistor, fourth NPN The collector of the triode is connected as a first output end of the first waveform control circuit to the first input end of the second waveform control circuit, and the fourth NPN The emitter of the triode is connected to one end of the eighth resistor, the other end of the eighth resistor is connected to the first voltage output terminal and the anode of the third diode, and the cathode of the third diode is connected to the collector of the sixth PNP transistor, sixth PNP The base of the triode is connected to the collector of the fifth NPN transistor, and the emitter of the sixth NPN transistor is connected to the second input of the second waveform control circuit as the second output of the first waveform control circuit.
进一步地,第二波形控制电路的开关电路包括第八 NPN 三极管和第七电阻,第八 NPN 三极管的基极接 MCU ,第七电阻的一端接升压电路的输出端和第一波形控制电路的第一输出端,第七电阻的另一端接第八 NPN 三极管的集电极,第八 NPN 三极管的发射极接第一波形控制电路的第二输出端; Further, the switching circuit of the second waveform control circuit includes an eighth NPN transistor and a seventh resistor, and an eighth NPN The base of the triode is connected to the MCU, one end of the seventh resistor is connected to the output end of the booster circuit and the first output end of the first waveform control circuit, and the other end of the seventh resistor is connected to the collector of the eighth NPN transistor, and the eighth NPN The emitter of the triode is connected to the second output end of the first waveform control circuit;
第二波形控制电路的输出逻辑控制电路包括第七 NPN 三极管、第九 PNP 三极管、第九电阻和第四二极管,第七 NPN 三极管的集电极接第七电阻的一端、升压电路的输出端和第一波形控制电路的第一输出端,第七 NPN 三极管的基极接第七电阻的另一端,第七 NPN 三极管的发射极接第九电阻的一端,第九电阻的另一端接第二电压输出端和第四二极管的正极,第四二极管的负极接第九 PNP 三极管的集电极,第九 PNP 三极管的基极接第八 NPN 三极管的集电极,第九 PNP 三极管的发射极接第八 NPN 三极管的发射极和第一波形控制电路的第二输出端。 The output logic control circuit of the second waveform control circuit includes a seventh NPN transistor, a ninth PNP a transistor, a ninth resistor and a fourth diode, a collector of the seventh NPN transistor connected to one end of the seventh resistor, an output of the booster circuit, and a first output of the first waveform control circuit, a seventh NPN The base of the triode is connected to the other end of the seventh resistor, the emitter of the seventh NPN transistor is connected to one end of the ninth resistor, and the other end of the ninth resistor is connected to the anode of the second voltage output terminal and the fourth diode, the fourth The negative pole of the pole tube is connected to the ninth The collector of the PNP transistor, the base of the ninth PNP transistor is connected to the collector of the eighth NPN transistor, and the emitter of the ninth PNP transistor is connected to the eighth NPN The emitter of the transistor and the second output of the first waveform control circuit.
第二方面,本发明提供了一种包括上述的电刺激装置的控制电路的电刺激装置。 In a second aspect, the invention provides an electrical stimulation device comprising a control circuit of the electrical stimulation device described above.
有益效果Beneficial effect
本发明提供的电刺激装置的控制电路,由于包括波形控制模块和 MCU ,波形控制模块包括由 MCU 输出的两个不同的占空比信号来控制的两个并联且对称的波形控制电路。因此使电刺激装置的控制电路的输出波形具有对称性,容易进行输出控制;且通过 MCU 输出的两个不同的占空比信号,在电刺激装置的控制电路的输出端可以得到任意峰值和任意占空比的方波信号。另外,由于第八电阻可根据输出波形的幅度和负载大小进行适当的调制,得到所要的输出电压幅度,第八电阻具有过流和空载保护功能,一方面防止负载短路出现电流过大烧坏电路元器件,另一方面防止空载输出电压幅度过高,第三二极管可以防止电流通过第六 PNP 三极管回流。  The control circuit of the electrical stimulation device provided by the invention comprises a waveform control module and an MCU, and the waveform control module comprises an MCU Two different duty cycle signals are output to control two parallel and symmetrical waveform control circuits. Therefore, the output waveform of the control circuit of the electrical stimulation device is symmetrical, and the output control is easy; and the MCU is passed through Two different duty cycle signals are output, and a square wave signal of arbitrary peak value and arbitrary duty ratio can be obtained at the output of the control circuit of the electrical stimulation device. In addition, since the eighth resistor can be appropriately modulated according to the amplitude of the output waveform and the magnitude of the load, the desired output voltage amplitude is obtained, and the eighth resistor has an overcurrent and no-load protection function, on the one hand, preventing the load from being short-circuited and causing excessive current burnout. Circuit components, on the other hand, prevent the no-load output voltage amplitude from being too high, and the third diode can prevent current from passing through the sixth PNP transistor reflow.
附图说明DRAWINGS
图 1 是本发明实施例提供的电刺激装置的控制电路结构示意图。 FIG. 1 is a schematic structural diagram of a control circuit of an electrical stimulation device according to an embodiment of the present invention.
图 2 是本发明实施例提供的电刺激装置的控制电路的具体电路图。 2 is a specific circuit diagram of a control circuit of an electrical stimulation device according to an embodiment of the present invention.
本发明的实施方式Embodiments of the invention
为了使本发明的目的、技术方案及有益效果更加清楚明白,以下结合附图及实施例,对本发明进行进一步详细说明。应当理解,此处所描述的具体实施例仅仅用以解释本发明,并不用于限定本发明。 The present invention will be further described in detail below with reference to the accompanying drawings and embodiments. It is understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
为了说明本发明所述的技术方案,下面通过具体实施例来进行说明。 In order to explain the technical solution described in the present invention, the following description will be made by way of specific embodiments.
请参阅图 1 ,本发明提供的电刺激装置的控制电路包括总使能控制模块 11 、升压模块 12 、波形控制模块 13 和 MCU 14 ,其中,总使能控制模块 11 、升压模块 12 和波形控制模块 13 依次连接,总使能控制模块 11 、升压模块 12 和波形控制模块 13 还分别与 MCU 14 连接。总使能控制模块 11 控制总的输出电压,升压模块 12 用于将电源电压升到所需要的电压,波形控制模块 13 包括由 MCU 14 输出的两个不同的占空比信号来控制的两个并联且对称的波形控制电路。 Referring to FIG. 1 , the control circuit of the electrical stimulation device provided by the present invention includes a total enable control module 11 and a boost module 12 . The waveform control module 13 and the MCU 14 , wherein the total enable control module 11 , the boost module 12 and the waveform control module 13 are sequentially connected, and the total enable control module 11 and the boost module 12 And the waveform control module 13 are also connected to the MCU 14 respectively. The total enable control module 11 controls the total output voltage, and the boost module 12 is used to raise the supply voltage to the required voltage. The waveform control module 13 Two parallel and symmetrical waveform control circuits are controlled that are controlled by two different duty cycle signals output by the MCU 14.
本发明提供的电刺激装置的控制电路,由于包括波形控制模块 13 和 MCU 14 ,波形控制模块 13 包括由 MCU 14 输出的两个不同的占空比信号来控制的两个并联且对称的波形控制电路。因此使电刺激装置的控制电路的输出波形具有对称性,容易进行输出控制;且通过 MCU 14 输出的两个不同的占空比信号,在电刺激装置的控制电路的输出端可以得到任意峰值和任意占空比的方波信号。 The control circuit of the electrical stimulation device provided by the present invention includes a waveform control module 13 and an MCU 14 and a waveform control module 13 Two parallel and symmetrical waveform control circuits are controlled that are controlled by two different duty cycle signals output by the MCU 14. Therefore, the output waveform of the control circuit of the electrical stimulation device is symmetrical, and the output control is easy to perform; The two different duty cycle signals output by the MCU 14 can obtain square wave signals of arbitrary peak and arbitrary duty ratio at the output of the control circuit of the electrical stimulation device.
请参阅图 2 ,是本发明实施例提供的电刺激装置的控制电路的具体电路图。 Please refer to FIG. 2 , which is a specific circuit diagram of a control circuit of an electrical stimulation device according to an embodiment of the present invention.
总使能控制模块 11 包括第一 NPN 开关三极管 Q1 、第二 PMOS 管 Q2 、第一电阻 R1 和第二电阻 R2 ,其中,第一电阻 R1 的一端接 MCU ,第一电阻 R1 的另一端接第一 NPN 开关三极管 Q1 的基极,第一电阻 R1 用于限流,防止第一 NPN 开关三极管 Q1 的基极电流过大,第一 NPN 开关三极管 Q1 的发射极接地,第一 NPN 开关三极管 Q1 的集电极分别接第二电阻 R2 的一端和第二 PMOS 管 Q2 的栅极,第二 PMOS 管 Q2 的漏极接升压模块 12 的输入电压端,第二 PMOS 管 Q2 的源极接第二电阻 R2 的另一端以及电刺激装置的控制电路的电压输入端 Vin ,第二 PMOS 管 Q2 的漏极作为总使能控制模块 11 的输出端。当 MCU 通过第一电阻 R1 输出高电平信号时,第一 NPN 开关三极管 Q1 导通,第一 NPN 开关三极管 Q1 的集电极为低电平,即第二 PMOS 管 Q2 的栅极为低电平,第二 PMOS 管 Q2 导通,升压模块 12 的输入电压等于供电电压;否则, MCU 输出低电平时,第一 NPN 开关三极管 Q1 和第二 PMOS 管 Q2 都不导通,升压模块 12 的输入电压接近 0V 。在本发明实施例中,总使能控制模块 11 也可以不包括第一电阻 R1 ,则第一 NPN 开关三极管 Q1 的基极直接接 MCU 。 The total enable control module 11 includes a first NPN switch transistor Q1, a second PMOS transistor Q2, and a first resistor R1. And a second resistor R2, wherein one end of the first resistor R1 is connected to the MCU, and the other end of the first resistor R1 is connected to the base of the first NPN switch transistor Q1, and the first resistor R1 Used for current limiting to prevent the base current of the first NPN switch transistor Q1 from being too large, the emitter of the first NPN switch transistor Q1 is grounded, and the first NPN switch transistor Q1 The collector is connected to one end of the second resistor R2 and the gate of the second PMOS transistor Q2, and the drain of the second PMOS transistor Q2 is connected to the input voltage terminal of the boost module 12, and the second PMOS transistor The source of Q2 is connected to the other end of the second resistor R2 and the voltage input terminal Vin of the control circuit of the electrical stimulation device, and the drain of the second PMOS transistor Q2 serves as the output of the total enable control module 11. when When the MCU outputs a high level signal through the first resistor R1, the first NPN switch transistor Q1 is turned on, and the collector of the first NPN switch transistor Q1 is at a low level, that is, the second PMOS transistor The gate of Q2 is low, the second PMOS transistor Q2 is turned on, and the input voltage of boost module 12 is equal to the supply voltage; otherwise, when the MCU outputs low level, the first NPN switch transistor Q1 The second PMOS transistor Q2 is not turned on, and the input voltage of the boost module 12 is close to 0V. In the embodiment of the present invention, the total enable control module 11 may also include the first resistor R1, and then the first The base of the NPN switch transistor Q1 is directly connected to the MCU.
升压模块 12 包括输入电感 L1 、瞬态抑制二极管 D1 、续流二极管 D2 、第三 NMOS 开关管 Q3 、输出滤波电容 C1 、第三电阻 R3 、第四电阻 R4 和第五电阻 R5 组成。串联的第四电阻 R4 和第五电阻 R5 组成升压模块 12 的反馈网络。升压模块 12 的输入电感 L1 的前端接总使能控制模块 11 的输出端以及瞬态抑制二极管 D1 的负极,输入电感 L1 的末端接第三 NMOS 开关管 Q3 的漏极和续流二极管 D2 的正极,第三 NMOS 开关管 Q3 的栅极接 MCU 的控制端,第三 NMOS 开关管 Q3 的源极接地,续流二极管 D2 的负极接输出滤波电容 C1 的一端,第三电阻 R3 以及串联的第四电阻 R4 和第五电阻 R5 组成的反馈网络接输出滤波电容 C1 的两端。当 MCU 通过第三 NMOS 开关管 Q3 的栅极输出高电平时,第三 NMOS 开关管 Q3 导通,电源对输入电感 L1 进行充电储能;当 MCU 通过第三 NMOS 开关管 Q3 的栅极输出低电平时,第三 NMOS 开关管 Q3 截止,输入电感 L1 和电源同时通过续流二极管 D2 进行放电,从而起到升压的目的。其中,第三电阻 R3 是假负载,防止电路出现空载的情况,同时节省了电路的能量。反馈网络通过两个分压第四电阻 R4 和第五电阻 R5 对输出进行分压, MCU 检测第五电阻 R5 端的电压,当该处电压大于所需要的电压时,输出高电平的占空比减小,充电时间较少,从而使输出电压减小;当该处电压小于所需要的电压时,输出高电平的占空比增大,充电时间增加,从而使输出电压增大。通过对反馈网络的第四电阻 R4 和第五电阻 R5 的检测反馈,稳定了输出电压的幅度。第三电阻 R3 的两端作为升压电路 12 的输出端接波形控制模块 13 。 The boost module 12 includes an input inductor L1, a transient suppression diode D1, a freewheeling diode D2, and a third NMOS. The switch tube Q3, the output filter capacitor C1, the third resistor R3, the fourth resistor R4, and the fifth resistor R5 are formed. The fourth resistor R4 and the fifth resistor R5 connected in series constitute a boost module 12 Feedback network. The input inductor L1 of the boost module 12 is connected to the output of the total enable control module 11 and the negative terminal of the transient suppression diode D1. The end of the input inductor L1 is connected to the third NMOS. The drain of the switch Q3 and the anode of the freewheeling diode D2, the gate of the third NMOS switch Q3 is connected to the control terminal of the MCU, the source of the third NMOS switch Q3 is grounded, and the freewheeling diode The negative pole of D2 is connected to the output filter capacitor C1, and the third resistor R3 and the fourth resistor R4 and the fifth resistor R5 connected in series are connected to the output filter capacitor C1. When MCU When the gate of the third NMOS switch Q3 outputs a high level, the third NMOS switch Q3 is turned on, and the power supply charges the input inductor L1; when the MCU passes the third NMOS When the gate of the switch Q3 outputs a low level, the third NMOS switch Q3 is turned off, and the input inductor L1 and the power supply pass through the freewheeling diode D2 at the same time. Discharge is performed to achieve the purpose of boosting. Among them, the third resistor R3 is a dummy load to prevent the circuit from being unloaded, and at the same time save the energy of the circuit. The feedback network passes through two voltage dividers, a fourth resistor, R4 and a fifth resistor. R5 divides the output, MCU detects the fifth resistor R5 The voltage at the terminal, when the voltage at this point is greater than the required voltage, the duty ratio of the output high level is reduced, the charging time is less, so that the output voltage is reduced; when the voltage is less than the required voltage, the output is high. The duty ratio of the level is increased, and the charging time is increased, thereby increasing the output voltage. Passing the fourth resistance to the feedback network The detection feedback of R4 and the fifth resistor R5 stabilizes the amplitude of the output voltage. Both ends of the third resistor R3 are connected to the waveform control module 13 as an output terminal of the booster circuit 12.
波形控制模块 13 包括由 MCU 输出的两个不同的占空比信号来控制的两个并联且对称的波形控制电路。其中,两个并联且对称的波形控制电路包括第一波形控制电路和第二波形控制电路,第一波形控制电路和第二波形控制电路均包括并联的开关电路和输出逻辑控制电路。 Waveform Control Module 13 included by MCU Two different duty cycle signals are output to control two parallel and symmetrical waveform control circuits. The two parallel and symmetric waveform control circuits include a first waveform control circuit and a second waveform control circuit. The first waveform control circuit and the second waveform control circuit each include a parallel switch circuit and an output logic control circuit.
其中,第一波形控制电路的开关电路包括第五 NPN 三极管 Q5 和第六电阻 R6 ,第五 NPN 三极管 Q5 的基极接 MCU , MCU 控制第五 NPN 三极管 Q5 的通断,第六电阻 R6 的一端接升压电路 12 的输出端,第六电阻 R6 的另一端接第五 NPN 三极管 Q5 的集电极,限制流过第五 NPN 三极管 Q5 的发射极和集电极的电流。第五 NPN 三极管 Q5 的发射极接第二波形控制电路的第二输入端。第一波形控制电路的输出逻辑控制电路包括第四 NPN 三极管 Q4 、第六 PNP 三极管 Q6 、第八电阻 R8 和第三二极管 D3 。第四 NPN 三极管 Q4 的集电极接第六电阻 R6 的一端和升压电路 12 的输出端,第四 NPN 三极管 Q4 的基极接第六电阻 R6 的另一端,第四 NPN 三极管 Q4 的集电极作为第一波形控制电路的第一输出端接第二波形控制电路的第一输入端,第四 NPN 三极管 Q4 的发射极接第八电阻 R8 的一端,第八电阻 R8 的另一端接第一电压输出端 OUT1 和第三二极管 D3 的正极,第三二极管 D3 的负极接第六 PNP 三极管 Q6 的集电极,第六 PNP 三极管 Q6 的基极接第五 NPN 三极管 Q5 的集电极,第六 NPN 三极管 Q6 的发射极作为第一波形控制电路的第二输出端接第二波形控制电路的第二输入端。 Wherein the switching circuit of the first waveform control circuit comprises a fifth NPN transistor Q5 and a sixth resistor R6, a fifth NPN The base of the transistor Q5 is connected to the MCU, the MCU controls the on and off of the fifth NPN transistor Q5, and one end of the sixth resistor R6 is connected to the output of the booster circuit 12, and the sixth resistor R6 The other end is connected to the collector of the fifth NPN transistor Q5, limiting the current flowing through the emitter and collector of the fifth NPN transistor Q5. Fifth NPN Transistor Q5 The emitter is connected to the second input of the second waveform control circuit. The output logic control circuit of the first waveform control circuit includes a fourth NPN transistor Q4, a sixth PNP transistor Q6, and an eighth resistor R8. And a third diode D3. The collector of the fourth NPN transistor Q4 is connected to one end of the sixth resistor R6 and the output of the booster circuit 12, and the base of the fourth NPN transistor Q4 is connected to the sixth resistor. At the other end of R6, the collector of the fourth NPN transistor Q4 serves as the first output of the first waveform control circuit and is connected to the first input of the second waveform control circuit, and the fourth NPN transistor Q4 The emitter is connected to one end of the eighth resistor R8, and the other end of the eighth resistor R8 is connected to the anode of the first voltage output terminal OUT1 and the third diode D3, and the cathode of the third diode D3 is connected to the sixth PNP. The collector of the transistor Q6, the base of the sixth PNP transistor Q6 is connected to the collector of the fifth NPN transistor Q5, and the sixth NPN transistor Q6 The emitter is connected to the second input of the second waveform control circuit as a second output of the first waveform control circuit.
其中,第八电阻 R8 可根据输出波形的幅度和负载大小进行适当的调制,得到所要的输出电压幅度。第八电阻 R8 具有过流和空载保护功能,一方面防止负载短路出现电流过大烧坏电路元器件,另一方面防止空载输出电压幅度过高。第三二极管 D3 可以防止电流通过第六 PNP 三极管 Q6 回流。当 MCU 的两个控制口 P1 和 P2 同时输出高电平和同时输出低电平时,输出端的电动势相等,没有电压差。当 MCU 的两个控制口 P1 和 P2 一个输出高电平,一个输出低电平时,第一电压输出端 OUT1 有电动势差,正常输出。 The eighth resistor R8 can be appropriately modulated according to the amplitude of the output waveform and the magnitude of the load to obtain the desired output voltage amplitude. Eightth resistor The R8 has overcurrent and no-load protection functions. On the one hand, it prevents the load from short-circuiting and the current is too large to burn out the circuit components. On the other hand, it prevents the no-load output voltage from being too high. The third diode D3 prevents current from passing through the sixth PNP Transistor Q6 reflows. When the two control ports P1 and P2 of the MCU output high level at the same time and output low level at the same time, the electromotive force at the output terminal is equal, and there is no voltage difference. When the two control ports of the MCU are P1 And P2 one output high level, one output low level, the first voltage output terminal OUT1 has electromotive force difference, normal output.
第二波形控制电路的开关电路包括第八 NPN 三极管 Q8 和第七电阻 R7 ,第八 NPN 三极管 Q8 的基极接 MCU , MCU 控制第八 NPN 三极管 Q8 的通断,第七电阻 R7 的一端接升压电路 12 的输出端和第一波形控制电路的第一输出端,第七电阻 R7 的另一端接第八 NPN 三极管 Q8 的集电极,限制流过第八 NPN 三极管 Q8 的发射极和集电极的电流。第八 NPN 三极管 Q8 的发射极接第一波形控制电路的第二输出端。第二波形控制电路的输出逻辑控制电路包括第七 NPN 三极管 Q7 、第九 PNP 三极管 Q9 、第九电阻 R9 和第四二极管 D4 。第七 NPN 三极管 Q7 的集电极接第七电阻 R7 的一端、升压电路 12 的输出端和第一波形控制电路的第一输出端,第七 NPN 三极管 Q7 的基极接第七电阻 R7 的另一端,第七 NPN 三极管 Q7 的发射极接第九电阻 R9 的一端,第九电阻 R9 的另一端接第二电压输出端 OUT2 和第四二极管 D4 的正极,第四二极管 D4 的负极接第九 PNP 三极管 Q9 的集电极,第九 PNP 三极管 Q9 的基极接第八 NPN 三极管 Q8 的集电极,第九 PNP 三极管 Q9 的发射极接第八 NPN 三极管 Q8 的发射极和第一波形控制电路的第二输出端。 The switching circuit of the second waveform control circuit includes an eighth NPN transistor Q8 and a seventh resistor R7, and an eighth NPN transistor The base of Q8 is connected to the MCU, the MCU controls the on and off of the eighth NPN transistor Q8, and the seventh resistor R7 is connected to the boost circuit at one end. The output is connected to the first output of the first waveform control circuit, and the other end of the seventh resistor R7 is connected to the collector of the eighth NPN transistor Q8, and is limited to flow through the eighth NPN transistor Q8. The current of the emitter and collector. The emitter of the eighth NPN transistor Q8 is connected to the second output of the first waveform control circuit. The output logic control circuit of the second waveform control circuit includes a seventh NPN transistor Q7 , ninth PNP transistor Q9, ninth resistor R9 and fourth diode D4. The collector of the seventh NPN transistor Q7 is connected to one end of the seventh resistor R7, and the boosting circuit 12 The output end is connected to the first output of the first waveform control circuit, the base of the seventh NPN transistor Q7 is connected to the other end of the seventh resistor R7, and the emitter of the seventh NPN transistor Q7 is connected to the ninth resistor R9. At one end, the other end of the ninth resistor R9 is connected to the second voltage output terminal OUT2 and the anode of the fourth diode D4, and the cathode of the fourth diode D4 is connected to the collector of the ninth PNP transistor Q9, ninth. The base of the PNP transistor Q9 is connected to the collector of the eighth NPN transistor Q8, and the emitter of the ninth PNP transistor Q9 is connected to the eighth NPN transistor Q8. The emitter and the second output of the first waveform control circuit.
其中,第九电阻 R9 可根据输出波形的幅度和负载大小进行适当的调制,得到所要的输出电压幅度。第九电阻 R9 具有过流和空载保护功能,一方面防止负载短路出现电流过大烧坏电路元器件,另一方面防止空载输出电压幅度过高。第四二极管 D4 可以防止电流通过第九 PNP 三极管 Q9 回流。当 MCU 的两个控制口 P1 和 P2 同时输出高电平和同时输出低电平时,输出端的电动势相等,没有电压差。当 MCU 的两个控制口 P1 和 P2 一个输出高电平,一个输出低电平时,第二电压输出端 OUT2 有电动势差,正常输出。 Among them, the ninth resistor R9 can be appropriately modulated according to the amplitude of the output waveform and the magnitude of the load to obtain the desired output voltage amplitude. Ninth resistor R9 has overcurrent and no-load protection functions. On the one hand, it prevents the load from short-circuiting and the current is too large to burn out the circuit components. On the other hand, it prevents the no-load output voltage from being too high. The fourth diode D4 prevents current from passing through the ninth PNP Transistor Q9 is reflowed. When the two control ports P1 and P2 of the MCU output high level at the same time and output low level at the same time, the electromotive force at the output terminal is equal, and there is no voltage difference. When the two control ports of the MCU are P1 And P2 one output high level, one output low level, the second voltage output terminal OUT2 has electromotive force difference, normal output.
由于波形控制模块 13 采用两个并联且对称的波形控制电路,因此使电刺激装置的控制电路的输出波形具有对称性,容易进行输出控制;且通过 MCU 14 输出的两个不同的占空比信号,在电刺激装置的控制电路的输出端可以得到任意峰值和任意占空比的方波信号。 Due to the waveform control module 13 Two parallel and symmetrical waveform control circuits are used, so that the output waveform of the control circuit of the electrical stimulation device has symmetry and is easy to perform output control; and through the MCU 14 Two different duty cycle signals are output, and a square wave signal of arbitrary peak value and arbitrary duty ratio can be obtained at the output of the control circuit of the electrical stimulation device.
本发明实施例还提供了一种包括本发明实施例提供的电刺激装置的控制电路的电刺激装置。 An embodiment of the present invention further provides an electrical stimulation device including a control circuit of an electrical stimulation device provided by an embodiment of the present invention.
以上所述仅为本发明的较佳实施例而已,并不用以限制本发明,凡在本发明的精神和原则之内所作的任何修改、等同替换和改进等,均应包含在本发明的保护范围之内。 The above is only the preferred embodiment of the present invention, and is not intended to limit the present invention. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present invention should be included in the protection of the present invention. Within the scope.

Claims (1)

  1. 1. 一种电刺激装置的控制电路,所述控制电路包括总使能控制模块和升压模块,其特征在于,所述控制电路还包括波形控制模块和 MCU ,其中,总使能控制模块、升压模块和波形控制模块依次连接,总使能控制模块、升压模块和波形控制模块还分别与 MCU 连接,波形控制模块包括由 MCU 输出的两个不同的占空比信号来控制的两个并联且对称的波形控制电路。CLAIMS 1. A control circuit for an electrical stimulation device, the control circuit comprising a total enable control module and a boost module, wherein the control circuit further comprises a waveform control module and The MCU, wherein the total enable control module, the boost module, and the waveform control module are sequentially connected, and the total enable control module, the boost module, and the waveform control module are also respectively connected to the MCU, and the waveform control module includes the MCU. Two different duty cycle signals are output to control two parallel and symmetrical waveform control circuits.
    2. 如权利要求 1 所述的控制电路,其特征在于,每个波形控制电路包括并联的开关电路和输出逻辑控制电路。2. As claimed in claim 1 The control circuit is characterized in that each waveform control circuit comprises a parallel switch circuit and an output logic control circuit.
    3. 如权利要求 1 或 2 所述的控制电路,其特征在于,总使能控制模块包括第一 NPN 开关三极管、第二 PMOS 管和第二电阻,其中,第一 NPN 开关三极管的基极接 MCU ,第一 NPN 开关三极管的发射极接地,第一 NPN 开关三极管的集电极分别接第二电阻的一端和第二 PMOS 管的栅极,第二 PMOS 管的漏极接升压模块的输入电压端,第二 PMOS 管的源极接第二电阻的另一端以及电刺激装置的控制电路的电压输入端,第二 PMOS 管的漏极作为总使能控制模块的输出端。3. The control circuit according to claim 1 or 2, wherein the total enable control module comprises a first NPN switch transistor and a second PMOS a second resistor, wherein a base of the first NPN switch transistor is connected to the MCU, and an emitter of the first NPN switch transistor is grounded, the first NPN The collector of the switching transistor is respectively connected to one end of the second resistor and the gate of the second PMOS transistor, and the drain of the second PMOS transistor is connected to the input voltage terminal of the boosting module, the second PMOS The source of the tube is connected to the other end of the second resistor and the voltage input of the control circuit of the electrical stimulation device, and the drain of the second PMOS transistor serves as the output of the total enable control module.
    4. 如权利要求 3 所述的控制电路,其特征在于,总使能控制模块还包括第一电阻,第一 NPN 开关三极管的基极通过第一电阻接 MCU 。4. The control circuit of claim 3, wherein the total enable control module further comprises a first resistor, the first NPN The base of the switching transistor is connected to the MCU through a first resistor.
    5. 如权利要求 1 或 2 所述的控制电路,其特征在于,升压模块包括输入电感、瞬态抑制二极管、续流二极管、第三 NMOS 开关管、输出滤波电容、第三电阻、第四电阻和第五电阻组成,输入电感的前端接总使能控制模块的输出端以及瞬态抑制二极管的负极,输入电感的末端接第三 NMOS 开关管的漏极和续流二极管的正极,第三 NMOS 开关管的栅极接 MCU 的控制端,第三 NMOS 开关管的源极接地,续流二极管的负极接输出滤波电容的一端,第三电阻以及串联的第四电阻和第五电阻组成的反馈网络接输出滤波电容的两端,第三电阻的两端作为升压电路的输出端接波形控制模块。5. The control circuit according to claim 1 or 2, wherein the boosting module comprises an input inductor, a transient suppression diode, a freewheeling diode, and a third NMOS The switch tube, the output filter capacitor, the third resistor, the fourth resistor and the fifth resistor are formed. The front end of the input inductor is connected to the output terminal of the total enable control module and the negative pole of the transient suppression diode, and the end of the input inductor is connected to the third NMOS. The drain of the switch transistor and the anode of the freewheeling diode, the gate of the third NMOS switch transistor is connected to the control terminal of the MCU, and the third NMOS The source of the switch tube is grounded, the negative pole of the freewheeling diode is connected to one end of the output filter capacitor, the third resistor and the feedback network composed of the fourth resistor and the fifth resistor connected in series are connected to both ends of the output filter capacitor, and both ends of the third resistor As the output of the boost circuit, the waveform control module is connected.
    6. 如权利要求 1 所述的控制电路,其特征在于,两个并联且对称的波形控制电路包括第一波形控制电路和第二波形控制电路,第一波形控制电路和第二波形控制电路均包括并联的开关电路和输出逻辑控制电路。6. Claims 1 The control circuit is characterized in that: two parallel and symmetric waveform control circuits comprise a first waveform control circuit and a second waveform control circuit, the first waveform control circuit and the second waveform control circuit each comprise a parallel switch circuit and Output logic control circuit.
    7. 如权利要求 6 所述的控制电路,其特征在于,第一波形控制电路的开关电路包括第五 NPN 三极管和第六电阻,第五 NPN 三极管的基极接 MCU ,第六电阻的一端接升压电路的输出端,第六电阻的另一端接第五 NPN 三极管的集电极,第五 NPN 三极管的发射极接第二波形控制电路的第二输入端;第一波形控制电路的输出逻辑控制电路包括第四 NPN 三极管、第六 PNP 三极管、第八电阻和第三二极管,第四 NPN 三极管的集电极接第六电阻的一端和升压电路的输出端,第四 NPN 三极管的基极接第六电阻的另一端,第四 NPN 三极管的集电极作为第一波形控制电路的第一输出端接第二波形控制电路的第一输入端,第四 NPN 三极管的发射极接第八电阻的一端,第八电阻的另一端接第一电压输出端和第三二极管的正极,第三二极管的负极接第六 PNP 三极管的集电极,第六 PNP 三极管的基极接第五 NPN 三极管的集电极,第六 NPN 三极管的发射极作为第一波形控制电路的第二输出端接第二波形控制电路的第二输入端。7. The control circuit according to claim 6, wherein the switching circuit of the first waveform control circuit comprises a fifth NPN transistor and a sixth resistor, and a fifth The base of the NPN transistor is connected to the MCU, one end of the sixth resistor is connected to the output of the booster circuit, and the other end of the sixth resistor is connected to the collector of the fifth NPN transistor, the fifth NPN The emitter of the transistor is connected to the second input of the second waveform control circuit; the output logic control circuit of the first waveform control circuit comprises a fourth NPN transistor, a sixth PNP transistor, an eighth resistor and a third diode, and a fourth The collector of the NPN transistor is connected to one end of the sixth resistor and the output of the booster circuit, and the base of the fourth NPN transistor is connected to the other end of the sixth resistor, the fourth NPN The collector of the triode is connected as a first output end of the first waveform control circuit to the first input end of the second waveform control circuit, and the fourth NPN The emitter of the triode is connected to one end of the eighth resistor, the other end of the eighth resistor is connected to the first voltage output terminal and the anode of the third diode, and the cathode of the third diode is connected to the collector of the sixth PNP transistor, sixth PNP The base of the triode is connected to the collector of the fifth NPN transistor, the sixth NPN The emitter of the transistor is connected to the second input of the second waveform control circuit as a second output of the first waveform control circuit.
    8. 如权利要求 6 或 7 所述的控制电路,其特征在于,第二波形控制电路的开关电路包括第八 NPN 三极管和第七电阻,第八 NPN 三极管的基极接 MCU ,第七电阻的一端接升压电路的输出端和第一波形控制电路的第一输出端,第七电阻的另一端接第八 NPN 三极管的集电极,第八 NPN 三极管的发射极接第一波形控制电路的第二输出端;第二波形控制电路的输出逻辑控制电路包括第七 NPN 三极管、第九 PNP 三极管、第九电阻和第四二极管,第七 NPN 三极管的集电极接第七电阻的一端、升压电路的输出端和第一波形控制电路的第一输出端,第七 NPN 三极管的基极接第七电阻的另一端,第七 NPN 三极管的发射极接第九电阻的一端,第九电阻的另一端接第二电压输出端和第四二极管的正极,第四二极管的负极接第九 PNP 三极管的集电极,第九 PNP 三极管的基极接第八 NPN 三极管的集电极,第九 PNP 三极管的发射极接第八 NPN 三极管的发射极和第一波形控制电路的第二输出端。8. The control circuit according to claim 6 or 7, wherein the switching circuit of the second waveform control circuit comprises an eighth NPN a transistor and a seventh resistor, the base of the eighth NPN transistor is connected to the MCU, one end of the seventh resistor is connected to the output end of the booster circuit and the first output end of the first waveform control circuit, and the other end of the seventh resistor is connected to the eighth NPN The collector of the triode, the emitter of the eighth NPN transistor is connected to the second output of the first waveform control circuit; the output logic control circuit of the second waveform control circuit comprises a seventh NPN transistor, the ninth PNP a transistor, a ninth resistor and a fourth diode, a collector of the seventh NPN transistor connected to one end of the seventh resistor, an output of the booster circuit, and a first output of the first waveform control circuit, a seventh NPN The base of the triode is connected to the other end of the seventh resistor, the emitter of the seventh NPN transistor is connected to one end of the ninth resistor, and the other end of the ninth resistor is connected to the anode of the second voltage output terminal and the fourth diode, the fourth The negative pole of the pole tube is connected to the ninth The collector of the PNP transistor, the base of the ninth PNP transistor is connected to the collector of the eighth NPN transistor, and the emitter of the ninth PNP transistor is connected to the eighth NPN The emitter of the transistor and the second output of the first waveform control circuit.
    9. 一种包括权利要求 1 所述的电刺激装置的控制电路的电刺激装置。9. An electrical stimulation device comprising a control circuit of the electrical stimulation device of claim 1.
PCT/CN2015/089421 2014-09-15 2015-09-11 Electrical stimulation device and control circuit therefor WO2016041467A1 (en)

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CN107174740A (en) * 2017-07-05 2017-09-19 浙江中医药大学 A kind of miniature electric stimulation and a kind of preventing or arresting vomiting bracelet
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CN108465155A (en) * 2018-02-28 2018-08-31 深圳市创荣发电子有限公司 Massage plaster control circuit
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CN109814984A (en) * 2019-02-01 2019-05-28 宁波市金泽机电科技有限公司 A kind of anti-crash control circuit of embedded system
CN112675424A (en) * 2019-10-18 2021-04-20 苏州景昱医疗器械有限公司 Stimulus source generating circuit for neural stimulator
CN111135455A (en) * 2020-01-06 2020-05-12 深圳市康美生科技有限公司 Wireless control wireless charging pelvic floor muscle treatment training system

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