WO2016037560A1

WO2016037560A1 - Data writing method and apparatus and memory

Info

Publication number: WO2016037560A1
Application number: PCT/CN2015/089156
Authority: WO
Inventors: 沙行勉; 诸葛晴凤; 朱冠宇; 王元钢; 石亮
Original assignee: 华为技术有限公司
Priority date: 2014-09-10
Filing date: 2015-09-08
Publication date: 2016-03-17
Also published as: CN105468533A; CN105468533B

Abstract

A data writing method and apparatus and a memory, which are used to write data to a non-volatile storage medium NVM. The method comprises: determining a sample data block of a to-be-written data block from the to-be-written data block (S100); separately comparing the sample data block of the to-be-written data block with N sample data blocks in a preset sample set (S200); determining, from the N sample data blocks, a sample data block having the highest matching degree with the sample data block of the to-be-written data block to serve as a target sample data block (S300); and writing the to-be-written data block to a free address space corresponding to the target sample data block (S400). The method reduces the number of write operations during data writing and thus can solve the problems of high energy consumption and reduced service life of the NVM caused by a large number of write operations during data writing.

Description

Data writing method, device and memory

Technical field

The present invention relates to the field of data storage technologies, and in particular, to a data writing method, apparatus, and memory.

Background technique

Non-Volatile Memory (NVM) features no loss of content when power is lost. For example, a flash memory, a PCM (Phase Change Memory), a FRAM (Ferroelectric Random Access Memory), etc., can maintain on-chip information even after power is turned off. At present, the most widely used non-volatile memory is Flash, but its read and write speed is difficult to compete with DRAM (Dynamic Random Access Memory), so it can only replace disk as external memory. Memory such as PCM and FRAM is characterized by fast read and write speed, high density, and byte addressability. It is regarded as the next generation of new non-volatile memory and can be used to replace DRAM and SDRAM. PCM is the most typical representative of NVM. The following is an example of PCM.

PCM is to store data by using a special material (chalcogenide GST) to reflect the difference in conductivity between the crystalline and amorphous states, and the stored data is realized by a write operation including: SET operation (write 0) and RESET operation (write 1). In an existing NVM device, when data is written, one memory block is usually selected in the storage medium, and data to be written is written to the memory block regardless of the value of the storage bit in the selected memory block. This makes the value of the memory bit in the memory block at the same location different from the value of the data bit of the data to be written, and may even be completely different, for example, the data to be written is 8*8 size, and each data to be written is The value of each data bit is 1, and the value of the memory bit in the memory block is 0. Therefore, the value of each memory bit in the memory block needs to be rewritten during writing, resulting in data writing. More writes to the memory bits in the store are required.

In the NVM application device, whether it is the RESET operation of the NVM or the SET operation, the NVM write operation consumes about 10 to 100 times more energy than the read operation. Therefore, during the working process of NVM, a large number of write operations will not only bring high energy consumption, but also reduce the service life of the NVM.

Summary of the invention

The embodiment of the invention provides a data writing method, device and memory, which can reduce the number of write operations when writing data, reduce the energy consumption of the write operation, and improve the service life of the NVM.

In order to solve the above technical problem, the embodiment of the present invention discloses the following technical solutions:

In a first aspect, an embodiment of the present invention provides a data writing method for writing data to a non-volatile storage medium NVM, the method comprising:

Determining, from the data block to be written, the sample data block of the data block to be written;

Comparing the sample data blocks of the data block to be written with N sample data blocks in a preset sample set, wherein a size of each of the N sample data blocks and the to-be-written The size of the sample data block of the inbound data block is the same, and the N sample data blocks are respectively obtained from the data blocks of the N free address spaces in the NVM, where N is an integer not less than 2;

Determining, in the N sample data blocks, one sample data block having the highest matching degree with the sample data block of the to-be-written data block as a target sample data block;

Writing the to-be-written data block into a free address space corresponding to the target sample data block.

With reference to the first aspect, in a first possible implementation manner of the first aspect, the writing the to-be-written data block into the free address space corresponding to the target sample data block includes:

Determining a target data block corresponding to the target sample data block in the data block of the N free address spaces;

Determining, in the target data block, a data bit different from the data block to be written;

In the address space in which the target data block is stored, the determined data of the data bit different from the to-be-written data block is rewritten according to the to-be-written data block.

With reference to the first aspect, in a second possible implementation manner of the first aspect, the determining, in the N sample data blocks, a sample data block with the highest matching degree with the sample data block of the data block to be written As the target sample data block, including:

Calculating a similarity rate of the sample data block of the to-be-written data block and the N sample data blocks, where the similarity is the sample data block in the data block to be written and the sample data block in the sample set The ratio of the number of identical data bits in the middle to the number of all data bits in the sample data block of the data block to be written;

A sample data block having the highest similarity rate of the sample data block of the to-be-written data block among the N sample data blocks is determined as a target sample data block.

With reference to the first aspect, in a third possible implementation manner of the first aspect, the method further includes:

Deleting a sample data block corresponding to the target sample data block from the preset sample set;

Determining whether the number of sample data blocks in the preset sample set is less than a preset number;

When the number of sample data blocks in the preset sample set is less than the preset number, acquiring a new sample data block from the data block of the free address space in the NVM and adding to the preset sample set, Updating the preset sample set.

In a second aspect, an embodiment of the present invention provides a data writing apparatus for writing data to a non-volatile storage medium NVM, including:

a sample data block determining module, configured to determine a sample data block of the data block to be written from the data block to be written;

a sample data block comparison module, configured to compare the sample data block of the data block to be written with N sample data blocks in a preset sample set, wherein each sample data of the N sample data blocks The size of the block is the same as the size of the sample data block of the data block to be written, and the N sample data blocks are respectively obtained from data blocks of N free address spaces in the NVM, where N is not less than An integer of 2;

a target sample data block determining module, configured to determine, in the N sample data blocks, one sample data block having the highest matching degree with the sample data block of the data block to be written as a target sample data block;

And a writing module, configured to write the to-be-written data block into a free address space corresponding to the target sample data block.

With reference to the second aspect, in a first possible implementation manner of the second aspect, the writing module includes:

a target data block determining unit that determines a target data block corresponding to the target sample data block in the data block of the N free address spaces;

a data bit determining unit, configured to determine a data bit in the target data block that is different from the data block to be written;

And a data rewriting unit, configured to rewrite data of the determined data bit different from the to-be-written data block according to the to-be-written data block in an address space in which the target data block is stored.

With reference to the second aspect, in a second possible implementation manner of the second aspect, the target sample data block determining module includes:

a similarity rate calculating unit, respectively calculating a similarity rate of the sample data block of the to-be-written data block and the N sample data blocks, the similarity rate being in the sample data block of the to-be-written data block and the a ratio of the number of identical data bits in the sample set sample data block to the number of all data bits in the sample data block of the data block to be written;

And a determining unit, configured to determine, as the target sample data block, a sample data block with the highest similarity rate of the sample data block of the to-be-written data block among the N sample data blocks.

With reference to the second aspect, in a third possible implementation manner of the second aspect, the device further includes:

a sample data block deleting module, configured to delete a sample data block corresponding to the target sample data block from the preset sample set;

a determining module, configured to determine whether the number of sample data blocks in the preset sample set is less than a preset number;

And an update module, configured to: when the number of sample data blocks in the preset sample set is less than the preset number, acquire a new sample data block from a data block of a free address space in the NVM and add the The preset sample set is updated by the preset sample set.

In a third aspect, an embodiment of the present invention provides a memory, including: a non-volatile storage medium NVM and an NVM controller, where

The VNM is configured to store data;

The NVM controller is configured to determine a sample data block of the to-be-written data block from a to-be-written data block;

In conjunction with the third aspect, in a first possible implementation manner of the third aspect, the NVM controller is specifically configured to:

Determining, in the target data block, a data bit different from the sample data block of the data block to be written;

In the address space in which the target data block is stored, the determined data of the data bit different from the sample data block of the data block to be written is rewritten according to the to-be-written data block.

In conjunction with the third aspect, in a second possible implementation manner of the third aspect, the NVM controller is specifically configured to:

In conjunction with the third aspect, in a third possible implementation manner of the third aspect, the NVM controller is further configured to:

It can be seen from the above technical solution that the method provided by the embodiment of the present invention selects a sample data block from the to-be-written data block when the data block to be written is written into the NVM, and then pre-acquires from the NVM. The N sample data blocks are respectively compared with the selected sample data block of the data block to be written, and a sample data block having the highest matching degree with the sample data block of the data block to be written is determined in the N sample data blocks. As the target sample data block, the data block to be written is finally written into the free address space corresponding to the target sample data block. In the data writing method provided by the embodiment of the present invention, when data is written to the NVM, the data block to be written is not randomly written into the NVM, but the data block to be written is written and retrieved from the NVM. The determined one of the N sample data blocks corresponds to the free storage space corresponding to the sample data block that best matches the sample data block of the data block to be written. Therefore, the data writing method provided by the embodiment of the present invention can reduce the number of rewriting of data bits in the NVM when writing data, thereby reducing the number of write operations. Thereby reducing the energy consumption of the write operation and increasing the service life of the NVM.

DRAWINGS

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the embodiments or the description of the prior art will be briefly described below, and it will be apparent to those skilled in the art that In other words, other drawings can be obtained based on these drawings without paying for creative labor.

1 is a schematic structural diagram of a memory according to an embodiment of the present invention;

2 is a schematic flowchart of a data writing method according to an embodiment of the present invention;

3 is a schematic flow chart of step S300 in FIG. 2;

4 is a schematic diagram of data writing according to an embodiment of the present invention;

FIG. 5 is a schematic flowchart of step S400 in FIG. 2;

FIG. 6 is a schematic flowchart diagram of another data writing method according to an embodiment of the present disclosure;

FIG. 7 is a schematic structural diagram of a data writing apparatus according to an embodiment of the present disclosure;

8 is a schematic structural view of a write module of FIG. 7;

9 is a schematic structural diagram of a target sample data block determining module in FIG. 7;

FIG. 10 is a schematic structural diagram of another data writing apparatus according to an embodiment of the present invention.

detailed description

In order to make those skilled in the art better understand the technical solutions in the present invention, the technical solutions in the embodiments of the present invention will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present invention. The embodiments are only a part of the embodiments of the invention, and not all of the embodiments.

The method provided by the embodiment of the present invention may be used for, but not limited to, a non-volatile memory NVM, for example: A flash memory, a PCM (Phase Change Memory), a FRAM (Ferroelectric Random Access Memory), and the like are also applicable to other storage devices that perform a write operation by rewriting the storage bit state.

It should be noted that the non-volatile memory described in the embodiments of the present invention may include: Phase Change Memory (PCM), Resistive Random Access Memory (RRAM), and Magnetic Random Access (Magnetic Random Access). Memory, MRAM) or new nonvolatile memory such as Ferroelectric Random Access Memory (FRAM). These new NVMs are fast and non-volatile, and these new NVMs can be addressed in Bytes and write data in non-volatile storage media in bits. .

FIG. 1 is a schematic structural diagram of a nonvolatile memory 100 according to an embodiment of the present invention. As shown in FIG. 1, the non-volatile memory 100 can include an NVM controller 102, a memory 104, a host interface 106, and a storage medium 108.

The host interface 106 is used to connect to the host and communicate with the host. For example, it is used to receive an I/O request issued by the host, or return data read from the storage medium 108 to the host. The host interface 106 may include a Serial Advanced Technology Attachment (SATA) interface, a Universal Serial Bus (USB) interface, a Fibre Channel (FC) interface, or a fast peripheral interconnection. Peripheral Component Interconnect Express (PCI-E) interface. It will be appreciated that host interface 106 is merely one example of a communication interface in which, in addition to host interface 106 in communication with the host, a backend communication interface in communication with backend storage medium 108 may be included.

The memory 104 is used to store data and programs 109 that the processor 1022 is currently using (ie, in execution). For example, when a host writes data to the NVM, the memory 104 can be used to cache data that the host is to write. When the host reads data from the NVM, the memory 104 can be used to cache data to be returned from the storage medium 108 to be returned to the host. The memory 104 can be a non-transitory machine readable medium that can store program code, such as high speed RAM memory or non-volatile memory.

Program 109 can include program code, the program code including computer operating instructions.

A storage medium 108 for storing data. The storage medium 108 can be composed of a plurality of storage units. In the embodiment of the present invention, the storage unit in the storage medium 108 refers to the smallest storage medium unit for storing data. For example, the memory unit may include a nonvolatile memory unit such as a phase change memory unit, a magnetic memory unit, a resistive memory unit, or the like.

The NVM controller 102 mainly includes a processor 1022, a cache 1024, and a back end communication interface 1026. The processor 1022, the cache 1024, and the backend communication interface 1026 complete communication with each other over the communication bus.

The cache 1024 is a temporary memory located between the processor 1022 and the memory 104. Its capacity is smaller than the memory 104 but the exchange speed is faster than the memory 104. The cache 1024 is used to cache data that the processor 1022 is to write to the storage medium 108 or data that is read from the storage medium 108 for buffer memory 104 transfers. The cache 1024 may be a variety of machine readable media that can store data, such as RAM, ROM, Flash memory, and the like. The cache 1024 can include multiple levels, for example, can include a level 1 cache, a level 2 cache, and a level 3 cache.

A backend communication interface 1026 is for communicating with the storage medium 108. For example, it can be used to manage access commands to the storage medium 108 issued by the processor 1022 and to perform data transmission. It can be understood that a plurality of communication channels can be included in the backend communication interface 1026 for connecting different storage units in the storage medium 108.

The processor 1022 can be a central processing unit CPU, or an Application Specific Integrated Circuit (ASIC), or one or more integrated circuits configured to implement embodiments of the present invention. An operating system and other software programs are installed in the processor 1022, and different software programs can be regarded as one processing module having different functions. For example, processor 1022 can implement an access request to storage medium 108, or manage data in storage medium 108, and the like. For example, the processor 1022 can receive the input and output I/O request forwarded by the host interface 106 through the communication bus, and access the storage medium 108 through the backend communication interface 1026 according to the I/O request issued by the host, and write to the storage medium 108. The data is either read from the storage medium 108.

In the embodiment of the present invention, when the processor 1022 writes data to the storage medium 108, the program 109 may be executed. Specifically, the related steps in the following method embodiments may be performed to achieve wear leveling. The method for how the NVM 100 specifically implements wear leveling in the embodiment of the present invention will be described in detail below.

FIG. 2 is a schematic flowchart diagram of a data writing method according to an embodiment of the present invention. As shown in FIG. 2, the data writing method may include the following steps.

Step S100: Determine a sample data block of the data block to be written from the data block to be written.

Referring to FIG. 1 above, the processor 1022 in the NVM controller 102 receives a data write request sent by the host through the host interface 106, carries data to be written in the data write request, and the processor 1022 writes data to be written. Writing to the buffer 1024 forms a block of data to be written.

The processor 1022 may determine one data block from the data block to be written as the sample data block, and the sample data block is a preset size, for example, 1 k, 2 k or other fixed size. In the embodiment of the present invention, as shown in FIG. 4, a is a sample data block of a data block to be written, and its size is 8*8. It can be understood that, in this step, the processor 1022 can select the sample data block according to the preset size in the data block to be written according to the preset position, and the specific strategy for acquiring the sample data block can be specifically set according to actual conditions. The size and acquisition location of the sample data block are not specifically limited here.

Step S200: Compare the sample data blocks of the data block to be written with the N sample data blocks in the preset sample set.

The size of each of the N sample data blocks in the preset sample set is the same as the size of the sample data block of the data block to be written, as shown in FIG. 4, where b is a preset sample set. The sample data block is also 8*8. In the embodiment of the present invention, N sample data blocks are respectively obtained from data blocks of N free address spaces in the NVM, where N is an integer not less than 2. Referring to FIG. 1, the N sample data blocks in the preset sample set may be scanned by the processor 1022 through the back end communication interface 1026 in advance, and the data blocks of the N free address spaces are read from the storage medium 108. N sample data blocks, and when the N sample data blocks are read, the correspondence between the N sample data blocks in the sample set and the physical addresses of the N free address spaces is also established, so as to facilitate N samples according to the sample set. The data block can find the physical address of the free address space corresponding to each sample data block, and the data block is a garbage block. It should be noted that, in the embodiment of the present invention, the policy of selecting the sample data block to be written into the data block may be the same as the acquisition strategy of the sample data block in the sample set. According to this manner, the sample data block of the data block to be written is determined. And the sample data blocks in the sample set are obtained at preset positions according to a preset size.

In step S300, one sample data block having the highest degree of matching with the sample data block of the data block to be written is determined as the target sample data block among the N sample data blocks.

In an embodiment of the invention, as shown in FIG. 3, the step may include the following steps:

Step S301: Calculate the similarity rate of the sample data block of the to-be-written data block and the N sample data blocks, respectively.

In this embodiment, the similarity ratio refers to the same number of data bits in the sample data block of the data block to be written and the sample data block in the sample set, and all data bits in the sample data block of the sample set. The ratio of the number. Wherein, the same data bit refers to the same position in the two data blocks and the data bits are the same. As shown in FIG. 4, the data bit of the upper left corner of the sample data block a to be written into the data block is 1, pre- It is assumed that the data bit of the upper left corner of the sample data block b in the sample set is also 1, and the data bits located in the upper left corner of the sample are the same data bits.

Taking FIG. 4 as an example, in the figure, the number of data bits in the sample data block a of the data block to be written and the sample data block b in the preset sample set is 24, and the sample data block b in the preset sample set is The number of all data bits is 64, then in Figure 4, the similarity rate of the sample data block a of the data block to be written to the sample data block b of the preset sample set is 24/64.

Step S302: Determine a sample data block with the highest similarity rate of the sample data block of the to-be-written data block among the N sample data blocks as the target sample data block.

In other embodiments of the present invention, in step S300, in one case, according to the number of data bits in the sample data block of the data block to be written and the N sample data blocks, directly in the N Sample data block Determining a sample data block with the highest degree of matching with the sample data block of the data block to be written. In another case, the sample data block to be written to the data block may be different from the number of data bits in the N sample data blocks, or different data bits and sample data blocks in the sample set. A ratio of the number of all data bits to determine a sample data block that has the highest degree of matching with the sample data block of the data block to be written.

Step S400: Write the to-be-written data block into a free address space corresponding to the target sample data block.

In the embodiment of the present invention, as shown in FIG. 5, the step may include the following steps:

Step S401: Determine a target data block corresponding to the target sample data block in the data block of the N free address spaces.

According to the correspondence between the N sample data blocks in the sample set and the physical addresses of the N free address spaces established in the above step S200, after determining the target sample data block, the corresponding sample data block may be found according to the corresponding relationship. Target data block.

Step S402: Determine a data bit in the target data block that is different from the data block to be written.

Referring to the description of the sample data block in the above step 300, the data on the data bit different from the sample data block of the data block to be written in the target data block is different.

Step S403: In the address space in which the target data block is stored, rewriting data of the determined data bit different from the to-be-written data block according to the to-be-written data block.

In this way, in this step, only the data of the data bits different from the sample data block of the data block to be written in the target data block can be overwritten in the address space of the target data block.

For example, in FIG. 4, if the sample data block a of the data block to be written is written into the sample data block b in the preset sample set, the data block obtained after the writing is c. The data bits shown by the shadows are different data bits of the data, and the data bits that are not filled with the shadows are the same data bits of the data. When data is written, as shown in FIG. 4, it is only necessary to rewrite the data of the data bits indicated by the hatching. For example, in the case of PCM, only the crystal state of the storage medium corresponding to the data can be changed. It can be understood that, in the schematic diagram shown in FIG. 4, the data of the unfilled data bits in c of the data block is the same as the sample data block a of the data block to be written and the sample data block b of the preset sample set. The data bits are all the same, so there is no need to rewrite the data for the data bits that fill the shadows. It can be seen that in FIG. 4, since the sample data block a of the data block to be written has the same data bits as the sample data block b in the preset sample set, the sample data of the data block to be written is shown in FIG. When the block a is written to the sample data block b in the preset sample set, it needs to be rewritten 40 times.

In the method provided by the embodiment of the present invention, when a data block to be written is written into the NVM, one sample data block is selected from the data block to be written, and then N sample data blocks pre-acquired from the NVM are respectively With the selected to be written Comparing the sample data blocks of the ingress data block, and determining, in the N sample data blocks, one sample data block having the highest matching degree with the sample data block of the data block to be written as the target sample data block, and finally the data to be written The block is written into the free address space corresponding to the target sample data block.

When data is written to the NVM, the data block to be written is not randomly written into the NVM, but a sample data of the data block to be written is selected from the N sample data blocks previously acquired from the NVM. The block most closely matched sample data block, the most matching sample data block means that the same number of data bits are the same in the sample data block to be written to the data block, so that when the data block to be written is written to the target sample data block The data bits different from the data block to be written may be rewritten only in the target data block corresponding to the target sample data block, and the same data bit is not rewritten. Therefore, the data writing provided by the embodiment of the present invention is The ingress method reduces the number of rewrites of data bits in the NVM when writing data, thereby reducing the number of write operations. Thereby reducing the energy consumption of the write operation and increasing the service life of the NVM.

In the embodiment shown in FIG. 2 above, the writing process of the data block to be written is described. When the data block to be written is written to the free address space corresponding to the target sample data block, the target sample data is The corresponding free address space of the block will no longer be a free address, and the data cannot be further written. That is, once the sample data block in the preset sample set is selected as the target sample data block, the sample data block will be invalid, During the writing of other blocks to be written, the sample data block that was previously selected as the target sample data block will not be selected for comparison.

In this way, in the process of continuously writing the data block to be written, the number of available sample data blocks in the preset sample set is reduced. When the number of sample data blocks in the preset sample set is less than the preset number, the subsequent When the sample data blocks in the preset sample set are compared, the matching degree between the selected target sample data block and the sample data block in the data block to be written may not be ideal, so that the number of times of rewriting is more when the data is written. In order to reduce the number of rewrites when data is written, the preset sample set is also updated during the process of reducing the number of available sample data blocks in the preset sample set.

As shown in FIG. 6, the method may further include the following steps:

Step S500: deleting a sample data block corresponding to the target sample data block in the preset sample set.

Since all the sample data blocks in the preset sample set are stored in the buffer 1024 in FIG. 1, when the target sample data block is selected, the free address space corresponding to the target sample data block is timed, then In the step, the sample data block corresponding to the target sample data block can be deleted from the cache 1024, which also improves the space utilization of the cache 1024.

In still another case of other embodiments of the present invention, the sample data block corresponding to the target sample data block may not be deleted, but may be marked, and the sample data block marked in the preset sample set will no longer participate. The subsequent comparison process when the data block to be written is written. Either way, the purpose is to avoid subsequent writes The sample data block corresponding to the target sample data block is still selected in the process.

Step S600: Determine whether the number of sample data blocks in the preset sample set is less than a preset number.

In practical applications, the preset number can be freely set according to user needs, for example, N is 100. In other embodiments of the present invention, the preset number may also be a preset ratio, for example, the preset ratio is 40% or 60%. In addition, in order to avoid the update frequency of the preset sample set is too high, the preset number or the preset ratio may be simultaneously set according to the update frequency of the preset sample set and the number of remaining sample data blocks in the preset sample set.

When the number of sample data blocks in the preset sample set is less than the preset number, step S700 is performed; otherwise, the process ends.

Step S700: Acquire a new sample data block from the data block of the free address space in the NVM and add to the preset sample set, and update the preset sample set.

In this step, the processor 1022 in the NVM controller 102 can re-scan the storage medium 108, acquire a new sample data block from the storage medium 108, and acquire the number of new sample data blocks that are exactly the preset samples. The number of sample data blocks that are missing from the set.

In the embodiment of the present invention, by updating the preset sample set, the sample data blocks that are different in the data block to be written may be written into the NVM to ensure that the subsequent selection may be made when compared with the sample data block in the sample set. The matching degree between the obtained target sample data block and the sample data block in the data block to be written is ideal, and the number of times of rewriting at the time of data writing can be further reduced.

FIG. 7 is a schematic structural diagram of a data writing apparatus according to an embodiment of the present invention. As shown in FIG. 7, the data writing device may include: a sample data block determining module 11, a sample data block comparing module 12, a target sample data block determining module 13, and a writing module 14, wherein

a sample data block determining module 11 configured to determine a sample data block of the data block to be written from the data block to be written;

The sample data block comparison module 12 is configured to compare the sample data blocks of the data block to be written with N sample data blocks in a preset sample set, wherein each of the N sample data blocks The size of the data block is the same as the size of the sample data block of the data block to be written, and the N sample data blocks are respectively obtained from data blocks of N free address spaces in the NVM, where N is not An integer less than 2;

The target sample data block determining module 13 is configured to determine, in the N sample data blocks, one sample data block having the highest matching degree with the sample data block of the data block to be written as the target sample data block;

The writing module 14 is configured to write the to-be-written data block into a free address space corresponding to the target sample data block.

The apparatus provided by the embodiment of the present disclosure can reduce the number of rewriting of data bits in the NVM when writing data, that is, reduce the number of write operations when writing data. Therefore, the device can solve the problem of high power consumption due to a large number of write operations at the time of data writing and a reduction in the service life of the NVM.

In an embodiment of the present invention, as shown in FIG. 8, the writing module 14 may include: a target data block determining unit 141, a data bit determining unit 142, and a data rewriting unit 143, wherein:

The target data block determining unit 141 determines a target data block corresponding to the target sample data block in the data blocks of the N free address spaces;

a data bit determining unit 142, configured to determine a data bit in the target data block that is different from the data block to be written;

The data rewriting unit 143 is configured to rewrite the determined data of the data bit different from the to-be-written data block according to the to-be-written data block in the address space in which the target data block is stored.

In another embodiment of the present invention, as shown in FIG. 9, the target sample data block determining module 13 may include a similarity rate calculating unit 131 and a determining unit 132, where:

The similarity rate calculation unit 131 calculates a similarity rate of the sample data block of the to-be-written data block and the N sample data blocks, where the similarity ratio is in the sample data block of the to-be-written data block. a ratio of the number of identical data bits in the sample set sample data block to the number of all data bits in the sample data block of the data block to be written;

The determining unit 132 is configured to determine, as the target sample data block, a sample data block with the highest similarity rate of the sample data block of the to-be-written data block among the N sample data blocks.

In another embodiment of the present invention, as shown in FIG. 10, the apparatus may further include: a sample data block deleting module 15, a determining module 16, and an updating module 17, wherein

a sample data block deleting module 15 is configured to delete a sample data block corresponding to the target sample data block from the preset sample set;

The determining module 16 is configured to determine whether the number of sample data blocks in the preset sample set is less than a preset number;

The updating module 17 is configured to: when the number of sample data blocks in the preset sample set is less than the preset number, acquire a new sample data block from a data block of the free address space in the NVM and add to the The preset sample set is updated to update the preset sample set.

It can be seen from the above description that the data writing apparatus provided by the embodiment of the present invention can write the data block to be written to the one of the N sample data blocks acquired from the NVM and the one of the sample data blocks to be written to the data block. The free storage space corresponding to the sample data block. Therefore, the data writing apparatus provided by the embodiment of the present invention can reduce the number of rewriting of data bits in the NVM when writing data, thereby reducing the number of write operations. Thereby reducing the write operation energy Consumption increases the life of the NVM.

FIG. 1 is a schematic structural diagram of a memory according to an embodiment of the present invention. As shown in FIG. 1, the memory includes at least: a storage medium 108 and an NVM controller 102, wherein

a storage medium 108 for storing data;

The NVM controller 102 is connected to the storage medium 108 through a data interface, and is used to determine a sample data block of the data block to be written from the data block to be written;

In another embodiment of the present invention, the NVM controller 102 is further configured to:

In the address space in which the target data block is stored, the determined data of the data bit different from the sample data block of the data block to be written is rewritten according to the sample data block of the data block to be written.

It should be noted that the NVM controller shown in FIG. 1 can be used in the method in the foregoing method embodiment. For a detailed description of the memory provided in the embodiment of the present invention, refer to the description of the foregoing method embodiment, and details are not described herein again. .

For the convenience of description, the above devices are described separately by function into various units. Of course, the functions of the various units may be implemented in one or more software and/or hardware in the practice of the invention.

The various embodiments in the specification are described in a progressive manner, and the same or similar parts between the various embodiments may be referred to each other, and each embodiment focuses on the differences from the other embodiments. In particular, for a device or system embodiment, since it is substantially similar to the method embodiment, the description is relatively simple, and the relevant portions can be referred to the description of the method embodiment. The apparatus and system embodiments described above are merely illustrative, wherein the units described as separate components may or may not be physically separate, and the components displayed as units may or may not be physical units, ie It can be located in one place or it can be distributed to multiple network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of the embodiment. Those of ordinary skill in the art can understand and implement without any creative effort.

It should be noted that, in this context, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply these There is any such actual relationship or order between entities or operations. Furthermore, the term "comprises" or "comprises" or "comprises" or any other variations thereof is intended to encompass a non-exclusive inclusion, such that a process, method, article, or device that comprises a plurality of elements includes not only those elements but also Other elements, or elements that are inherent to such a process, method, item, or device. An element that is defined by the phrase "comprising a ..." does not exclude the presence of additional equivalent elements in the process, method, item, or device that comprises the element.

The above is only the specific embodiments of the present invention, and those skilled in the art can understand or implement the present invention. Various modifications to these embodiments are obvious to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the invention. Therefore, the present invention is not to be limited to the embodiments shown herein, but the scope of the invention is to be accorded

Claims

A data writing method for writing data to a non-volatile storage medium NVM, the method comprising:

Determining, from the data block to be written, the sample data block of the data block to be written;

Comparing the sample data blocks of the data block to be written with N sample data blocks in a preset sample set, wherein a size of each of the N sample data blocks and the to-be-written The size of the sample data block of the inbound data block is the same, and the N sample data blocks are respectively obtained from the data blocks of the N free address spaces in the NVM, where N is an integer not less than 2;

Determining, in the N sample data blocks, one sample data block having the highest matching degree with the sample data block of the to-be-written data block as a target sample data block;

Writing the to-be-written data block into a free address space corresponding to the target sample data block.
The method according to claim 1, wherein the writing the data block to be written into the free address space corresponding to the target sample data block comprises:

Determining a target data block corresponding to the target sample data block in the data block of the N free address spaces;

Determining, in the target data block, a data bit different from the data block to be written;

In the address space in which the target data block is stored, the determined data of the data bit different from the to-be-written data block is rewritten according to the to-be-written data block.
The method according to claim 1, wherein the determining, in the N sample data blocks, a sample data block having the highest matching degree with a sample data block of the data block to be written as a target sample data block ,include:

Calculating a similarity rate of the sample data block of the to-be-written data block and the N sample data blocks, where the similarity is the sample data block in the data block to be written and the sample data block in the sample set The ratio of the number of identical data bits in the middle to the number of all data bits in the sample data block of the data block to be written;

A sample data block having the highest similarity rate of the sample data block of the to-be-written data block among the N sample data blocks is determined as a target sample data block.
The method of claim 1 further comprising:

Deleting a sample data block corresponding to the target sample data block from the preset sample set;

Determining whether the number of sample data blocks in the preset sample set is less than a preset number;

When the number of sample data blocks in the preset sample set is less than the preset number, acquiring a new sample data block from the data block of the free address space in the NVM and adding to the preset sample set, Updating the preset sample set.
A data writing device for writing data to a non-volatile storage medium NVM, comprising:

a sample data block determining module, configured to determine a sample data block of the data block to be written from the data block to be written;

a sample data block comparison module, configured to compare the sample data block of the data block to be written with N sample data blocks in a preset sample set, wherein each sample data of the N sample data blocks The size of the block is the same as the size of the sample data block of the data block to be written, and the N sample data blocks are respectively obtained from data blocks of N free address spaces in the NVM, where N is not less than An integer of 2;

a target sample data block determining module, configured to determine, in the N sample data blocks, one sample data block having the highest matching degree with the sample data block of the data block to be written as a target sample data block;

And a writing module, configured to write the to-be-written data block into a free address space corresponding to the target sample data block.
The device according to claim 5, wherein the writing module comprises:

a target data block determining unit that determines a target data block corresponding to the target sample data block in the data block of the N free address spaces;

a data bit determining unit, configured to determine a data bit in the target data block that is different from the data block to be written;

And a data rewriting unit, configured to rewrite data of the determined data bit different from the to-be-written data block according to the to-be-written data block in an address space in which the target data block is stored.
The apparatus according to claim 5, wherein the target sample data block determining module comprises:

a similarity rate calculating unit, respectively calculating a similarity rate of the sample data block of the to-be-written data block and the N sample data blocks, the similarity rate being in the sample data block of the to-be-written data block and the Sample set sample data block a ratio of the number of identical data bits to the number of all data bits in the sample data block of the data block to be written;

And a determining unit, configured to determine, as the target sample data block, a sample data block with the highest similarity rate of the sample data block of the to-be-written data block among the N sample data blocks.
The device according to claim 5, wherein the device further comprises:

a sample data block deleting module, configured to delete a sample data block corresponding to the target sample data block from the preset sample set;

a determining module, configured to determine whether the number of sample data blocks in the preset sample set is less than a preset number;

And an update module, configured to: when the number of sample data blocks in the preset sample set is less than the preset number, acquire a new sample data block from a data block of a free address space in the NVM and add the The preset sample set is updated by the preset sample set.
A memory, comprising: a non-volatile storage medium NVM and an NVM controller, wherein

The NVM is configured to store data;

The NVM controller is configured to determine a sample data block of the to-be-written data block from a to-be-written data block;

Comparing the sample data blocks of the data block to be written with N sample data blocks in a preset sample set, wherein a size of each of the N sample data blocks and the to-be-written The size of the sample data block of the inbound data block is the same, and the N sample data blocks are respectively obtained from the data blocks of the N free address spaces in the NVM, where N is an integer not less than 2;

Determining, in the N sample data blocks, one sample data block having the highest matching degree with the sample data block of the to-be-written data block as a target sample data block;

Writing the to-be-written data block into the free address space corresponding to the target sample data block in the NVM.
The memory of claim 9, wherein the NVM controller is specifically configured to:

Determining a target data block corresponding to the target sample data block in the data block of the N free address spaces;

Determining, in the target data block, a data bit different from the sample data block of the data block to be written;

In the address space in which the target data block is stored, the determined data of the data bit different from the sample data block of the data block to be written is rewritten according to the to-be-written data block.
The memory of claim 9, wherein the NVM controller is specifically configured to:

Calculating a similarity rate of the sample data block of the to-be-written data block and the N sample data blocks, where the similarity is the sample data block in the data block to be written and the sample data block in the sample set The ratio of the number of identical data bits in the middle to the number of all data bits in the sample data block of the data block to be written;

A sample data block having the highest similarity rate of the sample data block of the to-be-written data block among the N sample data blocks is determined as a target sample data block.
The memory of claim 9 wherein said NVM controller is further configured to:

Deleting a sample data block corresponding to the target sample data block from the preset sample set;

Determining whether the number of sample data blocks in the preset sample set is less than a preset number;

When the number of sample data blocks in the preset sample set is less than the preset number, acquiring a new sample data block from the data block of the free address space in the NVM and adding to the preset sample set, Updating the preset sample set.