WO2016027134A1 - Partage d'un émetteur et d'un récepteur à rétroaction - Google Patents

Partage d'un émetteur et d'un récepteur à rétroaction Download PDF

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Publication number
WO2016027134A1
WO2016027134A1 PCT/IB2014/064026 IB2014064026W WO2016027134A1 WO 2016027134 A1 WO2016027134 A1 WO 2016027134A1 IB 2014064026 W IB2014064026 W IB 2014064026W WO 2016027134 A1 WO2016027134 A1 WO 2016027134A1
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WO
WIPO (PCT)
Prior art keywords
signal
output
transceiver
frequency
mixer
Prior art date
Application number
PCT/IB2014/064026
Other languages
English (en)
Inventor
Somsack David SYCHALEUN
Bi Pham
Buu DAM
Chunyun Jian
Original Assignee
Telefonaktiebolaget L M Ericsson (Publ)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Telefonaktiebolaget L M Ericsson (Publ) filed Critical Telefonaktiebolaget L M Ericsson (Publ)
Priority to PCT/IB2014/064026 priority Critical patent/WO2016027134A1/fr
Publication of WO2016027134A1 publication Critical patent/WO2016027134A1/fr

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Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/32—Modifications of amplifiers to reduce non-linear distortion
    • H03F1/3241—Modifications of amplifiers to reduce non-linear distortion using predistortion circuits
    • H03F1/3247—Modifications of amplifiers to reduce non-linear distortion using predistortion circuits using feedback acting on predistortion circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/189—High-frequency amplifiers, e.g. radio frequency amplifiers
    • H03F3/19—High-frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
    • H03F3/21—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
    • H03F3/211—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only using a combination of several amplifiers
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
    • H03F3/24—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers of transmitter output stages
    • H03F3/245—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers of transmitter output stages with semiconductor devices only
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/68—Combinations of amplifiers, e.g. multi-channel amplifiers for stereophonics
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/02—Transmitters
    • H04B1/04—Circuits
    • H04B1/0475—Circuits with means for limiting noise, interference or distortion
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2200/00—Indexing scheme relating to amplifiers
    • H03F2200/111—Indexing scheme relating to amplifiers the amplifier being a dual or triple band amplifier, e.g. 900 and 1800 MHz, e.g. switched or not switched, simultaneously or not
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/005—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission adapting radio receivers, transmitters andtransceivers for operation on two or more bands, i.e. frequency ranges
    • H04B1/0067—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission adapting radio receivers, transmitters andtransceivers for operation on two or more bands, i.e. frequency ranges with one or more circuit blocks in common for different bands
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/32—Carrier systems characterised by combinations of two or more of the types covered by groups H04L27/02, H04L27/10, H04L27/18 or H04L27/26
    • H04L27/34—Amplitude- and phase-modulated carrier systems, e.g. quadrature-amplitude modulated carrier systems
    • H04L27/36—Modulator circuits; Transmitter circuits
    • H04L27/366—Arrangements for compensating undesirable properties of the transmission path between the modulator and the demodulator
    • H04L27/367—Arrangements for compensating undesirable properties of the transmission path between the modulator and the demodulator using predistortion
    • H04L27/368—Arrangements for compensating undesirable properties of the transmission path between the modulator and the demodulator using predistortion adaptive predistortion

Definitions

  • the present disclosure relates to wireless communications and in particular, to radio transceivers.
  • DPD Digital Pre- distortion
  • TOR transmitter observation receiver
  • FIG. 1 shows a known transceiver or radio that provides DPD and a TOR.
  • a signal to be transmitted is received by a DPD 12, which pre-distorts the signal.
  • a digital-to-analog D/A converter 14 converts the pre-distorted signal to an analog signal.
  • the output of the D/A converter 14 is filtered by a filter 16 and amplified by a power amplifier 18.
  • a coupler 20 couples a portion of the amplified signal to the TOR 25.
  • the power amplifier output signal is also fed to a duplexer 22 which channels the output signal to an antenna 24.
  • the TOR 25 down converts the input signal from the coupler 20 via mixer 26.
  • the output of the mixer 26 is filtered by a filter 28 to produce the TOR output.
  • the TOR output is converted to a digital signal by an analog-to-digital (A/D) converter 30.
  • the output of the A/D converter 30 is fed to the DPD 12 which uses the output of the A/D converter 30 to pre-distort the signal to be transmitted.
  • the signal received by the antenna 24 from a distant radio such as a user equipment (UE) is coupled via the duplexer 22 to a receiver circuit 35.
  • a low noise amplifier 32 amplifies the received signal.
  • the amplified received signal is down converted by a mixer 34, filtered by a filter 36 and amplified by an amplifier 38.
  • the output of the receiver circuit 35 is converted to a digital signal by a second A/D converter 40.
  • the output of the A/D converter 40 is coupled to a receive signal processor 42 which processes the signal to extract information from the signal.
  • A/D converters are employed in a single transceiver having a single transmitter and a single receiver.
  • multi-band radios multiple transceivers are used, each having its own pair of A/D converters.
  • each of the TOR path and the receiver circuit path may have I and Q channels, thereby doubling the number of A/Ds used in the radio.
  • the use of so many A/D converters results in high radio power consumption, larger board space utilization, and larger heat fins for thermal management.
  • the cost of multiple A/D converters adds to the cost of the radio.
  • the present disclosure advantageously provides a method and system for sharing an analog-to-digital (A/D) converter in a transceiver.
  • the disclosure provides a frequency division duplex (FDD) radio.
  • the FDD radio includes at least one transceiver.
  • Each transceiver has a digital pre-distorter and a receiver processor.
  • Each transceiver also has a transmitter observation receiver (TOR) configured to produce a first analog signal at a first frequency.
  • the first analog signal is converted to a first digital signal for transmission to the digital pre- distorter.
  • a receiver circuit is configured to produce a second analog signal at a second frequency different from the first frequency.
  • the second analog signal is converted to a second digital signal for transmission to the receiver processor.
  • a shared wideband A/D converter is configured to, for each of the at least one transceiver: convert the first analog signal to the first digital signal ; and convert the second analog signal to the second digital signal .
  • the FDD radio further includes a duplexer configured to combine the first analog signal and the second analog signal from each of the at least one transceiver for input to the shared wideband A/D converter.
  • a TOR of at least one of the at least one transceiver includes a first mixer configured to down convert the transmit signal to the first frequency.
  • a receiver circuit of at least one of the at least one transceiver may include a second mixer configured to down convert the receive signal to the second frequency.
  • a difference between the first frequency and the second frequency is sufficient to enable simultaneous processing in the shared wideband A/D converter while maintaining separation of a signal to be processed by a digital pre-distorter, DPD, and a signal to be processed by the receiver processor of each of the at least one transceiver.
  • the receiver circuit of at least one of the at least one transceiver comprises: a first, low noise, amplifier having an output; a mixer coupled to the output of the low noise amplifier, the mixer configured to down-convert a received signal to produce a mixer output; a filter coupled to the mixer output and configured to filter the mixer output to produce a filter output; and a second amplifier coupled to the output of the filter and configured to amplify the filter output.
  • the TOR and the receiver circuit of at least one of the at least one transceiver form separate electrical paths sharing no common elements in the separate electrical paths.
  • the TOR path is configured to process the transmit signal coupled from an output of a power amplifier of the transmitter portion of the transceiver
  • the receiver circuit path is configured to process the receive signal from an antenna of the transceiver.
  • the disclosure provides a time division duplex (TDD) radio.
  • the TDD radio includes at least one transceiver.
  • Each transceiver has a transmitter observation receiver (TOR) forming a first continuously closed circuit electrical path configured to process a transmit signal coupled from an output of a power amplifier of a transmitter portion of the transceiver.
  • the TOR has an output.
  • a receiver circuit forms a second electrical path configured to process a receive signal from an antenna of the transceiver, the second electrical path having no elements in common with the first electrical path.
  • the receiver circuit also has an output.
  • a single shared A/D converter the shared A/D converter receiving, for each transceiver, the TOR output and the receiver circuit output.
  • the TDD radio further includes a combiner to receive and combine the TOR outputs and receiver circuit outputs from the at least one transceiver for input to the single shared A/D converter.
  • the TDD radio has a switch coupled to the single shared A/D converter, the switch, in alternation, coupling the TOR outputs and the receiver circuit outputs of the at least one transceiver to the single shared A/D converter.
  • alternation of the coupling of the switch between the TOR output and the receiver circuit output of a transceiver of the at least one transceiver is synchronous with alternation of transmission and reception of the transceiver of the at least one transceiver.
  • the receiver circuit of the at least one transceiver includes a first mixer that is configured to down convert a receive signal to baseband.
  • the receiver circuit comprises: a first, low noise, amplifier having an output; a mixer coupled to the output of the low noise amplifier, the mixer configured to down-convert a received signal to produce a mixer output; a filter coupled to the mixer output and configured to filter the mixer output to produce a filter output; and a second amplifier coupled to the output of the filter and configured to amplify the filter output.
  • the first and second electrical paths are single paths not divided into I and Q channels.
  • the disclosure provides a method in an FDD radio of processing a transmit signal to produce a first digital signal to be input to a digital pre-distorter and processing a receive signal to produce a second digital signal to be input to a receiver processing circuit.
  • the method includes processing the transmit signal in a first processing path to produce a first analog output signal at a first frequency.
  • the method further includes processing a receive signal in a second processing path to produce a second analog output signal at a second frequency different from the first frequency.
  • the first and second analog output signals are combined.
  • the method includes converting the combined first and second analog output signals to a digital output signal using a shared A/D converter.
  • the digital output signal is provided to the digital pre-distortion unit of the transceiver.
  • the digital output signal is also provided to the receiver processing circuit of the transceiver.
  • the combining includes band pass filtering the first analog output signal via a first band pass filter centered at the first frequency.
  • the embodiments may further include band pass filtering the second analog output signal via a second band pass filter centered at the second frequency.
  • the first processing path is a single path and the second processing path is a single path.
  • the first processing path includes a mixer configured to down convert the transmit signal.
  • the second processing path includes a mixer configured to down convert the receive signal.
  • a difference between the first frequency and the second frequency is sufficient to enable simultaneous processing in the shared wideband A/D converter while maintaining separation of a signal to be processed by a digital pre-distorter, DPD, and a signal to be processed by a receiver processor.
  • FIG. 1 is a block diagram of a known FDD single-transceiver radio
  • FIG. 2 is a block diagram of an FDD single-transceiver radio constructed to share an A/D converter
  • FIG. 3 is a block diagram of a TDD single-transceiver radio constructed to share an A/D converter
  • FIG. 4 is a block diagram of a FDD multi-transceiver radio constructed to share an A/D converter
  • FIG. 5 is a diagram of transmit and receive signals in an FDD system for multi- transceiver radios
  • FIG. 6 is a diagram of transmit and receive signals in a TDD system for multi- transceiver radios.
  • FIG. 7 is a flowchart of an exemplary process for sharing an A/D converter in an FDD radio.
  • relational terms such as “first” and “second,” “top” and “bottom,” and the like, may be used solely to distinguish one entity or element from another entity or element without necessarily requiring or implying any physical or logical relationship or order between such entities or elements.
  • FIG. 2 a transceiver 43 of a frequency division duplex (FDD) radio.
  • FDD frequency division duplex
  • transmission occurs at one frequency and reception occurs at another frequency so that transmission and reception occurs simultaneously but at different frequencies.
  • the FDD transceiver 43 has a transmitter observation receiver (TOR) 25 and a receiver circuit 35.
  • the TOR 25 provides feedback to the DPD 12 to control pre-distortion of the transmit signal to linearize the output of the power amplifier 18.
  • the TOR 25 down-converts using a first mixer 26 and filters the transmit signal via a filter 28.
  • the first mixer 26 may down-convert the transmit signal to an intermediate frequency - in which case the filter 28 is a band pass filter - or may down-convert the transmit signal to base band - in which case the filter 28 is a low pass filter.
  • the output of the filter 28 is fed to the DPD 12 via the duplexer 50 and the shared A/D converter 52.
  • the receiver circuit 35 down-converts the receive signal using a second mixer 34, filters the down converted signal using a filter 36 and amplifies the filtered signal using an amplifier 38.
  • the second mixer 26 may down-convert the receive signal to an intermediate frequency - in which case the filter 36 is a band pass filter - or may down-convert the transmit signal to base band - in which case the filter 36 is a low pass filter.
  • the output of the receiver circuit 35 is fed to a receiver processor 42 via the duplexer 50 and a shared wideband A/D converter 52.
  • the receiver processor extracts information from the received signal.
  • the mixers 26 and 34 may down-convert the transmit and receive signals to different frequencies, respectively, to provide flexibility in the designs of the duplexer 50, A D converter 52, DPD 12 and receiver processor 42.
  • the first analog output signal is band pass filtered by a first band pass filter 28 centered at the first frequency and the second analog output signal is band pass filtered by a second band pass filter 36 centered at the second frequency.
  • the first processing path 25 has a first mixer 26 to down-convert the transmit signal and the second processing path 35 has a second mixer 34 to down-convert the receive signal.
  • the difference between the first frequency and the second frequency is sufficient to enable simultaneous processing in the shared wideband A/D converter 52 while maintaining separation of a signal to be processed by a digital pre-distorter (DPD) 12, and a signal to be processed by a receiver processor 42.
  • DPD digital pre-distorter
  • FIG. 2 shows two separate outputs from the A/D converter 52.
  • the A/D converter 52 has a single output that is split, shared and routed to the DPD 12 and the receiver processor 42.
  • the FDD transceiver 43 for the radio of FIG. 2 uses many of the same components as used in the radio of FIG. 1 , except that in the transceiver of FIG. 2 the output of the TOR 25 and the output of the receiver circuit 35 are combined in a duplexer 50 and fed simultaneously to a single shared analog-to-digital (A/D) converter 52.
  • the duplexer 50 receives signals from each of two input ports and channels the received signals to the output of the duplexer 50 while maintaining substantial isolation between the input ports.
  • This architecture takes advantage of recent advances in high performance A/D converters that offer wide bandwidth and high linearity.
  • the A/D converter 52 converts the signals received from the duplexer 50 to a digital signal having a sampling rate that is preferably at least twice the highest frequency of the bands of the input signals.
  • the down-converted transmitted signal is at a first frequency f 1 and the down-converted received signal is at a second frequency f2, where f 1 and f2 are sufficiently far apart to enable simultaneous processing in the A/D converter 52 while maintaining separation in the frequency domain.
  • the output of the A/D converter 52 is fed to the DPD 12 and the receiver processor 42.
  • FIG. 3 is a block diagram of a time division duplex (TDD) radio having a transceiver 53 similar to the transceiver of FIG. 2 with at least the following differences.
  • the transmit frequency is the same as the receive frequency. This frequency is time shared between transmission and reception.
  • an isolator 54 and filter 55 pass the transmit signal to the antenna 24 during one time frame and pass the received signal from the antenna 24 to the receiver circuit 35 during another time frame.
  • the duplexer 50 is replaced by the combiner 56.
  • the A/D converter 57 in the TDD radio need not be as broadband as the A/D converter 52 in the FDD radio.
  • the combiner 56 may be replaced by a switch that alternately couples the A/D converter 57 to the TOR output and the receiver circuit output.
  • the alternation of the switch may be synchronous with alternation of transmission and reception of the transceiver.
  • the combiner 56 couples the receive signal from the receiver circuit 35 to the A/D converter 57 and during a transmit time frame the combiner 56 couples the transmit signal from the TOR 35 to the A/D converter 57.
  • the TOR 25 forms a continuously closed circuit electrical path, and the TOR path and the receiver circuit path have no elements in common.
  • the first and second electrical paths are single paths that are not divided into I and Q channels, enabling use of a single shared A/D converter, rather than one for an I channel and one for a Q channel.
  • the receiver circuit 35 down-converts the receive signal to baseband.
  • the TOR 25 may down convert the transmit signal to base band, depending on the structure of the DPD 12.
  • the receiver circuit 35 of the TDD transceiver may include a low noise amplifier 32 followed by a mixer 34 for down-conversion, a filter 36 and a second amplifier 28.
  • the TOR 25 of the TDD transceiver may include a mixer 26 for down conversion and a filter 28. Note that the mixers 26 and 34 may, in some embodiments, down-convert the respective transmit and receive signals to different frequencies to provide flexibility in the design of downstream components.
  • FIG. 4 is a block diagram showing combining signals from a plurality of transceivers using a duplexer or combiner 58 and a shared A/D converter 60.
  • the principles of sharing an A D converter according to embodiments described above can be applied to a radio having multiple transceivers 63 a, 63b, 63c, ...63m, referred to herein collectively as transceivers 63.
  • transceivers 63 Although four transceivers 63 are shown, fewer or more than four transceivers 63 can be implemented according to design objectives and the principles disclosed herein.
  • each transceiver 63 has a DPD 12, DAC 14, filter 16, power amplifier 18, coupler 20, duplexer 22, and antenna 24.
  • Each transceiver also has a TOR 25 and a receiver circuit 35. These are shown in FIG.
  • FIG. 4 shows that TOR 25 outputs and receiver circuit 35 outputs can be combined from a plurality of transceivers 63 and can be fed to a
  • FIG. 4 shows multiple transceivers 63 of an FDD radio, which means that the transmit signal and the receive signal are at different frequencies, sufficiently separated to avoid substantial overlap of the spectra of the signals.
  • the output of the shared A/D converter 60 is fed back to the DPDs 12 and is also fed to receive signal processors for each individual transceiver.
  • an isolator and filter replaces the duplexer 22, and a different type of combiner replaces the combiner 58.
  • the combiner of the FDD radio may be based on a multiplexer design since all inputs will be at different frequencies.
  • the combiner may be based on a Wilkinson combiner and multiplexer since some signals may be at the same frequency while others are not. Note that in FIG. 4 a single high performance wideband ADC 60 is provided to handle inputs from each of the plurality of transceivers 63.
  • FIG. 5 shows the frequency spectrum of the transmit signals and receive signals for a FDD radio having four transceivers 63.
  • a first transceiver 63a may receive a receive signal 62a at frequency fl and transmit a transmit signal 64a at frequency f2.
  • the other transceivers 63b, 63c and 63m which receive receive signals 62b, 62c, and 62m (collectively referred to as receive signals 62), respectively, and which transmit transmit signals 64b, 64c and 64m (collectively referred to as transmit signals 64), respectively. Note that in FIG.
  • the spectra of the receive signal and the transmit signals alternate along the frequency axis.
  • a reordering of the spectra of the receive signal and the transmit signal may be implemented, according to a frequency use plan set forth in a design phase of the radio network.
  • FIG. 6 shows the frequency spectrum of the transmit and receive signals for a TDD radio having four TDD transceivers.
  • a receive and transmit signal overlap in frequency.
  • signals 66a, 66b, 66c and 66m there are four signals 66a, 66b, 66c and 66m (collectively referred to as signals 66), each signal 66 has overlapping transmit and receive signals that are separated in time rather than frequency.
  • FIG. 7 is a flowchart of an exemplary process of sharing an A/D converter 52 in an FDD radio transceiver 43.
  • a transmit signal is processed in a first path 25 to produce a first analog output signal at a first frequency (block S100).
  • the first path is a single continuously closed circuit path.
  • a receive signal is processed in a second path 35 to produce a second analog output signal at a second frequency (block SI 02).
  • the first and second signal paths have no elements in common.
  • the first and second analog output signals are combined using a combiner or duplexer 50 (block S104).
  • the combined first and second analog output signals are converted to a digital signal using a shared A/D converter 52 (block SI 06).
  • the digital signal is provided to a DPD 12 of a transmit path of the transceiver 43 (block S108).
  • the digital signal is also provided to a receiver processor 42 of a receive path of the transceiver 43 (block SI 10).

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Transceivers (AREA)

Abstract

L'invention concerne un procédé et un système destinés au partage d'un convertisseur analogique-numérique (A/D) dans un émetteur-récepteur. Une radio à duplexage par répartition en fréquence (FDD) et un émetteur-récepteur à duplexage par répartition dans le temps (TDD) sont utilisés. La radio FDD ou TDD comprend au moins un émetteur-récepteur. Chaque émetteur-récepteur comporte un récepteur d'observation d'émetteur (TOR) conçu pour produire un premier signal analogique. Un circuit récepteur sert à produire un second signal analogique. Les trajets de signaux du TOR et du circuit récepteur sont des trajets fermés en continu qui ne partagent aucun élément et qui ne sont pas divisés en canaux I et Q. Un convertisseur A/D partagé est destiné à recevoir les signaux analogiques provenant de tous les TOR et circuits récepteurs des émetteurs-récepteurs, et convertit ces signaux en signaux numériques.
PCT/IB2014/064026 2014-08-22 2014-08-22 Partage d'un émetteur et d'un récepteur à rétroaction WO2016027134A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
PCT/IB2014/064026 WO2016027134A1 (fr) 2014-08-22 2014-08-22 Partage d'un émetteur et d'un récepteur à rétroaction

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Application Number Priority Date Filing Date Title
PCT/IB2014/064026 WO2016027134A1 (fr) 2014-08-22 2014-08-22 Partage d'un émetteur et d'un récepteur à rétroaction

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2018118063A1 (fr) * 2016-12-22 2018-06-28 Intel IP Corporation Chaîne de réception polyvalente pour applications wifi
WO2020009626A1 (fr) * 2018-07-03 2020-01-09 Telefonaktiebolaget Lm Ericsson (Publ) Agencement et procédé d'émetteur-récepteur radio
US11431300B2 (en) * 2020-06-12 2022-08-30 Nokia Technologies Oy Machine learning based digital pre-distortion for power amplifiers

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1998005127A1 (fr) * 1996-07-31 1998-02-05 Nokia Telecommunications Oy Linearisation d'un emetteur de station mobile
WO2001063791A2 (fr) * 2000-02-23 2001-08-30 Scientific Generics Limited Circuit emetteur-recepteur
US20080144539A1 (en) * 2006-12-14 2008-06-19 Texas Instruments Incorporated Simplified Digital Predistortion in a Time-Domain Duplexed Transceiver

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1998005127A1 (fr) * 1996-07-31 1998-02-05 Nokia Telecommunications Oy Linearisation d'un emetteur de station mobile
WO2001063791A2 (fr) * 2000-02-23 2001-08-30 Scientific Generics Limited Circuit emetteur-recepteur
US20080144539A1 (en) * 2006-12-14 2008-06-19 Texas Instruments Incorporated Simplified Digital Predistortion in a Time-Domain Duplexed Transceiver

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2018118063A1 (fr) * 2016-12-22 2018-06-28 Intel IP Corporation Chaîne de réception polyvalente pour applications wifi
US11115066B2 (en) 2016-12-22 2021-09-07 Intel Corporation Multi-purpose receiver chain for WiFi applications
WO2020009626A1 (fr) * 2018-07-03 2020-01-09 Telefonaktiebolaget Lm Ericsson (Publ) Agencement et procédé d'émetteur-récepteur radio
US11431300B2 (en) * 2020-06-12 2022-08-30 Nokia Technologies Oy Machine learning based digital pre-distortion for power amplifiers

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