WO2015196725A1 - Channel simulation apparatus and method, and computer storage medium - Google Patents

Abstract

Disclosed in the embodiments of the present invention are a channel simulation apparatus and method, and a computer storage medium, the apparatus comprising: a channel radio frequency unit, configured to convert an acquired radio frequency signal into baseband data and send same to a channel simulation unit, and to convert baseband data from the channel simulation unit into a radio frequency signal and send same; a channel simulation unit, configured to perform simulation processing on baseband data from the channel radio frequency unit on the basis of channel fading parameters from a channel management unit, and sending the simulation processed baseband data to the channel radio frequency unit; and a channel management unit, configured to generate channel fading parameters on the basis of the channel type, and send same to the channel simulation unit.

Description

Channel simulation device and method, computer storage medium Technical field

The present invention relates to a wireless channel simulation technology, and in particular, to a channel simulation apparatus and method, and a computer storage medium.

Background technique

A wireless channel is a time-varying channel. When a wireless signal passes through such a channel, the fading is:

1. Transmission loss and dispersion caused by changes in signal transmission distance;

2. Shadow fading caused by the blocking of electromagnetic signals by terrain, buildings and other obstacles in the transmission environment;

3. The wireless signal is reflected, diffracted and scattered by the surrounding obstacles on the transmission path, so that its arrival at the receiver is a superposition of multiple signals transmitted from multiple paths, resulting in the amplitude, phase and arrival time of the signal at the receiving end. Multipath fading caused by random variations;

4. The Doppler shift generated by the movement of the receiving terminal in the direction of signal transmission causes the spread of the received signal in the frequency domain to generate additional FM noise, and the received signal is distorted.

When studying wireless channels, wireless channels are usually divided into two types: large-scale fading and small-scale fading. The large-scale fading model is used to describe signal strength changes over long distances between transmitter and receiver, including transmission loss, dispersion, and shadow fading. Small-scale fading models are used to describe rapid changes in signal strength over short and short periods of time. , including multipath fading and Doppler shift.

When manufacturers of wireless communication equipment produce wireless communication equipment, they need to conduct extensive testing in a real environment to ensure the stability and reliability of the equipment. However, the testing of the real environment requires the construction of a large number of base station equipment and a wide range of sports road test, which is costly and inefficient. Moreover, the wireless channel environment is ever-changing, and an abnormal phenomenon is often difficult to reproduce. Even if the road test is repeated for a long time, it is difficult. Stress testing the device to find extreme wireless scenarios.

Ultra-dense networking is one of the key technologies of 5G mobile communication. A large number of micro-cell base stations are deployed in crowded scenes such as office buildings, supermarkets, railway stations, stadiums, and dense residential areas to accommodate 1000 times of data for future 5G mobile communications. For traffic demand, more than 100 micro cells are often arranged in one macro cell. The arrangement of a large number of micro cells will cause the interference to be very complicated. In addition to the interference of the macro cell defined by the user in the past, in the ultra-dense networking scenario, the macro cell to the micro cell, the micro cell to the macro cell, and the micro cell are also added. Interference between zones and between users, the simulation workload of these interference channels is very large, especially in the aspect of hard simulation. Currently, the existing channel simulator only supports single-cell×single-user link-level simulation, which cannot be performed much. System-level simulation of cell × multi-user, especially system-level simulation of more than 100 cells is even more impossible.

However, with the research on the key technologies of 5G mobile communication, especially the research on the key technologies of ultra-dense networking, it is necessary to support the wireless channel hard emulation equipment of more than 100 cells to analyze the channels in the ultra-dense networking scenario. It provides theoretical and test verification basis for the promotion and application of 5G mobile communication products. However, there is no related technology to realize wireless channel simulation for multi-cell and multi-user.

Summary of the invention

In view of this, in order to solve the existing technical problems, the embodiments of the present invention provide:

A channel emulation device includes: a channel radio unit, a channel emulation unit, and a channel management unit; wherein

The channel radio unit is configured to convert the acquired radio frequency signal into baseband data, send it to a channel emulation unit, and convert baseband data from the channel emulation unit into a radio frequency signal and transmit the signal;

The channel emulation unit is configured to perform simulation processing on baseband data from the channel radio unit according to channel fading parameters from the channel management unit, and send the simulated baseband data to the channel radio unit;

The channel management unit is configured to generate a channel fading parameter according to the channel model and send the channel fading parameter to the channel emulation unit.

In a specific embodiment, the channel emulation unit includes: a baseband data access module, an emulation processing module, and a fading parameter management module;

The baseband data access module includes a plurality of access FPGA chips, each of the access FPGAs receives a baseband data link from the channel radio unit, and each access FPGA chip is used to receive the radio frequency unit from the channel. The baseband data is copied into multiple copies and sent to each channel processing FPGA chip in the simulation processing module respectively; and multiple baseband data is selected and output from the baseband data from the simulation processing module;

The simulation processing module includes a plurality of channel processing FPGA chips, the plurality of channel processing FPGA chips are operated in parallel, and the baseband data from the access FPGA is simulated according to the channel fading parameter, and the processed baseband data is sent to Baseband data access module;

The fading parameter management module is configured to update the channel fading parameter in real time according to the currently simulated channel scenario and data from the channel management unit.

In a specific embodiment, the channel fading parameter generated by the channel management unit includes one or more of the following: a large-scale fading factor, a small-scale fading factor, and a multipath delay parameter.

In a specific embodiment, the channel processing FPGA chip includes: an input antenna data selector, a large-scale fading multiplier group, a small-scale fading multiplier group, a multipath delay buffer group, and an output antenna data selector; wherein

The input antenna data selector is configured to select a link that needs to be simulated according to a link address provided by the channel management unit;

The large-scale fading multiplier group is configured to multiply baseband data on the link by a large-scale fading factor to implement large-scale fading processing;

The small-scale fading multiplier group is configured to divide the baseband data processed by the large-scale fading into multipath data, and multiply by the small-scale fading factor to implement small-scale fading processing;

The multipath delay buffer group is configured to delay buffering the multipath baseband data after the small scale fading processing according to a preset delay parameter, and then accumulating;

The output antenna data selector is configured to superimpose all baseband data outputted to the same target antenna, and then send the superposed baseband data to the channel radio unit through the baseband data access module.

In a specific embodiment, the baseband data access module and the channel radio unit are connected through a CPRI fiber interface.

The channel management unit and the channel emulation unit are connected through an Ethernet interface.

A channel simulation method includes:

Obtaining channel fading parameters and radio frequency signals;

Converting the acquired radio frequency signal into baseband data, and performing simulation processing on the baseband data according to the channel fading parameter;

The simulated baseband data is converted into a radio frequency signal and transmitted.

In a specific embodiment, the obtained radio frequency signal is converted into baseband data, and the baseband data is simulated according to the channel fading parameter, including:

Multiple access FPGA chips copy the baseband data received by themselves into multiple copies and send them to each channel processing FPGA chip separately;

The plurality of channel processing FPGA chips perform simulation processing on the baseband data according to channel fading parameters;

The plurality of access FPGA chips select and output multi-baseband data from the simulated baseband data.

In a specific embodiment, the channel fading parameter includes one or more of the following: a large-scale fading factor, a small-scale fading factor, and a multipath delay parameter.

In a specific embodiment, the channel processing FPGA chip performs simulation processing on the baseband data according to the channel fading parameter, including:

Selecting a link that needs to be simulated according to a preset link address;

Multiplying the baseband data on the link by a large-scale fading factor to achieve large-scale fading processing;

The baseband data processed by the large-scale fading is divided into multipath data, and multiplied by the small-scale fading factor to realize small-scale fading processing;

The multipath baseband data processed by the small-scale fading is buffered by a preset delay parameter, and then accumulated;

Superimpose all baseband data output to the same target antenna.

In a specific embodiment, the acquiring a channel fading parameter includes: acquiring a channel fading parameter through an Ethernet interface, where

After converting the acquired radio frequency signal into baseband data, the radio frequency signal is transmitted through the CPRI fiber interface.

Embodiments of the present invention also provide a computer storage medium in which computer executable instructions are stored, the computer executable instructions being used to perform the above method.

Embodiments of the present invention provide a channel emulation apparatus and method, and a computer storage medium, the apparatus including a channel radio frequency unit configured to convert an acquired radio frequency signal into baseband data, transmit to a channel emulation unit, and baseband data from a channel emulation unit Converting to a radio frequency signal and transmitting; the channel emulation unit is configured to simulate baseband data from the channel radio unit according to channel fading parameters from the channel management unit, and send the simulated baseband data to the channel radio unit a channel management unit configured to generate a channel fading parameter according to the channel model and send the channel fading parameter to the channel emulation unit. The channel emulation device and method according to the embodiments of the present invention can implement channel emulation for multi-cell multi-users, and the simulation scale is large, and the versatility is strong.

DRAWINGS

FIG. 1 is a schematic structural diagram of a channel emulation apparatus according to an embodiment of the present invention;

2 is a schematic structural diagram of a channel emulation unit according to an embodiment of the present invention;

3 is a schematic structural diagram of a channel processing FPGA chip according to an embodiment of the present invention;

4 is a schematic flowchart of a channel emulation method according to an embodiment of the present invention;

5 is a schematic structural diagram of a super-dense networking wireless channel hard emulation platform according to Embodiment 1 of the present invention;

6 is a schematic diagram of an internal connection structure of a simulation processing module according to Embodiment 2 of the present invention;

7 is a structural diagram of channel processing inside an FPGA in Embodiment 2 of the present invention;

FIG. 8 is a schematic diagram of a modeling process in Embodiment 2 of the present invention.

detailed description

In order to implement the wireless channel simulation for the multi-cell multi-user, the embodiment of the present invention provides a channel emulation device. As shown in FIG. 1, the device includes: a channel radio unit 11, a channel emulation unit 12, and a channel management unit 13; ,

The channel radio frequency unit 11 is configured to convert the acquired radio frequency signal into baseband data, send it to a channel emulation unit, and convert baseband data from the channel emulation unit into a radio frequency signal and transmit the same;

The channel emulation unit 12 is configured to perform simulation processing on the baseband data from the channel radio frequency unit according to the channel fading parameter from the channel management unit 13, and send the simulated baseband data to the channel radio frequency unit;

The channel management unit 13 is configured to generate a channel fading parameter according to the channel model and send it to the channel emulation unit 12.

In a specific embodiment, as shown in FIG. 2, the channel emulation unit 12 includes: a baseband data access module 121, a simulation processing module 122, and a fading parameter management module 123;

The baseband data access module 121 includes a plurality of access FPGA chips, each of which accesses a baseband data link from a channel radio unit, and each access FPGA chip is used for Copying the baseband data received by the channel from the channel radio frequency unit into multiple copies and respectively transmitting to each channel processing FPGA chip in the emulation processing module; and selecting the multi-baseband data from the baseband data from the emulation processing module and outputting;

The simulation processing module 122 includes a plurality of channel processing FPGA chips, and the plurality of channel processing FPGA chips are operated in parallel, and the baseband data from the access FPGA is simulated according to the channel fading parameter, and the processed baseband data is sent. To the baseband data access module; it should be noted that since the baseband data connected to the FPGA is copied and output to each channel processing FPGA, the input baseband data of each channel processing FPGA is the same, so that the input baseband data can be performed. The load sharing process distributes the simulation processing performance of the entire channel emulation device to each channel processing FPGA.

The fading parameter management module 123 is configured to update the channel fading parameter in real time according to the currently simulated channel scenario and the data from the channel management unit.

In a specific embodiment, the channel fading parameter generated by the channel management unit 13 includes one or more of the following: a large-scale fading factor, a small-scale fading factor, and a multi-path delay parameter.

In a specific embodiment, as shown in FIG. 3, the channel processing FPGA chip includes: an input antenna data selector 31, a large-scale fading multiplier group 32, a small-scale fading multiplier group 33, and a multipath delay buffer group. 34 and an output antenna data selector 35; wherein

The input antenna data selector 31 is configured to select a link that needs to be simulated according to a link address provided by the channel management unit;

The large-scale fading multiplier group 32 is configured to multiply baseband data on the link by a large-scale fading factor to implement large-scale fading processing;

The small-scale fading multiplier group 33 is configured to divide the baseband data after the large-scale fading processing into multipath data, and multiply them by the small-scale fading factor to implement small-scale fading processing;

The multipath delay buffer group 34 is configured to delay buffering the multipath baseband data after the small scale fading processing according to a preset delay parameter, and then accumulating;

The output antenna data selector 35 is configured to superimpose all baseband data outputted to the same target antenna, and then transmit the superposed baseband data to the channel radio frequency unit through the baseband data access module.

In a specific embodiment, the baseband data access module and the channel radio unit are connected through a CPRI fiber interface, and the channel management unit and the channel emulation unit are connected through an Ethernet interface.

The embodiment of the present invention further provides a channel emulation method, as shown in FIG. 4, the method includes:

Step 41: Obtain channel fading parameters and radio frequency signals;

Step 42: Convert the obtained radio frequency signal into baseband data, and perform simulation processing on the baseband data according to the channel fading parameter;

Step 43: Convert the simulated baseband data into a radio frequency signal and transmit.

In a specific embodiment, the obtained radio frequency signal is converted into baseband data, and the baseband data is simulated according to the channel fading parameter, including:

Multiple access FPGA chips copy the baseband data received by themselves into multiple copies and send them to each channel processing FPGA chip separately;

The plurality of channel processing FPGA chips perform simulation processing on the baseband data according to channel fading parameters;

The plurality of access FPGA chips select and output multi-baseband data from the simulated baseband data.

In a specific embodiment, the channel fading parameter includes one or more of the following: a large-scale fading factor, a small-scale fading factor, and a multipath delay parameter.

In a specific embodiment, the channel processing FPGA chip performs simulation processing on the baseband data according to the channel fading parameter, including:

Selecting a link that needs to be simulated according to a preset link address;

Multiplying the baseband data on the link by a large-scale fading factor to achieve large-scale fading processing;

The baseband data processed by the large-scale fading is divided into multipath data, and multiplied by the small-scale fading factor to realize small-scale fading processing;

The multipath baseband data processed by the small-scale fading is buffered by a preset delay parameter, and then accumulated;

Superimpose all baseband data output to the same target antenna.

In a specific embodiment, the obtaining a channel fading parameter includes: acquiring a channel fading parameter by using an Ethernet interface, and converting the obtained radio frequency signal into baseband data, and transmitting the data through a CPRI fiber interface.

The technical solution of the present invention will be further described in detail below through specific embodiments.

Example 1

This embodiment provides a platform and technology for supporting a large-scale wireless network channel for 5G ultra-dense networking scenario simulation, and performs simulation processing and interference synthesis on baseband data. The platform implements DSP+FPGA (DSP: Digital Signal Processor digital signal processing). FPGA: Field Programmable Gate Array (Field Programmable Gate Array) architecture, low cost, can be applied to different wireless network standards, support macro cell to micro cell, micro cell to macro cell, micro cell, between users Interference simulation.

As shown in FIG. 5, the ultra-dense networking wireless channel hard emulation platform of the embodiment of the present invention includes the following modules: a channel radio unit (CRU), a channel emulation unit (CSU), and a channel emulation unit (CSU). The CMU (Channle Management Unit), wherein the channel radio unit is specifically divided into an uplink channel radio unit and a downlink channel radio unit, and the channel emulation unit is specifically divided into an uplink channel emulation unit and a downlink channel emulation unit.

The channel radio unit CRU provides a radio frequency interface, and is connected to a base station RRU (Remote Radio Unit) or a UE (User Equipment) device. After radio frequency-baseband conversion processing, the radio frequency information is transmitted. The number is converted into a baseband signal, and the channel emulation unit is connected through an internal CPRI (Common Public Radio Interface) fiber interface. Alternatively, the baseband signal of the channel emulation unit is converted into a radio frequency signal and output to an external base station RRU or UE device.

The channel emulation unit provides a baseband CPRI fiber interface, performs simulation processing on the baseband data, and performs interference synthesis to complete channel emulation of the ultra-dense networking scenario. Referring to FIG. 2, the channel emulation unit includes a baseband data input module, an emulation processing module, and a fading parameter management module. In this embodiment:

The baseband data access module is configured to connect the baseband data of the base station or the UE terminal (from the channel radio unit), and adopts standard CPRI fiber access, and the optical port rate supports 2.4576G, 3.072G, 4.9152G, 6.144G, 9.83G, and supports all MIMO (Multiple-Input Multiple-Output) antenna configuration. The maximum number of access optical ports is 256 2.4576G optical interfaces, and each 2.4576G optical port can transmit 20MHz bandwidth 2 antenna configuration baseband data. Therefore, under the wireless network hard simulation platform of the present invention, for 20MHz bandwidth 2 antenna configuration, simulation The network size of the system can reach 256 cells × 256 UEs, which can meet the simulation requirements of ultra-dense networking scenarios for 5G mobile communications. Due to the limited resources of the current FPGA chip, a large number of multiplication processing is required in the wireless channel simulation. The multiplication resources of a single FPGA chip cannot satisfy the calculation amount of 256 cells × 256 UE, and it is necessary to use multiple FPGA chips in parallel to share the load, so as to ensure the load. The simulation platform 256 cells × 256 UE full-switch structure, copying the input CPRI optical port link into multiple copies, each channel processing FPGA corresponding one, so that each channel processing FPGA is 256 optical port baseband data input, and The sum of the output optical port links of all channel processing FPGAs is 256 channels.

The simulation processing module simulates the baseband data, and is composed of multiple FPGA chips to perform parallel operations. The processing structure of each FPGA chip is the same. Including: 1. Input link selection, selecting a link from the 256 input links that needs to be simulated at the current clock time; 2. Large-scale fading multiplication, multiplying baseband data by a large-scale fading factor, and fading factor by register Provide, update in real time through external DSP; 3. Small-scale fading multiplication, divide the baseband data of large-scale fading into multipath data, and multiply each by a small-scale fading factor, fading factor by register Provided, updated by external DSP in real time; 4, multipath delay accumulation, delaying buffering of multipath baseband data of small scale fading according to given delay parameters, and then accumulating, delay parameters are provided by registers, Real-time update by external DSP; 5. Output interference superposition, superimpose all channelized data output to the same target, and finally select CPRI optical port link output.

The fading parameter management module is configured to update channel fading parameters in real time according to the currently simulated channel scenario, including a large-scale fading factor, a small-scale fading factor, and a multipath delay parameter. The large-scale fading parameter is obtained by the external field road test acquisition and obtained by the standard channel model. The small-scale fading and delay parameters are based on the standard channel model, and the statistical-based channel modeling method is adopted, that is, the spatial correlation MIMO channel is independently fading. The MIMO channel and the statistically obtained spatial correlation matrix are jointly generated.

The channel management unit writes the channel fading value that needs to be simulated to the channel emulation unit through the Ethernet interface, and performs simulation processing on the baseband data.

Compared with the prior art, the simulation scale of the ultra-dense networking wireless channel hard simulation platform of the embodiment of the present invention is greatly expanded. The existing channel simulation is generally a single cell×single UE, or a channel of several cells×several UEs. Environment, and the simulation scale of the present invention is improved to 256 cells × 256 UE, which can meet the channel simulation environment requirements of more than 100 cells in the ultra-dense networking scenario of the key technology research of 5G mobile communication, and the simulation field test of the base station and the terminal device There is a lot of practical results. At the same time, the implementation of the invention directly simulates the baseband data, can be applied to different wireless network standards, and has strong versatility.

Example 2

In this embodiment, the internal connection structure of the simulation processing module is as shown in FIG. 6, and specifically:

The baseband data access module realizes that the baseband data of the base station cell and the UE terminal are connected through the optical port, and is composed of eight FPGA chips in the platform of the embodiment of the present invention. In this example, the FPGA chip selects the XC7VX690T of the Xilinx company, and has 72 Serdes ( SERializer/DESerializer, series/deserializer) interface, each channel supports CPRI fiber connection below 13G. Access to the FPGA pair The baseband data is aggregated into the internal 10G link according to the CPRI frame structure, and can be adapted to different MIMO antenna CPRI fiber interfaces. Each FPGA provides eight 10G baseband data accesses, and each 10G link can be configured with four 20M2 antenna cells. The eight FPGAs of the baseband data access module can connect a total of 256 20M2 antenna cells. Similarly, for a 20M4 antenna configuration, 128 cells can be connected; for a 20M8 antenna configuration, 64 cells can be connected. At the same time, the baseband data input module realizes the copy input and the selective output of the 10G internal baseband data, and each of the 72 Serdes interfaces of each FPGA works at the 10G rate. In the internal direction, each FPGA receives 8 channels of aggregated baseband data, and then copies them into 8 copies and outputs them to 8 channel processing FPGAs. In the external direction, each FPGA receives 64 channels of processed baseband data. Select 8 channels as the final result output.

7 is a schematic diagram of a channel processing structure inside an FPGA of an embodiment. The simulation processing module implements simulation processing and interference superposition of baseband data, and is composed of 8 XC7VX690T FPGA chips. Each FPGA has the same processing structure and can be processed independently in parallel. The FPGA first receives 64 internal 10G baseband data links. According to the channel processing requirements of the current clock time, the input antenna data selector selects a maximum of 256 antenna data from 64 links for channel processing. According to the pipeline structure, the channel processing process is large-scale fading, small-scale fading, multipath delay, and each channel processing is the result of multiplication of the fading factor by the special register. The multipath time delay is cached according to the delay parameter. Time point. Finally, the output antenna selector adds and synthesizes all the baseband interference data outputted to the same target antenna, and obtains the final channelized baseband data to be sent to the corresponding output antenna interface.

The fading parameter management module consists of 8 DSPs. Each DSP corresponds to a channel processing FPGA, and the fading factor and multipath delay parameters are updated in real time to the FPGA through the CPRI interface. The large-scale fading parameters are obtained by the external field path measurement acquisition or by the standard channel model, and the small-scale fading and delay parameters are generated according to the standard channel model. The modeling process is shown in Fig. 8. It is assumed that the number of antennas on the base station side is M, the number of antennas on the terminal side is N, h _mn represents a link composed of the mth transmit antenna and the nth receive antenna, and each h _{mn is} represented by L distinguishable paths ( Or L clusters, each cluster consisting of P inseparable "sub-paths". Therefore, a frequency selective MIMO channel can be modeled as

among them

Indicates the nth receive antenna, and the mth transmit antenna constitutes the channel fading coefficient of the first separable path of the link, all

A complex Gaussian distribution that conforms to zero mean.

Based on the assumption that the correlation characteristics of the base station antenna are independent of the terminal antenna; the relevant characteristics of the terminal antenna are independent of the base station antenna. Then, the correlation coefficients of the base station antennas m ₁ and m _{2 and} the correlation coefficients of the terminal antennas n ₁ and n ₂ are expressed as

Where <·> represents a "second moment" operation or a covariance operation. Thus, the correlation matrix of the base station side and the terminal side (for each separable path) is

The fading correlation matrices of the first detachable path on the base station side and the terminal side are:

For AOA,

Angle expansion

For AOD,

Angle expansion.

With the correlation matrices R _MS and R _BS , a MIMO channel with some correlation characteristics can be calculated.

In this embodiment, a DSP/FPGA architecture is used to form a large-scale wireless network channel simulation platform. For a 20 MHz bandwidth 2 antenna configuration, the maximum network size of 256 cells×256 terminals is supported, which is suitable for scene simulation of 5G mobile communication ultra-dense networking. And for different wireless network standards.

The embodiment of the present invention further provides a computer storage medium, wherein computer executable instructions are stored, and the computer executable instructions are used to execute the method described in any one of the foregoing method embodiments.

Each of the above units may be implemented by a central processing unit (CPU), a digital signal processor (DSP), or a field-programmable gate array (FPGA) in an electronic device.

Those skilled in the art will appreciate that embodiments of the present invention can be provided as a method, system, or computer program product. Accordingly, the present invention can take the form of a hardware embodiment, a software embodiment, or a combination of software and hardware. Moreover, the invention can take the form of a computer program product embodied on one or more computer-usable storage media (including but not limited to disk storage and optical storage, etc.) including computer usable program code.

The present invention has been described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (system), and computer program products according to embodiments of the invention. It will be understood that each flow and/or block of the flowchart illustrations and/or FIG. These computer program instructions can be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing device to produce a machine for the execution of instructions for execution by a processor of a computer or other programmable data processing device. Means for implementing the functions specified in one or more of the flow or in a block or blocks of the flow chart.

The computer program instructions can also be stored in a computer readable memory that can direct a computer or other programmable data processing device to operate in a particular manner, such that the instructions stored in the computer readable memory produce an article of manufacture comprising the instruction device. The device is implemented in a flow chart A function specified in a block or blocks of a process or multiple processes and/or block diagrams.

These computer program instructions can also be loaded onto a computer or other programmable data processing device such that a series of operational steps are performed on a computer or other programmable device to produce computer-implemented processing for execution on a computer or other programmable device. The instructions provide steps for implementing the functions specified in one or more of the flow or in a block or blocks of a flow diagram.

The above is only the preferred embodiment of the present invention and is not intended to limit the scope of the present invention.

Claims (11)

1. A channel emulation device, wherein the device comprises: a channel radio unit, a channel emulation unit, and a channel management unit; wherein

   The channel radio unit is configured to convert the acquired radio frequency signal into baseband data, send it to a channel emulation unit, and convert baseband data from the channel emulation unit into a radio frequency signal and transmit the signal;

   The channel emulation unit is configured to perform simulation processing on baseband data from the channel radio unit according to channel fading parameters from the channel management unit, and send the simulated baseband data to the channel radio unit;

   The channel management unit is configured to generate a channel fading parameter according to the channel model and send the channel fading parameter to the channel emulation unit.
2. The apparatus according to claim 1, wherein the channel emulation unit comprises: a baseband data access module, a simulation processing module, and a fading parameter management module; wherein

   The baseband data access module includes a plurality of access FPGA chips, each of the access FPGAs receives a baseband data link from the channel radio unit, and each access FPGA chip is used to receive the radio frequency unit from the channel. The baseband data is copied into multiple copies and sent to each channel processing FPGA chip in the simulation processing module respectively; and multiple baseband data is selected and output from the baseband data from the simulation processing module;

   The simulation processing module includes a plurality of channel processing FPGA chips, the plurality of channel processing FPGA chips are operated in parallel, and the baseband data from the access FPGA is simulated according to the channel fading parameter, and the processed baseband data is sent to Baseband data access module;

   The fading parameter management module is configured to update the channel fading parameter in real time according to the currently simulated channel scenario and data from the channel management unit.
3. The apparatus according to claim 1, wherein the channel fading parameter generated by the channel management unit comprises one or more of the following: a large-scale fading factor, a small-scale fading factor, and a multipath. Delay parameter.
4. The apparatus according to claim 3, wherein said channel processing FPGA chip comprises: an input antenna data selector, a large-scale fading multiplier group, a small-scale fading multiplier group, a multipath delay buffer group, and an output antenna data. Selector; among them,

   The input antenna data selector is configured to select a link that needs to be simulated according to a link address provided by the channel management unit;

   The large-scale fading multiplier group is configured to multiply baseband data on the link by a large-scale fading factor to implement large-scale fading processing;

   The small-scale fading multiplier group is configured to divide the baseband data processed by the large-scale fading into multipath data, and multiply by the small-scale fading factor to implement small-scale fading processing;

   The multipath delay buffer group is configured to delay buffering the multipath baseband data after the small scale fading processing according to a preset delay parameter, and then accumulating;

   The output antenna data selector is configured to superimpose all baseband data outputted to the same target antenna, and then send the superposed baseband data to the channel radio unit through the baseband data access module.
5. The apparatus according to any one of claims 1 to 4, wherein

   The baseband data access module and the channel radio unit are connected through a CPRI fiber interface.

   The channel management unit and the channel emulation unit are connected through an Ethernet interface.
6. A channel simulation method, wherein the method comprises:

   Obtaining channel fading parameters and radio frequency signals;

   Converting the acquired radio frequency signal into baseband data, and performing simulation processing on the baseband data according to the channel fading parameter;

   The simulated baseband data is converted into a radio frequency signal and transmitted.
7. The method according to claim 6, wherein the converting the acquired radio frequency signal into baseband data, and performing simulation processing on the baseband data according to the channel fading parameter, include:

   Multiple access FPGA chips copy the baseband data received by themselves into multiple copies and send them to each channel processing FPGA chip separately;

   The plurality of channel processing FPGA chips perform simulation processing on the baseband data according to channel fading parameters;

   The plurality of access FPGA chips select and output multi-baseband data from the simulated baseband data.
8. The method of claim 6, wherein the channel fading parameter comprises one or more of the following: a large scale fading factor, a small scale fading factor, a multipath delay parameter.
9. The method according to claim 8, wherein the channel processing FPGA chip performs simulation processing on the baseband data according to the channel fading parameter, including:

   Selecting a link that needs to be simulated according to a preset link address;

   Multiplying the baseband data on the link by a large-scale fading factor to achieve large-scale fading processing;

   The baseband data processed by the large-scale fading is divided into multipath data, and multiplied by the small-scale fading factor to realize small-scale fading processing;

   The multipath baseband data processed by the small-scale fading is buffered by a preset delay parameter, and then accumulated;

   Superimpose all baseband data output to the same target antenna.
10. A method according to any one of claims 6 to 9, wherein

    Obtaining a channel fading parameter includes: obtaining a channel fading parameter through an Ethernet interface,

    After converting the acquired radio frequency signal into baseband data, the radio frequency signal is transmitted through the CPRI fiber interface.
11. A computer storage medium having stored therein computer executable instructions for performing the method of any one of claims 6 to 10.

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