WO2015188648A1 - 一种内存共享方法、异构硬件、主机及异构系统 - Google Patents

一种内存共享方法、异构硬件、主机及异构系统 Download PDF

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Publication number
WO2015188648A1
WO2015188648A1 PCT/CN2015/075476 CN2015075476W WO2015188648A1 WO 2015188648 A1 WO2015188648 A1 WO 2015188648A1 CN 2015075476 W CN2015075476 W CN 2015075476W WO 2015188648 A1 WO2015188648 A1 WO 2015188648A1
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Prior art keywords
memory page
target memory
heterogeneous hardware
host
state
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PCT/CN2015/075476
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English (en)
French (fr)
Inventor
解壁伟
高云伟
詹剑锋
张立新
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华为技术有限公司
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Publication of WO2015188648A1 publication Critical patent/WO2015188648A1/zh

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems

Definitions

  • the present invention relates to the field of data storage, and in particular, to a memory sharing method, heterogeneous hardware, a host, and a heterogeneous system.
  • the existing single-node heterogeneous system includes a host and heterogeneous hardware, and the host and the hardware are interconnected through a bus PCI-E.
  • heterogeneous hardware may include Many Integrated Cores (MIC) expansion cards, Generic-purpose Graphic Processing Units (GPGPUs), etc., which provide more powerful vector processing for the host as an expansion card. , floating point arithmetic or multi-threaded parallelism.
  • MIC Integrated Cores
  • GPGPUs Generic-purpose Graphic Processing Units
  • floating point arithmetic or multi-threaded parallelism floating point arithmetic or multi-threaded parallelism.
  • the memory on the host is large, while the memory on heterogeneous hardware is small. Since the memory on the heterogeneous hardware currently stores the data and the remaining free storage space is small, it may be difficult to support running some applications with high memory requirements, or even completely loading the data of these applications. Therefore, how to increase the free storage space of the memory of the heterogene
  • the free storage space of the heterogeneous hardware can be increased.
  • a first aspect of the present invention provides a memory sharing method, where the method is applied to heterogeneous hardware, and the heterogeneous hardware is connected to a host, and the method includes:
  • the heterogeneous hardware acquires a memory address of a part of the memory of the host sent by the host;
  • the heterogeneous hardware stores, according to the memory address, data in a memory of the heterogeneous hardware whose frequency of use is lower than a predetermined frequency of use to the Part of the memory.
  • the method further includes:
  • the state table is configured to record a state of a memory page of the partial memory
  • the heterogeneous hardware stores, according to the memory address, data in a memory of the heterogeneous hardware whose frequency of use is lower than a predetermined frequency of use to the Part of the memory of heterogeneous hardware, including:
  • the heterogeneous hardware searches the status table for a memory page in the partial memory that is in an idle state;
  • the heterogeneous hardware stores data using a frequency lower than a predetermined frequency of use into a memory page in an idle state after finding a memory page in an idle state.
  • the heterogeneous hardware stores data with a frequency lower than a predetermined usage frequency to the memory in an idle state. After the page, the method further includes:
  • the heterogeneous hardware needs to read data of the target memory page in the partial memory, determine whether the target memory page is in a state locked by the host or in an unlocked state in the state table;
  • the heterogeneous hardware reads data of the target memory page
  • the heterogeneous hardware requests the host to unlock the target memory page, so that the host terminates operation on the target memory page, The target memory page is unlocked, and after unlocking the target memory page, notifying the heterogeneous hardware that the target memory page is unlocked;
  • the heterogeneous hardware receives a notification that the target memory page sent by the host is unlocked, locks the target memory page, and reads the target memory page after locking the target memory page data.
  • the heterogeneous hardware after the heterogeneous hardware generates the status table of the partial memory according to the memory address, the method also includes:
  • the heterogeneous hardware receives a request sent by the host to query whether the target memory page in the partial memory is in a state locked by the heterogeneous hardware or in an unlocked state;
  • the heterogeneous hardware determines, according to the request sent by the host, whether the target memory page is in a locked state by the heterogeneous hardware or in an unlocked state;
  • the heterogeneous hardware notifies the host that the target memory page is in an unlocked state, such that the host is in the receiving of the target memory page After the notification of the unlocked state, the target memory page is locked, and after the target memory page is locked, the target memory page is operated;
  • the heterogeneous hardware notifies the host that the target memory page is locked by the heterogeneous hardware, so that the host determines that the host cannot be The target memory page is operated.
  • the method further includes:
  • the heterogeneous hardware receives the lock of the target memory page after the host completes the operation on the target memory page, and sends the target memory page after releasing the lock on the target memory page. Unlocked notifications;
  • the heterogeneous hardware modifies the state of the target memory page in the state table to an unlocked state.
  • the heterogeneous hardware stores the memory of the heterogeneous hardware After the data in the frequency of use below the predetermined frequency of use is stored in a portion of the memory of the heterogeneous hardware, the method further includes:
  • the heterogeneous hardware records a storage time in which the data whose usage frequency is lower than a predetermined usage frequency is in the partial memory
  • the heterogeneous hardware prohibits reading the data whose usage frequency is lower than the predetermined usage frequency from the partial memory into the memory of the heterogeneous hardware.
  • the method further includes:
  • the heterogeneous hardware prohibits storing data of the target memory page from the memory of the heterogeneous hardware to the partial memory.
  • a second aspect of the present invention provides a heterogeneous hardware, where the heterogeneous hardware is connected to a host, and the heterogeneous hardware includes:
  • An obtaining unit configured to acquire a memory address of a part of the memory of the host sent by the host;
  • a storage unit configured to: when the free capacity of the memory of the heterogeneous hardware is lower than a predetermined capacity, According to the memory address, data in the memory of the heterogeneous hardware whose frequency of use is lower than a predetermined use frequency is stored in the partial memory.
  • the heterogeneous hardware further includes: a generating unit and a query unit,
  • the generating unit is configured to generate, according to the memory address acquired by the acquiring unit, a state table of the partial memory; the state table is configured to record a state of a memory page of the partial memory;
  • the query unit is configured to: when the free capacity of the memory of the heterogeneous hardware is lower than a predetermined capacity, searching, in the state table, a memory page in the partial memory that is in an idle state;
  • the storage unit is further configured to store, after the query unit finds a memory page in an idle state, data whose usage frequency is lower than a predetermined usage frequency into a memory page in an idle state.
  • the query unit is further configured to: store, in the storage unit, data usage frequency lower than a predetermined usage frequency After the memory page in the idle state is reached, and when the heterogeneous hardware needs to read the data of the target memory page in the partial memory, it is determined whether the target memory page is in the state table The state of the host lock is still in the unlocked state;
  • the heterogeneous hardware further includes a reading unit, a request unit, and a locking unit.
  • the reading unit is configured to read data of the target memory page if the query unit determines that the target memory page is in an unlocked state;
  • the requesting unit is configured to: if the query unit determines that the target memory page is in a state locked by the host, request the host to unlock the target memory page, so that the host terminates the target An operation of the memory page, unlocking the target memory page, and notifying the heterogeneous hardware that the target memory page is unlocked after unlocking the target memory page;
  • the obtaining unit is further configured to receive a notification that the target memory page sent by the host is unlocked;
  • the locking unit is configured to: after the obtaining unit receives the notification that the target memory page sent by the host is unlocked, lock the target memory page;
  • the reading unit is further configured to read data in the target memory page after the locking unit locks the target memory page.
  • the acquiring unit is further configured to generate, in the generating unit, the partial memory according to the memory address After the status table, receiving the part of the memory in the query sent by the host Whether the target memory page is in a state of being locked by the heterogeneous hardware or in a non-locked state;
  • the query unit is configured to determine, according to the request sent by the host acquired by the acquiring unit, whether the target memory page is in a locked state by the heterogeneous hardware or an unlocked state;
  • the heterogeneous hardware further includes: a sending unit, configured to notify the host that the target memory page is in an unlocked state, if the query unit determines that the target memory page is in an unlocked state, such that After receiving the notification that the target memory page is in an unlocked state, the host locks the target memory page, and after the target memory page is locked, operates the target memory page; If the query unit determines that the target memory page is in a state locked by the heterogeneous hardware, notifying the host that the target memory page is locked by the heterogeneous hardware, so that the host determines that the The target memory page operates.
  • a sending unit configured to notify the host that the target memory page is in an unlocked state, if the query unit determines that the target memory page is in an unlocked state, such that After receiving the notification that the target memory page is in an unlocked state, the host locks the target memory page, and after the target memory page is locked, operates the target memory page; If the query unit determines that the target memory page is in a state locked by the heterogene
  • the acquiring unit is further configured to: after the host performs operations on the target memory page, receive the Disabling the lock of the target memory page after completing the operation on the target memory page, and notifying that the target memory page is unlocked after unlocking the target memory page;
  • the heterogeneous hardware further includes a status unit, where the status unit is configured to: after the obtaining unit receives the notification that the target memory page sent by the host has been unlocked, the target memory page is in the status table. The state in is modified to be unlocked.
  • the heterogeneous hardware further includes a time unit and a forbidden unit
  • the time unit is configured to: after the storage unit stores data in a memory of the heterogeneous hardware with a frequency lower than a predetermined use frequency to a part of the memory of the heterogeneous hardware, recording a use frequency lower than a predetermined use frequency The storage time of the data in the portion of the memory;
  • the prohibiting unit is configured to prohibit, when the storage time recorded by the time unit does not reach a threshold, data from the partial memory to be read from the partial memory to the memory of the heterogeneous hardware in.
  • the heterogeneous hardware further includes a time unit and a forbidden unit
  • the time unit is configured to record, after the reading unit reads the data of the target memory page, a storage time of the read data of the target memory page in the memory of the heterogeneous hardware;
  • the prohibiting unit is configured to prohibit storing data of the target memory page from the memory of the heterogeneous hardware to the partial memory when the storage time recorded by the time unit does not reach a threshold.
  • a third aspect of the present invention provides a memory sharing method, where the method is applied to a host, and the host is connected to heterogeneous hardware, and the method includes:
  • the host sends a memory address of a part of the memory of the host to the heterogeneous hardware, so that when the free capacity of the memory of the heterogeneous hardware is lower than a predetermined capacity, the heterogeneous hardware according to the memory address Data in the memory of the heterogeneous hardware that is used at a frequency lower than a predetermined frequency of use is stored in the portion of the memory.
  • the method further includes: when the heterogeneous hardware needs to read data of a target memory page in the partial memory, When the heterogeneous hardware inquires that the target memory page is locked by the host according to the status table of the partial memory generated by the memory address, the host receives the heterogeneous hardware and sends the a request for unlocking a target memory page; the status table of the partial memory is used to record a state of a memory page of the partial memory;
  • the host After receiving the request to unlock the target memory page, the host terminates the operation of the target memory page and unlocks the target memory page;
  • the host unlocks the target memory page, notifying the heterogeneous hardware that the target memory page is unlocked, so that the heterogeneous hardware receives the target memory page sent by the host and is unlocked.
  • the target memory page is locked, and after the target memory page is locked, the data in the target memory page is read.
  • the method further includes:
  • the host sends a request to the heterogeneous hardware to query whether the target memory page in the partial memory is in a state locked by the heterogeneous hardware or in an unlocked state, so that the heterogeneous hardware sends according to the host.
  • a request querying, according to the partial memory state table generated by the memory address, determining whether the target memory page is in a locked state by the heterogeneous hardware or in an unlocked state; if the target memory page is in a non-locked state Locking the state, the heterogeneous hardware notifying the host that the target memory page is in an unlocked state; if the target memory page is in a state locked by the heterogeneous hardware, the heterogeneous hardware is The host notifies that the target memory page is locked by the heterogeneous hardware; the partial memory status table is used to record the status of the memory page of the partial memory;
  • the target memory page is locked; the host operates the target memory page after locking the target memory page;
  • the host determines that the target memory page cannot be operated.
  • the method further includes:
  • the host After the host performs the operation on the target memory page, the host unlocks the target memory page;
  • the host releases the lock on the target memory page, sending, to the heterogeneous hardware, a notification that the target memory page is unlocked, so that the heterogeneous hardware receives the target memory sent by the host
  • the state of the target memory page in the state table is modified to an unlocked state.
  • a fourth aspect of the present invention provides a host, where the host is connected to heterogeneous hardware, and the host includes:
  • a sending unit configured to send, to the heterogeneous hardware, a memory address of a part of the memory of the host, so that when the free capacity of the memory of the heterogeneous hardware is lower than a predetermined capacity, the heterogeneous hardware is according to the memory address And storing, in the memory of the heterogeneous hardware, a data whose frequency of use is lower than a predetermined use frequency to the partial memory.
  • the heterogeneous hardware further includes: a receiving unit and an unlocking unit,
  • the receiving unit is configured to: when the heterogeneous hardware needs to read data of a target memory page in the partial memory, and query in a status table of the partial memory generated by the heterogeneous hardware according to the memory address Receiving a request for unlocking the target memory page sent by the heterogeneous hardware when the target memory page is in a state locked by the host; the partial memory status table is used to record the partial memory The status of the memory page;
  • the unlocking unit is configured to terminate an operation on the target memory page after receiving a request to unlock the target memory page, and unlock the target memory page;
  • the sending unit is further configured to notify the heterogeneous hardware that the target memory page has been unlocked after the target memory page is unlocked, so that the heterogeneous hardware receives the target sent by the host After the notification that the memory page has been unlocked, the target memory page is locked, and after the target memory page is locked, the data in the target memory page is read.
  • the transmitting The unit is further configured to send, to the heterogeneous hardware, a request to query whether the target memory page in the partial memory is in a state locked by the heterogeneous hardware or in an unlocked state, so that the heterogeneous hardware is according to the host Sending a request, querying, according to the state table of the partial memory generated by the memory address, determining whether the target memory page is in a locked state by the heterogeneous hardware or in an unlocked state; if the target memory page is in a state In an unlocked state, the heterogeneous hardware notifies the host that the target memory page is in an unlocked state; if the target memory page is in a locked state by the heterogeneous hardware, the heterogeneous hardware is The host notifies that the target memory page is locked by the heterogeneous hardware; the partial memory status table is used to record the status of the memory page of the partial memory;
  • the receiving unit is further configured to receive a notification that the target memory page is in an unlocked state or receive a notification that the target memory page sent by the heterogeneous hardware is locked by the heterogeneous hardware;
  • the heterogeneous hardware further includes: a locking unit and an operating unit,
  • the locking unit is configured to lock the target memory page when the receiving unit receives the notification that the target memory page is in an unlocked state
  • the operating unit is configured to operate the target memory page after the locking unit locks the target memory page.
  • the unlocking unit is further configured to: after the operating unit finishes operating the target memory page, Unlocking the target memory page;
  • the sending unit is further configured to send, to the heterogeneous hardware, a notification that the target memory page has been unlocked after the unlocking of the target memory page is released, so that the heterogeneous hardware receives the sending by the host After the notification that the target memory page has been unlocked, the state of the target memory page in the state table is modified to an unlocked state.
  • a fifth aspect of the present invention provides a heterogeneous system, including: a host and heterogeneous hardware, where the host is connected to the heterogeneous hardware;
  • the host is configured to send a memory address of a part of the memory of the host to the heterogeneous hardware
  • the heterogeneous hardware is configured to receive the memory address sent by the host, and when the free capacity of the memory of the heterogeneous hardware is lower than a predetermined capacity, according to the memory address, the memory of the heterogeneous hardware The data in which the frequency is lower than the predetermined use frequency is stored in the partial memory.
  • the heterogeneous hardware is further configured to generate a status table of the partial memory according to the memory address; the status table is used for recording a state of a memory page of the portion of memory; and an empty space for memory of the heterogeneous hardware
  • the memory table in the partial memory is searched in the status table; after the memory page in the idle state is found, the data using the frequency lower than the predetermined use frequency is stored to In a memory page that is in an idle state.
  • the heterogeneous hardware is further configured to store data in a usage frequency lower than a predetermined usage frequency to be idle. After the memory page of the state, and when the heterogeneous hardware needs to read the data of the target memory page in the partial memory, determine whether the target memory page is locked by the host in the state table. The state is still unlocked;
  • the target memory page is in a state locked by the host, requesting the host to unlock the target memory page;
  • the host is further configured to receive a request sent by the heterogeneous hardware to unlock the target memory page, terminate an operation on the target memory page, unlock the target memory page, and After the memory page is unlocked, notifying the heterogeneous hardware that the target memory page is unlocked;
  • the heterogeneous hardware is further configured to receive a notification that the target memory page sent by the host is unlocked, lock the target memory page, and read the target memory after locking the target memory page The data in the page.
  • the host is further configured to generate the partial memory according to the memory address in the heterogeneous hardware After the state table, send a request to the heterogeneous hardware to query whether the target memory page in the partial memory is in a state locked by the heterogeneous hardware or in an unlocked state;
  • the heterogeneous hardware is further configured to receive a request sent by the host to query whether a target memory page in the partial memory is in a state locked by the heterogeneous hardware or in an unlocked state; and configured to be according to the host Sending a request, determining whether the target memory page is in a locked state by the heterogeneous hardware or in an unlocked state; if the target memory page is in an unlocked state, notifying the host that the target memory page is in An unlocked state; if the target memory page is in a state locked by the heterogeneous hardware, notifying the host that the target memory page is locked by the heterogeneous hardware;
  • the host is further configured to: after receiving the notification that the target memory page is in an unlocked state, lock the target memory page, and after locking the target memory page, target the target The memory page operates; and is configured to determine that the target memory page cannot be operated after receiving the notification that the target memory page is locked by the heterogeneous hardware.
  • the host is further configured to: after operating the target memory page, release the target memory. Locking of the page, and after releasing the locking of the target memory page, sending a notification that the target memory page has been unlocked to the heterogeneous hardware;
  • the heterogeneous hardware is further configured to receive a notification that the target memory page sent by the host is unlocked, and modify a state of the target memory page in the state table to an unlocked state.
  • the heterogeneous hardware is further used in the heterogeneous hardware After the data in the memory usage frequency is lower than the predetermined usage frequency is stored in the partial memory of the heterogeneous hardware, the storage time of the data whose usage frequency is lower than the predetermined usage frequency in the partial memory is recorded; when the storage time is not reached At the threshold, the heterogeneous hardware prohibits reading data having a frequency below the predetermined frequency of use from the portion of memory into the memory of the heterogeneous hardware.
  • the heterogeneous hardware is further configured to: after reading data of the target memory page, record reading The storage time of the data of the target memory page in the memory of the heterogeneous hardware; when the storage time does not reach the threshold, prohibiting storing the data of the target memory page from the memory of the heterogeneous hardware to The partial memory.
  • the memory sharing method provided by the present invention can store data in a memory of a heterogeneous hardware with a frequency lower than a predetermined frequency of use to a part of the memory of the host, and reduce data whose frequency of use is lower than a predetermined frequency of use in the memory of the heterogeneous hardware.
  • the storage space occupied increases the free storage space of heterogeneous hardware and provides more memory space for applications running on heterogeneous hardware.
  • FIG. 1 is a schematic flow chart of a memory sharing method provided by the present invention.
  • FIG. 2 is a schematic flow chart of another memory sharing method provided by the present invention.
  • FIG. 3 is a schematic diagram of steps of reading data from a part of memory of a host by heterogeneous hardware provided by the present invention
  • FIG. 4 is a schematic diagram of a step of reading a memory page of the partial memory by a host provided by the present invention
  • FIG. 5 is a schematic structural diagram of a heterogeneous hardware provided by the present invention.
  • FIG. 6 is a schematic structural diagram of another heterogeneous hardware provided by the present invention.
  • FIG. 7 is a schematic flow chart of a memory sharing method provided by the present invention.
  • FIG. 8 is a schematic flowchart of a host unlocking provided by the present invention.
  • FIG. 9 is a schematic flowchart of operation of a host memory page in the partial memory in the host provided by the present invention.
  • FIG. 10 is a schematic structural diagram of a host provided by the present invention.
  • FIG. 11 is a schematic structural diagram of a host provided by the present invention.
  • FIG. 12 is a schematic structural view of a heterogeneous system provided by the present invention.
  • FIG. 13 is a schematic diagram of a single node heterogeneous system provided by the present invention.
  • FIG. 14 is a schematic diagram of a memory mapping relationship between a shared memory and an MIC provided by the present invention.
  • FIG. 15 is a schematic diagram of a memory mapping relationship between a shared memory and a MIC0 provided by the present invention.
  • FIG. 16 is a schematic structural diagram of a heterogeneous hardware provided by the present invention.
  • 17 is a schematic structural view of a host provided by the present invention.
  • an embodiment of the present invention provides a memory sharing method, where the memory sharing method is applied to heterogeneous hardware, and the heterogeneous hardware is connected to a host. Both the host and the heterogeneous hardware are provided with memory.
  • the heterogeneous hardware provides the host with vector processing, floating point operations, or multi-thread parallelism.
  • the memory sharing method may include:
  • the heterogeneous hardware acquires a memory address of a part of the memory of the host sent by the host.
  • the heterogeneous hardware stores, according to the memory address, data in a memory of the heterogeneous hardware with a frequency lower than a predetermined frequency of use.
  • the partial memory When the idle capacity of the memory of the heterogeneous hardware is lower than a predetermined capacity, the heterogeneous hardware stores, according to the memory address, data in a memory of the heterogeneous hardware with a frequency lower than a predetermined frequency of use. The partial memory.
  • a part of the memory of the host is used as a shared memory to provide a storage space for the memory data in the heterogeneous hardware.
  • the heterogeneous hardware may select data using a frequency lower than a predetermined frequency of use from the memory of the heterogeneous hardware according to a Least Recently Used (LRU) algorithm.
  • LRU Least Recently Used
  • the selected data whose usage frequency is lower than the predetermined usage frequency may be referred to as infrequently used data.
  • the memory space occupied by less common data on heterogeneous hardware can be used to store other data, that is, increase.
  • the free storage space of the memory of the heterogeneous hardware When the application runs on heterogeneous hardware, heterogeneous hardware can provide more memory space support for the application, reducing the phenomenon that the application cannot complete the data loading due to insufficient memory capacity.
  • the memory sharing method may include:
  • the heterogeneous hardware acquires a memory address of a part of the memory of the host sent by the host.
  • the heterogeneous hardware generates a status table of the partial memory according to the memory address, where the status table is used to record a status of a memory page of the partial memory.
  • the heterogeneous hardware searches the status table for a memory page in the partial memory that is in an idle state.
  • the heterogeneous hardware finds the memory page in an idle state, storing the data whose frequency is lower than the predetermined usage frequency into the memory page in the idle state.
  • the status table may be provided with a status bit of the memory page of the partial memory, and the status bit may be used to identify the current state of the memory page.
  • the status bits may include a usage status bit and a lock status bit, the status bit may identify whether the current memory page is in a use state, the lock status bit may identify whether the current memory page is in a locked state, and the status table also records the memory. The address of the page.
  • the state table is maintained by the heterogeneous hardware. When the heterogeneous hardware stores data using a frequency lower than a predetermined frequency of use into a memory page that is in an idle state, the heterogeneous hardware sets the usage status bit of the memory page in the status table to the usage state.
  • FIG. 3 describes the steps of the heterogeneous hardware reading data from the partial memory of the host when the heterogeneous hardware needs to read the data of the target memory page in the partial memory, which specifically includes:
  • step 302 the heterogeneous hardware reads data of the target memory page.
  • the heterogeneous hardware requests the host to unlock the target memory page.
  • the state in which the target memory page is locked by the host indicates that the target memory page is currently being read or written by the host.
  • the host After receiving the request for unlocking the target memory page sent by the heterogeneous hardware, the host terminates operation on the target memory page, unlocks the target memory page, and is in the target After the memory page is unlocked, the heterogeneous hardware is notified that the target memory page is unlocked.
  • the heterogeneous hardware receives a notification that the target memory page sent by the host is unlocked, and locks the target memory page.
  • the heterogeneous hardware After the heterogeneous hardware locks the target memory page, the heterogeneous hardware sets the lock status bit of the target memory page in the status table to a locked state. At this time, the host will not be able to operate on the target memory page, thereby avoiding conflicts between the host and the heterogeneous hardware when using the memory page of the partial memory.
  • step 302 is performed: reading data in the target memory page.
  • FIG. 4 illustrates the steps of the host reading a memory page of the partial memory, which specifically includes:
  • the heterogeneous hardware receives a request sent by the host to query whether a target memory page in the partial memory is in a state locked by the heterogeneous hardware or in an unlocked state.
  • the heterogeneous hardware determines, according to the request sent by the host, whether the target memory page is in a locked state by the heterogeneous hardware or an unlocked state.
  • step 403 the heterogeneous hardware notifies the host that the target memory page is in an unlocked state, so that the host receives the target memory page in a non-lock state. After the notification of the status is locked, the target memory page is locked.
  • the host After locking the target memory page, the host notifies the heterogeneous hardware that the target memory page is locked by the host, and the heterogeneous hardware receives a notification that the target memory page is locked by the host And setting a state of the target memory page in the state table to a state locked by the host.
  • step 405 the heterogeneous hardware notifies the host that the target memory page is locked by the heterogeneous hardware, so that the host Make sure that the target memory page cannot be operated.
  • the method further includes:
  • the heterogeneous hardware receives the lock of the target memory page after the host completes the operation on the target memory page, and sends the target memory page after releasing the lock on the target memory page. Unlocked notifications;
  • the heterogeneous hardware modifies the state of the target memory page in the state table to an unlocked state.
  • the memory sharing method can take the following technical measures.
  • the memory sharing method may further include:
  • the heterogeneous hardware records a storage time in which the data whose usage frequency is lower than a predetermined usage frequency is in the partial memory
  • the heterogeneous hardware prohibits reading the data whose usage frequency is lower than the predetermined usage frequency from the partial memory into the memory of the heterogeneous hardware.
  • the memory sharing method further includes:
  • the heterogeneous hardware prohibits storing data of the target memory page from the memory of the heterogeneous hardware to the partial memory.
  • the threshold may not be a fixed value and may be adjusted according to the frequency at which the target memory page is accessed.
  • the memory sharing method of the above embodiment can be applied to heterogeneous hardware.
  • the heterogeneous hardware will be described below.
  • an embodiment of the present invention provides a heterogeneous hardware 501, where the heterogeneous hardware 501 is connected to a host, and the heterogeneous hardware 501 includes:
  • the obtaining unit 502 is configured to obtain a memory address of a part of the memory of the host that is sent by the host;
  • the storage unit 503 is configured to: when the free capacity of the memory of the heterogeneous hardware 501 is lower than a predetermined capacity, store the data in the memory of the heterogeneous hardware 501 using a frequency lower than a predetermined frequency according to the memory address. Go to the part of the memory.
  • the heterogeneous hardware further includes: a generating unit 504 and a query unit 505.
  • the generating unit 504 is configured to generate, according to the memory address acquired by the acquiring unit, a state table of the partial memory, where the state table is used to record a state of a memory page of the partial memory;
  • the query unit 505 is configured to: when the free capacity of the memory of the heterogeneous hardware is lower than a predetermined capacity, searching, in the state table, the memory page in the partial memory that is in an idle state;
  • the storage unit is further configured to store, after the query unit 505 finds a memory page in an idle state, data whose usage frequency is lower than a predetermined use frequency into a memory page in an idle state.
  • the query unit 505 is further configured to: after the storage unit stores data whose usage frequency is lower than a predetermined usage frequency, into a memory page that is in an idle state, and when the heterogeneous hardware needs to read the When the data of the target memory page in the memory is partially determined, it is determined whether the target memory page is in a state locked by the host or in an unlocked state in the state table.
  • the heterogeneous hardware also includes a reading unit 506, a requesting unit 507, and a locking unit 508.
  • the reading unit 506 is configured to read data of the target memory page if the query unit 505 determines that the target memory page is in an unlocked state;
  • the requesting unit 507 is configured to, if the query unit 505 determines that the target memory page is in a state locked by the host, request the host to unlock the target memory page, so that the host terminates the location An operation of the target memory page, unlocking the target memory page, and notifying the heterogeneous hardware that the target memory page is unlocked after unlocking the target memory page;
  • the obtaining unit is further configured to receive a notification that the target memory page sent by the host is unlocked;
  • the locking unit 508 is configured to: after the obtaining unit receives the notification that the target memory page sent by the host is unlocked, lock the target memory page;
  • the reading unit 506 is further configured to read data in the target memory page after the locking unit 508 locks the target memory page.
  • the obtaining unit is further configured to: after the generating unit 504 generates the state table of the partial memory according to the memory address, receive a query, and send, by the host, a target memory page in the partial memory. a request that is locked by the heterogeneous hardware or is in an unlocked state;
  • the query unit 505 is configured to determine, according to the request sent by the host acquired by the acquiring unit, whether the target memory page is in a locked state by the heterogeneous hardware or in an unlocked state.
  • the heterogeneous hardware further includes: a sending unit 509, configured to notify the host that the target memory page is unlocked if the query unit 505 determines that the target memory page is in an unlocked state. a state, after the host receives the notification that the target memory page is in an unlocked state, locks the target memory page, and operates the target memory page after locking the target memory page And if the query unit 505 determines that the target memory page is in a state locked by the heterogeneous hardware, notifying the host that the target memory page is locked by the heterogeneous hardware, so that the The host determines that the target memory page cannot be operated.
  • a sending unit 509 configured to notify the host that the target memory page is unlocked if the query unit 505 determines that the target memory page is in an unlocked state.
  • the obtaining unit is further configured to: after the host performs operations on the target memory page, receive the host to release the locking of the target memory page after completing the operation performed on the target memory page. And a notification that the target memory page sent after unlocking the target memory page has been unlocked;
  • the heterogeneous hardware further includes a status unit 512, configured to: after the obtaining unit receives the notification that the target memory page sent by the host has been unlocked, the target memory page is in the The state in the status table is modified to be unlocked.
  • the heterogeneous hardware further includes a time unit 510 and a prohibition unit 511.
  • the time unit 510 is configured to: after the storage unit stores data in a memory of the heterogeneous hardware with a frequency lower than a predetermined use frequency to a part of the memory of the heterogeneous hardware, the recording use frequency is lower than a predetermined use frequency.
  • the prohibiting unit 511 is configured to prohibit, when the storage time recorded by the time unit 510 does not reach a threshold, data from the partial memory to be read from the partial memory to the heterogeneous hardware. In memory.
  • the time unit 510 is further configured to: after the reading unit 506 reads the data of the target memory page, record the read data of the target memory page in the memory of the heterogeneous hardware. Storage time
  • the prohibiting unit 511 is further configured to, when the storage time recorded by the time unit 510 does not reach the threshold, prohibit storing the data of the target memory page from the memory of the heterogeneous hardware to the partial memory.
  • the embodiment of the present invention further provides a memory sharing method, which can be applied to a host, where the host is connected to heterogeneous hardware, and specifically includes:
  • the host sends a memory address of a part of the memory of the host to the heterogeneous hardware, so that when the free capacity of the memory of the heterogeneous hardware is lower than a predetermined capacity, the heterogeneous hardware is configured according to the memory address. And storing, in the memory of the heterogeneous hardware, a data whose frequency of use is lower than a predetermined use frequency to the partial memory.
  • FIG. 8 describes data when the heterogeneous hardware needs to read a target memory page in the partial memory, and is generated according to the memory address by the heterogeneous hardware.
  • the operation steps that the host needs to perform include:
  • the host receives a request for unlocking the target memory page that is sent by the heterogeneous hardware.
  • the status table of the partial memory is used to record a state of a memory page of the partial memory.
  • the host After receiving the request for unlocking the target memory page, the host terminates operation on the target memory page, and unlocks the target memory page.
  • FIG. 9 is a description of the operations that the host needs to perform when the host needs to operate the target memory page in the memory.
  • the host sends a request to the heterogeneous hardware to query whether the target memory page in the partial memory is in a state locked by the heterogeneous hardware or in an unlocked state.
  • the heterogeneous hardware queries the status table of the partial memory generated according to the memory address according to the request sent by the host, and determines whether the target memory page is locked by the heterogeneous hardware or is not locked. a state; if the target memory page is in an unlocked state, the heterogeneous hardware notifies the host that the target memory page is in an unlocked state; if the target memory page is in a state locked by the heterogeneous hardware And the heterogeneous hardware notifies the host that the target memory page is locked by the heterogeneous hardware; the partial memory status table is used to record a status of the memory page of the partial memory;
  • the host operates the target memory page after locking the target memory page.
  • the host determines that the target memory page cannot be operated.
  • the method further includes:
  • the host After the host performs the operation on the target memory page, the host unlocks the target memory page;
  • the host releases the lock on the target memory page, sending, to the heterogeneous hardware, a notification that the target memory page is unlocked, so that the heterogeneous hardware receives the target memory sent by the host
  • the state of the target memory page in the state table is modified to an unlocked state.
  • the above memory sharing method can be applied to a host, and the host is introduced below.
  • the embodiment of the present invention further provides a host 901, where the host 901 is connected to heterogeneous hardware, and the host 901 includes:
  • the sending unit 902 is configured to send, to the heterogeneous hardware, part of the memory of the host 901 a memory address, such that when the free capacity of the memory of the heterogeneous hardware is lower than a predetermined capacity, the heterogeneous hardware uses the data in the memory of the heterogeneous hardware to be lower than a predetermined frequency according to the memory address. Stored to the partial memory.
  • the heterogeneous hardware further includes: a receiving unit 903 and an unlocking unit 904.
  • the receiving unit 903 is configured to: when the heterogeneous hardware needs to read data of a target memory page in the partial memory, and in a status table of the partial memory generated by the heterogeneous hardware according to the memory address Querying that the target memory page is in a state locked by the host 901, receiving a request sent by the heterogeneous hardware to unlock the target memory page; the partial memory status table is used to record the part The state of the memory page of the memory;
  • the unlocking unit 904 is configured to terminate the operation of the target memory page after receiving the request to unlock the target memory page, and unlock the target memory page;
  • the sending unit 902 is further configured to notify the heterogeneous hardware that the target memory page has been unlocked after the target memory page is unlocked, so that the heterogeneous hardware receives the information sent by the host 901. After the notification that the target memory page has been unlocked, the target memory page is locked, and after the target memory page is locked, the data in the target memory page is read.
  • the sending unit 902 is further configured to send, to the heterogeneous hardware, a request for querying whether the target memory page in the partial memory is in a state locked by the heterogeneous hardware or in an unlocked state, so that The heterogeneous hardware queries the status table of the partial memory generated according to the memory address according to the request sent by the host 901, and determines whether the target memory page is locked by the heterogeneous hardware or is not locked.
  • the heterogeneous hardware if the target memory page is in an unlocked state, the heterogeneous hardware notifies the host 901 that the target memory page is in an unlocked state; if the target memory page is locked by the heterogeneous hardware a state, the heterogeneous hardware notifying the host 901 that the target memory page is locked by the heterogeneous hardware; the partial memory status table is used to record a status of a memory page of the partial memory;
  • the receiving unit 903 is further configured to receive a notification that the target memory page is in an unlocked state or receive a notification that the target memory page sent by the heterogeneous hardware is locked by the heterogeneous hardware;
  • the heterogeneous hardware further includes a locking unit 905 and an operating unit 906.
  • the locking unit 905 is configured to: when the receiving unit 903 receives the target memory page Locking the target memory page when the notification is not locked;
  • the operation unit 906 is configured to operate the target memory page after the locking unit 905 locks the target memory page.
  • the unlocking unit 904 is further configured to release the locking of the target memory page after the operating unit 906 completes the operation on the target memory page;
  • the sending unit 902 is further configured to send, after the unlocking the target memory page, the notification that the target memory page has been unlocked to the heterogeneous hardware, so that the heterogeneous hardware receives the host 901 After the sent notification that the target memory page has been unlocked, the state of the target memory page in the status table is modified to an unlocked state.
  • the embodiment of the present invention will also introduce a heterogeneous system 1001 to which the above memory sharing method can be applied.
  • an embodiment of the present invention further provides a heterogeneous system 1001, including: a host 1002 and heterogeneous hardware 1003, where the host 1002 is connected to the heterogeneous hardware 1003.
  • the host 1002 is configured to send, to the heterogeneous hardware 1003, a memory address of a part of the memory of the host 1002;
  • the heterogeneous hardware 1003 is configured to receive the memory address sent by the host 1002, and when the idle capacity of the memory of the heterogeneous hardware 1003 is lower than a predetermined capacity, according to the memory address, the heterogeneous Data in the memory of the hardware 1003 that is used at a frequency lower than a predetermined frequency of use is stored in the portion of the memory.
  • the heterogeneous hardware 1003 is further configured to generate, according to the memory address, a state table of the partial memory; the state table is configured to record a state of a memory page of the partial memory;
  • the memory table in the partial memory is searched in the status table; after the memory page in the idle state is found, the frequency of use is low.
  • the data at the predetermined frequency of use is stored in a memory page that is in an idle state.
  • the heterogeneous hardware 1003 is further configured to: after storing data whose usage frequency is lower than a predetermined usage frequency into a memory page in an idle state, and when the heterogeneous hardware 1003 needs to read the partial memory When the data of the target memory page is in the middle, determining whether the target memory page is in a state locked by the host 1002 or in an unlocked state in the state table;
  • the target memory page is in a state locked by the host 1002, requesting the host 1002 to unlock the target memory page;
  • the host 1002 is further configured to receive a request for unlocking the target memory page sent by the heterogeneous hardware 1003, terminate an operation on the target memory page, unlock the target memory page, and After the target memory page is unlocked, the heterogeneous hardware 1003 is notified that the target memory page is unlocked;
  • the heterogeneous hardware 1003 is further configured to receive a notification that the target memory page sent by the host 1002 is unlocked, lock the target memory page, and read the target memory page after locking the The data in the target memory page.
  • the host 1002 is further configured to: after the heterogeneous hardware 1003 generates the status table of the partial memory according to the memory address, send the query to the heterogeneous hardware 1003 to query the target in the partial memory. Whether the memory page is in a state of being locked by the heterogeneous hardware 1003 or in a non-locked state;
  • the heterogeneous hardware 1003 is further configured to receive a request sent by the host 1002 to query whether the target memory page in the partial memory is in a state locked by the heterogeneous hardware 1003 or in an unlocked state; The request sent by the host 1002 determines whether the target memory page is in a locked state by the heterogeneous hardware 1003 or in an unlocked state; if the target memory page is in an unlocked state, notifying the host 1002 The target memory page is in an unlocked state; if the target memory page is in a state locked by the heterogeneous hardware 1003, notifying the host 1002 that the target memory page is locked by the heterogeneous hardware 1003;
  • the host 1002 is further configured to: after receiving the notification that the target memory page is in an unlocked state, lock the target memory page, and after locking the target memory page, perform the target memory page And determining to not operate the target memory page after receiving the notification that the target memory page is locked by the heterogeneous hardware 1003.
  • the host 1002 is further configured to release the locking of the target memory page after operating the target memory page, and after releasing the locking of the target memory page, to the heterogeneous
  • the hardware 1003 sends a notification that the target memory page is unlocked
  • the heterogeneous hardware 1003 is further configured to receive a notification that the target memory page sent by the host 1002 has been unlocked, and modify a state of the target memory page in the state table to an unlocked state.
  • the heterogeneous hardware 1003 is further configured to: after the data in the memory of the heterogeneous hardware 1003 is used to store data of a frequency lower than a predetermined usage frequency to a part of the memory of the heterogeneous hardware 1003, the recording frequency is low.
  • the storage time of the data of the predetermined usage frequency in the partial memory when the storage time does not reach the threshold, the heterogeneous hardware 1003 prohibits the data whose usage frequency is lower than the predetermined usage frequency from the partial memory Read into the memory of the heterogeneous hardware 1003.
  • the heterogeneous hardware 1003 is further configured to: after reading the data of the target memory page, record a storage time of the read data of the target memory page in the memory of the heterogeneous hardware 1003; When the storage time does not reach the threshold, prohibiting data of the target memory page from being stored in the memory of the heterogeneous hardware 1003 to the partial memory.
  • heterogeneous system provided by the embodiment of the present invention is further described below in conjunction with a specific application scenario.
  • a single-node heterogeneous system includes: heterogeneous hardware and an X86 host, wherein the heterogeneous hardware includes MIC0 and MIC1, and MIC0 and MIC1 are interconnected with the host through the interface PCI-E, respectively.
  • the MIC has 244 hardware threads and is highly capable of multi-thread parallelism.
  • a storage space of 16 G is reserved for each MIC card on the host, and the storage space is used as a shared memory space between the host and the MIC.
  • the MIC can select the memory of the infrequently used memory page to be stored in the shared memory. As shown in FIG.
  • the MIC always maintains a status table of the shared memory, and the status table can be set with the address status bit, the use status bit, and the lock status bit. .
  • the use status bit can be set to use the Used state and the Unused state is not used, and the lock status bit can be set to the lock lock state and the Unlock non-lock state.
  • Addr in Figure 15 represents the address of a memory page on the host; Used indicates that the memory page has been used; Lock indicates that the current memory page is locked; Unused indicates that the memory page is not used; Unlock indicates that the current memory page is not locked.
  • the shaded portion of the 16G shared memory on the host in FIG. 16 indicates that the memory page is being used.
  • an embodiment of the present invention further provides a heterogeneous hardware 1101, including: a processor 1102, a memory 1104 connected to the processor 1102, and a processor 1102 and a memory 1104, respectively.
  • the processor 1102, the memory 1104, and the transmission interface 1103 can be connected through the bus 1105.
  • the transmission interface 1103 of the heterogeneous hardware is used to connect to the host.
  • the processor 1102 obtains the location through the transmission interface 1103 a memory address of a portion of the memory of the host sent by the host; when the free capacity of the memory of the heterogeneous hardware is lower than a predetermined capacity, the heterogeneous hardware stores the memory of the heterogeneous hardware according to the memory address The data in which the frequency is lower than the predetermined use frequency is stored in the partial memory.
  • the processor 1102 is further configured to generate, according to the obtained memory address, a state table of the partial memory; the state table is configured to record a state of a memory page of the partial memory;
  • the memory table in the partial memory is searched in the status table; after the memory page in the idle state is found, the frequency of use is lower than the predetermined use.
  • the frequency data is stored in a memory page that is in an idle state.
  • the processor 1102 is further configured to: when the target memory page is in an unlocked state, read data of the target memory page; and if it is determined that the target memory page is in a locked state by the host, pass the transmission interface. 1103, requesting, by the host, to unlock the target memory page, causing the host to terminate an operation on the target memory page, unlocking the target memory page, and after unlocking the target memory page, Notifying the heterogeneous hardware that the target memory page is unlocked;
  • the processor 1102 is further configured to receive, by using the transmission interface 1103, a notification that the target memory page sent by the host is unlocked; and receiving a notification that the target memory page sent by the host is unlocked, The target memory page is locked; after the target memory page is locked, the data in the target memory page is read through the transmission interface 1103.
  • the processor 1102 is further configured to: after generating the state table of the partial memory according to the memory address, receiving, by the host, querying, that the target memory page in the partial memory is in the The state of the heterogeneous hardware lock is still in the unlocked state; and is further configured to determine, according to the obtained request sent by the host, whether the target memory page is locked by the heterogeneous hardware or is not locked. ;
  • the processor 1102 is configured to notify the host that the target memory page is in an unlocked state if the target memory page is in an unlocked state, so that the host receives the target memory page in a non-locked state. After the notification of the status, the target memory page is locked, and after the target memory page is locked, the target memory page is operated; and if it is determined that the target memory page is in the heterogeneous The state of the hardware lock, notifying the host that the target memory page is locked by the heterogeneous hardware, so that the host determines that the target cannot be The memory page operates.
  • the processor 1102 is further configured to: after the host operates the target memory page, receive, by using the transmission interface 1103, the host, after completing the operation on the target memory page, a lock of the target memory page and a notification that the target memory page sent after unlocking the target memory page has been unlocked;
  • the processor 1102 is further configured to modify a state of the target memory page in the state table to an unlocked state after receiving the notification that the target memory page sent by the host has been unlocked.
  • the processor 1102 is further configured to: after storing data in a memory of the heterogeneous hardware with a frequency lower than a predetermined frequency of use, to a part of the memory of the heterogeneous hardware, the recording frequency of use is lower than a predetermined use.
  • the processor 1102 is further configured to: when the storage time of the record does not reach a threshold, the heterogeneous hardware prohibits reading the data whose usage frequency is lower than a predetermined usage frequency from the partial memory to the heterogeneous The memory of the hardware.
  • the processor 1102 is further configured to: after reading the data of the target memory page, record a storage time of the read data of the target memory page in the memory of the heterogeneous hardware;
  • the processor 1102 is further configured to, when the storage time of the record does not reach the threshold, prohibit storing the data of the target memory page from the memory of the heterogeneous hardware to the partial memory.
  • the embodiment of the present invention further provides a host 1201, which includes: a processor 1202, a host memory 1204 connected to the processor 1202, and a transmission interface respectively connected to the processor 1202 and the host memory 1204. 1203.
  • the processor 1202, the host memory 1204, and the transmission interface 1203 may be connected through a bus 1205.
  • a portion of the memory 1206 in the host memory 1204 is used as shared memory, and the other memory in the host memory 1204 is the remaining memory 1207 except for a portion of the memory.
  • the host 1201 connects the heterogeneous hardware through the transmission interface 1203.
  • the processor 1202 is configured to send, by using the transmission interface 1203, a memory address of the partial memory 1206 of the host to the heterogeneous hardware, so that when the free capacity of the memory of the heterogeneous hardware is lower than a predetermined capacity,
  • the heterogeneous hardware stores, according to the memory address, data in a memory of the heterogeneous hardware whose frequency of use is lower than a predetermined frequency of use to the partial memory 1206.
  • the processor 1202 is configured to: when the heterogeneous hardware needs to read the partial memory 1206 The data of the target memory page, and in the state table of the partial memory 1206 generated by the heterogeneous hardware according to the memory address, when the target memory page is in a state locked by the host, the transmission interface is used. 1203: Receive a request for unlocking the target memory page sent by the heterogeneous hardware; a status table of the partial memory 1206 is used to record a status of a memory page of the partial memory 1206;
  • the processor 1202 is configured to terminate the operation of the target memory page after receiving the request to unlock the target memory page, and unlock the target memory page;
  • the processor 1202 is configured to notify the heterogeneous hardware that the target memory page is unlocked after the target memory page is unlocked, so that the heterogeneous hardware receives the target sent by the host After the notification that the memory page has been unlocked, the target memory page is locked, and after the target memory page is locked, the data in the target memory page is read.
  • the processor 1202 is configured to send, to the heterogeneous hardware, a request for querying whether the target memory page in the partial memory 1206 is in a state locked by the heterogeneous hardware or in an unlocked state, so that the heterogeneous hardware Determining, according to the request sent by the host, the status table of the partial memory 1206 generated according to the memory address, determining whether the target memory page is in a locked state by the heterogeneous hardware or in an unlocked state; When the target memory page is in an unlocked state, the heterogeneous hardware notifies the host that the target memory page is in an unlocked state; if the target memory page is in a state locked by the heterogeneous hardware, The heterogeneous hardware notifies the host that the target memory page is locked by the heterogeneous hardware; the status table of the partial memory 1206 is used to record the status of the memory page of the partial memory 1206;
  • the processor 1202 is configured to: when the host receives the notification that the target memory page is in an unlocked state, lock the target memory page; after locking the target memory page, the target memory Page operation;
  • the processor 1202 is configured to determine that the target memory page cannot be operated when the host receives the notification that the target memory page sent by the heterogeneous hardware is locked by the heterogeneous hardware.
  • the processor 1202 is configured to release the locking of the target memory page after completing the operation on the target memory page;
  • the processor 1202 is configured to send, by using the transmission interface 1203, the notification that the target memory page has been unlocked to the heterogeneous hardware after the unlocking of the target memory page is released, so that the different After receiving the notification that the target memory page sent by the host has been unlocked, the hardware changes the state of the target memory page in the state table to an unlocked state.
  • the program may be stored in a computer readable storage medium, and the storage medium may include: Read Only Memory (ROM), Random Access Memory (RAM), disk or optical disk.
  • ROM Read Only Memory
  • RAM Random Access Memory

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Abstract

本发明公开了一种内存共享方法，应用于异构硬件，异构硬件连接主机，本发明方法包括：异构硬件获取主机发送的主机的部分内存的内存地址；当异构硬件的内存的空闲容量低于预定容量时，异构硬件根据内存地址，将异构硬件的内存中使用频率低于预定使用频率的数据存储到部分内存。采用本发明提供的内存共享方法，能够将异构硬件的内存中使用频率低于预定使用频率的数据存储到主机的部分内存，减少使用频率低于预定使用频率的数据在异构硬件的内存中所占用的存储空间，从而增大异构硬件的空闲存储空间，为运行在异构硬件上的应用提供更多的内存空间。

Description

一种内存共享方法、异构硬件、主机及异构系统 技术领域
本发明涉及数据存储领域，具体涉及一种内存共享方法、异构硬件、主机及异构系统。
背景技术
现有的单节点异构系统包括主机和异构硬件，主机与硬件通过总线PCI-E互联。其中，异构硬件可以包括众核(Many Integrated Cores，MIC)扩展卡、通用图形处理器(Generate-purpose Graphic Processing Units，GPGPU)等，其作为扩展卡为主机(Host)提供更强大的矢量处理、浮点运算或多线程并行等能力。通常，在异构系统中，主机上的内存较大，而异构硬件上的内存较小。由于目前异构硬件上的内存在存储数据之后，其剩余的空闲存储空间较小，可能难以支持运行一些对内存要求较高的应用，甚至无法完整装载这些应用的数据。因此，如何增大异构硬件的内存的空闲存储空间是目前亟待解决的问题。
发明内容
本发明的目的在于提供一种内存共享方法、异构硬件、主机及异构系统。应用本发明方法，能够增大异构硬件的空闲存储空间。
本发明第一方面提供一种内存共享方法，所述方法应用于异构硬件，所述异构硬件连接主机，所述方法包括：
所述异构硬件获取所述主机发送的所述主机的部分内存的内存地址；
当所述异构硬件的内存的空闲容量低于预定容量时，所述异构硬件根据所述内存地址，将所述异构硬件的内存中使用频率低于预定使用频率的数据存储到所述部分内存。
结合本发明第一方面，在第一方面的第一种可能实现方式中，所述方法还包括：
所述异构硬件根据所述内存地址，生成所述部分内存的状态表；所述状态表用于记录所述部分内存的内存页的状态；
当所述异构硬件的内存的空闲容量低于预定容量时，所述异构硬件根据所述内存地址，将所述异构硬件的内存中使用频率低于预定使用频率的数据存储到所述异构硬件的部分内存，包括：
当所述异构硬件的内存的空闲容量低于预定容量时，所述异构硬件在所述状态表中查找所述部分内存中处于空闲状态的内存页；
所述异构硬件在查找到处于空闲状态的内存页之后，将使用频率低于预定使用频率的数据存储到处于空闲状态的内存页中。
结合本发明第一方面的第一种可能实现方式，在第一方面的第二种可能实现方式中，在所述异构硬件将使用频率低于预定使用频率的数据存储到处于空闲状态的内存页中之后，所述方法还包括：
当所述异构硬件需要读取所述部分内存中的目标内存页的数据时，判断所述目标内存页在所述状态表中是否处于被所述主机锁定的状态还是处于非锁定状态；
若所述目标内存页处于非锁定状态，则所述异构硬件读取所述目标内存页的数据；
若所述目标内存页处于被所述主机锁定的状态，则所述异构硬件向所述主机请求对所述目标内存页进行解锁，使得所述主机终止对所述目标内存页的操作，对所述目标内存页进行解锁，以及在对所述目标内存页进行解锁之后，向所述异构硬件通知所述目标内存页已解锁；
所述异构硬件接收所述主机发送的所述目标内存页已解锁的通知，对所述目标内存页进行锁定，并在对所述目标内存页锁定之后，读取所述目标内存页中的数据。
结合本发明第一方面的第一种可能实现方式，在第一方面的第三种可能实现方式中，在所述异构硬件根据所述内存地址，生成所述部分内存的状态表之后，所述方法还包括：
所述异构硬件接收所述主机发送的查询所述部分内存中的目标内存页是处于被所述异构硬件锁定的状态还是处于非锁定状态的请求；
所述异构硬件根据所述主机发送的请求，判断所述目标内存页是处于被所述异构硬件锁定的状态还是处于非锁定状态；
若所述目标内存页处于非锁定状态，则所述异构硬件向所述主机通知所述目标内存页处于非锁定状态，使得所述主机在接收到所述目标内存页处于 非锁定状态的通知之后，对所述目标内存页进行锁定，并在对所述目标内存页锁定之后，对所述目标内存页进行操作；
若所述目标内存页处于被所述异构硬件锁定的状态，则所述异构硬件向所述主机通知所述目标内存页被所述异构硬件锁定，以使得所述主机确定不能对所述目标内存页进行操作。
结合本发明第一方面的第三种可能实现方式，在第一方面的第四种可能实现方式中，在所述主机对所述目标内存页进行操作之后，所述方法还包括：
所述异构硬件接收所述主机在完成对所述目标内存页进行的操作之后解除对所述目标内存页的锁定，并在解除对所述目标内存页的锁定之后发送的所述目标内存页已解锁的通知；
所述异构硬件在接收到所述主机发送的所述目标内存页已解锁的通知之后，将所述目标内存页在所述状态表中的状态修改为非锁定状态。
结合本发明第一方面或第一方面的第一至第四任意一种可能实现方式，在第一方面的第五种可能实现方式中，在所述异构硬件将所述异构硬件的内存中使用频率低于预定使用频率的数据存储到所述异构硬件的部分内存之后，所述方法还包括：
所述异构硬件记录使用频率低于预定使用频率的数据在所述部分内存中的存储时间；
当所述存储时间未达到阈值时，所述异构硬件禁止将所述使用频率低于预定使用频率的数据从所述部分内存读取到所述异构硬件的内存中。
结合本发明第一方面的第二种可能实现方式，在第一方面的第六种可能实现方式中，在所述异构硬件读取所述目标内存页的数据之后，所述方法还包括：
所述异构硬件记录读取的所述目标内存页的数据在所述异构硬件的内存中的存储时间；
当所述存储时间未达到阈值时，所述异构硬件禁止将所述目标内存页的数据从所述异构硬件的内存存储到所述部分内存。
本发明第二方面提供一种异构硬件，所述异构硬件连接主机，所述异构硬件包括：
获取单元，用于获取所述主机发送的所述主机的部分内存的内存地址；
存储单元，用于当所述异构硬件的内存的空闲容量低于预定容量时，根 据所述内存地址，将所述异构硬件的内存中使用频率低于预定使用频率的数据存储到所述部分内存。
结合本发明第二方面，在第二方面的第一种可能实现方式中，所述异构硬件还包括：生成单元和查询单元，
所述生成单元用于根据所述获取单元获取的所述内存地址，生成所述部分内存的状态表；所述状态表用于记录所述部分内存的内存页的状态；
所述查询单元用于当所述异构硬件的内存的空闲容量低于预定容量时，在所述状态表中查找所述部分内存中处于空闲状态的内存页；
所述存储单元还用于在所述查询单元查找到处于空闲状态的内存页之后，将使用频率低于预定使用频率的数据存储到处于空闲状态的内存页中。
结合本发明第二方面的第一种可能实现方式，在第二方面的第二种可能实现方式中，所述查询单元还用于在所述存储单元将使用频率低于预定使用频率的数据存储到处于空闲状态的内存页中之后，而且当所述异构硬件需要读取所述部分内存中的目标内存页的数据时，判断所述目标内存页在所述状态表中是否处于被所述主机锁定的状态还是处于非锁定状态；
所述异构硬件还包括读取单元、请求单元和锁定单元，
所述读取单元用于若所述查询单元判断所述目标内存页处于非锁定状态，则读取所述目标内存页的数据；
所述请求单元用于若所述查询单元判断所述目标内存页处于被所述主机锁定的状态，则向所述主机请求对所述目标内存页进行解锁，使得所述主机终止对所述目标内存页的操作，对所述目标内存页进行解锁，以及在对所述目标内存页进行解锁之后，向所述异构硬件通知所述目标内存页已解锁；
所述获取单元还用于接收所述主机发送的所述目标内存页已解锁的通知；
所述锁定单元用于在所述获取单元接收到所述主机发送的所述目标内存页已解锁的通知，对所述目标内存页进行锁定；
所述读取单元还用于在所述锁定单元对所述目标内存页锁定之后，读取所述目标内存页中的数据。
结合本发明第二方面的第一种可能实现方式，在第二方面的第三种可能实现方式中，所述获取单元还用于在所述生成单元根据所述内存地址，生成所述部分内存的状态表之后，接收所述主机发送的查询所述部分内存中的目 标内存页是处于被所述异构硬件锁定的状态还是处于非锁定状态的请求；
所述查询单元用于根据所述获取单元获取到的所述主机发送的请求，判断所述目标内存页是处于被所述异构硬件锁定的状态还是处于非锁定状态；
所述异构硬件还包括：发送单元，所述发送单元用于若所述查询单元判断所述目标内存页处于非锁定状态，则向所述主机通知所述目标内存页处于非锁定状态，使得所述主机在接收到所述目标内存页处于非锁定状态的通知之后，对所述目标内存页进行锁定，并在对所述目标内存页锁定之后，对所述目标内存页进行操作；还用于若所述查询单元判断所述目标内存页处于被所述异构硬件锁定的状态，则向所述主机通知所述目标内存页被所述异构硬件锁定，以使得所述主机确定不能对所述目标内存页进行操作。
结合本发明第二方面的第三种可能实现方式，在第二方面的第四种可能实现方式中，所述获取单元还用于在所述主机对所述目标内存页进行操作之后，接收所述主机在完成对所述目标内存页进行的操作之后解除对所述目标内存页的锁定，并在解除对所述目标内存页的锁定之后发送的所述目标内存页已解锁的通知；
所述异构硬件还包括状态单元，所述状态单元用于在所述获取单元接收到所述主机发送的所述目标内存页已解锁的通知之后，将所述目标内存页在所述状态表中的状态修改为非锁定状态。
结合本发明第二方面或第一方面的第一至第四任意一种可能实现方式，在第二方面的第五种可能实现方式中，所述异构硬件还包括时间单元和禁止单元，
所述时间单元用于在所述存储单元将所述异构硬件的内存中使用频率低于预定使用频率的数据存储到所述异构硬件的部分内存之后，记录使用频率低于预定使用频率的数据在所述部分内存中的存储时间；
所述禁止单元用于当所述时间单元记录的所述存储时间未达到阈值时，禁止将所述使用频率低于预定使用频率的数据从所述部分内存读取到所述异构硬件的内存中。
结合本发明第二方面的第二种可能实现方式，在第二方面的第六种可能实现方式中，所述异构硬件还包括时间单元和禁止单元，
所述时间单元用于在所述读取单元读取所述目标内存页的数据之后，记录读取的所述目标内存页的数据在所述异构硬件的内存中的存储时间；
所述禁止单元用于当所述时间单元记录的所述存储时间未达到阈值时，禁止将所述目标内存页的数据从所述异构硬件的内存存储到所述部分内存。
本发明第三方面提供一种内存共享方法，所述方法应用于主机，所述主机连接异构硬件，所述方法包括：
所述主机向所述异构硬件发送所述主机的部分内存的内存地址，使得当所述异构硬件的内存的空闲容量低于预定容量时，所述异构硬件根据所述内存地址，将所述异构硬件的内存中使用频率低于预定使用频率的数据存储到所述部分内存。
结合本发明第三方面，在第三方面的第一种可能实现方式中，所述方法还包括：当所述异构硬件需要读取所述部分内存中的目标内存页的数据，并在所述异构硬件根据所述内存地址生成的所述部分内存的状态表中查询到所述目标内存页处于被所述主机锁定的状态时，所述主机接收所述异构硬件发送的对所述目标内存页进行解锁的请求；所述部分内存的状态表用于记录所述部分内存的内存页的状态；
所述主机在接收到对所述目标内存页进行解锁的请求之后，终止对所述目标内存页的操作，并对所述目标内存页进行解锁；
所述主机在对所述目标内存页进行解锁之后，向所述异构硬件通知所述目标内存页已解锁，使得所述异构硬件在接收到所述主机发送的所述目标内存页已解锁的通知之后，对所述目标内存页进行锁定，并在对所述目标内存页锁定之后，读取所述目标内存页中的数据。
结合本发明第三方面，在第三方面的第二种可能实现方式中，所述方法还包括：
所述主机向所述异构硬件发送查询所述部分内存中的目标内存页是处于被所述异构硬件锁定的状态还是处于非锁定状态的请求，使得所述异构硬件根据所述主机发送的请求，查询根据所述内存地址生成的所述部分内存的状态表，判断所述目标内存页是处于被所述异构硬件锁定的状态还是处于非锁定状态；若所述目标内存页处于非锁定状态，则所述异构硬件向所述主机通知所述目标内存页处于非锁定状态；若所述目标内存页处于被所述异构硬件锁定的状态，则所述异构硬件向所述主机通知所述目标内存页被所述异构硬件锁定；所述部分内存的状态表用于记录所述部分内存的内存页的状态；
当所述主机接收到所述目标内存页处于非锁定状态的通知时，对所述目 标内存页进行锁定；所述主机在对所述目标内存页锁定之后，对所述目标内存页进行操作；
当所述主机接收到所述异构硬件发送的所述目标内存页处于被所述异构硬件锁定的通知时，所述主机确定不能对所述目标内存页进行操作。
结合本发明第三方面的第二种可能实现方式，在第三方面的第三种可能实现方式中，所述方法还包括：
所述主机在完成对所述目标内存页进行操作之后，解除对所述目标内存页的锁定；
所述主机在解除对所述目标内存页的锁定之后，向所述异构硬件发送所述目标内存页已解锁的通知，使得所述异构硬件在接收到所述主机发送的所述目标内存页已解锁的通知之后，将所述目标内存页在所述状态表中的状态修改为非锁定状态。
本发明第四方面提供一种主机，所述主机连接异构硬件，所述主机包括：
发送单元，用于向所述异构硬件发送所述主机的部分内存的内存地址，使得当所述异构硬件的内存的空闲容量低于预定容量时，所述异构硬件根据所述内存地址，将所述异构硬件的内存中使用频率低于预定使用频率的数据存储到所述部分内存。
结合本发明第三方面，在第三方面的第一种可能实现方式中，所述异构硬件还包括：接收单元和解锁单元，
所述接收单元用于当所述异构硬件需要读取所述部分内存中的目标内存页的数据，并在所述异构硬件根据所述内存地址生成的所述部分内存的状态表中查询到所述目标内存页处于被所述主机锁定的状态时，接收所述异构硬件发送的对所述目标内存页进行解锁的请求；所述部分内存的状态表用于记录所述部分内存的内存页的状态；
所述解锁单元用于在接收到对所述目标内存页进行解锁的请求之后，终止对所述目标内存页的操作，并对所述目标内存页进行解锁；
所述发送单元还用于在对所述目标内存页进行解锁之后，向所述异构硬件通知所述目标内存页已解锁，使得所述异构硬件在接收到所述主机发送的所述目标内存页已解锁的通知之后，对所述目标内存页进行锁定，并在对所述目标内存页锁定之后，读取所述目标内存页中的数据。
结合本发明第三方面，在第三方面的第二种可能实现方式中，所述发送 单元还用于向所述异构硬件发送查询所述部分内存中的目标内存页是处于被所述异构硬件锁定的状态还是处于非锁定状态的请求，使得所述异构硬件根据所述主机发送的请求，查询根据所述内存地址生成的所述部分内存的状态表，判断所述目标内存页是处于被所述异构硬件锁定的状态还是处于非锁定状态；若所述目标内存页处于非锁定状态，则所述异构硬件向所述主机通知所述目标内存页处于非锁定状态；若所述目标内存页处于被所述异构硬件锁定的状态，则所述异构硬件向所述主机通知所述目标内存页被所述异构硬件锁定；所述部分内存的状态表用于记录所述部分内存的内存页的状态；
所述接收单元还用于接收所述目标内存页处于非锁定状态的通知或接收所述异构硬件发送的所述目标内存页处于被所述异构硬件锁定的通知；
所述异构硬件还包括：锁定单元和操作单元，
所述锁定单元用于当所述接收单元接收到所述目标内存页处于非锁定状态的通知时，对所述目标内存页进行锁定；
所述操作单元用于在所述锁定单元对所述目标内存页进行锁定之后，对所述目标内存页进行操作。
结合本发明第四方面的第二种可能实现方式，在第四方面的第三种可能实现方式中，所述解锁单元还用于在所述操作单元完成对所述目标内存页进行操作之后，解除对所述目标内存页的锁定；
所述发送单元还用于在解除对所述目标内存页的锁定之后，向所述异构硬件发送所述目标内存页已解锁的通知，使得所述异构硬件在接收到所述主机发送的所述目标内存页已解锁的通知之后，将所述目标内存页在所述状态表中的状态修改为非锁定状态。
本发明第五方面提供一种异构系统，其包括：主机和异构硬件，所述主机与所述异构硬件连接；
所述主机用于向所述异构硬件发送所述主机的部分内存的内存地址；
所述异构硬件用于接收所述主机发送的所述内存地址，以及当所述异构硬件的内存的空闲容量低于预定容量时，根据所述内存地址，将所述异构硬件的内存中使用频率低于预定使用频率的数据存储到所述部分内存。
结合本发明第五方面，在第五方面的第一种可能实现形式中，所述异构硬件还用于根据所述内存地址，生成所述部分内存的状态表；所述状态表用于记录所述部分内存的内存页的状态；以及用于当所述异构硬件的内存的空 闲容量低于预定容量时，在所述状态表中查找所述部分内存中处于空闲状态的内存页；在查找到处于空闲状态的内存页之后，将使用频率低于预定使用频率的数据存储到处于空闲状态的内存页中。
结合本发明第五方面的第一种可能实现形式，在第五方面的第二种可能实现形式中，所述异构硬件还用于在将使用频率低于预定使用频率的数据存储到处于空闲状态的内存页中之后，而且当所述异构硬件需要读取所述部分内存中的目标内存页的数据时，判断所述目标内存页在所述状态表中是否处于被所述主机锁定的状态还是处于非锁定状态；
若所述目标内存页处于非锁定状态，则读取所述目标内存页的数据；
若所述目标内存页处于被所述主机锁定的状态，则向所述主机请求对所述目标内存页进行解锁；
所述主机还用于接收所述异构硬件发送的对所述目标内存页进行解锁的请求，终止对所述目标内存页的操作，对所述目标内存页进行解锁，以及在对所述目标内存页进行解锁之后，向所述异构硬件通知所述目标内存页已解锁；
所述异构硬件还用于接收所述主机发送的所述目标内存页已解锁的通知，对所述目标内存页进行锁定，并在对所述目标内存页锁定之后，读取所述目标内存页中的数据。
结合本发明第五方面的第一种可能实现形式，在第五方面的第三种可能实现形式中，所述主机还用于在所述异构硬件根据所述内存地址，生成所述部分内存的状态表之后，向所述异构硬件发送查询所述部分内存中的目标内存页是处于被所述异构硬件锁定的状态还是处于非锁定状态的请求；
所述异构硬件还用于接收所述主机发送的查询所述部分内存中的目标内存页是处于被所述异构硬件锁定的状态还是处于非锁定状态的请求；以及用于根据所述主机发送的请求，判断所述目标内存页是处于被所述异构硬件锁定的状态还是处于非锁定状态；若所述目标内存页处于非锁定状态，则向所述主机通知所述目标内存页处于非锁定状态；若所述目标内存页处于被所述异构硬件锁定的状态，则向所述主机通知所述目标内存页被所述异构硬件锁定；
所述主机还用于在接收到所述目标内存页处于非锁定状态的通知之后，对所述目标内存页进行锁定，并在对所述目标内存页锁定之后，对所述目标 内存页进行操作；以及用于在接收到所述目标内存页被所述异构硬件锁定的通知之后，确定不能对所述目标内存页进行操作。
结合本发明第五方面的第三种可能实现形式，在第五方面的第四种可能实现形式中，所述主机还用于在对所述目标内存页进行操作之后，解除对所述目标内存页的锁定，并在解除对所述目标内存页的锁定之后，向所述异构硬件发送所述目标内存页已解锁的通知；
所述异构硬件还用于接收所述主机发送的所述目标内存页已解锁的通知，将所述目标内存页在所述状态表中的状态修改为非锁定状态。
结合本发明第五方面或第五方面的第一至第四种可能实现形式，在第五方面的第五种可能实现形式中，所述异构硬件还用于在将所述异构硬件的内存中使用频率低于预定使用频率的数据存储到所述异构硬件的部分内存之后，记录使用频率低于预定使用频率的数据在所述部分内存中的存储时间；当所述存储时间未达到阈值时，所述异构硬件禁止将所述使用频率低于预定使用频率的数据从所述部分内存读取到所述异构硬件的内存中。
结合本发明第五方面的第二种可能实现形式，在第五方面的第六种可能实现形式中，所述异构硬件还用于在读取所述目标内存页的数据之后，记录读取的所述目标内存页的数据在所述异构硬件的内存中的存储时间；当所述存储时间未达到阈值时，禁止将所述目标内存页的数据从所述异构硬件的内存存储到所述部分内存。
采用本发明提供的内存共享方法，能够将异构硬件的内存中使用频率低于预定使用频率的数据存储到主机的部分内存，减少使用频率低于预定使用频率的数据在异构硬件的内存中所占用的存储空间，从而增大异构硬件的空闲存储空间，为运行在异构硬件上的应用提供更多的内存空间。
附图说明
图1是本发明提供的一种内存共享方法的流程示意图；
图2是本发明提供的另一种内存共享方法的流程示意图；
图3是本发明提供的异构硬件从主机的部分内存读取数据的步骤示意图；
图4是本发明提供的主机读取所述部分内存的内存页的步骤示意图；
图5是本发明提供的一种异构硬件的结构示意图；
图6是本发明提供的另一种异构硬件的结构示意图；
图7是本发明提供的一种内存共享方法的流程示意图；
图8是本发明提供的主机解锁的流程示意图；
图9是本发明提供的主机对所述部分内存中的目标内存页进行操作的流程示意图；
图10是本发明提供的一种主机的结构示意图；
图11是本发明提供的一种主机的结构示意图；
图12是本发明提供的一种异构系统的结构示意图；
图13是本发明提供的一种单节点异构系统示意图；
图14是本发明提供的共享内存与MIC中的内存映射关系示意图；
图15是本发明提供的共享内存与MIC0中的内存映射关系示意图；
图16是本发明提供的一种异构硬件的结构示意图；
图17是本发明提供的一种主机的结构示意图。
具体实施方式
以下列举实施例对本发明进行介绍。
如图1所示，本发明实施例提供一种内存共享方法，所述内存共享方法应用于异构硬件，所述异构硬件连接主机。所述主机和所述异构硬件上均设有内存。所述异构硬件为所述主机提供矢量处理、浮点运算或多线程并行等能力。所述内存共享方法可以包括：
101、异构硬件获取所述主机发送的所述主机的部分内存的内存地址。
102、当所述异构硬件的内存的空闲容量低于预定容量时，所述异构硬件根据所述内存地址，将所述异构硬件的内存中使用频率低于预定使用频率的数据存储到所述部分内存。
在本实施例中，所述主机的部分内存用于作为共享内存，为所述异构硬件中的内存数据提供存储空间。所述异构硬件可以根据近期最少使用(Least Recently Used，LRU)算法，从所述异构硬件的内存中选出使用频率低于预定使用频率的数据。所选出的使用频率低于预定使用频率的数据可以称为不常用数据。在将不常用的数据存储到主机的部分内存上后，异构硬件上被不常用数据占据的内存空间则可以用于存储其他数据，即增大 了异构硬件的内存的空闲存储空间。当应用在异构硬件运行时，异构硬件能够为应用提供更多的内存空间的支持，减少因内存容量不足而导致应用无法完成数据加载的现象。
为了更好的理解本发明，以下列举更详细的实施例进行说明。如图2所示，所述内存共享方法可以包括：
201、所述异构硬件获取所述主机发送的所述主机的部分内存的内存地址。
202、所述异构硬件根据所述内存地址，生成所述部分内存的状态表；所述状态表用于记录所述部分内存的内存页的状态。
203、当所述异构硬件的内存的空闲容量低于预定容量时，所述异构硬件在所述状态表中查找所述部分内存中处于空闲状态的内存页。
204、所述异构硬件在查找到处于空闲状态的内存页之后，将使用频率低于预定使用频率的数据存储到处于空闲状态的内存页中。
在本实施例中，所述状态表中可以设置有所述部分内存的内存页的状态位，所述状态位可以用于标识所述内存页当前所处的状态。所述状态位可以包括使用状态位和锁定状态位，使用状态位可以标识当前内存页是否处于使用状态，所述锁定状态位可以标识当前内存页是否处于锁定状态，所述状态表还记录了内存页的地址。所述状态表由所述异构硬件进行维护。当所述异构硬件将使用频率低于预定使用频率的数据存储到处于空闲状态的内存页中，异构硬件将该内存页在状态表中的使用状态位设为使用状态。
在所述异构硬件将使用频率低于预定使用频率的数据存储到处于空闲状态的内存页中之后，所述异构硬件有时仍然需要使用这些存储到主机部分内存上的数据。如图3所示，图3描述了当所述异构硬件需要读取所述部分内存中的目标内存页的数据时，异构硬件从主机的部分内存读取数据的步骤，具体包括：
301、判断所述目标内存页在所述状态表中是否处于被所述主机锁定的状态还是处于非锁定状态。
若所述目标内存页处于非锁定状态，则执行步骤302：所述异构硬件读取所述目标内存页的数据。
303、若所述目标内存页处于被所述主机锁定的状态，则所述异构硬件向所述主机请求对所述目标内存页进行解锁。
所述目标内存页处于被所述主机锁定的状态表示所述目标内存页当前正在被所述主机进行读或写等操作。所述主机在接收到所述异构硬件发送的对所述目标内存页进行解锁的请求之后，终止对所述目标内存页的操作，对所述目标内存页进行解锁，以及在对所述目标内存页进行解锁之后，向所述异构硬件通知所述目标内存页已解锁。
304、所述异构硬件接收所述主机发送的所述目标内存页已解锁的通知，对所述目标内存页进行锁定。
在所述异构硬件对所述目标内存页进行锁定之后，所述异构硬件将所述目标内存页在状态表中的锁定状态位设为锁定状态。此时，所述主机将不能够对所述目标内存页进行操作，从而避免所述主机和所述异构硬件在使用所述部分内存的内存页时造成冲突。
在对所述目标内存页进行锁定之后，则执行步骤302：读取所述目标内存页中的数据。
如图4所示，图4描述了所述主机读取所述部分内存的内存页的步骤，具体包括：
401、所述异构硬件接收所述主机发送的查询所述部分内存中的目标内存页是处于被所述异构硬件锁定的状态还是处于非锁定状态的请求。
402、所述异构硬件根据所述主机发送的请求，判断所述目标内存页是处于被所述异构硬件锁定的状态还是处于非锁定状态。
若所述目标内存页处于非锁定状态，则执行步骤403：所述异构硬件向所述主机通知所述目标内存页处于非锁定状态，使得所述主机在接收到所述目标内存页处于非锁定状态的通知之后，对所述目标内存页进行锁定。
404、在对所述目标内存页锁定之后，对所述目标内存页进行操作。
在对所述目标内存页锁定之后，所述主机通知所述异构硬件所述目标内存页被所述主机锁定，所述异构硬件接收到所述目标内存页被所述主机锁定的通知之后，将所述目标内存页在所述状态表中的状态设为被所述主机锁定的状态。
若所述目标内存页处于被所述异构硬件锁定的状态，则执行步骤405：所述异构硬件向所述主机通知所述目标内存页被所述异构硬件锁定，以使得所述主机确定不能对所述目标内存页进行操作。
在所述主机对所述目标内存页进行操作之后，所述方法还包括：
所述异构硬件接收所述主机在完成对所述目标内存页进行的操作之后解除对所述目标内存页的锁定，并在解除对所述目标内存页的锁定之后发送的所述目标内存页已解锁的通知；
所述异构硬件在接收到所述主机发送的所述目标内存页已解锁的通知之后，将所述目标内存页在所述状态表中的状态修改为非锁定状态。
由于主机和异构硬件可能对用于共享的主机上的部分内存中的某一内存页进行频繁读写，使得该内存页的数据频繁往返于主机的内存和异构硬件的内存，容易对主机和异构硬件之间的信息传输造成不良影响。为了避免此不良影响，所述内存共享方法可以采取以下技术措施。
具体的，在所述异构硬件将所述异构硬件的内存中使用频率低于预定使用频率的数据存储到所述异构硬件的部分内存之后，所述内存共享方法还可以包括：
所述异构硬件记录使用频率低于预定使用频率的数据在所述部分内存中的存储时间；
当所述存储时间未达到阈值时，所述异构硬件禁止将所述使用频率低于预定使用频率的数据从所述部分内存读取到所述异构硬件的内存中。
在所述异构硬件读取所述目标内存页的数据之后，所述内存共享方法还包括：
所述异构硬件记录读取的所述目标内存页的数据在所述异构硬件的内存中的存储时间；
当所述存储时间未达到阈值时，所述异构硬件禁止将所述目标内存页的数据从所述异构硬件的内存存储到所述部分内存。该阈值可以不是定值，可以根据所述目标内存页被访问的频率进行调整。
上述实施例的内存共享方法可以应用于异构硬件。以下将对所述异构硬件进行介绍。
如图5所示，本发明实施例提供一种异构硬件501，所述异构硬件501连接主机，所述异构硬件501包括：
获取单元502，用于获取所述主机发送的所述主机的部分内存的内存地址；
存储单元503，用于当所述异构硬件501的内存的空闲容量低于预定容量时，根据所述内存地址，将所述异构硬件501的内存中使用频率低于预定使用频率的数据存储到所述部分内存。
可选的，如图6所示，所述异构硬件还包括：生成单元504和查询单元505，
所述生成单元504用于根据所述获取单元获取的所述内存地址，生成所述部分内存的状态表；所述状态表用于记录所述部分内存的内存页的状态；
所述查询单元505用于当所述异构硬件的内存的空闲容量低于预定容量时，在所述状态表中查找所述部分内存中处于空闲状态的内存页；
所述存储单元还用于在所述查询单元505查找到处于空闲状态的内存页之后，将使用频率低于预定使用频率的数据存储到处于空闲状态的内存页中。
可选的，所述查询单元505还用于在所述存储单元将使用频率低于预定使用频率的数据存储到处于空闲状态的内存页中之后，而且当所述异构硬件需要读取所述部分内存中的目标内存页的数据时，判断所述目标内存页在所述状态表中是否处于被所述主机锁定的状态还是处于非锁定状态。
所述异构硬件还包括读取单元506、请求单元507和锁定单元508。
所述读取单元506用于若所述查询单元505判断所述目标内存页处于非锁定状态，则读取所述目标内存页的数据；
所述请求单元507用于若所述查询单元505判断所述目标内存页处于被所述主机锁定的状态，则向所述主机请求对所述目标内存页进行解锁，使得所述主机终止对所述目标内存页的操作，对所述目标内存页进行解锁，以及在对所述目标内存页进行解锁之后，向所述异构硬件通知所述目标内存页已解锁；
所述获取单元还用于接收所述主机发送的所述目标内存页已解锁的通知；
所述锁定单元508用于在所述获取单元接收到所述主机发送的所述目标内存页已解锁的通知，对所述目标内存页进行锁定；
所述读取单元506还用于在所述锁定单元508对所述目标内存页锁定之后，读取所述目标内存页中的数据。
可选的，所述获取单元还用于在所述生成单元504根据所述内存地址，生成所述部分内存的状态表之后，接收所述主机发送的查询所述部分内存中的目标内存页是处于被所述异构硬件锁定的状态还是处于非锁定状态的请求；
所述查询单元505用于根据所述获取单元获取到的所述主机发送的请求，判断所述目标内存页是处于被所述异构硬件锁定的状态还是处于非锁定状态；
所述异构硬件还包括：发送单元509，所述发送单元509用于若所述查询单元505判断所述目标内存页处于非锁定状态，则向所述主机通知所述目标内存页处于非锁定状态，使得所述主机在接收到所述目标内存页处于非锁定状态的通知之后，对所述目标内存页进行锁定，并在对所述目标内存页锁定之后，对所述目标内存页进行操作；还用于若所述查询单元505判断所述目标内存页处于被所述异构硬件锁定的状态，则向所述主机通知所述目标内存页被所述异构硬件锁定，以使得所述主机确定不能对所述目标内存页进行操作。
可选的，所述获取单元还用于在所述主机对所述目标内存页进行操作之后，接收所述主机在完成对所述目标内存页进行的操作之后解除对所述目标内存页的锁定，并在解除对所述目标内存页的锁定之后发送的所述目标内存页已解锁的通知；
所述异构硬件还包括状态单元512，所述状态单元512用于在所述获取单元接收到所述主机发送的所述目标内存页已解锁的通知之后，将所述目标内存页在所述状态表中的状态修改为非锁定状态。
可选的，所述异构硬件还包括时间单元510和禁止单元511。
所述时间单元510用于在所述存储单元将所述异构硬件的内存中使用频率低于预定使用频率的数据存储到所述异构硬件的部分内存之后，记录使用频率低于预定使用频率的数据在所述部分内存中的存储时间；
所述禁止单元511用于当所述时间单元510记录的所述存储时间未达到阈值时，禁止将所述使用频率低于预定使用频率的数据从所述部分内存读取到所述异构硬件的内存中。
可选的，所述时间单元510还用于在所述读取单元506读取所述目标内存页的数据之后，记录读取的所述目标内存页的数据在所述异构硬件的内存中的存储时间；
所述禁止单元511还用于当所述时间单元510记录的所述存储时间未达到阈值时，禁止将所述目标内存页的数据从所述异构硬件的内存存储到所述部分内存。
如图7所示，本发明实施例还提供一种内存共享方法，其可以应用于主机，所述主机连接异构硬件，具体包括：
601、所述主机向所述异构硬件发送所述主机的部分内存的内存地址，使得当所述异构硬件的内存的空闲容量低于预定容量时，所述异构硬件根据所述内存地址，将所述异构硬件的内存中使用频率低于预定使用频率的数据存储到所述部分内存。
可选的，如图8所示，图8描述的是当所述异构硬件需要读取所述部分内存中的目标内存页的数据，并在所述异构硬件根据所述内存地址生成的所述部分内存的状态表中查询到所述目标内存页处于被所述主机锁定的状态时，主机需要执行的操作步骤，具体包括：
701、所述主机接收所述异构硬件发送的对所述目标内存页进行解锁的请求；所述部分内存的状态表用于记录所述部分内存的内存页的状态；
702、所述主机在接收到对所述目标内存页进行解锁的请求之后，终止对所述目标内存页的操作，并对所述目标内存页进行解锁；
703、所述主机在对所述目标内存页进行解锁之后，向所述异构硬件通知所述目标内存页已解锁，使得所述异构硬件在接收到所述主机发送的所述目标内存页已解锁的通知之后，对所述目标内存页进行锁定，并在对所 述目标内存页锁定之后，读取所述目标内存页中的数据。
如图9所示，图9描述的是当主机需要对所述部分内存中的目标内存页进行操作时，主机需要执行的操作步骤，具体可以包括：
801、所述主机向所述异构硬件发送查询所述部分内存中的目标内存页是处于被所述异构硬件锁定的状态还是处于非锁定状态的请求。
所述异构硬件根据所述主机发送的请求，查询根据所述内存地址生成的所述部分内存的状态表，判断所述目标内存页是处于被所述异构硬件锁定的状态还是处于非锁定状态；若所述目标内存页处于非锁定状态，则所述异构硬件向所述主机通知所述目标内存页处于非锁定状态；若所述目标内存页处于被所述异构硬件锁定的状态，则所述异构硬件向所述主机通知所述目标内存页被所述异构硬件锁定；所述部分内存的状态表用于记录所述部分内存的内存页的状态；
802、当所述主机接收到所述目标内存页处于非锁定状态的通知时，对所述目标内存页进行锁定；
803、所述主机在对所述目标内存页锁定之后，对所述目标内存页进行操作；
804、当所述主机接收到所述异构硬件发送的所述目标内存页处于被所述异构硬件锁定的通知时，所述主机确定不能对所述目标内存页进行操作。
可选的，所述方法还包括：
所述主机在完成对所述目标内存页进行操作之后，解除对所述目标内存页的锁定；
所述主机在解除对所述目标内存页的锁定之后，向所述异构硬件发送所述目标内存页已解锁的通知，使得所述异构硬件在接收到所述主机发送的所述目标内存页已解锁的通知之后，将所述目标内存页在所述状态表中的状态修改为非锁定状态。
上述内存共享方法可以应用于主机，以下对所述主机进行介绍。
如图10所示，本发明实施例还提供一种主机901，所述主机901连接异构硬件，所述主机901包括：
发送单元902，用于向所述异构硬件发送所述主机901的部分内存的 内存地址，使得当所述异构硬件的内存的空闲容量低于预定容量时，所述异构硬件根据所述内存地址，将所述异构硬件的内存中使用频率低于预定使用频率的数据存储到所述部分内存。
如图11所示，可选的，所述异构硬件还包括：接收单元903和解锁单元904，
所述接收单元903用于当所述异构硬件需要读取所述部分内存中的目标内存页的数据，并在所述异构硬件根据所述内存地址生成的所述部分内存的状态表中查询到所述目标内存页处于被所述主机901锁定的状态时，接收所述异构硬件发送的对所述目标内存页进行解锁的请求；所述部分内存的状态表用于记录所述部分内存的内存页的状态；
所述解锁单元904用于在接收到对所述目标内存页进行解锁的请求之后，终止对所述目标内存页的操作，并对所述目标内存页进行解锁；
所述发送单元902还用于在对所述目标内存页进行解锁之后，向所述异构硬件通知所述目标内存页已解锁，使得所述异构硬件在接收到所述主机901发送的所述目标内存页已解锁的通知之后，对所述目标内存页进行锁定，并在对所述目标内存页锁定之后，读取所述目标内存页中的数据。
可选的，所述发送单元902还用于向所述异构硬件发送查询所述部分内存中的目标内存页是处于被所述异构硬件锁定的状态还是处于非锁定状态的请求，使得所述异构硬件根据所述主机901发送的请求，查询根据所述内存地址生成的所述部分内存的状态表，判断所述目标内存页是处于被所述异构硬件锁定的状态还是处于非锁定状态；若所述目标内存页处于非锁定状态，则所述异构硬件向所述主机901通知所述目标内存页处于非锁定状态；若所述目标内存页处于被所述异构硬件锁定的状态，则所述异构硬件向所述主机901通知所述目标内存页被所述异构硬件锁定；所述部分内存的状态表用于记录所述部分内存的内存页的状态；
所述接收单元903还用于接收所述目标内存页处于非锁定状态的通知或接收所述异构硬件发送的所述目标内存页处于被所述异构硬件锁定的通知；
所述异构硬件还包括：锁定单元905和操作单元906。
所述锁定单元905用于当所述接收单元903接收到所述目标内存页处 于非锁定状态的通知时，对所述目标内存页进行锁定；
所述操作单元906用于在所述锁定单元905对所述目标内存页进行锁定之后，对所述目标内存页进行操作。
可选的，所述解锁单元904还用于在所述操作单元906完成对所述目标内存页进行操作之后，解除对所述目标内存页的锁定；
所述发送单元902还用于在解除对所述目标内存页的锁定之后，向所述异构硬件发送所述目标内存页已解锁的通知，使得所述异构硬件在接收到所述主机901发送的所述目标内存页已解锁的通知之后，将所述目标内存页在所述状态表中的状态修改为非锁定状态。
本发明实施例还将介绍可以应用上述内存共享方法的异构系统1001。
如图12所示，本发明实施例还提供一种异构系统1001，其包括：主机1002和异构硬件1003，所述主机1002与所述异构硬件1003连接；
所述主机1002用于向所述异构硬件1003发送所述主机1002的部分内存的内存地址；
所述异构硬件1003用于接收所述主机1002发送的所述内存地址，以及当所述异构硬件1003的内存的空闲容量低于预定容量时，根据所述内存地址，将所述异构硬件1003的内存中使用频率低于预定使用频率的数据存储到所述部分内存。
可选的，所述异构硬件1003还用于根据所述内存地址，生成所述部分内存的状态表；所述状态表用于记录所述部分内存的内存页的状态；以及用于当所述异构硬件1003的内存的空闲容量低于预定容量时，在所述状态表中查找所述部分内存中处于空闲状态的内存页；在查找到处于空闲状态的内存页之后，将使用频率低于预定使用频率的数据存储到处于空闲状态的内存页中。
可选的，所述异构硬件1003还用于在将使用频率低于预定使用频率的数据存储到处于空闲状态的内存页中之后，而且当所述异构硬件1003需要读取所述部分内存中的目标内存页的数据时，判断所述目标内存页在所述状态表中是否处于被所述主机1002锁定的状态还是处于非锁定状态；
若所述目标内存页处于非锁定状态，则读取所述目标内存页的数据；
若所述目标内存页处于被所述主机1002锁定的状态，则向所述主机1002请求对所述目标内存页进行解锁；
所述主机1002还用于接收所述异构硬件1003发送的对所述目标内存页进行解锁的请求，终止对所述目标内存页的操作，对所述目标内存页进行解锁，以及在对所述目标内存页进行解锁之后，向所述异构硬件1003通知所述目标内存页已解锁；
所述异构硬件1003还用于接收所述主机1002发送的所述目标内存页已解锁的通知，对所述目标内存页进行锁定，并在对所述目标内存页锁定之后，读取所述目标内存页中的数据。
可选的，所述主机1002还用于在所述异构硬件1003根据所述内存地址，生成所述部分内存的状态表之后，向所述异构硬件1003发送查询所述部分内存中的目标内存页是处于被所述异构硬件1003锁定的状态还是处于非锁定状态的请求；
所述异构硬件1003还用于接收所述主机1002发送的查询所述部分内存中的目标内存页是处于被所述异构硬件1003锁定的状态还是处于非锁定状态的请求；以及用于根据所述主机1002发送的请求，判断所述目标内存页是处于被所述异构硬件1003锁定的状态还是处于非锁定状态；若所述目标内存页处于非锁定状态，则向所述主机1002通知所述目标内存页处于非锁定状态；若所述目标内存页处于被所述异构硬件1003锁定的状态，则向所述主机1002通知所述目标内存页被所述异构硬件1003锁定；
所述主机1002还用于在接收到所述目标内存页处于非锁定状态的通知之后，对所述目标内存页进行锁定，并在对所述目标内存页锁定之后，对所述目标内存页进行操作；以及用于在接收到所述目标内存页被所述异构硬件1003锁定的通知之后，确定不能对所述目标内存页进行操作。
可选的，所述主机1002还用于在对所述目标内存页进行操作之后，解除对所述目标内存页的锁定，并在解除对所述目标内存页的锁定之后，向所述异构硬件1003发送所述目标内存页已解锁的通知；
所述异构硬件1003还用于接收所述主机1002发送的所述目标内存页已解锁的通知，将所述目标内存页在所述状态表中的状态修改为非锁定状态。
可选的，所述异构硬件1003还用于在将所述异构硬件1003的内存中使用频率低于预定使用频率的数据存储到所述异构硬件1003的部分内存之后，记录使用频率低于预定使用频率的数据在所述部分内存中的存储时间；当所述存储时间未达到阈值时，所述异构硬件1003禁止将所述使用频率低于预定使用频率的数据从所述部分内存读取到所述异构硬件1003的内存中。
可选的，所述异构硬件1003还用于在读取所述目标内存页的数据之后，记录读取的所述目标内存页的数据在所述异构硬件1003的内存中的存储时间；当所述存储时间未达到阈值时，禁止将所述目标内存页的数据从所述异构硬件1003的内存存储到所述部分内存。
以下结合具体应用场景，对本发明实施例提供的异构系统进行进一步说明。
如图13所示，一种单节点异构系统包括：异构硬件和X86主机，其中异构硬件包括MIC0和MIC1，MIC0和MIC1分别通过接口PCI-E与主机互联。MIC具有244个硬件线程，具备很强的多线程并行能力。如图14所示，主机上为每个MIC卡都预留出16G的存储空间，该存储空间用于作为主机与MIC的共享内存空间。MIC可选取不常用的内存页的数据存储到共享内存上，如图15所示，MIC上始终维护一个共享内存的状态表，状态表中可以设置有地址状态位、使用状态位和锁定状态位。其中，使用状态位可以设为使用Used状态和未被使用Unused状态，锁定状态位可以设为锁定Lock状态和Unlock非锁定状态。图15中的Addr表示主机上某内存页的地址；Used表示该内存页已被使用；Lock则表示当前内存页被锁定；Unused表示该内存页未被使用；Unlock表示当前内存页未被锁定。
如图16所示，图16中的主机上的16G共享内存中的阴影部分表示该内存页正在被使用。
如图15所示，本发明实施例还提供一种异构硬件1101，其包括：处理器1102、与所述处理器1102连接的内存1104，以及分别与所述处理器1102和内存1104连接的传输接口1103。在图15中，处理器1102、内存1104和传输接口1103可以通过总线1105进行连接。所述异构硬件的传输接口1103用于连接主机。所述处理器1102通过所述传输接口1103获取所 述主机发送的所述主机的部分内存的内存地址；当所述异构硬件的内存的空闲容量低于预定容量时，所述异构硬件根据所述内存地址，将所述异构硬件的内存中使用频率低于预定使用频率的数据存储到所述部分内存。
可选的，所述处理器1102还用于根据获取的所述内存地址，生成所述部分内存的状态表；所述状态表用于记录所述部分内存的内存页的状态；当所述异构硬件的内存的空闲容量低于预定容量时，在所述状态表中查找所述部分内存中处于空闲状态的内存页；在查找到处于空闲状态的内存页之后，将使用频率低于预定使用频率的数据存储到处于空闲状态的内存页中。
所述处理器1102还用于判断所述目标内存页处于非锁定状态，则读取所述目标内存页的数据；若判断所述目标内存页处于被所述主机锁定的状态，则通过传输接口1103向所述主机请求对所述目标内存页进行解锁，使得所述主机终止对所述目标内存页的操作，对所述目标内存页进行解锁，以及在对所述目标内存页进行解锁之后，向所述异构硬件通知所述目标内存页已解锁；
所述处理器1102还用于通过所述传输接口1103接收所述主机发送的所述目标内存页已解锁的通知；在接收到所述主机发送的所述目标内存页已解锁的通知，对所述目标内存页进行锁定；在对所述目标内存页锁定之后，通过所述传输接口1103读取所述目标内存页中的数据。
可选的，所述处理器1102还用于在根据所述内存地址，生成所述部分内存的状态表之后，接收所述主机发送的查询所述部分内存中的目标内存页是处于被所述异构硬件锁定的状态还是处于非锁定状态的请求；还用于根据获取到的所述主机发送的请求，判断所述目标内存页是处于被所述异构硬件锁定的状态还是处于非锁定状态；
所述处理器1102用于若判断所述目标内存页处于非锁定状态，则向所述主机通知所述目标内存页处于非锁定状态，使得所述主机在接收到所述目标内存页处于非锁定状态的通知之后，对所述目标内存页进行锁定，并在对所述目标内存页锁定之后，对所述目标内存页进行操作；还用于若判断所述目标内存页处于被所述异构硬件锁定的状态，则向所述主机通知所述目标内存页被所述异构硬件锁定，以使得所述主机确定不能对所述目标 内存页进行操作。
可选的，所述处理器1102还用于在所述主机对所述目标内存页进行操作之后，通过所述传输接口1103接收所述主机在完成对所述目标内存页进行的操作之后解除对所述目标内存页的锁定，并在解除对所述目标内存页的锁定之后发送的所述目标内存页已解锁的通知；
所述处理器1102还用于在接收到所述主机发送的所述目标内存页已解锁的通知之后，将所述目标内存页在所述状态表中的状态修改为非锁定状态。
可选的，所述处理器1102还用于在将所述异构硬件的内存中使用频率低于预定使用频率的数据存储到所述异构硬件的部分内存之后，记录使用频率低于预定使用频率的数据在所述部分内存中的存储时间；
所述处理器1102还用于当记录的所述存储时间未达到阈值时，所述异构硬件禁止将所述使用频率低于预定使用频率的数据从所述部分内存读取到所述异构硬件的内存中。
可选的，所述处理器1102还用于在读取所述目标内存页的数据之后，记录读取的所述目标内存页的数据在所述异构硬件的内存中的存储时间；
所述处理器1102还用于当记录的所述存储时间未达到阈值时，禁止将所述目标内存页的数据从所述异构硬件的内存存储到所述部分内存。
如图17所示，本发明实施例还提供一种主机1201，其包括：处理器1202、与所述处理器1202连接的主机内存1204，以及分别与处理器1202和主机内存1204连接的传输接口1203。在图17中，处理器1202、主机内存1204和传输接口1203可以通过总线1205进行连接。主机内存1204中的部分内存1206作为共享内存，除部分内存之外主机内存1204中的其他内存为剩余内存1207。所述主机1201通过传输接口1203连接异构硬件。
所述处理器1202用于通过所述传输接口1203向所述异构硬件发送所述主机的部分内存1206的内存地址，使得当所述异构硬件的内存的空闲容量低于预定容量时，所述异构硬件根据所述内存地址，将所述异构硬件的内存中使用频率低于预定使用频率的数据存储到所述部分内存1206。
所述处理器1202用于当所述异构硬件需要读取所述部分内存1206中 的目标内存页的数据，并在所述异构硬件根据所述内存地址生成的所述部分内存1206的状态表中查询到所述目标内存页处于被所述主机锁定的状态时，通过传输接口1203接收所述异构硬件发送的对所述目标内存页进行解锁的请求；所述部分内存1206的状态表用于记录所述部分内存1206的内存页的状态；
所述处理器1202用于在接收到对所述目标内存页进行解锁的请求之后，终止对所述目标内存页的操作，并对所述目标内存页进行解锁；
所述处理器1202用于在对所述目标内存页进行解锁之后，向所述异构硬件通知所述目标内存页已解锁，使得所述异构硬件在接收到所述主机发送的所述目标内存页已解锁的通知之后，对所述目标内存页进行锁定，并在对所述目标内存页锁定之后，读取所述目标内存页中的数据。
所述处理器1202用于向所述异构硬件发送查询所述部分内存1206中的目标内存页是处于被所述异构硬件锁定的状态还是处于非锁定状态的请求，使得所述异构硬件根据所述主机发送的请求，查询根据所述内存地址生成的所述部分内存1206的状态表，判断所述目标内存页是处于被所述异构硬件锁定的状态还是处于非锁定状态；若所述目标内存页处于非锁定状态，则所述异构硬件向所述主机通知所述目标内存页处于非锁定状态；若所述目标内存页处于被所述异构硬件锁定的状态，则所述异构硬件向所述主机通知所述目标内存页被所述异构硬件锁定；所述部分内存1206的状态表用于记录所述部分内存1206的内存页的状态；
所述处理器1202用于当所述主机接收到所述目标内存页处于非锁定状态的通知时，对所述目标内存页进行锁定；在对所述目标内存页锁定之后，对所述目标内存页进行操作；
所述处理器1202用于当所述主机接收到所述异构硬件发送的所述目标内存页处于被所述异构硬件锁定的通知时，确定不能对所述目标内存页进行操作。
可选的，所述处理器1202用于在完成对所述目标内存页进行操作之后，解除对所述目标内存页的锁定；
所述处理器1202用于在解除对所述目标内存页的锁定之后，通过传输接口1203向所述异构硬件发送所述目标内存页已解锁的通知，使得所述异 构硬件在接收到所述主机发送的所述目标内存页已解锁的通知之后，将所述目标内存页在所述状态表中的状态修改为非锁定状态。
本领域普通技术人员可以理解上述实施例的各种方法中的全部或部分步骤是可以通过程序来指令相关的硬件来完成，该程序可以存储于一计算机可读存储介质中，存储介质可以包括：只读存储器(ROM，Read Only Memory)、随机存取记忆体(RAM，Random Access Memory)、磁盘或光盘等。
以上对本发明实施例所提供的内存共享方法、异构硬件、主机和异构系统进行了详细介绍，本文中应用了具体个例对本发明的原理及实施方式进行了阐述，以上实施例的说明只是用于帮助理解本发明的方法及其核心思想；同时，对于本领域的技术人员，依据本发明的思想，在具体实施方式及应用范围上均会有改变之处，综上所述，本说明书内容不应理解为对本发明的限制。

Claims (29)

  1. 一种内存共享方法，其特征在于，应用于异构硬件，所述异构硬件连接主机，所述方法包括：
    所述异构硬件获取所述主机发送的所述主机的部分内存的内存地址；
    当所述异构硬件的内存的空闲容量低于预定容量时，所述异构硬件根据所述内存地址，将所述异构硬件的内存中使用频率低于预定使用频率的数据存储到所述部分内存。
  2. 根据权利要求1所述的方法，其特征在于，所述方法还包括：
    所述异构硬件根据所述内存地址，生成所述部分内存的状态表；所述状态表用于记录所述部分内存的内存页的状态；
    当所述异构硬件的内存的空闲容量低于预定容量时，所述异构硬件根据所述内存地址，将所述异构硬件的内存中使用频率低于预定使用频率的数据存储到所述异构硬件的部分内存，包括：
    当所述异构硬件的内存的空闲容量低于预定容量时，所述异构硬件在所述状态表中查找所述部分内存中处于空闲状态的内存页；
    所述异构硬件在查找到处于空闲状态的内存页之后，将使用频率低于预定使用频率的数据存储到处于空闲状态的内存页中。
  3. 根据权利要求2所述的方法，其特征在于，在所述异构硬件将使用频率低于预定使用频率的数据存储到处于空闲状态的内存页中之后，所述方法还包括：
    当所述异构硬件需要读取所述部分内存中的目标内存页的数据时，判断所述目标内存页在所述状态表中是否处于被所述主机锁定的状态还是处于非锁定状态；
    若所述目标内存页处于非锁定状态，则所述异构硬件读取所述目标内存页的数据；
    若所述目标内存页处于被所述主机锁定的状态，则所述异构硬件向所述主机请求对所述目标内存页进行解锁，使得所述主机终止对所述目标内存页的操作，对所述目标内存页进行解锁，以及在对所述目标内存页进行解锁之后，向所述异构硬件通知所述目标内存页已解锁；
    所述异构硬件接收所述主机发送的所述目标内存页已解锁的通知，对 所述目标内存页进行锁定，并在对所述目标内存页锁定之后，读取所述目标内存页中的数据。
  4. 根据权利要求2所述的方法，其特征在于，在所述异构硬件根据所述内存地址，生成所述部分内存的状态表之后，所述方法还包括：
    所述异构硬件接收所述主机发送的查询所述部分内存中的目标内存页是处于被所述异构硬件锁定的状态还是处于非锁定状态的请求；
    所述异构硬件根据所述主机发送的请求，判断所述目标内存页是处于被所述异构硬件锁定的状态还是处于非锁定状态；
    若所述目标内存页处于非锁定状态，则所述异构硬件向所述主机通知所述目标内存页处于非锁定状态，使得所述主机在接收到所述目标内存页处于非锁定状态的通知之后，对所述目标内存页进行锁定，并在对所述目标内存页锁定之后，对所述目标内存页进行操作；
    若所述目标内存页处于被所述异构硬件锁定的状态，则所述异构硬件向所述主机通知所述目标内存页被所述异构硬件锁定，以使得所述主机确定不能对所述目标内存页进行操作。
  5. 根据权利要求4所述的方法，其特征在于，在所述主机对所述目标内存页进行操作之后，所述方法还包括：
    所述异构硬件接收所述主机在完成对所述目标内存页进行的操作之后解除对所述目标内存页的锁定，并在解除对所述目标内存页的锁定之后发送的所述目标内存页已解锁的通知；
    所述异构硬件在接收到所述主机发送的所述目标内存页已解锁的通知之后，将所述目标内存页在所述状态表中的状态修改为非锁定状态。
  6. 根据权利要求1至5任意一项所述的方法，其特征在于，在所述异构硬件将所述异构硬件的内存中使用频率低于预定使用频率的数据存储到所述异构硬件的部分内存之后，所述方法还包括：
    所述异构硬件记录使用频率低于预定使用频率的数据在所述部分内存中的存储时间；
    当所述存储时间未达到阈值时，所述异构硬件禁止将所述使用频率低于预定使用频率的数据从所述部分内存读取到所述异构硬件的内存中。
  7. 根据权利要求3所述的方法，其特征在于，在所述异构硬件读取所述目标内存页的数据之后，所述方法还包括：
    所述异构硬件记录读取的所述目标内存页的数据在所述异构硬件的内存中的存储时间；
    当所述存储时间未达到阈值时，所述异构硬件禁止将所述目标内存页的数据从所述异构硬件的内存存储到所述部分内存。
  8. 一种异构硬件，其特征在于，所述异构硬件连接主机，所述异构硬件包括：
    获取单元，用于获取所述主机发送的所述主机的部分内存的内存地址；
    存储单元，用于当所述异构硬件的内存的空闲容量低于预定容量时，根据所述内存地址，将所述异构硬件的内存中使用频率低于预定使用频率的数据存储到所述部分内存。
  9. 根据权利要求8所述的异构硬件，其特征在于，还包括：生成单元和查询单元，
    所述生成单元用于根据所述获取单元获取的所述内存地址，生成所述部分内存的状态表；所述状态表用于记录所述部分内存的内存页的状态；
    所述查询单元用于当所述异构硬件的内存的空闲容量低于预定容量时，在所述状态表中查找所述部分内存中处于空闲状态的内存页；
    所述存储单元还用于在所述查询单元查找到处于空闲状态的内存页之后，将使用频率低于预定使用频率的数据存储到处于空闲状态的内存页中。
  10. 根据权利要求9所述的异构硬件，其特征在于，所述查询单元还用于在所述存储单元将使用频率低于预定使用频率的数据存储到处于空闲状态的内存页中之后，而且当所述异构硬件需要读取所述部分内存中的目标内存页的数据时，判断所述目标内存页在所述状态表中是否处于被所述主机锁定的状态还是处于非锁定状态；
    所述异构硬件还包括读取单元、请求单元和锁定单元，
    所述读取单元用于若所述查询单元判断所述目标内存页处于非锁定状态，则读取所述目标内存页的数据；
    所述请求单元用于若所述查询单元判断所述目标内存页处于被所述主机锁定的状态，则向所述主机请求对所述目标内存页进行解锁，使得所述主机终止对所述目标内存页的操作，对所述目标内存页进行解锁，以及 在对所述目标内存页进行解锁之后，向所述异构硬件通知所述目标内存页已解锁；
    所述获取单元还用于接收所述主机发送的所述目标内存页已解锁的通知；
    所述锁定单元用于在所述获取单元接收到所述主机发送的所述目标内存页已解锁的通知，对所述目标内存页进行锁定；
    所述读取单元还用于在所述锁定单元对所述目标内存页锁定之后，读取所述目标内存页中的数据。
  11. 根据权利要求9所述的异构硬件，其特征在于，所述获取单元还用于在所述生成单元根据所述内存地址，生成所述部分内存的状态表之后，接收所述主机发送的查询所述部分内存中的目标内存页是处于被所述异构硬件锁定的状态还是处于非锁定状态的请求；
    所述查询单元用于根据所述获取单元获取到的所述主机发送的请求，判断所述目标内存页是处于被所述异构硬件锁定的状态还是处于非锁定状态；
    所述异构硬件还包括：发送单元，所述发送单元用于若所述查询单元判断所述目标内存页处于非锁定状态，则向所述主机通知所述目标内存页处于非锁定状态，使得所述主机在接收到所述目标内存页处于非锁定状态的通知之后，对所述目标内存页进行锁定，并在对所述目标内存页锁定之后，对所述目标内存页进行操作；还用于若所述查询单元判断所述目标内存页处于被所述异构硬件锁定的状态，则向所述主机通知所述目标内存页被所述异构硬件锁定，以使得所述主机确定不能对所述目标内存页进行操作。
  12. 根据权利要求11所述的异构硬件，其特征在于，所述获取单元还用于在所述主机对所述目标内存页进行操作之后，接收所述主机在完成对所述目标内存页进行的操作之后解除对所述目标内存页的锁定，并在解除对所述目标内存页的锁定之后发送的所述目标内存页已解锁的通知；
    所述异构硬件还包括状态单元，所述状态单元用于在所述获取单元接收到所述主机发送的所述目标内存页已解锁的通知之后，将所述目标内存页在所述状态表中的状态修改为非锁定状态。
  13. 根据权利要求8至12任意一项所述的异构硬件，其特征在于， 所述异构硬件还包括时间单元和禁止单元，
    所述时间单元用于在所述存储单元将所述异构硬件的内存中使用频率低于预定使用频率的数据存储到所述异构硬件的部分内存之后，记录使用频率低于预定使用频率的数据在所述部分内存中的存储时间；
    所述禁止单元用于当所述时间单元记录的所述存储时间未达到阈值时，禁止将所述使用频率低于预定使用频率的数据从所述部分内存读取到所述异构硬件的内存中。
  14. 根据权利要求10所述的异构硬件，其特征在于，所述异构硬件还包括时间单元和禁止单元，
    所述时间单元用于在所述读取单元读取所述目标内存页的数据之后，记录读取的所述目标内存页的数据在所述异构硬件的内存中的存储时间；
    所述禁止单元用于当所述时间单元记录的所述存储时间未达到阈值时，禁止将所述目标内存页的数据从所述异构硬件的内存存储到所述部分内存。
  15. 一种内存共享方法，其特征在于，应用于主机，所述主机连接异构硬件，所述方法包括：
    所述主机向所述异构硬件发送所述主机的部分内存的内存地址，使得当所述异构硬件的内存的空闲容量低于预定容量时，所述异构硬件根据所述内存地址，将所述异构硬件的内存中使用频率低于预定使用频率的数据存储到所述部分内存。
  16. 根据权利要求15所述的方法，其特征在于，还包括：当所述异构硬件需要读取所述部分内存中的目标内存页的数据，并在所述异构硬件根据所述内存地址生成的所述部分内存的状态表中查询到所述目标内存页处于被所述主机锁定的状态时，所述主机接收所述异构硬件发送的对所述目标内存页进行解锁的请求；所述部分内存的状态表用于记录所述部分内存的内存页的状态；
    所述主机在接收到对所述目标内存页进行解锁的请求之后，终止对所述目标内存页的操作，并对所述目标内存页进行解锁；
    所述主机在对所述目标内存页进行解锁之后，向所述异构硬件通知所述目标内存页已解锁，使得所述异构硬件在接收到所述主机发送的所述目标内存页已解锁的通知之后，对所述目标内存页进行锁定，并在对所述目 标内存页锁定之后，读取所述目标内存页中的数据。
  17. 根据权利要求15所述的方法，其特征在于，所述方法还包括：
    所述主机向所述异构硬件发送查询所述部分内存中的目标内存页是处于被所述异构硬件锁定的状态还是处于非锁定状态的请求，使得所述异构硬件根据所述主机发送的请求，查询根据所述内存地址生成的所述部分内存的状态表，判断所述目标内存页是处于被所述异构硬件锁定的状态还是处于非锁定状态；若所述目标内存页处于非锁定状态，则所述异构硬件向所述主机通知所述目标内存页处于非锁定状态；若所述目标内存页处于被所述异构硬件锁定的状态，则所述异构硬件向所述主机通知所述目标内存页被所述异构硬件锁定；所述部分内存的状态表用于记录所述部分内存的内存页的状态；
    当所述主机接收到所述目标内存页处于非锁定状态的通知时，对所述目标内存页进行锁定；所述主机在对所述目标内存页锁定之后，对所述目标内存页进行操作；
    当所述主机接收到所述异构硬件发送的所述目标内存页处于被所述异构硬件锁定的通知时，所述主机确定不能对所述目标内存页进行操作。
  18. 根据权利要求17所述的方法，其特征在于，还包括：
    所述主机在完成对所述目标内存页进行操作之后，解除对所述目标内存页的锁定；
    所述主机在解除对所述目标内存页的锁定之后，向所述异构硬件发送所述目标内存页已解锁的通知，使得所述异构硬件在接收到所述主机发送的所述目标内存页已解锁的通知之后，将所述目标内存页在所述状态表中的状态修改为非锁定状态。
  19. 一种主机，其其特征在于，所述主机连接异构硬件，所述主机包括：
    发送单元，用于向所述异构硬件发送所述主机的部分内存的内存地址，使得当所述异构硬件的内存的空闲容量低于预定容量时，所述异构硬件根据所述内存地址，将所述异构硬件的内存中使用频率低于预定使用频率的数据存储到所述部分内存。
  20. 根据权利要求19所述的主机，其特征在于，所述异构硬件还包括：接收单元和解锁单元，
    所述接收单元用于当所述异构硬件需要读取所述部分内存中的目标内存页的数据，并在所述异构硬件根据所述内存地址生成的所述部分内存的状态表中查询到所述目标内存页处于被所述主机锁定的状态时，接收所述异构硬件发送的对所述目标内存页进行解锁的请求；所述部分内存的状态表用于记录所述部分内存的内存页的状态；
    所述解锁单元用于在接收到对所述目标内存页进行解锁的请求之后，终止对所述目标内存页的操作，并对所述目标内存页进行解锁；
    所述发送单元还用于在对所述目标内存页进行解锁之后，向所述异构硬件通知所述目标内存页已解锁，使得所述异构硬件在接收到所述主机发送的所述目标内存页已解锁的通知之后，对所述目标内存页进行锁定，并在对所述目标内存页锁定之后，读取所述目标内存页中的数据。
  21. 根据权利要求19所述的主机，其特征在于，
    所述发送单元还用于向所述异构硬件发送查询所述部分内存中的目标内存页是处于被所述异构硬件锁定的状态还是处于非锁定状态的请求，使得所述异构硬件根据所述主机发送的请求，查询根据所述内存地址生成的所述部分内存的状态表，判断所述目标内存页是处于被所述异构硬件锁定的状态还是处于非锁定状态；若所述目标内存页处于非锁定状态，则所述异构硬件向所述主机通知所述目标内存页处于非锁定状态；若所述目标内存页处于被所述异构硬件锁定的状态，则所述异构硬件向所述主机通知所述目标内存页被所述异构硬件锁定；所述部分内存的状态表用于记录所述部分内存的内存页的状态；
    所述接收单元还用于接收所述目标内存页处于非锁定状态的通知或接收所述异构硬件发送的所述目标内存页处于被所述异构硬件锁定的通知；
    所述异构硬件还包括：锁定单元和操作单元，
    所述锁定单元用于当所述接收单元接收到所述目标内存页处于非锁定状态的通知时，对所述目标内存页进行锁定；
    所述操作单元用于在所述锁定单元对所述目标内存页进行锁定之后，对所述目标内存页进行操作。
  22. 根据权利要求21所述的主机，其特征在于，
    所述解锁单元还用于在所述操作单元完成对所述目标内存页进行操 作之后，解除对所述目标内存页的锁定；
    所述发送单元还用于在解除对所述目标内存页的锁定之后，向所述异构硬件发送所述目标内存页已解锁的通知，使得所述异构硬件在接收到所述主机发送的所述目标内存页已解锁的通知之后，将所述目标内存页在所述状态表中的状态修改为非锁定状态。
  23. 一种异构系统，其特征在于，包括：主机和异构硬件，所述主机与所述异构硬件连接；
    所述主机用于向所述异构硬件发送所述主机的部分内存的内存地址；
    所述异构硬件用于接收所述主机发送的所述内存地址，以及当所述异构硬件的内存的空闲容量低于预定容量时，根据所述内存地址，将所述异构硬件的内存中使用频率低于预定使用频率的数据存储到所述部分内存。
  24. 根据权利要求23所述的异构系统，其特征在于，所述异构硬件还用于根据所述内存地址，生成所述部分内存的状态表；所述状态表用于记录所述部分内存的内存页的状态；以及用于当所述异构硬件的内存的空闲容量低于预定容量时，在所述状态表中查找所述部分内存中处于空闲状态的内存页；在查找到处于空闲状态的内存页之后，将使用频率低于预定使用频率的数据存储到处于空闲状态的内存页中。
  25. 根据权利要求24所述的异构系统，其特征在于，
    所述异构硬件还用于在将使用频率低于预定使用频率的数据存储到处于空闲状态的内存页中之后，而且当所述异构硬件需要读取所述部分内存中的目标内存页的数据时，判断所述目标内存页在所述状态表中是否处于被所述主机锁定的状态还是处于非锁定状态；
    若所述目标内存页处于非锁定状态，则读取所述目标内存页的数据；
    若所述目标内存页处于被所述主机锁定的状态，则向所述主机请求对所述目标内存页进行解锁；
    所述主机还用于接收所述异构硬件发送的对所述目标内存页进行解锁的请求，终止对所述目标内存页的操作，对所述目标内存页进行解锁，以及在对所述目标内存页进行解锁之后，向所述异构硬件通知所述目标内存页已解锁；
    所述异构硬件还用于接收所述主机发送的所述目标内存页已解锁的通知，对所述目标内存页进行锁定，并在对所述目标内存页锁定之后，读 取所述目标内存页中的数据。
  26. 根据权利要求24所述的异构系统，其特征在于，
    所述主机还用于在所述异构硬件根据所述内存地址，生成所述部分内存的状态表之后，向所述异构硬件发送查询所述部分内存中的目标内存页是处于被所述异构硬件锁定的状态还是处于非锁定状态的请求；
    所述异构硬件还用于接收所述主机发送的查询所述部分内存中的目标内存页是处于被所述异构硬件锁定的状态还是处于非锁定状态的请求；以及用于根据所述主机发送的请求，判断所述目标内存页是处于被所述异构硬件锁定的状态还是处于非锁定状态；若所述目标内存页处于非锁定状态，则向所述主机通知所述目标内存页处于非锁定状态；若所述目标内存页处于被所述异构硬件锁定的状态，则向所述主机通知所述目标内存页被所述异构硬件锁定；
    所述主机还用于在接收到所述目标内存页处于非锁定状态的通知之后，对所述目标内存页进行锁定，并在对所述目标内存页锁定之后，对所述目标内存页进行操作；以及用于在接收到所述目标内存页被所述异构硬件锁定的通知之后，确定不能对所述目标内存页进行操作。
  27. 根据权利要求26所述的异构系统，其特征在于，所述主机还用于在对所述目标内存页进行操作之后，解除对所述目标内存页的锁定，并在解除对所述目标内存页的锁定之后，向所述异构硬件发送所述目标内存页已解锁的通知；
    所述异构硬件还用于接收所述主机发送的所述目标内存页已解锁的通知，将所述目标内存页在所述状态表中的状态修改为非锁定状态。
  28. 根据权利要求23至27任意一项所述的异构系统，其特征在于，所述异构硬件还用于在将所述异构硬件的内存中使用频率低于预定使用频率的数据存储到所述异构硬件的部分内存之后，记录使用频率低于预定使用频率的数据在所述部分内存中的存储时间；当所述存储时间未达到阈值时，所述异构硬件禁止将所述使用频率低于预定使用频率的数据从所述部分内存读取到所述异构硬件的内存中。
  29. 根据权利要求25所述的异构系统，其特征在于，所述异构硬件还用于在读取所述目标内存页的数据之后，记录读取的所述目标内存页的数据在所述异构硬件的内存中的存储时间；当所述存储时间未达到阈值 时，禁止将所述目标内存页的数据从所述异构硬件的内存存储到所述部分内存。
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