WO2015176289A1 - Procédé et dispositif de régulation du trafic de réseau sur puce (noc) - Google Patents

Procédé et dispositif de régulation du trafic de réseau sur puce (noc) Download PDF

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Publication number
WO2015176289A1
WO2015176289A1 PCT/CN2014/078182 CN2014078182W WO2015176289A1 WO 2015176289 A1 WO2015176289 A1 WO 2015176289A1 CN 2014078182 W CN2014078182 W CN 2014078182W WO 2015176289 A1 WO2015176289 A1 WO 2015176289A1
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WO
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Prior art keywords
noc
flow
traffic
network
change value
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PCT/CN2014/078182
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English (en)
Chinese (zh)
Inventor
程德华
蔡卫光
王勇
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华为技术有限公司
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Priority to CN201480059677.0A priority Critical patent/CN105684506B/zh
Priority to PCT/CN2014/078182 priority patent/WO2015176289A1/fr
Publication of WO2015176289A1 publication Critical patent/WO2015176289A1/fr

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W28/00—Network traffic management; Network resource management
    • H04W28/02—Traffic management, e.g. flow control or congestion control
    • H04W28/10—Flow control between communication endpoints

Definitions

  • the present invention relates to the field of communications technologies, and in particular, to a flow control method and apparatus for an on-chip network NoC. Background technique
  • NoC Network-on-Chip
  • SoC System-on-Chip
  • CMP Chip Multi-Processors
  • NoC-based systems are better able to adapt to the globally heterogeneous, locally homogenous clocking mechanisms used in future complex multicore SoC designs.
  • the NoC architecture is mainly based on electronic and optical technologies, which are called Electrical Network-on-Chip (ENoC) and Optical Network-on-Chip (ONoC).
  • ENoC Electrical Network-on-Chip
  • ONoC Optical Network-on-Chip
  • the most suitable network structure is the packet-switched direct network, that is, each node is connected to an adjacent node through a bidirectional channel.
  • communication protocols in NoC often use a layered network protocol.
  • the NoC topology is a two-dimensional mesh geometry. Each tile has six separate NoC routers. The six routers are divided into three groups of two routers each to ensure that the router is deadlocked. The three groups of routers perform different functions, one for the network migration (Migration Network), one for the remote network access (Remote Access Network), and one for the network direct memory access (Direct Memory Access network) .
  • the embodiment of the invention provides a flow control method and device for the on-chip network NoC, which is used to solve the problem that the CMP architecture in the prior art is prone to network byte sequence traffic congestion.
  • a first aspect of the present invention provides a flow control method for an on-chip network NoC, including: using a back propagation BP neural network to predict a flow change value of a NoC in a future set time; Obtaining performance parameters of the central processing unit CPU in the NoC;
  • the method before the predicting a flow change value of the NoC in the future set time by using the back propagation BP neural network, the method further includes:
  • the training flow difference sequence is used to train to obtain the BP neural network.
  • the back propagation BP neural network is used to predict the traffic change value of the NoC in the future set time, which specifically includes:
  • the predicted flow difference difference sequence is used as an input of the BP neural network, and the flow change value is calculated.
  • the controlling the NoC according to the traffic change value and the performance parameter Current traffic including:
  • the flow upper limit value of the NoC is decreased.
  • the controlling the NoC according to the traffic change value and the performance parameter Current traffic including:
  • a flow control device for an on-chip network NoC including: a prediction module, configured to predict, by using a back propagation BP neural network, a flow change value of a NoC in a future set time;
  • An acquisition module configured to acquire a performance parameter of a central processing unit CPU in the NoC
  • a control module configured to control a current traffic of the NoC according to the traffic change value and the performance parameter.
  • the prediction module is further configured to: acquire a plurality of training network byte sequences of the NoC according to the second aspect;
  • the training flow difference sequence is used to train to obtain the BP neural network.
  • the prediction module is specifically configured to:
  • the predicted flow difference difference sequence is used as an input of the BP neural network, and the flow change value is calculated.
  • control module is specifically configured to:
  • the flow upper limit value of the NoC is decreased.
  • control module is specifically configured to:
  • a third aspect of the present invention provides a flow control apparatus for an on-chip network NoC, comprising: a memory for storing an instruction, a processor, configured to execute an instruction in the memory to perform an on-chip network as described in the first aspect NoC flow control method.
  • the flow control method for the on-chip network NoC provided by the embodiment of the present invention firstly uses the back propagation BP neural network to predict the flow change value of the NoC in the future set time; and then obtains the performance parameter of the central processing unit CPU in the NoC, and then according to the flow rate. Change values and performance parameters that control the current flow of the NoC.
  • the embodiment of the present invention ensures that the CPU processing capability matches the NoC traffic change, achieves the control of the NoC network byte sequence traffic, improves the NoC throughput, and avoids the traffic. Congestion effect.
  • FIG. 1 is a flowchart of a NoC flow control method according to Embodiment 1 of the present invention
  • FIG. 2 is a flowchart of a NoC flow control method according to Embodiment 2 of the present invention
  • FIG. 4 is a schematic structural diagram of a NoC flow control device according to Embodiment 3 of the present invention
  • FIG. 5 is a schematic structural diagram of a NoC flow control device according to Embodiment 4 of the present invention.
  • FIG. 1 is a flowchart of a NoC flow control method according to Embodiment 1 of the present invention. Such as shown in FIG. 1, the method includes the following steps:
  • the execution body of each of the above steps may be a processor having a certain processing capability, for example, may be EM2.
  • BP neural network is a kind of multi-layer feedforward neural network. It consists of two processes: forward propagation of information and back propagation of error. From its structural point of view, the BP neural network consists of three layers: the input layer, the intermediate layer, and the output layer. The neurons in the input layer are responsible for receiving input information from the outside world and transmitting them to the neurons in the middle layer. The middle layer is the internal information processing layer, responsible for information transformation. According to the information change capability, the middle layer can be designed as a single hidden layer. Or multiple hidden layer structure; the last hidden layer is passed to the information of each neuron in the output layer.
  • the forward propagation process of learning is completed, and the information processing result is output from the output layer to the outside, and the result is obtained.
  • the error is backpropagated back to the BP neural network to adjust the weight values between the layers until the error between the output of the BP neural network and the expected output is within a predetermined range.
  • the present embodiment uses a BP neural network to predict the flow change value of the NoC in the future set time.
  • the BP neural network may be trained by using multiple network byte sequences of NoC, that is, the difference between adjacent sequence elements in each network byte sequence is input into the input layer of the BP neural network, and the layers of the BP neural network are adjusted.
  • the weight value, and the BP neural network determined by the weight value predicts the flow change value of the NoC in the future set time, that is, the flow change value from the current time to the set time.
  • the performance parameters of the Central Processing Unit (CPU) in the NoC can be obtained. Since the processing power of the CPU has a strong correlation with the traffic congestion of the NoC network byte sequence, and the change of the two does not show a significant rule with time, therefore, in order to make the processing power of the CPU and the network byte sequence of NoC
  • the traffic matching can obtain the performance parameters of the CPU, such as its current utilization rate, and then control the current traffic of the NoC according to the predicted traffic change value within the set time and the current performance parameter of the CPU.
  • the flow control method for the on-chip network NoC provided by the embodiment of the present invention firstly uses the back propagation BP neural network to predict the flow change value of the NoC in the future set time; and then obtains the performance parameter of the central processing unit CPU in the NoC, and then according to the flow rate. Change values and performance parameters that control the current flow of the NoC.
  • the CPU processing capability and the NoC traffic change are matched, the network byte sequence traffic of the NoC is controlled, the NoC throughput is improved, and traffic congestion is avoided. Effect.
  • FIG. 2 is a flowchart of a NoC flow control method according to Embodiment 2 of the present invention.
  • the execution body of each step in this embodiment is a processor with certain processing capability. For example, it may be EM2o. As shown in FIG. 2, the method includes the following steps:
  • step S 100 in order to accurately predict the flow of NoC using the BP neural network, the BP neural network can be trained first, that is, the weight value between the layers of the BP neural network is determined.
  • the training process can be divided into the following three steps:
  • NoC's network traffic byte sequence has a certain relationship, that is, there is a certain relationship between the current traffic and the traffic of several sampling intervals in the past, BP neural network can be trained with multiple training network byte sequences of NoC. .
  • the above-mentioned multiple training network byte sequences can be obtained by using the NoC input output (Input Output, referred to as 10) sampling.
  • the actual traffic of the NoC is relatively large, it can be predicted by the absolute error method. That is, multiple training network byte sequences of NoC can be obtained first, and then adjacent sequences in each training network byte sequence are calculated. The difference between the elements obtains a training traffic difference sequence corresponding to each training network byte sequence.
  • the BP neural network can be trained by using the training traffic difference sequence to obtain a BP neural network with stable weight values between layers.
  • the S20K uses BP neural network to predict the flow change value of NoC in the future set time. After the BP neural network training is completed, that is, after the weight values between the layers are determined, the BP neural network can be used to predict the flow change value of the NoC in the future set time.
  • the predicted network byte sequence may be obtained by sampling from the 10th end of the NoC according to the set time and the set correlation interval.
  • the setting correlation interval is the correlation of the estimated NoC network byte sequence, and can be determined according to the actual NoC traffic situation.
  • the set time can take the next sampling interval of the current sampling interval, etc. It is also determined based on the actual NoC flow rate.
  • the difference between adjacent sequence elements in the predicted network byte sequence can be calculated to obtain a sequence of predicted traffic differences. That is to say, the two adjacent items of the predicted network byte sequence are subtracted to obtain the difference between the next sampling interval and the previous sampling interval, and the new sequence composed of the difference is the predicted flow difference difference sequence.
  • predicted flow difference difference sequence can be used as an input of the BP neural network, and then the output of the BP neural network is used as the flow change value.
  • the performance parameter is used as a performance indicator for measuring the current processing capability of the CPU.
  • it may be the current utilization rate of the CPU.
  • the CPU utilization rate is too high, such as greater than 90%, it may lead to suspended animation. If the NoC traffic increases in the future set time, the processor core (Core) cannot be processed with other Cores. The communication mechanism is easy to cause partial failure of the system; if the utilization rate of the CPU is too low, such as less than 40%, it means that the resources of the Core are underutilized. If the traffic of the NoC increases in the future set time, then As a result, the delayed response of the inter-core communication is intensified, which may result in a decrease in local performance of the system.
  • the current flow of the NoC is controlled according to the above two, Dynamically adaptively adjust the current flow of the NoC before the adverse situation occurs, ensuring that the Core is in a reasonable performance range, avoiding before The occurrence of the situation.
  • a strategy is to control the traffic threshold of the NoC so as not to exceed the processing capability of the CPU without changing the performance parameter of the CPU; another strategy is not Under the premise of changing the NoC traffic threshold, the performance parameters of the CPU are adjusted to better match the processing power of the CPU with the traffic of the NoC in the future to improve the performance of the CPU.
  • the policy refers to determining that the current processing capability of the CPU has reached a bottleneck through the performance parameter, and the predicted traffic change value is greater than zero, that is, the future.
  • the flow rate of the NoC will increase. Then, the flow of the NoC can be reversely controlled.
  • the flow rate of the NoC is limited by lowering the flow rate upper limit value of the NoC, thereby avoiding the situation where the NoC flow rate increases in the future and the CPU cannot handle the flow.
  • the traffic of the NoC will not increase in the future, it may not operate.
  • the CPU scheduling parameter is adjusted to match the processing capability of the CPU with the flow change value.
  • the scheduling parameter can be the voltage of the CPU, or the primary frequency, or the primary frequency and voltage.
  • the strategy is that when the predicted traffic change value is greater than zero, that is, the traffic of the NoC will increase in the future, and the CPU's processing capability does not reach the bottleneck, that is, the core processing capacity is not exceeded, the CPU can be adjusted.
  • the voltage, or the main frequency, or the main frequency and voltage adaptively adjust the performance or power consumption of the Core, enabling the CPU's processing power to adapt to the traffic growth in the future.
  • Simultaneous Multi Threading can also be used to balance the relationship between CPU processing power and NoC traffic to improve CPU performance.
  • the following takes the architecture of EM2 as an example to describe the above training process and the control process of NoC traffic.
  • the flow jitter of the NoC is relatively large, so it can be measured by the absolute error method.
  • the difference between the two items before and after the training network byte training sequence can be calculated to form a new sequence, that is, the training traffic difference sequence, and then the traffic prediction difference sequence is subjected to traffic prediction: where, The value of the flow change between the kth sampling interval and the k+1th sampling interval.
  • Training network byte sequence of BP neural network After obtaining the above training flow difference sequence, it can be used to train the BP neural network. Since the training BP neural network requires a large number of samples, when k in the formula (3) takes different values, multiple trainings can be obtained. Training network byte sequence of BP neural network.
  • FIG. 3 is a schematic diagram of the NoC flow control based on EM2 provided in the second embodiment.
  • routers 1 ⁇ 6 are three groups of routers in the background art. Specifically, routers 1 and 2 are used for network migration, routers 3 and 4 are used for remote network access, and routers 5 and Router 6 is used for network direct memory access, and the connection arrows of the above six routers represent network data forwarded thereon.
  • the processor core 7 represents the CPU corresponding to the NoC.
  • the BP neural network is divided into three layers, an input layer 8, an intermediate layer 9, and an output layer 10, which are indicated by dashed boxes in Fig. 3.
  • the middle layer that is, the hidden layer, has three neurons, namely the black squares in Figure 3, which receive six inputs from the input layer and pass three outputs to the output layer. These three outputs are For the three traffic change values, the three traffic change values correspond to the NoC traffic change values corresponding to the three groups of routers for implementing three different functions.
  • the intermediate layer may be composed of multiple layers, and is not necessarily a layer.
  • the weight value representing the neuron j from the m-1th layer to the mth layer neuron i assuming the kth input of the m-1th layer i
  • g m represents its transfer function, That is, the transfer function of the mth input to the output represents the corresponding output.
  • it means the weight value from the first neuron of the input layer to the first neuron of the middle layer, indicating the first neuron from the middle layer to the output layer.
  • the output 3 ⁇ 4 has 1 neuron, the black square in Figure 3, which receives 3 flow change values from the middle layer, ie, according to these 3
  • the flow change value is combined to obtain the flow change value of the entire NoC in the future set time 3 ⁇ 4+1 , and then compared with the actual ⁇ 3 ⁇ 4+1 of the next sampling interval. If the error is not within the preset range, continue with the next one. Train the network byte sequence to train the BP network until the error falls within the preset range.
  • the weight value of the BP neural network is determined.
  • the predicted network byte sequence can be input into the BP neural network, and the flow change value of the NoC in the future set time is predicted, and The current flow of the NoC is controlled based on the predicted result and the performance parameters of the CPU.
  • the output layer of the BP neural network may be used to output the predicted flow change value of the NoC in the future set time, and then after obtaining the performance parameter of the CPU according to the description of steps S202 to S203. And synthesizing the performance parameters of the CPU and the predicted flow change value, and controlling the current flow of the NoC; of course, the performance parameter of the CPU may also be input into the output layer of the BP neural network, and the output layer completes the time set in the future.
  • the prediction of the flow change value and the control of the current flow of the NoC which is shown in Fig. 3, is the second mode described above.
  • the flow control method for the on-chip network NoC provided by the embodiment of the present invention firstly uses the back propagation BP neural network to predict the flow change value of the NoC in the future set time; and then obtains the performance parameter of the central processing unit CPU in the NoC, and then according to the flow rate. Change values and performance parameters that control the current flow of the NoC.
  • the CPU processing capability and the NoC traffic change are matched, and the control is achieved.
  • NoC's network byte sequence traffic improves the throughput of NoC and avoids traffic congestion.
  • 4 is a schematic structural diagram of a NoC flow control device according to Embodiment 3 of the present invention. As shown in FIG. 4, the flow control device 1 includes: a prediction module 10, an acquisition module 11, and a control module 12.
  • the prediction module 10 is configured to use a back propagation BP neural network to predict a flow change value of the NoC in a future set time; the obtaining module 11 is configured to acquire a performance parameter of the central processing unit CPU in the NoC; and the control module 12 is configured to The flow change value and performance parameters control the current flow of the NoC.
  • the prediction module 10 is further configured to: acquire a plurality of training network byte sequences of the NoC; calculate a difference between adjacent sequence elements in each training network byte sequence, and obtain training corresponding to each training network byte sequence. Sequence of traffic difference values; training is performed using training traffic difference sequence to obtain BP neural network.
  • the prediction module 10 is specifically configured to: obtain a predicted network byte sequence from the input and output 10 of the NoC according to the set time and the set correlation interval; calculate between the adjacent sequence elements in the predicted network byte sequence The difference is obtained, and the predicted flow difference difference sequence is obtained; the predicted flow difference difference sequence is used as the input of the BP neural network, and the flow change value is calculated.
  • control module 12 is specifically configured to: determine whether the performance parameter exceeds the first preset threshold; if the first preset threshold is exceeded, and the flow change value is greater than zero, the upper limit value of the NoC is decreased.
  • control module 12 is specifically configured to: determine whether the flow change value is greater than zero; if greater than zero, and the performance parameter is lower than the second preset threshold, adjust the scheduling parameter of the CPU to change the processing capability and flow of the CPU
  • FIG. 5 is a schematic structural diagram of a NoC flow control device according to Embodiment 4 of the present invention. As shown in FIG. 5, the flow control device 2 includes: a memory 20 and a processor 21.
  • the memory 20 is configured to store instructions
  • the processor 21 is configured to execute the instructions in the memory 20 to execute the NoC flow control method as described in any of the first embodiment and the second embodiment.
  • the flow control method for the on-chip network NoC provided by the embodiment of the present invention firstly uses the back propagation BP neural network to predict the flow change value of the NoC in the future set time; and then obtains the performance parameter of the central processing unit CPU in the NoC, and then according to the flow rate. Change values and performance parameters that control the current flow of the NoC.
  • the CPU processing capability and the NoC traffic change are matched, the network byte sequence traffic of the NoC is controlled, the NoC throughput is improved, and traffic congestion is avoided. Effect.
  • the disclosed apparatus and method may be implemented in other manners.
  • the device embodiments described above are only schematic.
  • the division of the unit or module is only a logical function division.
  • there may be another division manner for example, multiple units or modules may be used. Combined or can be integrated into another system, or some features can be ignored, or not executed.
  • the coupling or direct coupling or communication connection shown or discussed may be an indirect coupling or communication connection through some interface, device or module, and may be in electrical, mechanical or other form.
  • the modules described as separate components may or may not be physically separate.
  • the components displayed as modules may or may not be physical modules, that is, may be located in one place, or may be distributed to multiple network units. Some or all of the modules may be selected according to actual needs to achieve the objectives of the solution of the embodiment.
  • the aforementioned program can be stored in a computer readable storage medium.
  • the program when executed, performs the steps including the foregoing method embodiments; and the foregoing storage medium includes: a medium that can store program codes, such as a ROM, a RAM, a magnetic disk, or an optical disk.

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  • Computer Networks & Wireless Communication (AREA)
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Abstract

L'invention concerne un procédé et un dispositif de régulation du trafic d'un réseau sur puce (NoC). Le procédé consiste à : prédire une valeur de variation de trafic d'un NoC sur une durée future définie au moyen d'un réseau neuronal de propagation arrière (BP) ; acquérir un paramètre de performance d'une unité centrale de traitement (CPU) du NoC ; et réguler le trafic courant du NoC conformément à la valeur de variation de trafic et au paramètre de performance. La solution technique des modes de réalisation de la présente invention permet de garantir la correspondance de la capacité de traitement d'une unité centrale de traitement (CPU) et de la variation de trafic d'un NoC, ce qui permet d'obtenir les effets de régulation du trafic de séquence d'octets de NoC et d'éviter l'engorgement du trafic.
PCT/CN2014/078182 2014-05-22 2014-05-22 Procédé et dispositif de régulation du trafic de réseau sur puce (noc) WO2015176289A1 (fr)

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CN201480059677.0A CN105684506B (zh) 2014-05-22 2014-05-22 片上网络NoC的流量控制方法及装置
PCT/CN2014/078182 WO2015176289A1 (fr) 2014-05-22 2014-05-22 Procédé et dispositif de régulation du trafic de réseau sur puce (noc)

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Cited By (3)

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CN110111573A (zh) * 2019-05-15 2019-08-09 辽宁工业大学 一种基于物联网的拥堵车辆综合调度方法
US11817903B2 (en) 2020-08-06 2023-11-14 Celestial Ai Inc. Coherent photonic computing architectures
US11835777B2 (en) 2022-03-18 2023-12-05 Celestial Ai Inc. Optical multi-die interconnect bridge (OMIB)

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CN110958177B (zh) * 2019-11-07 2022-02-18 浪潮电子信息产业股份有限公司 一种片上网络路由优化方法、装置、设备及可读存储介质

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CN110111573A (zh) * 2019-05-15 2019-08-09 辽宁工业大学 一种基于物联网的拥堵车辆综合调度方法
US11817903B2 (en) 2020-08-06 2023-11-14 Celestial Ai Inc. Coherent photonic computing architectures
US11835777B2 (en) 2022-03-18 2023-12-05 Celestial Ai Inc. Optical multi-die interconnect bridge (OMIB)

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