WO2015154238A1

WO2015154238A1 - Method for epitaxially growing ultrathin organic crystalline layers on surface and its applications

Info

Publication number: WO2015154238A1
Application number: PCT/CN2014/074947
Authority: WO
Inventors: Xinran Wang; Yi Shi; Yun Li; Yuichi Sadamitsu; Masahiro Hamada
Original assignee: Nanjing University; Nanjing Tech University; Nippon Kayaku Co Ltd
Current assignee: Nanjing University; Nanjing Tech University; Nippon Kayaku Co Ltd
Priority date: 2014-04-09
Filing date: 2014-04-09
Publication date: 2015-10-15
Anticipated expiration: 2016-10-09
Also published as: CN107109697A; JP2017519351A; CN107109697B

Abstract

Disclosed is a method for depositing ultrathin layers of an organic semiconductor material on a support, and its applications in fabrication of electronic devices like OEFT and diodes. In the method, a source of an organic semiconductor material and a support are spaced from each other in a vacuum chamber and subjected to a temperature gradient, and the epitaxy initiates due to a van der Waals interaction between the organic molecules and the support. The ultrathin crystalline layers of the organic semiconductor material can be only a-few-molecule thick and even one-molecule thick in total. Further disclosed is a layered structure produced by said method and use of the layered structure in fabrication of logic gates.

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Title

Method for epitaxially growing ultrathin organic crystalline layers on a surface and its applications

Technical field

The present invention relates to a method for producing two-dimensional(2D)layered heterostructures,and in particular,to a method for epitaxially growing ultrathin crystalline layers of an organic semiconductor on a crystalline surface of a support such as graphene and hexagonal boron nitride(hBN),as well as its applications in fabrication of electronic devices like organic field-effect transistors(OEFTs).

Background art

Two-dimensional layered organic crystal represents a promising material for electronic and photonic applications.Compared to bulk materials,crystalline monolayers can effectively eliminate interlayer screening,thereby offering an ideal system to directly investigate the effects of disorders and interfaces on charge transport.Furthermore,both carrier injection and modulation would become more efficient,so as to greatly improve the performance of OFETs.

OFETs are an important class of devices for flexible,low-cost,and lightweight electronic applications such as drive circuits for LED displays,plastic RFID,and sensors ^[1].Nowadays a common structure of OFET is a planar device with source/drain and gate electrodes,like a conventional CMOS.Due to the charge hopping between the molecules,OFETs in general have a low carrier mobility of less than～20cm ²/(V·s),much smaller than that of crystalline silicon ^[1,2].As a result,the application of OFETs is limited to those that do not demand high performance.In addition,in order to consume less material in OFETs,it is highly desirable to use an ultrathin layer down to molecular thickness as the channel.However,conventional planar OFETs with an ultrathin channel(not more than3monolayers)generally have very small mobility values of less than0.1cm ²/(V·s) ^[3].Therefore,extensive studies have been carried out to address this issue.

Graphene is composed of one or more one-atom-thick layers of hexagonal carbon;it is a pure two-dimensionally layered material with many appealing properties. Graphene is a semimetal with zero bandgap.At the charge neutrality point,the density of state(DOS)is zero,so the Fermi energy is highly tunable by the carrier density. This is a distinctive feature compared to conventional metals.Graphene is transparent, absorbing～2.3%of the visible light.It is also very flexible and is one of the strongest materials.These properties make graphene highly suitable for flexible and transparent device applications ^[4].

The use of graphene in transistors has been widely investigated because its carrier mobility can be as high as～2×10 ⁵cm ²/(V·s),much higher than that of silicon. However,the absence of bandgap inhibits the on/off ratio in graphene-based transistors.Although one can open up a bandgap by creating one-dimensional graphene nanoribbons below10nm wide,the mobility is significantly degraded by edge roughness ^[5,6].To solve this issue,layered heterostructures formed by graphene and other semiconductors have been developed to impart a high on/off ratio to graphene-based transistors ^[7-9].For these heterostructures,it is always desirable to invent processes and device structures that can be scaled up at low cost,and can deliver transparent transistors with high performance(a high current and a high on/off ratio).

One approach to fabrication of graphene-based transistors is to combine graphene and other two-dimensional layers such as BN and MoS ₂.These devices are usually fabricated by tedious layer-by-layer transfer of these layered materials ^[7,9].First, graphene is exfoliated and transferred onto a Si/SiO ₂substrate to serve as the bottom electrode.Then,BN or MoS ₂is exfoliated on a separate substrate,followed by manually transferring it to the top of the graphene electrode under a microscope,so as to complete the heterostructure.Because the exfoliated sheets are different each time, during the fabrication of such devices,multiple electron beam lithography steps are needed.Although such a structure can overcome the on/off-ratio problem in graphene-based devices,it cannot be scaled up for large-scale applications.

Another approach is to evaporate a thick organic material such as pentacene to allow it to grow on graphene,as demonstrated by two groups ^[12,13].However,several drawbacks exist in this approach.First,the growth of the organic material is not well controlled and the quality of the layer formed is low;this process leads to a lot of grain boundaries in the organic film.Second,the thickness of the organic material crystal formed is very large(normally hundreds of nanometers),resulting in a device that is not transparent and not suitable for applications such as LED displays.

To integrate graphene with organic materials having a conjugated system,Samsung Electronics disclosed a scalable method based on coating or vapor-depositing an organic material such as phthalocyanine,pentacene,oligothiophene,polythiophene, and polyphenylene onto the basal(0001)plane of graphene to reduce the interfacial resistance ^[10].This method requires a solvent to assist the deposition of the organic materials and may suffer from low electron mobility often seen in solution-assisted deposition.An electrical device comprising a layered structure formed by this method is also disclosed ^[10].In this layered structure,a basal plane of the graphene is a(0001) plane,and a layer comprising an organic material having a conjugated system is disposed on graphene via aπ-πinteraction.However,a detailed configuration of an electrical device employing such a structure is not specified.

Hexagonal boron nitride(hBN)is the most stable crystalline form of boron nitride, which has a layered structure similar to graphite but is basically an electrical insulator with a wide bandgap of～5.2eV.Due to its excellent dielectric and thermal properties, hBN is also useful in electronics e.g.as a substrate for semiconductors.Like graphene, BN is also an ideal support since it is atomically flat without dangling bonds. However,similar to the case of graphene,simple and scalable methods for forming hBN-supported ultrathin monolayers of organic semiconductor for electronic applications are still unavailable at low cost.

Therefore,there is still a need for a simple,scalable method for forming ultrathin crystalline layers of an organic semiconductor on the crystalline surface of a support such as graphene and hBN,so as to afford transparent heterostructures useful for electronic devices like OFETs.

With regard to organic semiconductors useful for the channel in OFETs, dioctylbenzothienobenzothiophene(C ₈-BTBT,its formula is shown below)is one of the highest mobility organic molecules,which is co-invented by NIPPON KAYAKU co.,Ltd ^[2,11].

It is therefore envisaged that C ₈-BTBT,when used as a channel material,can provide high device mobility,a low threshold voltage,and high electrical stability for organic transistors.However,successfully integration of ultrathin C ₈-BTBT crystalline layers with two-dimensional supports like graphene or hBN to form a heterostructure useful for fabrication of planar OFETs has not been reported in the art yet.

Summary of invention

The present inventors have conducted extensive studies and developed a scalable method for epitaxially growing one or more two-dimensional layers of crystal of an organic semiconductor material on a support,such as graphene and hexagonal boron nitride(hBN),at a temperature much lower than traditional vapor deposition methods. In this method,a source of an organic semiconductor material and a support are spaced from each other in a vacuum chamber and subjected to a temperature gradient, and the epitaxy initiates due to van der Waals(vdW)interaction between the organic molecules and the support.The method avoids use of any carrier gas or solvent,and thus simplifies the operation and saves cost.

One aspect of the present invention relates to a method for epitaxially growing two-dimensional layers of crystal of an organic semiconductor material on a crystalline surface of a support,and the method comprises the steps of

1)placing a support and a source of an organic semiconductor material in a vacuum chamber,in which the source and the support are spaced from each other,

2)applying a temperature gradient between the source and the support,wherein the temperature of the source is set such that the organic semiconductor material begins to evaporate or sublime,and the source temperature is higher than that of the support,

3)allowing the molecules of the organic semiconductor material to evaporate or sublime at the source temperature and grown on the crystalline surface of the support, and

4)controlling the time,pressure,and/or temperature of deposition such that a crystalline layer of desired thickness and morphology can be deposited on the support.

The inventors have surprisingly found that the method realizes epitaxial growth of2D organic crystalline layers on the crystalline surface of graphene or hBN in which the organic molecules pack into a-few-nanometer thick monolayers stacked upon one another on the support and are unusually held by van der Waals forces.The molecular arrangement of these monolayers will be described in details below.

The method in accordance with the present invention is suitable for large-scale fabrication of a heterostructure in which one or more monolayers of an organic semiconductor material is epitaxially crystallized on the crystalline surface of a support.The heterostructure is transparent and exhibits a high on/off ratio without compromising mobility,thereby suitable for the fabrication of transparent logic transistors and diodes for possible applications in display drive circuits,LEDs,solar cells,and other complementary circuitry.Compared to other approaches,our method for the first time realizes scalable epitaxial growth of ultrathin crystalline layers of organic semiconductor materials on graphene or hBN,and the crystal formed has much higher quality.

Another aspect of the present invention relates to a layered structure,which comprising a support having a crystalline surface;and one or more two-dimensional layers of crystal of an organic semiconductor material epitaxially grown on the crystalline surface of the support;wherein the total thickness of the one or more two-dimensional layers is100nm or less.The layered structure of this aspect can be obtained by the method described above.The present invention also relates to use of the layered structure in the fabrication of electronic devices like OFETs or diodes.The present invention further relates to an electronic device,such as OFETs or diodes, comprising the layered structure.

Yet another aspect of the present invention relates to logic gates,such as an AND gate or an OR gate,employing the layered structure of the present invention.

Description of the drawings

Hereinafter the preferred embodiments of the present invention will be described in detail with reference to the drawings.However,it is to be understood that the drawings are only illustrative and are not intended to limit the scope of the present invention to any extent.In the drawings,

Figure1shows a schematic configuration of the apparatus and the conditions for implementing the method in accordance with an embodiment of the present invention;

Figure2shows(a-n)sequential AFM images and(o)thickness of crystalline C ₈-BTBT monolayers grown on a graphene support at different stages,in which the scale bars are2μm;(a)is the graphene sample before the growth of C ₈-BTBT, wherein the graphene is on a SiO ₂substrate;(b)-(n)are sequential AFM snapshots for the same graphene sample after C ₈-BTBT has grown thereon for15min to95min, tracking the growing process of different crystalline single-layers of C ₈-BTBT;IL means Interfacial Layer(the first monolayer of C ₈-BTBT in direct contact with graphene),1L means the First Layer(the second C ₈-BTBT monolayer on IL),and2L, 3L and4L mean the2 ^nd,3 ^rd and4 ^th layers,respectively(further C ₈-BTBT monolayers above1L);

Figure3shows(a)the AFM image of a single piece of uniform C ₈-BTBT crystal grown on a graphene sample,and(b)its Raman mapping and(c-e)cross-polarized optical micrographs;the scale bars are3μm;

Figure4shows the spatial configuration of C ₈-BTBT molecules in the crystalline layers on graphene;(a)is the scanning tunneling microscopy(STM)image of IL on graphene;(b)is the top view(top panel)and side view(bottom panels)of the most stable IL structure generated by density functional theory(DFT)calculations;(c)is the high-resolution AFM image of2L,wherein the unit cell is marked with the a-b coordinate system,and the insert is the Fast Fourier Transform of the AFM image with the lattice indices circled;(d)is the top view(left panel)and side view(right panel)of the2L structure generated according to the AFM image in(c);(e)is a cartoon perspective view of the layered structure of IL,1L and2L of C ₈-BTBT crystal packed on graphene;

Figure5shows AFM images of C ₈-BTBT crystal on hBN;(a)is the AFM image of C ₈-BTBT grown on BN,wherein the IL,1L and2L have the same meanings as in Figure2,each followed by their thickness;(b)is the high-resolution AFM image of 1L C ₈-BTBT on BN,wherein the unit cell is marked with the a-b coordinate system, and the inset is the Fast Fourier Transform of the AFM image;(c)is the high-resolution AFM image of2L C ₈-BTBT on BN;(d)is the high-resolution AFM image of bare hBN substrate,which shows the hexagonal lattice of hBN,in clear contrast to the C ₈-BTBT crystal;

Figure6shows patterned growth of C ₈-BTBT crystal on graphene,wherein the scale bars are7μm;(a)and(b)are optical microscopy images of a plasma-patterned graphene before and after C ₈-BTBT growth,respectively;(c)and(d)are cross-polarized optical micrographs of the same area after C ₈-BTBT growth;

Figure7shows a proposed device structure of a bottom-gate top-drain graphene/C ₈-BTBT vertical OFET employing the layered heterostructure of the present invention;the thickness and width of each component are not drawn to scale; The peripheral wires connecting the electrodes are omitted;

Figure8shows characteristic of vertical OFETs featuring the graphene/C ₈-BTBT layered structure of the present invention;(a)shows room-temperature J _ds-V _g characteristic curves of an OEFT device having a～15nm(5-monolayer)thick C ₈-BTBT crystal as the channel;V _ds=2V(upper curve)and1V(lower curve), respectively;(b)shows room-temperature J _ds-V _ds characteristic curves of the same device as(a);V _g=-100V,-90V,-80V,-70V,and0V(from top to bottom), respectively;V _g refers to the gate voltage applied on the substrate;V _ds and J _ds refer to the applied bias voltage and measured current density between the graphene and the metal layer;

Figure9shows the room-temperature characteristics of a planar OFET device comprising a monolayer of C8-BTBT crystal formed on hBN by the method of the present invention;(a)shows room-temperature double-sweep I _ds-V _g characteristic curves of the device(V _ds=-0.2V),with little hysteresis;the lower curve and the upper curve are drawn in linear and log scales,respectively;the inset depicts the extracted μ-V _g relationship,wherein the peak mobility is4.3cm ²/(V·s);(b)shows room-temperature I _ds-V _ds characteristic curves of the same device,wherein V _g=-10V, -25V,-30V,-35V and-40V(from top to bottom),respectively;the inset is the optical microscopy image of the device;(c)shows I _ds-V _g characteristic curves (V _ds=-0.2V)of the same device as(a),obtained at300K,290K,270K,and250K, respectively(from top to bottom);the inset depicts theμ-temperature relationship;

Figure10(a)shows room-temperature J _ds-V _ds characteristics of another device with a 19-layer thick C ₈-BTBT crystal on graphene;V _g=-100V,-90V,-80V,-70V,-60V, -50V and-10V(from top to bottom),respectively;(b)shows room-temperature J _ds-V _g characteristics of the device in(a);V _ds=24V,9V,3V and1V(from top to bottom),respectively;and

Figure11shows the schematic configuration and output values of(a)an OR gate and (b)an AND gate employing the graphene/C ₈-BTBT layered structure of the present invention;the pull-up resistor for the AND gate and the pull-down resistor for the OR gate are both5×10 ⁹Ohms;during the operation of both logic gates,V _g=-100V,and V _dd=4V;the inserts schematically show the layered configuration of the gates.

Detailed description of the embodiments

Definitions

Unless otherwise indicated,the term“two-dimensional(2D)layer”or“monolayer” used herein means a one-atom-thick or one-molecule-thick crystalline layer of a substance,but its thickness may vary because of different packing configurations of the molecules constituting the crystalline layer.For example,a monolayer of C ₈-BTBT is a one-molecule-thick layer of C ₈-BTBT,the thickness of which may be approximately0.6to3nm depending on the packing configuration of C ₈-BTBT molecules(see Figure4e).

The term“graphene”used herein refers to a monolayer of hexagonal carbon or a multiple layers of hexagonal carbon stacked upon one another.Graphene in the context of this specification may have a thickness of0.3to100nm,but not limited thereto.

The term“hexagonal boron nitride”or“hBN”used herein refers to a monolayer of hexagonal boron nitride or a multiple layers of hexagonal boron nitride stack upon one another.hBN in the context of this specification may have a thickness of0.3to 100nm,but not limited thereto.

The term“support”used herein refers to a physical base on which the organic semiconductor crystal can epitaxially grow.It supports epitaxy of organic crystal by providing a substantially smooth crystalline surface and van der Waals interaction,but is not necessarily rigid.For example,when the support is ultrathin graphene or hBN, it may be flexible.

The term“substrate”used herein refers to a physical base routinely used for an element or unit structure in electronic devices,which may comprise a metal,a metalloid,a semiconductor,an insulator,or a combination thereof.Substrate can also be flexible and optically transparent plastics.In the present invention,the support is positioned on the substrate in the specific devices disclosed.However,in other applications,the support may be the same as the substrate.

The term“vacuum”used herein refers to an environment at a pressure below one atmosphere(～10 ⁵P,or760Torr).

Method for epitaxial growth of crystalline monolayers

In one aspect,the present invention relates to a method for epitaxially growing two-dimensional layers of crystal of an organic semiconductor material on a crystalline surface of a support.The method comprises

In an embodiment of the method,the number of the2D crystalline layers formed on the support may be20or less,preferably10or less,more preferably5or less.Each monolayer formed may appear as one whole piece or discrete pieces on the underlying layer or the graphene,and each piece may be a single crystal of pristine quality.The method of the present invention can achieve a large piece of monolayered single crystal of pristine quality having a size of tens of micrometers in width and/or length. In one embodiment of the method,there may be only one2D crystalline layer grown on the support.

In an embodiment of the method,the organic semiconductor material to be deposited may be primarily composed of molecules havingπ-conjugate systems that allow electrons and holes to move by hopping,tunneling,or other mechanisms.Typical examples of such molecules include aromatic polycyclic compounds(such as polyphenylene,pentacene,oligothiophene,and polythiophene),compounds comprising one or more porhyrin cores(such as porphyrin),and compounds comprising one or more phthalocyanine cores(such as phthalocyanine salts).Here “polycyclic compound”refers to a compound having two or more ring structures,in which each ring comprises carbon atoms and optional hetero atoms in the cyclic backbone,and these rings may be fused or not fused to one another.In one embodiment,theπ-planes of the organic molecules in the grown semiconductor monolayer at the interface are substantially parallel to the crystalline surface of the support.

In a preferred embodiment,the organic semiconductor material is mainly composed of organic molecules having general formula(1)below:

R ¹-[Ar] _n-R ² (1)

wherein R ¹and R ²are each independently hydrogen or a linear or branched alkyl group having1to12carbon atoms,preferably1to10carbon atoms,more preferably 1to8atoms;Ar represents a monocyclic aromatic group or a fused polycyclic aromatic group,and may have hetero atoms in its cyclic backbone;n is an integer from1to4,preferably1to3,more preferably1or2;R ¹and R ²each may be bonded to any position on the core structure[Ar] _n,but if both are present,they are preferably at symmetric positions with respect to the center of[Ar] _n;besides R ¹and R ²,[Ar] _n may be substituted with other groups such as an alkyl having1to8carbon atoms.

In formula(1),examples of R ¹and R ²include hydrogen,methyl,ethyl,n-propyl, i-propyl,n-butyl,i-butyl,sec-butyl,t-butyl,amyl,hexyl,heptyl,octyl,nonyl,decyl, dodecyl,cetyl,and the like,but are not limited thereto;examples of Ar include a benzene ring,a furan ring,a pyridine ring,a thiophene ring,a pyrrole ring,an indole group,an purine group,an imidazole ring,a polyaromatic hydrocarbon(PAH),and a fused product of the above(for example,pentacene,benzothiophene,etc),but are not limited thereto.

In a most preferred embodiment of the method,the organic semiconductor material is mainly composed of C ₈-BTBT.

In a preferred embodiment of the method,the pressure in the vacuum chamber may be any value below10Torr,preferably10 ^-3Torr or less,more preferably10 ^-5Torr or less.

The support in the method according to the present invention is not specifically limited,and any material can be used as the support as long as it can provide a substantially atomically smooth crystalline surface and van der Waals interactions allowing for epitaxial growth of organic molecules.In a preferred embodiment,the support is graphene.In this case,any kinds of graphene can be used,for example, mechanically exfoliated graphene,CVD graphene,or epitaxial graphene.The thickness of graphene can be from monolayer to about100nm,but not limited thereto. In another preferred embodiment of the method,the support is hBN.

In an embodiment of the method,the vacuum chamber may be tube like and the support and the source of the organic semiconductor material are arranged horizontally in the tube-shaped chamber and are spaced from each other at a distance allowing for epitaxy.In another embodiment of the method,the support and the source of the organic semiconductor may be arranged vertically and spaced from each other at a distance allowing for epitaxy.The chamber can also have other shapes,for example,prism-shaped.The distance between the source and the support is not specifically limited,as long as the distance allows the evaporated or sublimed molecules of the organic semiconductor material to reach the crystalline surface of the support and epitaxially grow thereon.For example,when C ₈-BTBT is used as the organic semiconductor material,the distance may be1to50cm,preferably5-40cm, more preferably10-30cm,but not limited thereto.

In an embodiment of the method,the deposition time of the organic semiconductor varies depending on the source temperature,the type of the organic semiconductor material,and the intended total thickness of the crystalline layers to be deposited.In a specific embodiment,the organic semiconductor material is C ₈-BTBT and the deposition time is about10to100minutes,preferably15to80minutes,but not limited thereto.

Without being bound to theory,it is considered that,at the interface of the organic crystal/support layered structure,the interaction between the crystalline monolayer havingπ-conjugate systems and the crystalline surface of the support(e.g.graphene or hBN)is a vdW interaction,or more specifically,a vdW interaction mainly composed of non-covalentπ-πinteractions of the dispersion type.The inventors have found that support flatness and the weak vdW interaction are crucial for high-performance monolayer organic transistors because of the minimal disturbance in both crystal growth and charge transport.

A specific embodiment of the method will be described below with reference to Figures1and2.

Figure1shows a schematic configuration of the apparatus and the conditions for implementing the method in accordance with an embodiment of the present invention. As shown in Figure1,the apparatus is a tube furnace comprising a quartz tube4.A source1of an organic semiconductor material and a support2on a substrate3are placed horizontally at a distance inside a quartz tube4under vacuum,preferably below10 ^-5Torr.A turbo molecular pump(not shown)is connected to the tube4to evacuate the inside of the tube and maintain the pressure.The source1is placed in the center of the tube furnace.A temperature gradient is established inside the tube,with the temperature declining from the source1to the support2as indicated by the arrow. The molecules of the organic semiconductor material diffuse along the temperature gradient to the crystalline surface of the support2and epitaxially form one or more crystalline layers on the crystalline surface.

In the apparatus and process illustrated in Figure1,the temperature of the source1is maintained by a heater(not shown)such that the organic semiconductor material begins to evaporate or sublime.The temperature of the support2is controlled by its position apart from the source and may be approximate to room temperature but should be lower than the source temperature to ensure epitaxial growth on the support.

The source temperature is not specifically limited as long as it satisfies the above condition.For example,for C ₈-BTBT as the organic semiconductor material,any source temperature between about20oC and about200oC may be adopted as long as it is higher than the temperature of the support2.The growth speed of the organic semiconductor crystalline layer on the support2is primarily controlled by the source temperature.When the crystalline film reaches intended thickness,the growth is terminated by stopping the heating and allowing the heterostructure sample(i.e.the support2with the layer(s)deposited thereon)to cool down to ambient temperature while maintaining the vacuum condition.

The growth of the2D layers of the organic semiconductor crystal by the method of the present invention can be confirmed by atomic force microscopy(AFM).Figure2 shows AFM images of crystalline C ₈-BTBT layers grown on a graphene support at different stages.

From Figure2it can be seen that the C ₈-BTBT crystal preferentially grew on graphene,in a layer-by-layer fashion,with atomic smoothness.The thickness of the initial two layers(namely the interfacial layer,IL,and the first layer,1L)is～0.6nm and～1.7nm,respectively,as measured by AFM(see Figure2o),indicating that the molecular packing in the initial layers is different from bulk crystal of C ₈-BTBT. However,the thickness of the subsequent layers(2L and further layers)was～3nm (see Figure2o),the same as that of bulk crystal.Furthermore,for each layer,the growth initiated at certain nucleation sites,and then proceeded nearly isotropically as compact islands.The most common nucleation sites of each layer were disorders (such as cracks and wrinkles)from the previous layers(Figure2d)or from the substrate(Figure2a,2f,2m),as well as edges(Figure2i,2k,2n),probably owing to their high surface energy.Such a growing process strongly indicates epitaxy.

In addition,although each snapshot was taken after interruption of the growth and removal of the sample into the ambient environment,the frequent interruptions and ambient exposure of the sample did not significantly affect the growth,which indicates that the crystal are of pristine quality and stable against photo oxidation in ambient environments.

Large-area mono-layered or bi-layered C8-BTBT single crystal completely covering the graphene sample was repeatedly obtained after careful control of the growth parameters on defect-free(e.g.crack and wrinkle-free)graphene.Figure3a shows a continuous single piece of mono-layered uniform C ₈-BTBT crystal over about30μm long and5μm wide(IL not counted)grown on a graphene sample,as confirmed by the total thickness of C ₈-BTBT/graphene of3.7nm and Raman mapping(Figure3b). Cross-polarized optical micrographs showed that the entire piece was a single crystal except a small portion at the bottom(Figure3c,3d),and the optical intensity had a four-fold symmetry as expected for high-quality single crystal(Figure1e).The low nucleation density and island growth mode(as opposed to fractal growth)indicate a high diffusion coefficient of C ₈-BTBT molecules both on surface and along the island edges.This is a natural result of the substrate flatness and relatively weak vdW forces from the substrate,in clear contrast to the conventional epitaxy where strong chemical bonds are formed at the interface.

The thickness of～0.6nm of the IL reveals a novel form of molecular packing at the interface.Scanning tunneling microscopy(STM)showed that C ₈-BTBT molecules in IL were packed in a rectangular lattice with d ₁=2.52nm and d ₂=0.66nm in two orthogonal directions(Figure4a).Based on density functional theory(DFT)studies,it is postulated that the most stable single-molecule configuration of C ₈-BTBT in IL has both its octyl chains and benzothiophene plane in closest proximity to and parallel to graphene,such that both CH-πinteractions and theπ-πinteractions are maximized. When forming periodic crystal,however,the fully-relaxed benzothiophene plane is expected to be slightly tilted to form a10o angle with the graphene plane because of inter-molecular interactions,as calculated in DFT(Figure4b).

High-resolution AFM in ambient environments shows that the crystal structure for both1L and2L is monolithic with herringbone-type packing as in bulk crystal(Figure 4c,4d).The lattice constants are

for C ₈-BTBT crystal on graphene,and no statistical difference of lattice constants between1L and2L was observed.The C ₈-BTBT molecules in1L(thickness ～1.7nm)are more inclined than bulk crystal(thickness～3nm).Figure4e shows a schematic layered structure of IL,1L and2L of C ₈-BTBT crystal stacked on graphene. The AFM and STM results confirm the epitaxy of C ₈-BTBT crystal.

As mentioned above,the support is not limited to graphene.In one embodiment of the method of the present invention,the support is hexagonal boron nitride(hBN).Figure 5shows the results of epitaxial growth of C ₈-BTBT crystalline monolayers on hBN. The thickness of each layer is similar to that of C ₈-BTBT/graphene.

The method of the present invention can also be applied to patterned growth of ultrathin organic crystal for device integration.Figure6shows that,on(6a)graphene patterns etched by oxygen plasma,a(6b)C ₈-BTBT crystal can be readily grown with excellent uniformity over an area of about1200μm ².The uniform color change over the entire area confirms that C ₈-BTBT forms a single crystal.When combined with CVD graphene or BN,large-area integration of devices is feasible.

Layered hetero-structure comprising a ultrathin organic crystal and a2D support

Another aspect of the present invention relates to a layered structure produced by the above-described method,the layered structure comprising

a support having a crystalline surface;and

one or more two-dimensional layers of crystal of an organic semiconductor material epitaxially grown on the crystalline surface of the support;

wherein the total thickness of the crystalline layers is100nm or less.

In an embodiment of the layered structure,the number of the2D crystalline layers formed on the support may be20or less,preferably10or less,more preferably5or less.Each monolayer formed may appear as one whole piece or discrete pieces on the underlying layer or the graphene,and each piece may be a single crystal of pristine quality.Each monolayer may be a whole piece of single crystal of pristine quality having a dimension(length or width)of at least tens of micrometers,for example,at least30μm,40μm,or50μm.

In an embodiment,the2D crystalline layer in direct contact with the support(referred to as the interfacial layer)is thinner than all other layers stacked thereabove.In an embodiment,the2D crystalline layer stacked directly over the interfacial layer (referred to as the first layer),if present,is thicker than the interfacial layer,but thinner than other layers(if present)stacked thereabove.In one embodiment of the layered structure,there may be only one,two,or three2D crystalline layers grown on the support.The total thickness of the2D crystalline layers may be100nm or less, preferably90nm or less,more preferably80,70,60,50,40,30,20,15,10or5nm or less.In an embodiment,theπ-planes of the organic molecules in the interfacial layer are nearly parallel to the crystalline surface of the support.

In a preferred embodiment of the layered structure,the organic semiconductor material to be deposited may be primarily composed of molecules havingπ-conjugate systems.Examples of such molecules include aromatic polycyclic compounds(such as polyphenylene,pentacene,oligothiophene,and polythiophene),compounds comprising one or more porhyrin cores(such as porphyrin),and compounds comprising one or more phthalocyanine cores(such as phthalocyanine salts).In another embodiment of the layered structure,the organic semiconductor material can be doped.Further examples of the organic semiconductor material have been described in previous paragraphs.

In a preferred embodiment,the organic semiconductor material is C8-BTBT.In this case,theπ-planes(i.e.benzothiophene planes)of C ₈-BTBT molecules in the interfacial layer are preferably at an angle of about10o to the crystalline surface of the support.The C ₈-BTBT interfacial layer has a thickness of about0.6nm.The first layer on the interfacial layer has a thickness of about1.7nm,and the further layers above the first layer each have a thickness of about3nm.

The support in the layered structure is not specifically limited,and any material can be used as the support as long as it can provide a substantially atomically smooth crystalline surface and van der Waals interactions allowing for epitaxial growth of the organic molecules.In a preferred embodiment,the support is graphene.In this case, any kinds of graphene can be used,for example,mechanically exfoliated graphene, CVD graphene,or epitaxial graphene.The thickness of graphene can be from monolayer to about100nm,but not limited thereto.In another preferred embodiment of the method,the support is hBN.

Transistors employing the layered structure

The layered structure of the present invention can be used as a unit or element of an electronic device,such as OFET.Figure7shows a proposed device structure of a bottom-gate top-drain graphene/C ₈-BTBT vertical OFET.

In Figure7,“Graphene”refers to a graphene sheet that serves as the support for organic semiconductor crystal described above and may be up to10nm thick.The size of the graphene sheet can be from micrometers to centimeters or even meters. Synthetic methods for the graphene sheet include mechanical exfoliation,chemical vapor deposition,and chemically derived graphene thin films.“Metal”refers to any electrically conducting substance including,but not limited to,metals such as Au,Ti, Pd,Cu,Al;conducting oxides such as“ITO”;and conducting polymers and paints. “C ₈-BTBT”refers to a crystal(up to100nm thick)of C ₈-BTBT grown on the graphene by above-mentioned epitaxy method.The fabrication process of the above device starts with preparation of graphene,either by mechanical exfoliation on a target substrate,or by chemical vapor deposition and transfer onto a substrate.A metal electrode is connected to graphene by lithography.C ₈-BTBT is then epitaxially grown on the graphene using the above-mentioned method according to the present invention. Finally a top metal electrode is deposited.

In a specific example of Figure7,a100-nm thick Au layer is deposited on the C ₈-BTBT crystal and serves as the top drain electrode,a graphene sheet serves as the bottom source electrode,the Si/SiO ₂substrate includes the dielectric layer(SiO ₂)and the gate electrode(Si),and the C ₈-BTBT crystal serves as the channel.

Figure8shows the transfer(J _ds-V _g)and output(J _ds-V _ds)characteristics of a typical vertical OFET as shown in Figure7which comprises5monolayers of C ₈-BTBT on graphene.The on/off ratio of this OFET is about1.5×10 ³at room temperature.The device exhibited a diode-like rectifying behavior similar to graphene barristers ^[8,12], indicating different conduction mechanisms for the two bias polarities.

Figure9shows the characteristics of a planar p-type OFET with a monolayer of C ₈-BTBT crystal grown on insulating hBN.Despite the monolayer thickness(～1.7 nm),the devices exhibits several features of ideal OFETs:linear I _ds-V _g(I _ds ^1/2-V _g) characteristics in the linear(saturation)regime,Ohmic contact,and negligible hysteresis.The room-temperature peak field-effect mobilityμcould reach as high as ～5cm ²/(V·s),much higher than previously reported values for monolayer OFETs (which are in the range from～10 ^-6to10 ^-1cm ²/(V·s)).The value ofμis still underestimated due to contact resistance,which is estimated to be quite low(～500 Ω·cm)at on-state using the Y function method.Such a dramatic improvement is strong evidence that the density of charge traps and grain boundaries have been significantly reduced.This can be attributed to the pristine,ultrasmooth crystal and their weak coupling interaction with the support.

Compared to bulk-crystal devices,the I _ds-V _ds characteristic curves in Figure9b reveals two unique features:(i)the absence of non-linearity at low bias,and(ii)complete saturation with extremely small saturation voltage(<-1V).Both features are direct consequence of the monolayer nature of the C ₈-BTBT channel.The former feature is because the source/drain electrodes are in direct contact with the charge transporting layer,leading to extremely efficient carrier injection.The latter one is due to easy and complete channel pinch-off without interlayer screening effects.With scaled dielectric thickness and other optimized device parameters,the operation voltage of these OFETs can be reduced to1V,which makes these devices compatible with silicon CMOS in circuits.In addition,it is found that the mobility decreases slightly at low temperatures,but still maintains very high,e.g.～2.3cm ²/(V·s)at250K.

Figure10a and10b show the characteristics of another planar OFET device with a much thicker piece of C ₈-BTBT crystal grown on hBN by the method of the present invention.The on-state current of this device is over100A/cm ²and its on/off ratio is about～10 ⁶.

Therefore,another aspect of the invention relates to use of the layered structure describe above in the fabrication of an OFET or diode.Yet another aspect of the invention relates to an OFET or diode comprising the layered structure described above.In particular,the planar OFET employing monolayer semiconductor crystal on hBN can achieve a carrier mobility as high as～5cm ²/(V·s)and an aggressively scaled saturation voltage below1V,which is highly promising for electronic and photonic applications.

Logic gates employing the layered structure

The inventors also made more complex circuits based on two graphene/C ₈-BTBT vertical diodes described above.By connecting two such structures in different ways, OR and AND logic gates can be successfully achieved.Figure11schematically shows (a)an OR gate and(b)an AND gate and their output characteristics.For the AND gate, two pieces of C ₈-BTBT crystal were grown on two spaced graphene pieces as inputs, and they were connected with a common top electrode as the output.Either diode under forward bias(with a low input)would be closed with a much lower resistance than the pull-up resistor,thereby creating a low output.The gate showed excellent logic function,with the high and low outputs close to V _dd(4V)and0respectively (Figure11b).For the OR gate,two pieces of C ₈-BTBT crystal were grown on a single piece of graphene as the output,and two top electrodes as inputs were deposited on the two pieces of C ₈-BTBT crystal respectively.Either diode under forward bias(with a high input)would be closed with a much lower resistance than the pull-down resistor,thereby creating a high output.The outputs of the OR gate for(4,0)and(0,4) are between2V and3V,which are not as ideal as4V because of the finite leakage current under reverse bias,but are sufficient for effective functioning of the OR gate (Figure11a).Clearly,more complex functionality can be created with lithographic patterning.

Therefore,the present invention further relates to an OR gate,comprising

one support having a crystalline surface;

two separate pieces of crystal of an organic semiconductor material epitaxially deposited on the crystalline surface of the support,each piece having one or more two-dimensional layers of the organic semiconductor material and a total thickness of 100nm or less;

two separate electrically conductive covers covering the top of the two crystal pieces respectively;and

a substrate underneath the support.

The present invention further relates to an AND gate,comprising

two separate supports each having a crystalline surface;

two separate pieces of crystal of an organic semiconductor material epitaxially deposited on the crystalline surface of the two supports respectively,wherein each of the two crystal pieces has one or more two-dimensional layers of the organic semiconductor material and a total thickness of100nm or less;

one electrically conductive cover covering the top of both crystal pieces of the organic semiconductor material;and

a substrate underneath the supports.

In the OR and AND gates of the present invention,the organic semiconductor/support layered structure may be the layered structure of the present invention describe above. The conductive cover may be a layer of any electrically conducting substance including,but not limited to,metals such as Au,Ti,Pd,Cu,Al;conducting oxides such as“ITO”;and conducting polymers and paints.

The demonstrated transistor/diode structure will have potential applications in display drive circuits,display drive circuits,LEDs,solar cells and other complementary circuitry.

The present invention solves several critical issues in the application of graphene vertical heterostructures in electronic devices.First,the coating deposition method of organic layers on graphene/BN can be scaled up,which solves the problem of manual transfer of two-dimensional layered materials.Second,both graphene/BN and the ultrathin organic layers are transparent in visible wavelength,and therefore such structure can be used in transparent displays and LEDs.Third,the channel length in the vertical transistor is only a few nm to tens of nm,much reduced compared to conventional planar OFET structures.Hence,the structure of the present invention will dramatically improve the OFET transistor performance compared to conventional OFET structures.

Examples

Example1Growth of C ₈-BTBT crystal on graphene

Graphene was exfoliated on a285-nm SiO ₂/Si substrate without further thermal treatment,to prepare a graphene sample having a surface area of about500μm ².The exfoliated graphene was characterized by optical microscope,AFM and Raman spectroscopy before growth to obtain its thickness and topology information.The growth was carried out in a tube furnace as shown in Figure1.In the tube furnace,an open container(about1cm in size)containing C ₈-BTBT powder(from NIPPON KAYAKU co.,Ltd.without further purification)was placed in the middle of the quartz tube chamber(1.5meters long and10cm in diameter).Then the graphene sample was placed about20cm away from the source.The quartz tube chamber was sealed and evacuated by a turbo molecular pump to about4×10 ^-6Torr.The distance between source and the graphene sample was accurately measured each time to obtain good reproducibility.The C ₈-BTBT powder was then heated to100°C to start the growth.After50minutes of growth,the furnace was turned off and the sample was cooled down to room temperature with the vacuum condition maintained.As a result, about three monolayers of C ₈-BTBT crystal epitaxially grew on the graphene,as confirmed by AFM and STM.

Example2

C ₈-BTBT crystal was grown by the same method as in Example1except that the distance between the support and the source was changed to10cm.As a result,about three monolayers of C ₈-BTBT crystal epitaxially grew on the graphene.

Example3

C ₈-BTBT crystal was grown by the same method as in Example1except that the distance between the support and the source was changed to25cm.As a result,about two monolayers of C ₈-BTBT crystal epitaxially grew on the graphene.

Example4

C ₈-BTBT crystal was grown by the same method as in Example1except that the source temperature was changed to110°C.As a result,about six monolayers of C ₈-BTBT crystal epitaxially grew on the graphene.

Example5

C ₈-BTBT crystal was grown by the same method as in Example1except that the source temperature was changed to120°C.As a result,about ten monolayers of C ₈-BTBT crystal epitaxially grew on the graphene.

Example6

C ₈-BTBT crystal was grown by the same method as in Example1except that the deposition time was changed to90minutes.As a result,about four monolayers of C ₈-BTBT crystal epitaxially grew on the graphene.

Example7

C ₈-BTBT crystal was grown by the same method as in Example1except that the deposition time was changed to30minutes.As a result,about two monolayers of C ₈-BTBT crystal epitaxially grew on the graphene.

Example8Growth of C ₈-BTBT crystal on hBN

C ₈-BTBT crystal was grown by the same method as in Example1except that hBN was used as the support instead of graphene.As a result,about three monolayers of C ₈-BTBT crystal epitaxially grew on the hBN.

The terminology used in this specification is for the purpose of describing particular example embodiments only and is not intended to be limiting.As used herein,the singular forms"a","an"and"the"may be intended to include the plural forms as well, unless the context clearly indicates otherwise.The terms"comprises","comprising", "including",and"having"are inclusive and therefore specify the presence of stated features,layers,steps,pieces,groups,compounds,elements,and/or components,but do not preclude the presence or addition of one or more other features,layers,steps, pieces,groups,compounds,elements,components and/or combinations thereof.

In addition,the disclosure of particular values(e.g.,pressures,times,dimensions, number of atoms,number of layers,electronic characteristics,etc.)and particular ranges of values herein are not exclusive of other values or ranges of values that may be useful in other embodiments depending,for example,on particular growing processes or devices,or in one or more of the examples disclosed herein.Moreover,it is envisioned that any two particular values for a specific parameter stated herein may define the endpoints of a range of values that may be suitable for the given parameter. The disclosure of a first value and a second value for a given parameter can be interpreted as disclosing that any value between the first and second values could also be employed for the given parameter.

The foregoing description of the embodiments has been provided for purposes of illustration and description.It is not intended to be exhaustive or to limit the disclosure.For a person skilled in the art,the embodiments and examples disclosed herein may be varied or modified in many ways without departing from the scope of the disclosure and such variations and modifications are included in the scope defined by the appended claims.

References

1.Hanying Li,et al.MRS Bulletin38,34-42(2013).

2.Hiromi Minemawari et al.Nature475,364(2011).

3.Liqiang Li et al.Angew.Chem.Int.Ed.52,12530-12535(2013).

4.K.S.Novoselov et al.Nature490,192(2012).

5.Xiaolin Li et al.Science319,1229(2008).

6.Xinran Wang et al.Phys.Rev.Lett.100,206803(2008).

7.L.Britnell et al.Science335,947(2012).

8.Heejun Yang et al.Science336,1140(2012).

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11.Hideaki Ebata et al.J.Am.Chem.Soc.129,15732(2007).

12.Ojeda-Aristizabal et al.,Phys.Rev.B88,035435(2013).

13.Wi Hyoung Lee et al.,J.Am.Chem.Soc.113,4447(2013).

Claims

A method for epitaxially growing two-dimensional layers of crystal of an organic semiconductor material on a crystalline surface of a support,the method comprising

1)placing a support and a source of an organic semiconductor material in a vacuum chamber,in which the source and the support are spaced from each other,

2)applying a temperature gradient between the source and the support,wherein the temperature of the source is set such that the organic semiconductor material begins to evaporate or sublime,and the source temperature is higher than that of the support,

3)allowing the molecules of the organic semiconductor material to evaporate or sublime at the source temperature and grow on the crystalline surface of the support, and

4)controlling the time,pressure,and/or temperature of deposition such that a crystalline layer of desired thickness and morphology can be deposited on the support.
The method according to claim1,wherein the organic semiconductor material is mainly composed of organic molecules havingπ-conjugate systems.
The method according to claim2,wherein the organic molecules having π-conjugate systems are selected from a group consisting of aromatic polycyclic compounds,compounds comprising one or more porhyrin cores,and compounds comprising one or more phthalocyanine cores.
The method according to claim2,wherein the organic molecule havingπ-conjugate systems is represented by general formula(1):

R ¹-[Ar] _n-R ² (1)

where R ¹and R ²are each independently hydrogen or a linear or branched alkyl group having1to12carbon atoms;Ar represents a monocyclic aromatic group or a fused polycyclic aromatic group;n is an integer from1to4.
The method according to claim2,wherein the organic molecule havingπ-conjugate systems is dioctylbenzothienobenzothiophene(C ₈-BTBT).
The method according to claim5,wherein the source temperature is about20oC to about200oC.
The method according to claim1,wherein the pressure in the vacuum chamber is 10 ^-3Torr or less.
The method according to any one of claims1-7,wherein the support is graphene.
The method according to any one of claims1-7,wherein the support is hexagonal boron nitride.
A layered structure,the layered structure comprising

a support having a crystalline surface;and

one or more two-dimensional layers of crystal of an organic semiconductor material epitaxially grown on the crystalline surface of the support;

wherein the total thickness of the one or more two-dimensional layers is100nm or less.
The layered structure according to claim10,wherein the organic semiconductor material is mainly composed of organic molecules havingπ-conjugate systems.
The layered structure according to claim11,wherein the organic molecules having π-conjugate systems are selected from a group consisting of aromatic polycyclic compounds,porphyrin derivates,and phthalocyanine derivates.
The layered structure according to claim11,wherein the organic molecule having π-conjugate systems is represented by general formula(1):

R ¹-[Ar] _n-R ² (1)

where R ¹and R ²are each independently hydrogen or a linear or branched alkyl group having1to12carbon atoms;Ar represents a monocyclic aromatic group or a fused polycyclic aromatic group;n is an integer from1to4.
The layered structure according to claim11,wherein the organic molecules having π-conjugate systems is C ₈-BTBT.
The layered structure according to claim10,wherein the length or width of at least one two-dimensional crystalline layer is at least30μm.
The layered structure according to any one of claims10-15,wherein the support is graphene.
The layered structure according to any one of claims10-15,wherein the support is hexagonal boron nitride.
Use of the layered structure according to any one of claims10-17in the fabrication of an electronic device.
An electronic device comprising the layered structure according to any one of claims10-17.
The electronic device according to claim19,wherein the electronic device is an organic field-effect transistor or diode.
An OR gate,comprising

a layered structure according to any one of claims10-17,wherein the crystal of the organic semiconductor material is present as two separate pieces on the crystalline surface of the support,each piece having one or more two-dimensional layers and a total thickness of100nm or less;

two separate electrically conductive covers covering the top of the two crystal pieces respectively;and

a substrate underneath the support of the layered structure.
An AND gate,comprising

two separate layered structures according to any one of claims10-17;

one electrically conductive cover covering the top of the crystal of the organic semiconductor material of both layered structures;and

a substrate underneath the supports of the layered structures.