TUNNELING FIELD EFFECT TRANSISTORS WITH A VARIABLE
BANDGAP CHANNEL
FIELD
The present disclosure generally relates to tunneling field effect transistors (TFETs), and more particularly to TFETs having a variable band gap channel.
Methods of forming such TFETs are also described.
BACKGROUND
Metal oxide semiconductors (MOS) are commonly used in integrated circuits, e.g., in metal oxide semiconductor field effect transistors ("MOSFETs"). In general, MOSFETs and other MOS transistors include a source and drain separated by a channel. Flow of current through the channel is generally controlled by one or more gates. With this in mind, a MOSFET or other MOS transistor may be configured to operate in one of three regions depending on its gate- source voltage Vgs and drain- source voltage, Vds, namely the linear, saturation, and sub-threshold regions. The subthreshold region is a region wherein the gate-source voltage Vgs is smaller than the threshold voltage Vt of the device. Vt is a voltage value (applied to the gate referenced from a source) at which the channel of the device begins to electrically connect the source and drain, i.e., at which transistor current is turned "ON."
The sub-threshold swing (SS) of a transistor is an important characteristic which may be considered relevant to a variety of transistor properties. For example, sub-threshold swing may represent the relative ease with which a transistor may be turned "ON" and "OFF," as well as the rate at which such switching may occur. Subthreshold swing may be expressed by as a function of kT/q, wherein T is the absolute temperature, k is the Boltzmann constant and q is the magnitude of the electric charge.
The sub-threshold swing of many MOS devices such as MOSFETs has a lower limit of about 60mV/decade at 300 degrees Kelvin. MOSFETs subject to that limit may be unable to switch ON and OFF faster than 60mV/decade at room temperature. This limit may also impact operating voltage and threshold voltage requirements of a MOS device such as a MOSFET, particularly when the MOSFET is operated at a low gate-source voltage Vgs. At such voltages, the ON current of the
MOSFET may be quite low, as it may be operating close to its threshold voltage Vt. Put in other terms, the 60mV/decade limit of sub-threshold swing may limit or prevent further (downward) scaling of gate-source voltages, and thus may hinder or prevent decreasing the power requirements of a chip in which MOSFET transistors are included.
The above issue is further exacerbated by the fact that power consumption of MOSFET devices has been observed to increase as such devices are scaled down. The increased power consumption is believed to result at least in part from increased source to drain leakage currents, which in turn may be the result of small channel length dimensions that are employed such devices (i.e., short channel effects). This increase in leakage current may translate to a meaningful increase in off-current (I0ff), particularly when large numbers of MOS devices will be used in an integrated circuit device, such as a processor or other chip.
Tunneling field effect transistors (TFETs) have been proposed as a successor to MOSFETs. Among other things TFETs operate using a different physical mechanism enabling relatively low off current. Moreover, the theoretical subthreshold swing limit of a TFET can be less than 60mV/decade. TFETs therefore offer the potential of operating at lower gate-source voltages Vgs, relative to useful gate- source voltages for MOSFETs.
Despite those potential advantages, many TFETs suffer from relatively low
"on current" Ion at a given gate-source voltage and/or "off current" IQff. This may stem, for example, from the relatively high resistance of the tunnel barrier. Although heterojunction TFETs have shown some promise in that some have been shown to exhibit a combination of relatively high Ion and relatively low I0ff, experimental verification of these devices has yet to show sub-60mV/dec sub-threshold swing.
BRIEF DESCRIPTION OF THE DRAWINGS
Features and advantages of embodiments of the claimed subject matter will become apparent as the following Detailed Description proceeds, and upon reference to the Drawings, wherein like numerals depict like parts, and in which:
FIG. 1 is a block diagram of an example tunneling field effect transistor (TFET) consistent with the present disclosure.
FIG. 2A illustrates an example TFET consistent with the present disclosure, wherein the TFET is switched ON and includes a variable bandgap channel that is switched ON and OFF by the drift of ions/carriers;
FIG 2B is a bandgap diagram of the TFET of FIG. 2A
FIG. 2C illustrates an example TFET consistent with the present disclosure, wherein the TFET is switched OFF and includes a variable bandgap channel that is switched ON and OFF by the drift of ions/carriers;
FIG 2D is a bandgap diagram of the TFET of FIG. 2C;
FIG. 3 is a graph qualitatively depicting a relationship of the logarithm of drain current (Id) versus applied gate voltage (Vg) for an example TFET including a channel switched by ion drift consistent with the present disclosure and a TFET including a channel formed of an undoped semiconductor material.
FIG. 4 is a block diagram of an example TFET consistent with the present disclosure, wherein the TFET includes a variable bandgap channel formed at least in part from a Mott insulator.
FIG. 5 depicts ON and OFF bandgap plots for an example TFET consistent with the present disclosure, wherein the TFET includes a variable bandgap channel formed at least in part with a Mott insulator, and ON and OFF bandgap plots of a TFET including a channel formed from undoped semiconductor material.
FIG. 6 is a plot of absolute lateral electric field vs. transistor location for an example TFET consistent with the present disclosure, wherein the TFET includes a variable bandgap channel formed at least in part of a Mott insulator.
FIG. 7 is a graph qualitatively depicting a relationship of the logarithm of drain current (log(Id)) vs. applied gate voltage (Vg) for a TFET including a variable bandgap channel formed at least in part of a Mott insulator consistent with the present disclosure, and of a TFET including a channel formed from undoped semiconductor material.
FIG. 8 is a flow diagram depicting example operations that may be performed in accordance with a method of producing a TFET consistent with the present disclosure.
Although the following Detailed Description will proceed with reference being made to illustrative embodiments, many alternatives, modifications, and variations thereof will be apparent to those skilled in the art.
DETAILED DESCRIPTION
For simplicity and clarity, the FIGs. of the present disclosure illustrate the general manner of construction of various embodiments, and descriptions and details of well-known features and techniques may be omitted to avoid unnecessarily obscuring the discussion of described embodiments of the present disclosure. It should be understood that the elements of the FIGs. are not necessarily drawn to scale, and that the dimensions of some elements may be exaggerated relative to other elements for the purpose of enhancing understanding of described embodiments.
The terms, "first," "second," "third," and the like are used in the present disclosure and the claims to distinguish between similar elements, and not necessarily for describing a particular sequential or chronological order. It should be understood that such terms may be interchangeably used in appropriate circumstances, such that the aspects of the present disclosure may be operable in an order other than which is explicitly described.
As explained briefly in the background, tunneling field effect transistors
(TFETs) have the potential to exhibit various benefits over metal oxide semiconductor devices such as MOSFETS. To date however many TFETs exhibit relatively low on currents Ion at a given gate-source voltage and/or off current Ioff, which can limit their practical usefulness. Moreover, many experimental studies of TFETs indicate that the studied TFETS exhibited a sub-threshold swing higher than the 60mV/decade limit exhibited by MOSFETs. TFETs with improved performance characteristics are therefore of interest.
With the foregoing in mind, the present disclosure generally relates to TFETs that include a channel with bandgap characteristics that may be altered by at least one of the application or removal of a force. For clarity, such channels are hereinafter referred to as a "variable bandgap channel." As will be described in detail later, use of a variable bandgap channel may allow for the dynamic adjustment of the bandgap of the channel, thereby providing fine control over the operation of the TFET.
Furthermore use of a variable bandgap channel may enable the production of TFETs that exhibit desirable performance characteristics, particularly as compared to a TFET employing a channel formed of an undoped semiconductor material, such as but not limited to InAs, IngaAs, Ge, GeSn, combinations thereof, and the like (hereinafter referred to for convenience as a "conventional TFET").
More particularly and as will become apparent from the following discussion, in some embodiments TFETs consistent with the present disclosure may exhibit ON currents Ion that are relatively high and OFF currents IQff that are relatively low, particularly when compared to the Ion and IQff exhibited by a conventional TFET. Furthermore in some embodiments, TFETs consistent with the present disclosure may exhibit a sub-threshold swing (SS) at room temperature that is less than the SS of a conventional TFET, and in some cases lower than the 60 mV/decade limit exhibited by MOS devices such as MOSFETs.
With the foregoing in mind, one aspect of the present disclosure relates to TFETs that include a variable bandgap channel. Reference is therefore made to FIG. 1, which is a cross-sectional block diagram of one example of a TFET consistent with the present disclosure. As shown, TFET 100 includes source 101, drain 102, channel 103, first gate 104, second gate 105, and gate oxide 106. In the illustrated
embodiment, channel 103 is between source 101 and drain 102. Moreover, channel 103 is between first gate 104 and second gate 105, such that first gate 104 is proximate a first side (not labeled) of channel 103, and second gate 105 is proximate a second side (not labeled) of channel 103. Furthermore in the illustrated embodiment, the first and second sides of channel 103 are substantially opposite one another. In any case, all or a portion of each of source 101, gate 102, channel 103, second gate 105, and gate dielectric 106 may be formed on a substrate (not shown).
For the sake of illustration, FIG. 1 and various other FIGS, depict TFETs consistent with the present disclosure, wherein the various components thereof are laterally laid out relative to one another. Accordingly, such FIGS, may be understood to illustrate planar TFETs. It should be understood that such illustrations are for the sake of example only, and that TFETs having other configurations may be utilized and are envisioned by the present disclosure. By way of example, the present disclosure specifically envisions embodiments wherein one or more of the
components of the TFETs illustrated in FIG. 1 and other FIGS, are stacked upon one another, such that a vertical relationship between the various components is established.
Source 101 is operable to inject carriers into the channel of a field effect transistor (FET), as generally understood in the art. Similarly, drain 102 is operable to remove carriers from a channel of a FET, as generally understood in the art. In the
embodiment of FIG. 1, source 101 functions to inject carriers into channel 103, and drain 102 functions to remove carriers from channel 103. Source 101 and drain 102 may be respectively coupled to one or more source and drain contacts (not shown).
Source 101 and drain 102 may each be formed from any suitable n or p type semiconductor material. Non-limiting examples of such materials include n doped or p doped gallium antimonide (GaSb), gallium arsenide (GaAs), gallium arsenide antimonide (GaAsSb), germanium (Ge), indium arsenide (InAs), indium antimonide, indium gallium arsenide (InGaAs), InGaAsSB, silicon (Si), SiGe, SiGeSn
combinations thereof, and the like. Without limitation, an n type semiconductor (e.g. n-doped silicon) is preferably used to form one of source 101 and drain 102, and a p type semiconductor (e.g., p- doped silicon) is preferably used to form the other of source 101 and drain 102. In some embodiments, source 101 includes or is formed from an n-type semiconductor and drain 102 includes or is formed from a p-type semiconductor. In other embodiments, source 101 includes or is formed from a p- type semiconductor and drain 102 includes or is formed from an n-type
semiconductor. For the sake of illustration, various FIGs. of the present disclosure illustrate embodiments wherein source 101 is a p type semiconductor and drain 102 is an n-type semiconductor.
Channel 103 generally form a source-channel interface between source 101 and drain 102, and is operable to prevent or allow carriers to flow from source 101 to drain 102. As will be described in detail below, channel 103 is configured as a variable bandgap channel, i.e., such that its bandgap characteristics may be dynamically altered by the application and/or removal of a force. For example, the tunnel barrier height of channel 103 may change in response to at least one of an application or removal of a force, potentially altering the operational state of the TFET.
First gate 104, second gate 105 generally perform device specific functions that are understood in the art, and for the sake of brevity such functions will not be described herein in detail. Alternatively or in addition to such functions, in some embodiments first gate 104 and second gate 105 may be utilized to apply (or cease to apply)one or more forces to channel 103, so as to alter or change the bandgap characteristics of channel 103 in a desired manner. By way of example, one or both of first gate 104 and second gate 105 may be utilized to apply a voltage and/or electric
field to/from channel 103. Application of the voltage and/or electric field may cause bandgap characteristics (e.g., tunnel barrier height) of channel 103 to change, potentially changing the operational state of TFET 100 from OFF to ON, and vice versa.
In this regard, first and second gates 104, 105 may be formed from any suitably conductive material, such as but not limited to polysilicon, polygermanium, metals such as Al, W, Ta, Ti, Ru, Pd, Rh, Re, Pt, and alloys thereof, metal-nitrides such as TaN and TiN, metal- silicon nitrides such as TaSiN, conductive oxides such as Ru02 and Re03, fully silicided metals (FUSI) such as CoSi2, NiSi and TiSi2, and fully germanided metals (FUGE). The materials used to form first and second gates 104, 105 may be chosen such that a particular gate work function is obtained.
Gate dielectric 106 generally functions to insulate source, channel 103, drain 102, and first and second gates 104, 105 from one another. Gate dielectric 106 may therefore be formed from any suitable electrically insulating material. Non-limiting examples of suitable materials that may be used to form gate dielectric 106 include silicon oxide and high k dielectrics (e.g., dielectric materials with a dielectric constant greater than 7) such as hafnium oxide, tantalum pentaoxide, titanium oxide, zirconium oxide, combinations thereof, and the like. Of course, other insulating materials may also be used to form gate dielectric 106.
As noted previously, channel 103 is generally configured such that its bandgap characteristics may be changed and/or selected by the application and/or removal of a force such as a voltage, electric field, combination thereof and the like. In this regard, channel 103 may be configured to exhibit a relatively large bandgap in a first (e.g., insulating) state and a relatively small bandgap in a second (e.g., conducting) state, wherein the first and second states may be selected and/or influenced by the application and/or withdrawal of a force such as an applied electric field, voltage, combination thereof, and the like.
Alternatively or additionally, channel 103 may be configured so as to exhibit a relatively large tunnel barrier height in the first state, and a relatively small tunnel barrier height in the second state. As may be appreciated, higher tunneling probability through channel 103 may be expected when it is in the second state and exhibits the second (relatively small) tunnel barrier height, relative to when it is in the first state and exhibits the first (relatively high) tunnel barrier height.
While the present disclosure focuses on embodiments wherein channel 103 may exhibit distinct first and second states with distinct bandgap properties, it should be understood that such description is for the sake of clarity and ease of understanding only, and that channel 103 need not exhibit a stark transition between the first and second states. Indeed in some embodiments channel 103 may be configured such that a plurality and/or gradient of states exist or can exist between the first and second states described above. In such instances, control over and/or selection of the relative state (and, consequently, bandgap characteristics of channel 103) may be achieved through appropriate control of the force applied to and/or removed from channel 103, e.g., by source 101, drain 102, first gate 104, second gate 105, and combinations thereof.
With the foregoing in mind, one aspect of the present disclosure relates to TFETs that include a variable bandgap channel formed by a stack including at least first material layer having first bandgap characteristics and a second material layer having second bandgap characteristics. In such embodiments, the first material layer may be formed on the second material layer, or vice versa. Regardless and without limitation, the first material layer is preferably formed from an insulator with a first bandgap, and the second material layer is preferably formed from a conductive material having a second bandgap, wherein the first bandgap is larger than the second bandgap.
As will be described later, the bandgap characteristics of the variable bandgap channel as a whole may be impacted by the relative distribution/amount of the first and second material layers relative to one another, which may be dynamically changed by the application and/or removal of a force such as a voltage. Experiments have demonstrated that application and/or removal of a force such as an electric field by means of a voltage may alter a relative distribution of ions/vacancies within the first and second layers, e.g., by causing the ions/vacancies to drift from the first material layer to the second material layer or vice versa. In this way, application and/or removal of a force to/from the variable bandgap channel may affect the overall distribution and/or relative amount of ions/vacancies within the first and second materials layers and, consequently, the bandgap characteristics of channel 103 as a whole.
Reference is therefore made to FIGS. 2 A and 2C, which are block diagrams of an example TFET consistent with the present disclosure, and which includes a variable channel that is formed from first and second material layers as generally described above. As shown, TFET 200 includes p type source 101, n type drain 102, first and second gates 104, 105, and gate dielectric 106, the function and nature of which have been previously described. In addition, TFET 200 includes channel 103, which in this case is formed by first material layer 201 and second material layer 201 ' . Consistent with the foregoing description, first material layer 201 in this embodiment is formed from an insulating material exhibiting a relatively large bandgap, and second material layer 20 is formed from an insulating material exhibiting a relatively small bandgap. As discussed previously, the relative distribution of ions/vacancies within the first and second material layers 201, 201 ' may be adjusted by the application of a force and/or removal of an applied force, such as voltage applied via gate 104 or gate 105.
Non-limiting examples of suitable materials that may be used to form first and second material layers 201, 201 ' include materials that respond to an applied force in such a way as to alter the bandgap characteristics of the stack of first and second materials layers 201, 201 ' as a whole. In this regard, suitable materials that may be used to form first material layer 201 include but are not limited to inorganic oxides and nitrides that are electrically insulating and exhibit a relatively large bandgap. Non-limiting examples of such oxides include aluminum oxide (AI2O3), barium titanate (BaTi03), barium zirconate (BaZr03), hafnium dioxide (Hf02), silicon dioxide (Si02), silicon nitride (Si3N4), niobium pentoxide (Nb2Os), tantalum pentoxide (Ta2Os), titanium dioxide (Ti02), vanadium oxide (V02), yttrium oxide (Y203), zirconium dioxide (Zr02), and zirconium silicate (ZrSi04). Without limitation, first material layer 201 is preferably formed from Ti02, Nb2Os, Ta205 and V02. In some embodiments, first material layer 201 is formed from Ti02.
As may be appreciated, the aforementioned oxides and nitrides may exhibit type I band alignment at the heterojunction between source 101 and drain 102, particularly when source 101 and drain 102 are formed from silicon. Of course, the above identified materials are listed as examples only, and other materials may be used to form first material layer 201.
Examples of suitable materials that may be used to form second material layer 20 include but are not limited to partially oxidized inorganic oxides and partially nitrided inorganic nitrides that are conductive and which exhibit a relatively small bandgap and/or a relatively small tunnel barrier height, as compared to the
corresponding bandgap characteristics of the first material layer 201. Non-limiting examples of such materials include Al2Ox (where x is less than 3), BaTiOx (where x is less than 3), BaZrOx (where x is less than 3), HfOx (where x is less than 2), SiOx (where x is less than 2), Si3Nx (where x is less than 4), Nb2Ox (where x is less than 5), Ta2Ox (where x is less than 5), TiOx (where x is less than 2), VOx (where x is less than 2), Y2Ox (where x is less than 3), ZrOx (where x is less than 2), and ZrSiOx (where x is less than 4). Without limitation, second material layer 20 is preferably partially oxidized titanium dioxide (TiOx, where x is less than 2), partially oxidized niobium pentoxide (Nb2Ox, where x is less than 5), partially oxidized tantalum pentoxide (Ta2Ox, where x is less than 5), and partially oxidized vanadium dioxide (VaOx, where x is less than 2). In some embodiments, second material layer 20 is formed of partially oxidized titanium dioxide (TiOx, where x is less than 2)
Put in other terms, second material layer 20 may be partial oxide or nitride that is complementary to the inorganic oxides and/or nitrides of the first material layer. In this context, the partial oxides may be understood to contain or be doped with one or more positively charged oxygen vacancies, and the partial nitrides may be understood to contain or be doped with one or more positively charged nitrogen vacancies. Without limitation, second material layer 20 is preferably a partially oxidized inorganic oxide of titanium, tantalum, niobium, or vanadium, which is complementary to a corresponding oxide used to form first material layer 201 and which contains or is doped with one or more positively charged oxygen vacancies.
As mentioned briefly above, control over the bandgap characteristics of channel 103 may be achieved through the controlled application and/or removal of a force to/from one or more of first material layer 201 and second material layer 201 '. For example and as shown in FIG. 2A, application of a voltage of logic 0 to second gate 105 (Vb =0) and a voltage of logic 1 (e.g., 0.5V) to first gate 104 (Vf = 1) may increase the relative amount and/or alter the distribution of ions/vacancies among first and second material layers 201 and 201 ' . Similar to the above, experiments have demonstrated that application of a voltage in this manner may cause ions/vacancies
(e.g., oxygen or nitrogen ions/vacancies) to migrate/drift from second material layer 20 to first material layer 201. Depending on the relative distribution of such ions/vacancies, TFET 200 may be placed in an ON or OFF state. In the ON state, a relatively large numbers of electrons may tunnel from source 101 through channel 103 when a drain voltage (Vd) of logic 1 and source voltage Vs of 0 are applied. In this way, first and second material layers 201, 201 ' may in some embodiments be understood to respond to an applied voltage in much the same way as a memristor.
This concept is qualitatively illustrated in FIG. 2B, which is a band diagram of TFET 200 in the ON state shown in FIG. 2A. As shown, when a Vf of logic 1 (e.g., about 0.5V) and a Vb of logic 0 are applied, ions/vacancies may drift from second material layer 20 to first material layer 201, reducing the bandgap and/or tunnel barrier height of channel 103. As shown by transparent arrow in FIG. 2B, when a drain voltage Vd of logic 1 and Vs of logic 0 are applied relatively large numbers of electrons may tunnel from source 101 through the relatively low tunnel barrier of channel 103.
Conversely and as shown in FIG. 2C, reversing the polarity of the voltage applied across first and second gates 104, 105 may cause ions/vacancies to drift from first material layer 201 into second material layer 201 ', thereby changing the position of the boundary between layer 201 and layer 201 ', and potentially rendering channel 103 insulating. Application of a voltage in the above manner may cause
ions/vacancies (e.g., oxygen and/or nitrogen vacancies) to drift from first material layer 201 to second material layer 201 ' . This may place TFET 200 in an OFF state, even when Vd of logic 1 and Vs of logic 0 are respectively applied to drain 102 and sources 101.
This concept is further illustrated in FIG. 2D, which is a bandgap diagram of
TFET 200 in the OFF state shown in FIG. 2C. As shown, when a Vf of logic 0 and a Vb of logic 1 (e.g., about 0.5V) are applied, ions/vacancies may drift from first material layer 201 to second material layer 201 ', thereby causing channel 103 to exhibit a relatively large bandgap and/or a relatively high tunnel barrier height which can hinder or prevent the tunneling of electrons from source 101 through channel 103. Indeed in the OFF state, tunneling through channel 103 may be reduced by one or several orders of magnitude, relatively to the same TFET in the ON state (e.g., as shown in FIGS. 2A and 2B). Tunneling of carriers from source 101 through channel
through region 103 in this state may also be significantly reduced relative to a conventional TFET.
As may be appreciated from FIGS. 2B and 2D, the state of channel 103 may be selected and/or controlled through the application and/or removal of a force such as a voltage applied via first and/or second gates 104, 105. When application and/or removal of the force places channel 103 in the ON state, electrons from source 101 only need to tunnel through a relatively thin tunneling barrier as shown in FIG. 2B. As a result, large numbers of electrons may tunnel through source 103 in this state, thereby allowing TFET to exhibit an ON current Ion that is relatively high as compared to a conventional TFET employing a channel formed of undoped semiconductor material. Conversely when application or removal of the force (e.g. the voltage) places channel 103 in the OFF state, channel 103 may exhibit a large bandgap and relatively high tunneling barrier height. As a result, few or no electrons from source 104 may tunnel through channel 103 in this state, thus allowing TFET 200 to exhibit an off current that is relatively low (and potentially zero), compared to a conventional TFET.
FIG. 3 is a graph predicting a relationship of the logarithm of drain current (Id) versus applied gate voltage (Vg) for an example TFET including a channel switched by ion drift consistent with the present disclosure and a conventional TFET including a channel formed of an undoped semiconductor material such as InAs. As shown, the TFET consistent with the present disclosure is expected to have an ON current (Ion2) that is significantly greater than the on current of the conventional TFET, Ioni and an off current Ioff2 that is significantly less than the off current (Ioff exhibited by the conventional TFET, as shown in FIG 3. In summary, the plot in FIG. 3 depicts that in some embodiments, TFETs consistent with the present disclosure may be able to exhibit a desirable combination of low off current and high on current.
As may be appreciated from the foregoing, the TFETs consistent with the present disclosure may be switched from an ON to and OFF state and vice versa by the application and/or removal of a force to/from channel 103, such as a voltage applied via first or second gates 104, 105. With this in mind, the rate at which the TFETs described herein may switch between the ON and OFF state may depend on the rate at which channel 103 may switch between states, which in turn may depend on various factors such as the total thickness of the first and second material layers,
the relative mobility of ions/vacancies within the first and second material layers (i.e., the rate of ion/vacancy drift), other factors, combinations thereof, and the like.
With this in mind, the total thickness of the first and second material layers may range from greater than 0 to about lOOnm, such as about 1 to about 50 nm, or even about 5 to about 15nm. In such instances, the channels described herein may switch between an ON and an OFF state in less than about 1500 picoseconds (ps), such as less than about lOOOps, between about 100 to lOOOps, between about 100 to about 500ps, or even about 200 to about 400ps. Although this may be slower than the switch time of a conventional TFET (which, for example may switch from an ON to OFF state and vice versa in about 50ps), the relatively low off currents and relatively high on currents that may be exhibited by the TFETs described herein may make them particularly useful for low power or other applications. For example, the relatively slow switch time of the TFETs described herein may be leveraged to build circuits that include an "automatic sleep state". Indeed in some embodiments, the voltage at the gates of the TFETS described herein can be charged or discharged by an electric charge through wires faster than the ion/vacancy drift process occurs. If the voltage at the gates is not switched over a number of clock cycles corresponding to the time of ion/vacancy drift, transistor 200 may arrive at the low leakage current state depicted in Figs. 2C and 2B.
The TFETs described herein may also be used to control the operation of downstream electronic components. For example, a TFET consistent with the present disclosure may be placed upstream of other circuit components, such as other transistors, diodes, memory registers, combinations thereof, and the like. In such instances, the operational status of circuit components downstream of the TFET may be switched ON and OFF by selecting the state of channel 103, i.e., by controlling a voltage or other force that may be applied to transition channel 103 from an insulating to a conducting state, or vice versa. In some embodiments once the state of channel 103 is set, the force applied to drive channel 103 to the desired state may be withdrawn without affecting the operation of the TFET or the downstream
components. Because the state of channel 103 may be maintained in the absence of an applied force (e.g., in the absence of an applied voltage), the TFETs described herein can be used as an element of non-volatile computing circuits. In such integrated circuits, the state computational may be maintained even in the absence of power
supplied to a part of such integrated circuit. In order to save on the power
consumption of a computing system, a need may arise to turn off the power supply to this part of the integrated circuit. For non-volatile circuits, there is no need to back-up data within such circuits before such a turn-off, and no need to fetch the data from storage after the turn-off.
Another aspect of the present disclosure relates to TFETS that include a variable bandgap channel that is formed at least in part of a material that exhibits a metal to insulator (MIT) transition, i.e., a transition from a highly conductive to a highly resistive state. Of particular use in the present disclosure are materials that exhibit a MIT that is accompanied by a change in band structure. Non-limiting examples of materials that may exhibit an ΜΓΓ that is accompanied by a change in band structure include Mott insulators. As used herein, the term "Mott insulator" refers to a subset of materials that exhibit an ΜΓΓ and which are expected to be conductive under conventional band theory, but which may become resistive due to electron-electron correlations, e.g., in response to at least one of the application and withdrawal of a force such an electric field.
Non-limiting examples of suitable Mott insulators that may be used in accordance with the present disclosure include V02, chromium doped V203, La2_ xSrxCu04 (where x is less than or equal to 2), RNi03 (where R is one or more rare earth elements selected from lanthanum, cerium, praseodymium, neodymium, promethium, samarium, europium, gadolinium, terbium, dysprosium, holmium, erbium, thulium, ytterbium, lutetium, actinium, thorium, protactinium, uranium, plutonium, americium, berkelium, californium, einsteinium, fermium, mendelevium, nobelium, lawrencium, and combinations thereof), Lai-xSrxMnO:? (where x is less than or equal to 1), and YBa2Cu 07. Without limitation, the Mott insulators preferably exhibit a metal insulator transition at above room temperature.
Reference is now made to FIG. 4, which is a cross sectional block diagram of another example of a TFET consistent with the present disclosure. As shown, TFET 300 includes source 101, drain 102, first gate 104, second gate 105, and gate oxide 106, the nature and function of which is the same as described above in connection with the corresponding parts of FIG. 1. In addition, TFET 300 includes a channel 301 that is formed at least in part of a Mott insulator.
In the illustrated embodiment, channel 301 is between source 101 and drain 102. Moreover, channel 301 is between first gate 104 and second gate 105, such that first gate 104 is proximate a first side (not labeled) of channel 301, and second gate 105 is proximate a second side (not labeled) of channel 103. In the illustrated embodiment, the first and second sides of channel 301 are substantially opposite one another. In any case, all or a portion of each of source 101, gate 102, channel 301, second gate 105, and gate dielectric 106 may be formed on a substrate (not shown). Of course, the structure of TFET 300 in FIG. 4 is for the sake of example only, and it should be understood that TFETs having other geometries/structure may be used.
In some embodiments the operation of TFET 300 may be predicated on the recognition that some Mott insulators (including those noted above) may exhibit a change in band structure in response to at least one of the application or removal of a force such as an electric field. In this regard, it is noted that the change in band structure may in some instances only occur when a Mott insulators is exposed to a critical electric field, i.e., an electric field having an intensity meeting or exceeding the minimum intensity needed to induce the change in band structure.
As noted previously, a conventional TFET may exhibit improved subthreshold slope relative to a MOSFET. As will be described below, use of a variable bandgap channel in a TFET formed at least in part of a Mott insulator can further improve one or both of Ion and the sub-threshold swing of a TFET. Indeed, in some embodiments, the use of a Mott insulator may enable the production of a TFET having higher Ion than a conventional TFET that utilizes a channel formed from undoped semiconductor material and/or a MOSFET, while at the same time exhibiting a lower sub-threshold swing than the conventional TFET and/or MOSFET. For example, use of a Mott insulator to form a variable bandgap channel in a TFET may allow the TFET to achieve higher Ion while simultaneously exhibiting a sub-threshold swing below the 60mV/decade limit exhibited by MOSFETs. This can be forecasted with current understanding of bandgap effect on TFET current-voltage (TV) characteristics.
To illustrate the foregoing concept reference is made to FIG. 5, which depicts
ON and OFF bandgap plots for an example TFET including a variable bandgap channel formed at least in part with a Mott insulator consistent with the present disclosure, and ON and OFF bandgap plots of a TFET including a channel formed
from undoped semiconductor material. In this instance, the considered TFETs had an overall length in the x dimension of 40nm, with a gate and channel length of about 14nm.
As shown, when an electric field having an intensity below that of the critical electric field is applied to the variable bandgap channel (e.g., to the Mott insulator therein), the channel may remain in an OFF state, wherein the bandgap between the valence band and the conduction band in the channel is relatively large. However when an electric field meeting or exceeding the intensity of the critical electric field is applied to the variable bandgap channel, the bandgap between the valence and conduction bands may shrink in portions of the channel that are exposed to the highest intensity electric field. This in turn may cause a decrease in the bandgap between the conduction band of source 101 and the valence band of channel 301. As a result large numbers of electrons may tunnel from the conduction band of source 101 into the valence band of channel 301 when channel 301 is in the ON state.
For the sake of example and ease of understanding, the present disclosure will proceed to describe an example TFET that include a variable bandgap channel formed from a Mott insulator, wherein the total length of the TFET in the X axis is 40nm and the channel and gate lengths are each about 14nm. In this instance, the variable bandgap channel of the TFET may be turned ON by the application of an electric field proximate the junction of the source and channels. The magnitude of the electric filed may depend on the applied gate, drain and source voltages. Because the device body is thin and symmetric in this example, the perpendicular electric field is small in the example device and the total electric filed is dominated by the lateral electric field. As shown in FIG. 6, the intensity of the absolute lateral electric field may exceed the critical electric field (set for the sake of illustrate at -0.7V in this example) at or near the junction of the source and channel.
Returning now to FIG. 5, it can be seen that when the Mott insulator forming channel 301 is exposed to an electric field exceeding the critical electric field (such as the one described in FIG. 6), at least a portion of the channel may turn ON and significant narrowing of the bandgap of the channel may be exhibited at or near the source/channel interface. Moreover, the gap between the conduction band of the source and the valence band of the channel may also narrow. As a result large numbers of electrons may tunnel through the channel to the drain in this state, as depicted by the transparent arrow in that plot.
In contrast, the plot in FIG. 5 for the conventional TFET indicates that even when its undoped semiconductor channel is in an ON state, the bandgap within the channel remains relatively large, and the gap between the conduction band of the source and the valence band of the channel also remains relatively large. Comparison of the plots of FIG. 5 suggests that a TFET employing a Mott insulator in its channel may permit greater tunneling than a conventional TFET at a given bias voltage.
This also suggests that a TFET employing a Mott insulator in its channel may exhibit on currents Ion that are greater than the on current of a conventional TFET at a given driving voltage. In this regard, FIG. 7 is graph depicting a estimated
relationship of the logarithm of drain current (Id) versus applied gate voltage (Vg) for an example TFET including a channel formed at least in part of a Mott insulator, and a conventional TFET including a channel formed of InAs. As shown, the TFET including a Mott insulator in the channel is expected to exhibit an ON current (Ion4) that is greater than the on current of the conventional TFET, Ion3. Indeed, the forecast suggests that Ion4 may be 10 to 100 times greater (or more) than Ion2. In addition, the TFET including the Mott insulator in its channel is expected to have an off current Ioff4 that is less than the off current (Ioff ) in the conventional TFET. In sum, the forecast plotted in FIG. 7 demonstrates that in some embodiments, TFETs including a Mott insulator in their channel may be able to exhibit desirable a combination of low off current and high on current, relative to a conventional TFET including a undoped semiconductor material in the channel.
Another aspect of the present disclosure relates to methods of forming TFETs consistent with the present disclosure. In this regard reference is made to FIG. 8, which is a flow diagram of example operations that may be performed in connection with a method of making a TFET consistent with the present disclosure. It should be understood that the method steps shown are illustrated in a particular order for the sake of clarity, but that in practice they may be performed in any order depending on the geometry and configuration of the TFET being formed.
As shown in FIG. 8, method 800 begins at block 801. At block 802, a first gate may be formed on a substrate, which may be made of silicon or another suitable material. The formation of the first gate may be performed using any suitable semiconductor manufacturing technique, including various forms of deposition (e.g., chemical vapor deposition, physical vapor deposition, sputtering, atomic layer deposition, electrodeposition, electroless deposition, etc.), as may be known in the art.
In some embodiments and as shown in various FIGS, the first gate may be formed at a location proximate lower surface of a variable bandgap channel. In any case the first gate may be separated from the variable bandgap channel by a gate oxide, which may be deposited or otherwise formed over a surface of a first gate.
Prior to or subsequent the formation of the first gate, the method may proceed to block 803, wherein a variable bandgap channel may be formed. In instances where the variable bandgap channel is to be located above a gate, the variable bandgap channel may be formed on a first gate, such as the first gate formed pursuant to block 802. Regardless of when it is formed, the variable bandgap channel may be configured to exhibit a change in its bandgap characteristics in response to at least one of an application or withdrawal of an applied force, as generally described above. Accordingly, formation of the variable bandgap channel may involve depositing or otherwise forming first and second material layers that may collectively exhibit (e.g., via ion/carrier drift) a change in bandgap characteristics (e.g., tunnel barrier height) in response to an applied voltage, as generally described above. Alternatively or additionally, formation of the variable bandgap channel may involve the deposition or other formation of a Mott insulator. In any case, formation of the variable bandgap channel may be performed using any suitable semiconductor manufacturing process, including various deposition processes ((e.g., chemical vapor deposition, physical vapor deposition, sputtering, atomic layer deposition, electrodeposition, electroless deposition, etc.) as may be known in the art.
Prior to or subsequent the formation of the variable bandgap channel and/or first gate, the method may proceed to block 804, wherein a source and drain consistent with the foregoing description may be formed. In general, the source and drain may be formed at a location proximate the variable bandgap channel. In this regard, formation of the source and drain may proceed by depositing or growing suitable semiconductor materials (such as those described above) using any suitable semiconductor manufacturing process. Such materials may be intrinsic
semiconductors, or may be doped during or after their initiation formation to become extrinsic p or n type semiconductors, as desired. Such doping may be performed using well known processes in the art, such as but not limited to diffusion and ion implantation. In some embodiments of the present disclosure, a source and drain are formed proximate to first and second sides, respectively, of a variable bandgap channel.
At this point the method may proceed to block 806 and end or, if a second gate is used, the method may proceed to optional block 805, wherein a second gate consistent with the present disclosure may be performed. The nature and manner of forming the second gate is the same as that of the first gate, and for the sake of brevity will not be reiterated. In some embodiments and as illustrated in various FIGS., the second gate may be formed on or proximate to an upper surface of a variable bandgap channel. Like the first gate, the second gate may be separated from the variable bandgap channel by gate oxide, which may have been previously deposited or otherwise formed on the variable bandgap channel.
The terms and expressions which have been employed herein are used as terms of description and not of limitation, and there is no intention, in the use of such terms and expressions, of excluding any equivalents of the features shown and described (or portions thereof), and it is recognized that various modifications are possible within the scope of the claims. Accordingly, the claims are intended to cover all such equivalents. Various features, aspects, and embodiments have been described herein. The features, aspects, and embodiments are susceptible to combination with one another as well as to variation and modification, as will be understood by those having skill in the art. The present disclosure should, therefore, be considered to encompass such combinations, variations, and modifications.