WO2015139201A1

WO2015139201A1 - Simplified illumination compensation in multi-view and 3d video coding

Info

Publication number: WO2015139201A1
Application number: PCT/CN2014/073608
Authority: WO
Inventors: Kai Zhang; Jicheng An; Xianguo Zhang; Han HUANG
Original assignee: Mediatek Singapore Pte. Ltd.
Priority date: 2014-03-18
Filing date: 2014-03-18
Publication date: 2015-09-24

Abstract

It is proposed to further reduce the complexity of IC by simplifying the training process of IC. The number of training pairs is constrained and the training process is different for different components.

Description

SIMPLIFIED ILLUMINATION COMPENSATION IN

MULTI-VIEW AND 3D VIDEO CODING

TECHNICAL FIELD

[0001] The invention relates generally to Three-Dimensional (3D) video processing. In particular, the presented invention relates to illumination compensation (IC).

BACKGROUND

[0002] In the current 3D-HEVC [1], illumination compensation (IC) is adopted to compensate the difference of illumination intensity between views.

[0003] When IC is applied, the prediction value y is calculated as y = a*x+b, where x is a sample value in the reference block in the reference view. The two parameters a and b are derived (or named as 'trained') with the neighboring reconstructed samples of the current block and the reference block as depicted Fig. 1.

[0004] In the training process as specified in HEVC, a neighboring sample x, of the reference block and a neighboring sample^ of the current block which possess the same relative position as depicted in Fig.2 are treated as a training pair. To reduce the number of training pairs, only one of each two adjacent samples are involved in the training set. Fig. 2, Fig. 3 and Fig. 4 demonstrate the neighboring samples when the block sizes are 8x8, 16x16 and 32x32 respectively.

[0005] The number of training pairs is proportional to the block size. For example, there are 8 training pairs for a 8x8 block and 64 training pairs for a 64x64 block Thus the training process will be more complex for larger blocks.

[0006] IC is applied to each component such as Y (Luma), U (Cb), and V (Cr) separately. The training process is also executed separately. The parameters a and b are training independently for each component. SUMMARY

[0007] In light of the previously described problems, methods are proposed to simplify IC.

[0008] Other aspects and features of the invention will become apparent to those with ordinary skill in the art upon review of the following descriptions of specific embodiments.

BRIEF DESCRIPTION OF DRAWINGS

The invention can be more fully understood by reading the subsequent detailed description and examples with references made to the accompanying drawings, wherein:

[0009] Fig. 1 is a diagram illustrating a general IC paradigm in the current 3D- HEVC;

[0010] Fig. 2 is a diagram illustrating training samples from neighboring samples of the reference block (labeled as 'x for left neighboring samples and 'χ^,' for above neighboring samples) and from neighboring samples of the current block (labeled as ' >V for left neighboring samples and 'y for above neighboring samples);

[0011] Fig. 3 is a diagram illustrating training samples (black) from neighboring samples of the reference block or the current block when the block size is 16 X 16;

[0012] Fig. 4 is a diagram illustrating training samples (black) from neighboring samples of the reference block or the current block when the block size is 32 X 32;

[0013] Fig. 5 is a diagram illustrating to select one training samples (black) from each four neighboring samples of the reference block or the current block when the block size is 32 X 32;

[0014] Fig. 6 is a diagram illustrating to involve the first 8 samples as the training samples (black) from the above and left neighboring samples of the reference block or the current block when the block size is 32 X 32 and P=L=\6;

[0015] Fig. 7 is a diagram illustrating to Involve the one sample from each two in the first 8 samples as the training samples (black) from the above and left neighboring samples of the reference block or the current block when the block size is 32x32 and P=L=8.

DETAILED DESCRIPTION [0016] The following description is of the best-contemplated mode of carrying out the invention. This description is made for the purpose of illustrating the general principles of the invention and should not be taken in a limiting sense. The scope of the invention is best determined by reference to the appended claims.

[0017]It is proposed to further reduce the complexity of IC by simplifying the training process of IC.

[0018] In one embodiment, the number of training pairs P is constrained not to be larger than a largest number L no matter how large the block size is. For example, the largest number L can be 4, 8, 16, or 32.

[0019] In another embodiment, the selected samples in the training process are the same to the original design in HEVC if the number of training pairs required by the original design, noted as C, is equal or smaller to L. Otherwise, the samples in the training process are selected in a different way to the original design.

[0020] In another embodiment, P/2 samples from the above and left neighboring samples are involved in the training process when the number of training pairs is P, no matter C is larger than L or not.

[0021]In another embodiment, only one of each N adjacent samples are involved in the training set, where N > 2. Fig. 5 demonstrates an example in which one sample from each four adjacent samples is selected into the training set.

[0022] In still another embodiment, only one of each N adjacent samples are involved in the training set, where N depends on the block size of the current block. For example, if the current block size if XM, then N is decided as N=max(2, /8). In a general example, N is decided as N=max(2, 2*M/L), where L is the largest number of training pairs involved in the training process.

[0023] In still another embodiment, only the first P/2 adjacent samples in the left or above neighboring samples are involved in the training set, where P is the number of training pairs involved in the training process. Fig. 6 demonstrates an example in which the first 8 samples are involved as the training samples (black) from the above and left neighboring samples of the reference block or the current block when the block size is 32 X 32 and P=L=\6.

[0024] In still another embodiment, only one of each N adjacent samples in the first P/2 adjacent samples in the left or above neighboring samples are involved in the training set, where P is the number of training pairs involved in the training process. For example, N can be 2. Fig. 7 demonstrates an example in which the one sample from each two in the first 8 samples as the training are involved as the training samples (black) from the above and left neighboring samples of the reference block or the current block when the block size is 32 X 32 and P=L=\6.

[0025] In still another embodiment, IC should be applied in different way for different component, such as Y, U and V.

[0026] In still another embodiment, IC is not applied to components U and V.

[0027] In still another embodiment, the training process in components U and V, is not executed. IC is applied to components U and V with the parameters derived by the component Y.

[0028] In still another embodiment, the training process in the component U is not executed. IC is applied to the component U with the parameters derived by the component V.

[0029] In still another embodiment, the training process in the component V is not executed. IC is applied to the component V with the parameters derived by the component U.

[0030] In still another embodiment, the number of training pairs in the training process for components U and V is smaller that the number of training pairs in the training process for the component Y for the same block size. For example, there are 16 training pairs for a 32 X 32 Y block is but there are 8 training pairs for a 32 X 32 U or V block.

[0031] The methods described above can be used in a video encoder as well as in a video decoder. Embodiments of disparity vector derivation methods according to the present invention as described above may be implemented in various hardware, software codes, or a combination of both. For example, an embodiment of the present invention can be a circuit integrated into a video compression chip or program codes integrated into video compression software to perform the processing described herein. An embodiment of the present invention may also be program codes to be executed on a Digital Signal Processor (DSP) to perform the processing described herein. The invention may also involve a number of functions to be performed by a computer processor, a digital signal processor, a microprocessor, or field programmable gate array (FPGA). These processors can be configured to perform particular tasks according to the invention, by executing machine-readable software code or firmware code that defines the particular methods embodied by the invention. The software code or firmware codes may be developed in different programming languages and different format or style. The software code may also be compiled for different target platform. However, different code formats, styles and languages of software codes and other means of configuring code to perform the tasks in accordance with the invention will not depart from the spirit and scope of the invention.

[0032] The invention may be embodied in other specific forms without departing from its spirit or essential characteristics. The described examples are to be considered in all respects only as illustrative and not restrictive. To the contrary, it is intended to cover various modifications and similar arrangements (as would be apparent to those skilled in the art). Therefore, the scope of the appended claims should be accorded the broadest interpretation so as to encompass all such modifications and similar arrangements.

Claims

1. A method to reduce the complexity of illumination compensation (IC) by simplifying a training process of IC, comprising,

constraining a number of training pairs P not to be larger than a largest number L no matter the block size;

applying illumination compensation in different way for different components.

2. The method as claimed in claim 1, wherein selected samples in the training process are predetermined if the number of training pairs required by an original design, noted as C, is equal or smaller to L; otherwise, the samples in the training process are selected in a different way to the original design.

3. The method as claimed in claim 1 and claim 2, wherein P/2 samples from the above and left neighboring samples are involved in the training process when the number of training pairs is P, no matter C is larger than L or not.

4. The method as claimed in claim 1, wherein only one of each N adjacent samples are involved in a training set.

5. The method as claimed in claim 4, wherein where N> 2.

6. The method as claimed in claim 4, wherein N depend on a block size of a current block.

7. The method as claimed in claim4, wherein N is decided as N=max(2, MIL) if a current block size if XM, where L is the largest number of training pairs involved in the training process.

8. The method as claimed in claim 1, wherein only first P/2 adjacent samples in left or above neighboring samples are involved in the training set, where P is the number of training pairs involved in the training process.

9. The method as claimed in claim 1, wherein only one of each N adjacent samples in first P/2 adjacent samples in left or above neighboring samples are involved in the training set, where P is the number of training pairs involved in the training process, and N depend on a block size of a current block.

10. The method as claimed in claim 1, wherein the training process in components U and V is not executed, and IC is applied to the components U and V with parameters derived by component Y.

11. The method as claimed in claim 1, wherein the training process in component U is not executed, and IC is applied to the component U with parameters derived by component V.

12. The method as claimed in claim 1, wherein the training process in the component V is not executed, and IC is applied to the component V with parameters derived by component U.

13. The method as claimed in claim 1, wherein the number of training pairs in the training process for components U and V is smaller that the number of training pairs in the training process for component Y for the same block size.

14. The method as claimed in claim 1, wherein different components comprise components R, G and B or any other components.