WO2015135569A1 - Récapitulation optimale pour un concept d'élément de calcul de chemin (pce) - Google Patents

Récapitulation optimale pour un concept d'élément de calcul de chemin (pce) Download PDF

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Publication number
WO2015135569A1
WO2015135569A1 PCT/EP2014/054632 EP2014054632W WO2015135569A1 WO 2015135569 A1 WO2015135569 A1 WO 2015135569A1 EP 2014054632 W EP2014054632 W EP 2014054632W WO 2015135569 A1 WO2015135569 A1 WO 2015135569A1
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WO
WIPO (PCT)
Prior art keywords
network node
summarization
pce
path computation
domain
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PCT/EP2014/054632
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English (en)
Inventor
Franz Rambach
Cyril Margaria
Svetoslav Duhovnikov
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Nokia Solutions And Networks Gmbh & Co Kg
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Priority to PCT/EP2014/054632 priority Critical patent/WO2015135569A1/fr
Publication of WO2015135569A1 publication Critical patent/WO2015135569A1/fr

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L45/00—Routing or path finding of packets in data switching networks
    • H04L45/42—Centralised routing
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L45/00—Routing or path finding of packets in data switching networks
    • H04L45/20—Hop count for routing purposes, e.g. TTL

Definitions

  • the present invention relates to apparatuses, methods, systems, computer programs, computer program products and computer-readable media regarding the optimal summarization of the path computation element (PCE) concept.
  • PCE path computation element
  • a Path Computation Element is an entity that is capable of computing a network path or route based on a network graph, and of applying computational constraints during the computation.
  • the PCE entity is an application that can be located within a network node or component, on an out-of- network server, etc.
  • a PCE would be able to compute the path of a TE LSP (Traffic Engineering Label Switched Path) by operating on the TED (Traffic Engineering Database) and considering bandwidth and other constraints applicable to the TE LSP service reguest (cf. document [1]) .
  • TE LSP Traffic Engineering Label Switched Path
  • LSPs Label Switched Paths
  • MPLS-TE MultiPath Label Switching
  • GPLS Generalized MPLS
  • PCE Path Computation Element
  • PCE solutions for multi-domain (MD) path computation is the hierarchical PCE concept.
  • a parent PCE has some abstract view of its child domains and of the interconnection between them.
  • Each child PCE is responsible for its own domain.
  • the ingress PCE sends a reguest to the parent PCE (using the path computation element protocol, PCEP [RFC5440]).
  • the parent PCE selects a set of candidate domain paths based on the domain topology and the state of the inter-domain links. It then sends computation reguests to the child PCEs responsible for each of the domains on the candidate domain paths " .
  • each child PCE computes a set of candidate path segments across its domain and sends the results to the parent PCE.
  • the parent PCE uses this information to select path segments and concatenate them to derive the optimal end-to-end inter-domain path.
  • the end-to- end path is then sent to the child PCE which received the initial path request and this passes the path on to the PCC that issues the original request" (cf. document [2]).
  • Fig. 1 illustrates a principle of the hierarchical PCE operation .
  • a parent PCE 11 orchestrates a plurality of child PCEs, e.g. three child PCEs 12 to 14 in the example shown in Fig. 1.
  • Each child PCE 12 to 14 performs a domain- specific path computation. Hence, path computation is faster as it operates on a smaller network size.
  • the parent PCE includes a path computation client (PCC) that requests a path computation to be performed by the PCE.
  • PCC path computation client
  • the child PCE 12 to 14 receives the path computation request (PCReq) from the parent PCE and responds with a path computation reply (PCRep) .
  • the child PCE 12 may send a PCReq to the parent PCE 11.
  • Another possibility how to compute a MD path is to use peering PCEs.
  • Each PCE is responsible for one domain.
  • the different PCEs peer i.e. they collaborate to compute a MD path, e.g. they use the Backward-Recursive PCE-Based Computation (BRPC) BRPC algorithm (cf. document [3]) .
  • BRPC Backward-Recursive PCE-Based Computation
  • To use the BRPC algorithm it is required that the domain sequence is known in advance. Therefore, each PCEs must know the reachability of the domains for which the different PCEs are responsible.
  • One option to communicate this information is to run on the PCE level some sort of Open Shortest Path First (OSPF) (-TE), which communicates which domains can be reached from each individual PCE domain. Usinq this information, each PCE has reachability information, i.e. it knows throuqh which domains it can reach a tarqet domain.
  • OSPF Open Shortest Path First
  • the PCEs do not only share this reachability information, but they share similar to the hierarchical PCE concept some summarized view to the other PCEs. Based on this information the PCEs can compute a more optimal domain sequence.
  • the problem is that the child PCE has to somehow summarize its own topology and resource due to confidentiality and sends this summarized information to the parent PCE.
  • a summarization algorithm can optimize the computed abstract view only to one metric, e.g. delay. There is no summarization available, which gives an optimal view for all possible criteria to be optimized and be requested by a PCC.
  • a method comprising: receiving a request message including a request for domain summarization information from a first network node at a second network node,
  • the request message being capable of requesting the second network node to provide domain summarization information with respect to at least two criteria, and performing, at the second network node, a summarization algorithm according to the request message, and
  • an apparatus for use in first network node comprising at least one processor, and at least one memory for storing instructions to be executed by the processor, wherein the at least one memory and the instructions are configured to, with the at least one processor, cause the apparatus at least to perform a method as defined in any one of the above aspects .
  • an apparatus for use in second network node comprising at least one processor, and at least one memory for storing instructions to be executed by the processor, wherein the at least one memory and the instructions are configured to, with the at least one processor, cause the apparatus at least to perform a method as defined in any one of the above aspects .
  • an apparatus comprising means for composing, at a first network node, a request message including a request for domain summarization information from a second network node, means for the request message being capable of requesting the second network node to provide domain summarization information with respect to at least two criteria, and means for transmitting, by the first network node, the request message to the second network node.
  • an apparatus comprising:
  • the request message being capable of requesting the second network node to provide domain summarization information with respect to at least two criteria, and means for performing, at the second network node, a summarization algorithm according to the reguest message, and means for transmitting, by the second network node, a response message including the summarization result to the first network node.
  • a computer program product comprising code means adapted to produce steps of any of the methods as described above when loaded into the memory of a computer.
  • a computer program product as defined above, wherein the computer program product comprises a computer-readable medium on which the software code portions are stored.
  • Fig. 1 is a diagram illustrating a principle of an
  • Fig. 2 is a diagram illustrating an example of a format of a notification object
  • Fig. 3 is a diagram illustrating an example of a modified format of a metric object according to example versions of the present invention
  • Fig. 4 is a flowchart illustrating an example of a method according to example versions of the present invention.
  • Fig. 5 is a flowchart illustrating another example of a method according to example versions of the present invention.
  • Fig. 6 is a diagram illustrating an example of an apparatus according to example versions of the present invention.
  • the parent PCE can reguest different information from the child PCEs, i.e. it can request different abstract views from the child PCE. This can be realized either if the parent PCE specifies the summarization algorithms to be used or it sends parameters to the child PCE, which should be used in the summarization algorithm. This can result that different summarization algorithms are used for the parent PCE by the child PCE.
  • the parent PCE can request several topologies with several different summarization criteria from the child PCE. Examples for such criteria are to optimize the summarization regarding load, delay or diversity of links. This allows on the one hand that the child keeps the topology confidential. On the other hand the PCE has a view on optimized topologies for different criteria .
  • the parent PCE has knowledge about the diversity of abstract links inside abstract nodes and between abstract nodes, it can compute more efficient and hence faster optimal possible domain chains. This is due to the fact that the parent PCE does not need to ask the child PCEs, if they can provide diverse routes inside their domains.
  • the just described mechanism can also be applied to the peering PCE mechanism.
  • the different PCEs request, as just described for the parent PCE, from the other PCEs an abstract view which is optimized to some specified parameter.
  • the PCEs have an abstract metric optimized MD view.
  • the corresponding information can be sent either via an extended OSPF-TE or via PCNtf (PCEP Notification) messages as explained in the following for the hierarchical PCE concept.
  • the parent PCE After the connection establishment between the parent PCE and the child PCE, the parent PCE reguests domain information using e.g. PCNtf messages.
  • the child PCC runs a summarization algorithm and sends the computed information to parent PCE using e.g. PCNtf messages.
  • Child PCE sends automatically updates to parent PCE (Push-Mode )
  • Parent PCE has to actively reguest update information, i.e. it has to check each time it performs a path computation, if information is up to date.
  • the Pull-Mode can be used, if only a single reguest or reguests, which occur guite rarely, reguire the topology optimized for the specified criteria.
  • the parent PCE can indicate inside the message, in which it reguests the child topology, if the child PCE should perform the automatic update or not. Note that with the just described approach it is still possible that the child PCC sends information as soon as PCEP connection is established - as indicated in document [5], section 3.3. "Then the child PCE can report all of the domain connectivity information to the parent PCE when the PCEP session is established successfully.”
  • the notification object includes the fields "Reserved”, “Flags”, “NT”, and "NV" defined as follows ( cf . document [ 4 ] ) :
  • Flags (8 bits) : No flags are currently defined. Unassigned flags MUST be set to zero on transmission and MUST be ignored on receipt .
  • NT Notification Type - 8 bits
  • the Notification-type specifies the class of notification.
  • NV Notification Value - 8 bits
  • the notification object may include optional TLVs (type length values) .
  • the parent PCE wants that the topology is optimized with respect to a certain criteria, it sends the corresponding objective function decoded inside a metric object (see document [4]) as a TLV in a message for TED discovery, which is the notification object in the case of PCEP .
  • a new objective function i.e. a new value for T, must be specified.
  • the metric object includes a "T" (Type-) field consisting of 8 bits which specifies the metric type to be optomized.
  • the U-flag indicates to the child PCE, if it should perform the automatic update or not.
  • the metric object according to example versions of the present invention is shown in Fig. 3.
  • This metric object basically corresponds to the definition shown in document [4], whereas additionally the U-flag is introduced.
  • the child PCE that sends information to PCE will be described.
  • the child PCE sends the information to the parent PCE.
  • a metric object is included in the notification object to indicate regarding which objective function the topology was optimized. It is possible that multiple metric objects are included to indicate that the topology was optimized regarding multi-objective functions .
  • the objects defined for OSPF for LSA should be included in the notification object as further TLVs .
  • the reguired LSAs are the Router-LSA and Link-LSA, which are described in RFC2328, RFC3630.
  • the needed GMPLS extensions are described in RFC4203. Note that RFC5787 describes the overall concept and also the corresponding objects to propagate an abstract topology to another entity.
  • this invention can also be applied to the MD scenario, in which PCEs peer.
  • the OSPF Hello packet can be extended to include the TLV containing the metrics reguested (in the reguest) and supported (in the reply) .
  • the Parent PCE can then reguest as many adjacencies as different summarization it needs.
  • example versions of the present invention have been described in detail with respect to the hierarchical PCE concept and the peering PCE concept. In the following, a more general description of example versions of the present invention is made with respect to Figs. 4 to 6.
  • Fig. 4 is a flowchart illustrating an example of a method according to example versions of the present invention.
  • the method may be implemented in a first network node, like e.g. a parent PCE or reguesting PCE, and comprises composing, at the first network node, a reguest message including a reguest for domain summarization information from a second network node in a step S41.
  • the reguest message is capable of reguesting the second network node to provide domain summarization information with respect to at least two criteria.
  • the method comprises transmitting, by the first network node, the reguest message to the second network node in a step S42.
  • the request message includes an indication about a summarization algorithm to be used by the second network node.
  • the request message includes an indication about parameters corresponding to the criteria to be used in a summarization algorithm by the second network node .
  • the criteria include hop count, load on links, delay, diversity of links and the like.
  • the request message further includes a flag indicating whether the second network node is requested to perform automatic update .
  • the first network node is a parent path computation element and the second network node is a child path computation element in an hierarchical path computation element concept.
  • the first network node and the second network node are peering path computation elements in an peering path computation element concept .
  • Fig. 5 is a flowchart illustrating another example of a method according to example versions of the present invention .
  • the method may be implemented in a second network node, like e.g. a child PCE or responding PCE, and comprises receiving a request message including a request for domain summarization information from a first network node at the second network node in a step S51.
  • the request message is capable of requesting the second network node to provide domain summarization information with respect to at least two criteria.
  • the method comprises performing, at the second network node, a summarization algorithm according to the request message in a step S52, and transmitting, by the second network node, a response message including the summarization result to the first network node in a step S53.
  • the request message includes an indication about the summarization algorithm to be used by the second network node.
  • the request message includes an indication about parameters corresponding to the criteria to be used in the summarization algorithm by the second network node.
  • the criteria include hop count load on links, delay, diversity of links and the like.
  • the request message further includes a flag indicating whether the second network node is requested to perform automatic update.
  • the method further comprises, if the flag is set, performing, at the second network node, an automatic update of the summarization information and transmitting the updated summarization information to the first network node.
  • the method further comprises, if the flag is not set, performing the update of the summarization information only upon reguest by the first network node.
  • the first network node is a parent path computation element and the second network node is a child path computation element in an hierarchical path computation element concept.
  • the first network node and the second network node are peering path computation elements in an peering path computation element concept .
  • Fig. 6 is a block diagram showing an example of an apparatus according to example versions of the present invention.
  • a block circuit diagram illustrating a configuration of an apparatus 60 is shown, which is configured to implement the above described aspects of the invention.
  • the apparatus 60 shown in Fig. 6 may comprise several further elements or functions besides those described herein below, which are omitted herein for the sake of simplicity as they are not essential for understanding the invention.
  • the apparatus may be also another device having a similar function, such as a chipset, a chip, a module etc., which can also be part of an apparatus or attached as a separate element to the apparatus, or the like.
  • the apparatus 60 may comprise a processing function or processor 61, such as a CPU or the like, which executes instructions given by programs or the like related to the flow control mechanism.
  • the processor 61 may comprise one or more processing portions dedicated to specific processing as described below, or the processing may be run in a single processor. Portions for executing such specific processing may be also provided as discrete elements or within one or more further processors or processing portions, such as in one physical processor like a CPU or in several physical entities, for example.
  • Reference sign 62 denotes transceiver or input/output (I/O) units (interfaces) connected to the processor 61.
  • the I/O units 62 may be used for communicating with one or more other network elements, entities, terminals or the like.
  • the I/O units 62 may be a combined unit comprising communication eguipment towards several network elements, or may comprise a distributed structure with a plurality of different interfaces for different network elements.
  • Reference sign 63 denotes a memory usable, for example, for storing data and programs to be executed by the processor 61 and/or as a working storage of the processor 61.
  • the processor 61 is configured to execute processing related to the above described aspects.
  • the apparatus 60 may be implemented in or may be part of a first network node, like e.g. a requesting PCE or parent PCE, and may be configured to perform a method as described in connection with Fig. 4.
  • the processor 61 is configured to perform composing, at a first network node, a request message including a request for domain summarization information from a second network node, the request message being capable of requesting the second network node to provide domain summarization information with respect to at least two criteria, and transmitting, by the first network node, the request message to the second network node.
  • the apparatus 60 may be implemented in or may be part of a second network node and may be configured to perform a method as described in connection with Fig. 5.
  • the processor 61 is configured to perform receiving a request message including a request for domain summarization information from a first network node at a second network node, the request message being capable of requesting the second network node to provide domain summarization information with respect to at least two criteria, and performing, at the second network node, a summarization algorithm according to the request message, and transmitting, by the second network node, a response message including the summarization result to the first network node.
  • the operator still ensures confidentiality, since the parent PCE has still no detailed topology information of the child domains .
  • the operator can differentiate itself from other operators
  • the apparatus (or some other means) is configured to perform some function
  • this is to be construed to be eguivalent to a description stating that a (i.e. at least one) processor or corresponding circuitry, potentially in cooperation with computer program code stored in the memory of the respective apparatus, is configured to cause the apparatus to perform at least the thus mentioned function.
  • function is to be construed to be eguivalently implementable by specifically configured circuitry or means for performing the respective function (i.e. the expression "unit configured to” is construed to be eguivalent to an expression such as "means for”) .
  • any method step is suitable to be implemented as software or by hardware without changing the idea of the aspects/embodiments and its modification in terms of the functionality implemented;
  • CMOS Complementary MOS
  • BiMOS Bipolar MOS
  • BiCMOS Bipolar CMOS
  • ECL emitter Coupled Logic
  • TTL Transistor-Transistor Logic
  • ASIC Application Specific IC
  • FPGA Field-programmable Gate Arrays
  • CPLD Complex Programmable Logic Device
  • DSP Digital Signal Processor
  • - devices, units or means can be implemented as individual devices, units or means, but this does not exclude that they are implemented in a distributed fashion throughout the system, as long as the functionality of the device, unit or means is preserved;
  • an apparatus may be represented by a semiconductor chip, a chipset, or a (hardware) module comprising such chip or chipset; this, however, does not exclude the possibility that a functionality of an apparatus or module, instead of being hardware implemented, be implemented as software in a (software) module such as a computer program or a computer program product comprising executable software code portions for execution/being run on a processor; - a device may be regarded as an apparatus or as an assembly of more than one apparatus, whether functionally in cooperation with each other or functionally independently of each other but in a same device housing, for example.
  • respective functional blocks or elements according to above-described aspects can be implemented by any known means, either in hardware and/or software, respectively, if it is only adapted to perform the described functions of the respective parts.
  • the mentioned method steps can be realized in individual functional blocks or by individual devices, or one or more of the method steps can be realized in a single functional block or by a single device .
  • any method step is suitable to be implemented as software or by hardware without changing the idea of the present invention.
  • Devices and means can be implemented as individual devices, but this does not exclude that they are implemented in a distributed fashion throughout the system, as long as the functionality of the device is preserved. Such and similar principles are to be considered as known to a skilled person .
  • Software in the sense of the present description comprises software code as such comprising code means or portions or a computer program or a computer program product for performing the respective functions, as well as software (or a computer program or a computer program product) embodied on a tangible medium such as a computer-readable (storage) medium having stored thereon a respective data structure or code means /portions or embodied in a signal or in a chip, potentially during processing thereof.

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  • Computer Networks & Wireless Communication (AREA)
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Abstract

La présente invention concerne un procédé, un appareil et un produit programme d'ordinateur pour la récapitulation optimale du concept d'élément de calcul de chemin (PCE). La présente invention consiste à composer, au niveau d'un premier nœud de réseau, un message de requête comprenant une requête d'informations de récapitulation de domaine provenant d'un second nœud de réseau, le message de requête étant capable de demander au second nœud de réseau de fournir des informations de récapitulation de domaine par rapport à au moins deux critères, et à transmettre, par le premier nœud de réseau, le message de requête au second nœud de réseau.
PCT/EP2014/054632 2014-03-11 2014-03-11 Récapitulation optimale pour un concept d'élément de calcul de chemin (pce) WO2015135569A1 (fr)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2018006850A1 (fr) 2016-07-06 2018-01-11 Huawei Technologies Co., Ltd. Connexions et accès destiné à un élément de calcul de chemin hiérarchique (pce)

Citations (1)

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Publication number Priority date Publication date Assignee Title
WO2011103913A1 (fr) * 2010-02-23 2011-09-01 Telefonaktiebolaget L M Ericsson (Publ) Réduction dans un réseau à plusieurs domaines

Patent Citations (1)

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Publication number Priority date Publication date Assignee Title
WO2011103913A1 (fr) * 2010-02-23 2011-09-01 Telefonaktiebolaget L M Ericsson (Publ) Réduction dans un réseau à plusieurs domaines

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2018006850A1 (fr) 2016-07-06 2018-01-11 Huawei Technologies Co., Ltd. Connexions et accès destiné à un élément de calcul de chemin hiérarchique (pce)
EP3472981A4 (fr) * 2016-07-06 2019-04-24 Huawei Technologies Co., Ltd. Connexions et accès destiné à un élément de calcul de chemin hiérarchique (pce)
US10728098B2 (en) 2016-07-06 2020-07-28 Futurewei Technologies, Inc. Connections and accesses for hierarchical path computation element (PCE)
US11405283B2 (en) 2016-07-06 2022-08-02 Futurewei Technologies, Inc. Connections and accesses for hierarchical path computation element (PCE)
EP4207701A3 (fr) * 2016-07-06 2023-07-26 Huawei Technologies Co., Ltd. Connexions et accès pour élément de calcul de trajet hiérarchique (pce)
US11909596B2 (en) 2016-07-06 2024-02-20 Futurewei Technologies, Inc. Connections and accesses for hierarchical path computation element (PCE)

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