WO2015117950A1 - Ac floating voltage source for push-pull amplifier stage - Google Patents

Ac floating voltage source for push-pull amplifier stage Download PDF

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Publication number
WO2015117950A1
WO2015117950A1 PCT/EP2015/052180 EP2015052180W WO2015117950A1 WO 2015117950 A1 WO2015117950 A1 WO 2015117950A1 EP 2015052180 W EP2015052180 W EP 2015052180W WO 2015117950 A1 WO2015117950 A1 WO 2015117950A1
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WIPO (PCT)
Prior art keywords
transistor
source
node
voltage
current
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PCT/EP2015/052180
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French (fr)
Inventor
Russell Fagg
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Nujira Limited
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Publication of WO2015117950A1 publication Critical patent/WO2015117950A1/en

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Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F1/00Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/30Modifications of amplifiers to reduce influence of variations of temperature or supply voltage or other physical parameters
    • H03F1/307Modifications of amplifiers to reduce influence of variations of temperature or supply voltage or other physical parameters in push-pull amplifiers
    • H03F1/308Modifications of amplifiers to reduce influence of variations of temperature or supply voltage or other physical parameters in push-pull amplifiers using MOSFET
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F3/00Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/30Single-ended push-pull [SEPP] amplifiers; Phase-splitters therefor
    • H03F3/3001Single-ended push-pull [SEPP] amplifiers; Phase-splitters therefor with field-effect transistors
    • H03F3/3008Bifet SEPP output stages
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F3/00Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/30Single-ended push-pull [SEPP] amplifiers; Phase-splitters therefor
    • H03F3/3001Single-ended push-pull [SEPP] amplifiers; Phase-splitters therefor with field-effect transistors
    • H03F3/3022CMOS common source output SEPP amplifiers
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F3/00Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/30Single-ended push-pull [SEPP] amplifiers; Phase-splitters therefor
    • H03F3/3001Single-ended push-pull [SEPP] amplifiers; Phase-splitters therefor with field-effect transistors
    • H03F3/3022CMOS common source output SEPP amplifiers
    • H03F3/3023CMOS common source output SEPP amplifiers with asymmetrical driving of the end stage
    • H03F3/3025CMOS common source output SEPP amplifiers with asymmetrical driving of the end stage using a common drain driving stage, i.e. follower stage
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F2200/00Indexing scheme relating to amplifiers
    • H03F2200/447Indexing scheme relating to amplifiers the amplifier being protected to temperature influence
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F2200/00Indexing scheme relating to amplifiers
    • H03F2200/453Controlling being realised by adding a replica circuit or by using one among multiple identical circuits as a replica circuit
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F2200/00Indexing scheme relating to amplifiers
    • H03F2200/456A scaled replica of a transistor being present in an amplifier
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F2203/00Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/30Indexing scheme relating to single-ended push-pull [SEPP]; Phase-splitters therefor
    • H03F2203/30063A differential amplifier being used in the bias circuit or in the control circuit of the SEPP-amplifier

Definitions

  • the present invention relates to a floating voltage source to provide an ideal voltage offset between push-pull output devices of a Class AB amplifier .
  • a floating voltage source may be advantageously utilised in an amplification stage of an envelope tracking power amplifier system.
  • Envelope tracking power amplifier systems are known in the art, and generally comprise the provision of an input signal to be amplified on an RF input path to a signal input of a power amplifier, and an envelope path for generating a modulated power supply based on the input signal, with the modulated power supply being provided to a power supply input of the power amplifier .
  • Efficient, low noise, high bandwidth amplifiers are typically used in envelope tracking systems . To maximise efficiency and reduce quiescent power consumption, these amplifiers typically utilise a class AB mode of biasing .
  • a floating voltage source is an important component of high efficiency, linear class AB amplifiers that are required to provide high gain across very wide bandwidths to minimise the noise and spurious signal output of the voltage supply modulator .
  • a floating voltage source is to provide an ideal voltage offset between the push-pull transistors of the output stage of a class AB amplifier, specifically the PMOS and NMOS output devices of the output stage of a class AB amplifier .
  • Reference numeral 202 illustrates the output stage of a class AB amplifier, including an NMOS CMOS transistor 206 and a PMOS CMOS transistor 20 .
  • the transistor 204 is connected between a power supply V DD and an output line 212.
  • the transistor 206 is connected between the output line 212 and electrical ground .
  • the output line 212 provides the output voltage V 0 of the class AB amplifier, which is delivered to a load and denoted in Figure 1 by a capacitor 208 followed by a series connected load 210 connected to electrical ground .
  • the transistor 204 has a signal line 214 connected to its gate and the transistor 206 has a signal line 216 connected to its gate .
  • a feedback signal line 218 is connected to the output signal line 212 between the transistor 204 and 206, and provides a non-inverting input to a difference amplifier 226.
  • the difference amplifier 226 receives an "input demand" signal at its inverting input .
  • the output of the difference amplifier 226 forms the signal to the input line 21 .
  • a feedback resistor is connected across the amplifier 226, between its output and its non-inverting input on line 218 ,
  • the amplifier 226 in combination with the resistor 228 form a feedback amplifier 224.
  • the output of the amplifier 226 additionally forms a gate signal input to a transistor 220, which is connected between the supply voltage VDD and a floating voltage source 50.
  • the other terminal of the floating voltage source 50 is connected to one terminal of a current source 222 , having its other terminal connected to electrical ground.
  • the first terminal of the current source 222 provides the input signal on line 216.
  • the feedback amplifier 224 is used to control the transistor 220 so as to control the signal on the input line 216 of the transistor 206.
  • the input demand' is the input to the feedback amplifier 224 , which is an error amplifier .
  • the error provided by the error amplifier 224 is applied equally to the gates of transistors 204 and 206.
  • the error is level shifted by the transistor 220, the floating voltage source 50 , and the current source 222.
  • the floating voltage source 50 of Figure 1 should ideally have zero impedance and zero time delay across all frequencies .
  • Figure 2 shows a typical implementation of a prior art floating voltage source .
  • reference numerals denote elements which are similar to those shown in Figure 1 , like reference numerals are used .
  • a current source 250 having a first terminal connected to electrical ground and a second terminal connected to the signal line 214 provides a PMOS drive signal .
  • a current source 254 having a first terminal connected to electrical ground and a second terminal connected to the signal line 216 comprises an NMOS drive signal .
  • An ideal floating voltage source 258 is provided between the signal lines 214 and 216.
  • a resistor 252 is connected between the supply voltage VDD and the line 214,
  • a resistor 256 is connected between the line 216 and electrical ground .
  • Figure 2 shows two drives for the NMOS and PMOS transistors of the Class AB output stage .
  • the drive values of the NMOS and PMOS transistors of the output stage are similar, because the two inputs must track each other to avoid distortion .
  • the conventional floating voltage source requires careful matching of the PMOS and NMOS paths to achieve coherent operation of the NMOS device 206 and the PMOS device 204, and requires a sophisticated biasing network to obtain satisfactory operation over process , temperature and supply voltage ranges .
  • the conventional floating voltage source such as illustrated in Figure 2 limits the amplifier topology to a current mode of operation .
  • a floating voltage source connected between the input terminals of first and second output transistors of a push-pull output stage of a Class ⁇ amplifier, comprising : transconductance circuitry for converting a drive voltage to a first transistor of the output stage to a first current flowing in a first node ; current conveyer circuitry for maintaining the first node at a fixed voltage determined by a reference signal, and for conveying the first current to a second node; transresi stance circuitry for establishing a second voltage at the second node in dependence on the current flowing in the second node, the second node providing an input to a second transistor of the output stage .
  • the reciprocal of the transconductance value of the transconductance circuitry may be equal to the transresi stance value of the transresistance circuitry.
  • the transconductance circuitry may include a first transistor .
  • the first transistor may be a source follower transistor .
  • the first transistor may have a gate connected to the drive voltage, a source connected to the first node, and a drain connected to a supply voltage .
  • the current conveyor circuitry may comprise a second transistor connecting the first node to the second node, such that the current flowing in the second node corresponds to the current flowing in the first node, and the voltage of the second node is independent of the voltage of the first node .
  • the source of the second transistor may be connected to the first node and the drain of the second transistor is connected to the second node .
  • the current conveyor circuitry may comprise a third transistor having a gate connected to the second node, wherein the gate of the second transistor is connected to the drain of the third transistor, and the drain of the third transistor is further connected to a current source, the reference signal being applied to the source of the third transistor .
  • the transresistance circuitry may comprise a fourth transistor having a gate and drain connected to the second node, and a source connected to electrical ground .
  • the first node may be a virtual earth .
  • the reference signal may represent the desired voltage at the output of the Class AB amplifier in the absence of input signal .
  • the floating voltage source may further comprise reference circuitry for generating the reference signal and for stabilizing a quiescent bias of the output stage over temperature .
  • the reference circuitry may be adapted to track the sum of voltage changes with respect to temperature of gate voltage to source voltage of the first transistor of the output stage and the gate to source voltage of the transconductance stage .
  • the reference circuitry may comprise: a first scaled replica transistor matching the first transistor of the output stage, having a source connected to the supply and a drain connected to a first current source; a second scaled replica transistor matching the source follower transistor, having a drain connected to the supply, having a gate connected to the gate of the first replica transistor, and a source connected to a second current source ; and a differential amplifier having a negative input connected to a reference voltage, a positive input connected to the drain of the first replica transistor, and an output connected to the gate of the first replica transistor, wherein the reference signal is provided at the source of the second replica transistor .
  • the first current source may be used to set the quiescent bias of the first and second transistors of the output stage and the second current source is set to track the current of the source follower transistor .
  • the floating voltage source may further comprise steering circuitry, wherein the steering circuitry receives the reference signal from the reference circuitry, and provides a correcting current to the current conveyor circuitry to fix the voltage at the first node in dependence on the reference signal .
  • FIG. 1 illustrates an ideal AC floating voltage source
  • Figure 2 i llustrates a typical prior art implementation of a floating voltage source
  • FIG. 3 illustrates an improved floating voltage source
  • Figure 4 illustrates an envelope tracking power amplification system including a power amplifier in which an AC floating voltage source may be advantageously utilised .
  • the AC floating voltage source comprises a reference circuit 306, an OTA (operational transconductance amplifier) 304 , and a floating voltage source 302. Also shown in Figure 3 is the output stage of a class AB amplifier comprising first and second output transistors .
  • an input or drive voltage is provided on line 214, which may be provided by the amplifier 224 of Figure 1.
  • the amplifier 224 of Figure 1 may be provided in the Figure 3 arrangement .
  • the transistor 220 of Figure 1 may be implemented in Figure 3 as transistor 308
  • the current source 222 of Figure 1 may be implemented in Figure 3 as transistor 311.
  • transistors 204 and 206 of Figures 1 and 2 comprising the transistors of the output stage of a Class AB amplifier .
  • the first and second transistors are connected in a push-pull arrangement .
  • capacitor 208 and the load 210 are also illustrated in Figure 3 .
  • the transistor 204 receives the input or drive signal on line 214 at its gate, and the transistor 206 receives a signal on line 216 at its gate .
  • the signal on line 216 is derived from the input signal on line 214 through the floating voltage source 302.
  • the floating voltage source 302 comprises transconductance circuitry, current conveyor circuitry, and transresistance circuitry ,
  • the transconductance circuitry preferably includes a transistor, preferably a source follower transistor 308.
  • the current conveyor circuitry preferably includes a transistor 310.
  • the current conveyor circuitry preferably includes a transistor 312.
  • the transresistance circuitry preferably includes a transistor 311 ,
  • the transcondcutance circuitry is for converting the drive voltage on the signal line 214 to the first transistor 204 to a first current flowing in a first node .
  • the first node may be a virtual earth .
  • the first node is at the source of transistor 308.
  • the current conveyor circuitry is for maintaining the first node at a fixed voltage determined by a reference signal , and for conveying the first current to a second node .
  • the second node is at the input of the second transistor of the Class AB amplifier output stage, the gate of transistor 206 in Figure 3.
  • the current conveyor comprises the transistor 310 connecting the first node to the second node, such that the current flowing in the second node corresponds to the current flowing in the first node, and the voltage of the second node is independent of the voltage of the first node .
  • the current conveyor comprises the transistor 312 having a gate connected to the second node, wherein the gate of the transistor 310 is connected to the drain of the transistor 312, and the drain of the transistor 312 is connected to the current source 31 , the reference signal being applied to the source of the transistor 312.
  • the transresistance circuitry is for establishing a second voltage at the second node in dependence on the current flowing in the second node .
  • the unity voltage gain may be achieved by the reciprocal of the transconductance value of the transconductance circuitry being made equal to the transresistance value of the transresistance circuitry .
  • FIG. 3 illustrates the exemplary implementation of the t ansconductance circuitry, current conveyor circuitry and transresistance circuitry .
  • the transistor 308 is source- follower connected, and has its gate connected to the line 214.
  • the drain of the transistor 308 is connected to the supply voltage V DD .
  • the source of transistor 308 is connected to the source of transistor 310.
  • the drain of transistor 310 is connected to the drain of transistor 311, which has its source connected to electrical ground, and its gate connected to its drain such that the transistor 311 is diode-connected .
  • the drain and gate of the transistor 311 are connected to the signal line 216.
  • the gate of transistor 310 is connected to the drain of transistor 312 , and the drain of transistor 312 is connected to a first terminal of a current source 314, which has a second terminal connected to electrical ground .
  • the source of transistor 312 is connected to a line 313.
  • the current source 316 of the floating voltage source has a first terminal connected to the supply voltage V DD and a second terminal connected to the line 313.
  • the operational transconductance amplifier (OTA) 304 is optional , and comprises a transistor 318 , and transistors 322 and 323.
  • the transistor 318 has a source connected to the line 313, and a drain connected to the drain of transistor 322.
  • the transistors 322 and 323 are connected together as denoted by reference numeral 324.
  • the gates of the transistor 322 and 323 are connected together and connected to the drain of transistor 322.
  • the source of transistor 322 is connected to the drain of transistor 323 , and the source of transistor 323 is connected to electrical ground .
  • the gate of transistor 318 is connected to a line 317.
  • the optional OTA 304 is provided as steering circuitry to receive the reference signal from reference circuitry, as discussed further hereinbelo , and for providing a corrected current to the current conveyor circuitry to fix the voltage at the first node in dependence on the reference signal .
  • the reference circuit for generating the reference signal .
  • the reference circuit preferably generates the reference signal for stabilising a quiescent bias of the output stage over temperature .
  • the reference circuitry is preferably adapted to track the sum of voltage changes with respect to temperature of the gate to source voltage of the first transistor 204 of the output stage and the gate to source voltage of the transconductance stage .
  • the reference circuit preferably includes a first scaled replica transistor 334 matching the first output transistor 20 .
  • the reference circuit preferably also includes a second scaled replica transistor 336 matching the source follower transistor 308.
  • the reference circuit 306 preferably includes the transistor 334, the transistor 336, a difference amplifier 330, a reference source 332 , a current source 326 and a current source 328.
  • the transistor 334 has a source connected to the supply voltage ⁇ DD and a drain connected to a first terminal of the current source 326. ⁇ second terminal of the current source 326 is connected to electrical ground .
  • the transistor 336 has a drain connected to the supply voltage VDD, and a source connected to a first terminal of the current source 328.
  • a current source 328 has a second terminal connected to electrical ground.
  • the gate of the transistor 334 is connected to the gate of the transistor 336.
  • the difference amplifier has a non-inverting input connected to the drain of the transistor 334, and an output connected to the gates of the transistors 334 and 336.
  • the inverting input of the transistor 330 is connected to one terminal of the source voltage 332, the other terminal of the source voltage being connected to electrical ground .
  • the source of the transistor 336 provides a signal on line 317.
  • the input voltage is applied on line 214 to the gate of transistor 204, and also is applied to the gate of transistor 308.
  • the source of transistor 308 acts as a virtual earth .
  • the transistor 312 turns off, the gate potential of transistor 310 drops, transistor 310 turns off, and the voltage applied on line 216 increases .
  • the reference circuit 306 matches DC conditions of the output stage . It is desired to have a certain current in the output stage, and the N and P transistors to sit at certain voltages .
  • the reference voltage Vref provided by the voltage source 332 preferably represents the desired voltage at the output of the Class AB amplifier in the absence of input signal . In essence, Vref sets the quiescent voltage of the amplifier, and the current source 326 sets the quiescent output current .
  • the current source 326 sets the current in the transistor 334.
  • the transistor 334 preferably has the same current density as the transistor 204 of the output stage.
  • the transistors 336 and 308 have the same current densities .
  • the optional OTA makes sure that the current densities are correctly set in the output stage.
  • the OTA is used to make voltages at gates of transistors 318 and 312 are identical (i.e. sources of 336 and 308 ) . This means the current densities of transistors 336 and 308 are the same .
  • the OTA is optional .
  • the transistor 334 is a scaled replica of the PMOS CMOS transistor 204 in the output stage of the class AB amplifier .
  • the difference amplifier 330 sets the gate of the replica transistors 334 and 336 equal to a desired quiescent output voltage of the class AB stage, which is denoted VREF.
  • the difference amplifier 330 compa es the signal on the drain of the transistor 334 to a voltage which corresponds to VREF, and provides the difference to the gates of the transistors 334 and 336.
  • the source follower transistor 336 of the reference circuit 306 is biased at the same current density as the transistor 308 of the floating voltage source 302.
  • the voltage at the source of the device 336 is then provided as the reference voltage for the OTA section 304 , which provides current steering for the floating voltage source 302.
  • the OTA section 304 compares the voltage at the source of the replica NMOS transistor 336 which is provided on line 317 with that of the voltage at the source of the transistor 308 of the floating voltage source 302. A correcting current is then steered into the transistor device 312.
  • the floating voltage source 302 conveys the amplifier' s input demand to the NMOS half of the class AB output stage .
  • the PMOS transistors 312 and 310 are configured as a current controlled current source such that the source of the transistor 308 acts as a virtual earth . In this way, if the transconductances of the source follower transistor 308 and the diode connected transistor 311 are matched, then there will be unity voltage gain between the gate of the source follower transistor 308 and the gate of the NMOS output device provided by transistor 206.
  • the value of current source 328 is 3 ⁇ 4 slaved' to the value of current source 326 as transistor 336 needs to operate with the same current density as transistor 308 , the current in which is in turn related to the output stage current by the ratio of the sizes of the output transistor 206 and ' diode connected' transistor 34.
  • the values of the current sources 316 and 314 will be implementation dependent .
  • the current source 34 may be preferably set to be approximately 50% of the value of current source 316.
  • the input voltage applied to the gate of transistor 308 is derived from the amplifier ' s feedback path, and is not shown in Figure 3.
  • RF envelope tracking power amplifier system including a power amplifier, which power amplifier may be adapted to include the advantageous current conveyor of Figure 3.
  • RF radio frequency
  • an RF input signal on line 408 provides an input to an RF amplifier 402, which provides an amplifier RF output signal on line 410.
  • An envelope shaping stage 404 receives the input signal on line 408, and provides an envelope of the input signal to a supply modulator 406.
  • the supply modulator includes a first path including an amplifier 412 for providing a main supply voltage .
  • the amplifier 412 may select between switched supply levels .
  • the supply modulator includes a second path including an error amplifier 414.
  • the outputs of the amplifiers 412 and 414 are combined in a combiner 16.
  • the output of the combiner 416 provides a second input to the error amplifier 414.
  • the output of the combiner 416 forms the output of the supply modulator 406, and provides the modulated supply voltage to the amplifier 402.
  • the invention has been described by way of example with application to an implementation in which the drive signal is provided to the PMOS transistor 204. However the invention is equally applicable to an arrangement in which the drive signal is applied to the NMOS transistor 206.
  • CMOS complementary metal-oxide-semiconductor
  • the invention may also be implemented as a bipolar configuration, with the CMOS devices suitably changed for bipolar devices .

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Amplifiers (AREA)

Abstract

There is disclosed a floating voltage source (302) connected between the input terminals of first (204) and second (206) output transistors of an output stage of a Class AB amplifier, comprising: transconductance circuitry (308) for converting a drive voltage to a first transistor (204) of the output stage to a first current flowing in a first node; current conveyer circuitry (310, 312) for maintaining the first node at a fixed voltage determined by a reference signal, and for conveying the first current to a second node; transresistance circuitry (311) for establishing a second voltage at the second node in dependence on the current flowing in the second node, the second node providing an input to a second transistor (206) of the output stage.

Description

AC FLOATING VOLTAGE SOURCE FOR PUSH-PULL AMPLIFIER STAGE
BACKGROUND TO THE INVENTION: Field of the Invention :
The present invention relates to a floating voltage source to provide an ideal voltage offset between push-pull output devices of a Class AB amplifier . Such a floating voltage source may be advantageously utilised in an amplification stage of an envelope tracking power amplifier system.
Background to the Invention :
Envelope tracking power amplifier systems are known in the art, and generally comprise the provision of an input signal to be amplified on an RF input path to a signal input of a power amplifier, and an envelope path for generating a modulated power supply based on the input signal, with the modulated power supply being provided to a power supply input of the power amplifier .
Efficient, low noise, high bandwidth amplifiers are typically used in envelope tracking systems . To maximise efficiency and reduce quiescent power consumption, these amplifiers typically utilise a class AB mode of biasing .
A floating voltage source is an important component of high efficiency, linear class AB amplifiers that are required to provide high gain across very wide bandwidths to minimise the noise and spurious signal output of the voltage supply modulator .
The purpose of a floating voltage source is to provide an ideal voltage offset between the push-pull transistors of the output stage of a class AB amplifier, specifically the PMOS and NMOS output devices of the output stage of a class AB amplifier .
With reference to Figure 1, there is illustrated an ideal AC floating voltage source for the output stage of a class AB amplifier .
Reference numeral 202 illustrates the output stage of a class AB amplifier, including an NMOS CMOS transistor 206 and a PMOS CMOS transistor 20 . The transistor 204 is connected between a power supply VDD and an output line 212. The transistor 206 is connected between the output line 212 and electrical ground . The output line 212 provides the output voltage V0 of the class AB amplifier, which is delivered to a load and denoted in Figure 1 by a capacitor 208 followed by a series connected load 210 connected to electrical ground . The transistor 204 has a signal line 214 connected to its gate and the transistor 206 has a signal line 216 connected to its gate .
A feedback signal line 218 is connected to the output signal line 212 between the transistor 204 and 206, and provides a non-inverting input to a difference amplifier 226. The difference amplifier 226 receives an "input demand" signal at its inverting input . The output of the difference amplifier 226 forms the signal to the input line 21 . A feedback resistor is connected across the amplifier 226, between its output and its non-inverting input on line 218 , The amplifier 226 in combination with the resistor 228 form a feedback amplifier 224.
The output of the amplifier 226 additionally forms a gate signal input to a transistor 220, which is connected between the supply voltage VDD and a floating voltage source 50. The other terminal of the floating voltage source 50 is connected to one terminal of a current source 222 , having its other terminal connected to electrical ground. The first terminal of the current source 222 provides the input signal on line 216.
The feedback amplifier 224 is used to control the transistor 220 so as to control the signal on the input line 216 of the transistor 206.
The input demand' is the input to the feedback amplifier 224 , which is an error amplifier . The error provided by the error amplifier 224 is applied equally to the gates of transistors 204 and 206. For the amplifier 206, the error is level shifted by the transistor 220, the floating voltage source 50 , and the current source 222.
The floating voltage source 50 of Figure 1 should ideally have zero impedance and zero time delay across all frequencies .
Conventional floating voltage sources are limited to use with a current mode input from the preceding stage, and do not convey the AC signal to be applied to the gate of the class AB output stage NMOS CMOS device 206. This can be illustrated in Figure 2.
Figure 2 shows a typical implementation of a prior art floating voltage source . Where reference numerals denote elements which are similar to those shown in Figure 1 , like reference numerals are used .
A current source 250 having a first terminal connected to electrical ground and a second terminal connected to the signal line 214 provides a PMOS drive signal . A current source 254 having a first terminal connected to electrical ground and a second terminal connected to the signal line 216 comprises an NMOS drive signal . An ideal floating voltage source 258 is provided between the signal lines 214 and 216. A resistor 252 is connected between the supply voltage VDD and the line 214, A resistor 256 is connected between the line 216 and electrical ground .
Figure 2 shows two drives for the NMOS and PMOS transistors of the Class AB output stage . The drive values of the NMOS and PMOS transistors of the output stage are similar, because the two inputs must track each other to avoid distortion .
The conventional floating voltage source requires careful matching of the PMOS and NMOS paths to achieve coherent operation of the NMOS device 206 and the PMOS device 204, and requires a sophisticated biasing network to obtain satisfactory operation over process , temperature and supply voltage ranges .
In an amplifier where high gain across a wide bandwidth is advantageous , the conventional floating voltage source such as illustrated in Figure 2 limits the amplifier topology to a current mode of operation .
Thus conventional floating voltage sources are limited to current mode architectures and do not convey the AC signal to the NMOS half of the class AB output stage . Because of the requirement to maintain a coherent match between the PMOS and NMOS output stage gate signals, signal processing operations such as current multiplication to boost the gain of the amplifier are difficult to implement .
These current mode amplifier sections , operating with a conventional floating voltage source, would then require an excess of current to provide adequate gain across a wide bandwidth, and they increase complexity, increase power consumption and increase die area .
It is an aim of the present invention to provide an improved AC floating voltage source . SUMMARY OF THE INVENTION;
There is provided a floating voltage source connected between the input terminals of first and second output transistors of a push-pull output stage of a Class ΆΒ amplifier, comprising : transconductance circuitry for converting a drive voltage to a first transistor of the output stage to a first current flowing in a first node ; current conveyer circuitry for maintaining the first node at a fixed voltage determined by a reference signal, and for conveying the first current to a second node; transresi stance circuitry for establishing a second voltage at the second node in dependence on the current flowing in the second node, the second node providing an input to a second transistor of the output stage .
There may be unity voltage gain between the first and second nodes . The reciprocal of the transconductance value of the transconductance circuitry may be equal to the transresi stance value of the transresistance circuitry.
The transconductance circuitry may include a first transistor . The first transistor may be a source follower transistor . The first transistor may have a gate connected to the drive voltage, a source connected to the first node, and a drain connected to a supply voltage .
The current conveyor circuitry may comprise a second transistor connecting the first node to the second node, such that the current flowing in the second node corresponds to the current flowing in the first node, and the voltage of the second node is independent of the voltage of the first node . The source of the second transistor may be connected to the first node and the drain of the second transistor is connected to the second node . The current conveyor circuitry may comprise a third transistor having a gate connected to the second node, wherein the gate of the second transistor is connected to the drain of the third transistor, and the drain of the third transistor is further connected to a current source, the reference signal being applied to the source of the third transistor .
The transresistance circuitry may comprise a fourth transistor having a gate and drain connected to the second node, and a source connected to electrical ground .
The first node may be a virtual earth .
The reference signal may represent the desired voltage at the output of the Class AB amplifier in the absence of input signal . The floating voltage source may further comprise reference circuitry for generating the reference signal and for stabilizing a quiescent bias of the output stage over temperature .
The reference circuitry may be adapted to track the sum of voltage changes with respect to temperature of gate voltage to source voltage of the first transistor of the output stage and the gate to source voltage of the transconductance stage .
The reference circuitry may comprise: a first scaled replica transistor matching the first transistor of the output stage, having a source connected to the supply and a drain connected to a first current source; a second scaled replica transistor matching the source follower transistor, having a drain connected to the supply, having a gate connected to the gate of the first replica transistor, and a source connected to a second current source ; and a differential amplifier having a negative input connected to a reference voltage, a positive input connected to the drain of the first replica transistor, and an output connected to the gate of the first replica transistor, wherein the reference signal is provided at the source of the second replica transistor . The first current source may be used to set the quiescent bias of the first and second transistors of the output stage and the second current source is set to track the current of the source follower transistor .
The floating voltage source may further comprise steering circuitry, wherein the steering circuitry receives the reference signal from the reference circuitry, and provides a correcting current to the current conveyor circuitry to fix the voltage at the first node in dependence on the reference signal .
BRIEF DESCRIPTION OF THE FIGURES :
The present invention is now described by way of example with reference to the Figures , in which :
Figure 1 illustrates an ideal AC floating voltage source;
Figure 2 i llustrates a typical prior art implementation of a floating voltage source;
Figure 3 illustrates an improved floating voltage source; and
Figure 4 illustrates an envelope tracking power amplification system including a power amplifier in which an AC floating voltage source may be advantageously utilised .
BRIEF DESCRIPTION OF THE PREFERRED EMBODIMENTS :
The present invention is now described by way of reference to preferred examples and preferred implementations . However one skilled in the art will appreciate that the present invention is not limited to its application to the specific examples as set out hereinbelo .
With reference to Figure 3 there is illustrated an AC floating voltage source in accordance with a preferred implementation .
The AC floating voltage source comprises a reference circuit 306, an OTA (operational transconductance amplifier) 304 , and a floating voltage source 302. Also shown in Figure 3 is the output stage of a class AB amplifier comprising first and second output transistors .
In the Figure 3 arrangement an input or drive voltage is provided on line 214, which may be provided by the amplifier 224 of Figure 1. Although not shown in Figure 3 for reasons of clarity, the amplifier 224 of Figure 1 may be provided in the Figure 3 arrangement . With further reference to Figures 1 and 3, the transistor 220 of Figure 1 may be implemented in Figure 3 as transistor 308 , and the current source 222 of Figure 1 may be implemented in Figure 3 as transistor 311.
With further reference to Figure 3 there is illustrated the transistors 204 and 206 of Figures 1 and 2 comprising the transistors of the output stage of a Class AB amplifier . The first and second transistors are connected in a push-pull arrangement . Also illustrated in Figure 3 are the capacitor 208 and the load 210 connected to the output of the Class AB amplifier .
The transistor 204 receives the input or drive signal on line 214 at its gate, and the transistor 206 receives a signal on line 216 at its gate . The signal on line 216 is derived from the input signal on line 214 through the floating voltage source 302.
The floating voltage source 302 comprises transconductance circuitry, current conveyor circuitry, and transresistance circuitry ,
The transconductance circuitry preferably includes a transistor, preferably a source follower transistor 308. The current conveyor circuitry preferably includes a transistor 310. The current conveyor circuitry preferably includes a transistor 312. The transresistance circuitry preferably includes a transistor 311 ,
The transcondcutance circuitry is for converting the drive voltage on the signal line 214 to the first transistor 204 to a first current flowing in a first node . The first node may be a virtual earth . The first node is at the source of transistor 308.
The current conveyor circuitry is for maintaining the first node at a fixed voltage determined by a reference signal , and for conveying the first current to a second node . The second node is at the input of the second transistor of the Class AB amplifier output stage, the gate of transistor 206 in Figure 3. Preferably the current conveyor comprises the transistor 310 connecting the first node to the second node, such that the current flowing in the second node corresponds to the current flowing in the first node, and the voltage of the second node is independent of the voltage of the first node . Preferably the current conveyor comprises the transistor 312 having a gate connected to the second node, wherein the gate of the transistor 310 is connected to the drain of the transistor 312, and the drain of the transistor 312 is connected to the current source 31 , the reference signal being applied to the source of the transistor 312.
The transresistance circuitry is for establishing a second voltage at the second node in dependence on the current flowing in the second node . Preferably there is unity voltage gain between the first and second nodes. The unity voltage gain may be achieved by the reciprocal of the transconductance value of the transconductance circuitry being made equal to the transresistance value of the transresistance circuitry .
Figure 3 illustrates the exemplary implementation of the t ansconductance circuitry, current conveyor circuitry and transresistance circuitry . The transistor 308 is source- follower connected, and has its gate connected to the line 214. The drain of the transistor 308 is connected to the supply voltage VDD. The source of transistor 308 is connected to the source of transistor 310. The drain of transistor 310 is connected to the drain of transistor 311, which has its source connected to electrical ground, and its gate connected to its drain such that the transistor 311 is diode-connected . The drain and gate of the transistor 311 are connected to the signal line 216. The gate of transistor 310 is connected to the drain of transistor 312 , and the drain of transistor 312 is connected to a first terminal of a current source 314, which has a second terminal connected to electrical ground . The source of transistor 312 is connected to a line 313. The current source 316 of the floating voltage source has a first terminal connected to the supply voltage VDD and a second terminal connected to the line 313.
The operational transconductance amplifier (OTA) 304 is optional , and comprises a transistor 318 , and transistors 322 and 323. The transistor 318 has a source connected to the line 313, and a drain connected to the drain of transistor 322. The transistors 322 and 323 are connected together as denoted by reference numeral 324. The gates of the transistor 322 and 323 are connected together and connected to the drain of transistor 322. The source of transistor 322 is connected to the drain of transistor 323 , and the source of transistor 323 is connected to electrical ground . The gate of transistor 318 is connected to a line 317. The optional OTA 304 is provided as steering circuitry to receive the reference signal from reference circuitry, as discussed further hereinbelo , and for providing a corrected current to the current conveyor circuitry to fix the voltage at the first node in dependence on the reference signal .
There is preferably provided a reference circuit for generating the reference signal . The reference circuit preferably generates the reference signal for stabilising a quiescent bias of the output stage over temperature .
The reference circuitry is preferably adapted to track the sum of voltage changes with respect to temperature of the gate to source voltage of the first transistor 204 of the output stage and the gate to source voltage of the transconductance stage .
The reference circuit preferably includes a first scaled replica transistor 334 matching the first output transistor 20 . The reference circuit preferably also includes a second scaled replica transistor 336 matching the source follower transistor 308.
The reference circuit 306 preferably includes the transistor 334, the transistor 336, a difference amplifier 330, a reference source 332 , a current source 326 and a current source 328. The transistor 334 has a source connected to the supply voltage ¥DD and a drain connected to a first terminal of the current source 326. Ά second terminal of the current source 326 is connected to electrical ground . The transistor 336 has a drain connected to the supply voltage VDD, and a source connected to a first terminal of the current source 328. A current source 328 has a second terminal connected to electrical ground. The gate of the transistor 334 is connected to the gate of the transistor 336. The difference amplifier has a non-inverting input connected to the drain of the transistor 334, and an output connected to the gates of the transistors 334 and 336. The inverting input of the transistor 330 is connected to one terminal of the source voltage 332, the other terminal of the source voltage being connected to electrical ground . The source of the transistor 336 provides a signal on line 317.
The operation of the exemplary circuit of Figure 3 can be summarised as follows .
The input voltage is applied on line 214 to the gate of transistor 204, and also is applied to the gate of transistor 308.
The source of transistor 308 acts as a virtual earth . As the input voltage on line 214 increases , the transistor 312 turns off, the gate potential of transistor 310 drops, transistor 310 turns off, and the voltage applied on line 216 increases ,
It is needed to control the voltage of the NMOS transistor 206 to implement DC quiescent current .
The reference circuit 306 matches DC conditions of the output stage . It is desired to have a certain current in the output stage, and the N and P transistors to sit at certain voltages .
The reference voltage Vref provided by the voltage source 332 preferably represents the desired voltage at the output of the Class AB amplifier in the absence of input signal . In essence, Vref sets the quiescent voltage of the amplifier, and the current source 326 sets the quiescent output current . The current source 326 sets the current in the transistor 334. The transistor 334 preferably has the same current density as the transistor 204 of the output stage.
The transistors 336 and 308 have the same current densities .
The optional OTA makes sure that the current densities are correctly set in the output stage. The OTA is used to make voltages at gates of transistors 318 and 312 are identical (i.e. sources of 336 and 308 ) . This means the current densities of transistors 336 and 308 are the same . The OTA is optional .
The transistor 334 is a scaled replica of the PMOS CMOS transistor 204 in the output stage of the class AB amplifier . The difference amplifier 330 sets the gate of the replica transistors 334 and 336 equal to a desired quiescent output voltage of the class AB stage, which is denoted VREF. In order to do this, the difference amplifier 330 compa es the signal on the drain of the transistor 334 to a voltage which corresponds to VREF, and provides the difference to the gates of the transistors 334 and 336.
The source follower transistor 336 of the reference circuit 306 is biased at the same current density as the transistor 308 of the floating voltage source 302. The voltage at the source of the device 336 is then provided as the reference voltage for the OTA section 304 , which provides current steering for the floating voltage source 302.
The OTA section 304 compares the voltage at the source of the replica NMOS transistor 336 which is provided on line 317 with that of the voltage at the source of the transistor 308 of the floating voltage source 302. A correcting current is then steered into the transistor device 312.
This ensures the quiescent bias conditions of the reference circuit 306, transistor 336 and of the transistor 308 are identical . In this way, the current flowing in the floating voltage sources diode-connected transistor device 311 and the output NMOS CMOS transistor 206 of the class AB amplifier output stage are controlled .
The floating voltage source 302 conveys the amplifier' s input demand to the NMOS half of the class AB output stage . The PMOS transistors 312 and 310 are configured as a current controlled current source such that the source of the transistor 308 acts as a virtual earth . In this way, if the transconductances of the source follower transistor 308 and the diode connected transistor 311 are matched, then there will be unity voltage gain between the gate of the source follower transistor 308 and the gate of the NMOS output device provided by transistor 206.
The value of current source 328 is ¾ slaved' to the value of current source 326 as transistor 336 needs to operate with the same current density as transistor 308 , the current in which is in turn related to the output stage current by the ratio of the sizes of the output transistor 206 and ' diode connected' transistor 34.
The values of the current sources 316 and 314 will be implementation dependent . The current source 34 may be preferably set to be approximately 50% of the value of current source 316.
The input voltage applied to the gate of transistor 308 is derived from the amplifier ' s feedback path, and is not shown in Figure 3.
With reference to Figure , there is illustrated the architecture of a radio frequency (RF) envelope tracking power amplifier system including a power amplifier, which power amplifier may be adapted to include the advantageous current conveyor of Figure 3.
As exemplified in Figure , an RF input signal on line 408 provides an input to an RF amplifier 402, which provides an amplifier RF output signal on line 410. An envelope shaping stage 404 receives the input signal on line 408, and provides an envelope of the input signal to a supply modulator 406. The supply modulator includes a first path including an amplifier 412 for providing a main supply voltage . The amplifier 412 may select between switched supply levels . The supply modulator includes a second path including an error amplifier 414. The outputs of the amplifiers 412 and 414 are combined in a combiner 16. The output of the combiner 416 provides a second input to the error amplifier 414. The output of the combiner 416 forms the output of the supply modulator 406, and provides the modulated supply voltage to the amplifier 402.
The invention has been described by way of example with application to an implementation in which the drive signal is provided to the PMOS transistor 204. However the invention is equally applicable to an arrangement in which the drive signal is applied to the NMOS transistor 206.
Further, although the invention has been described in relation to a CMOS implementation, the invention may also be implemented as a bipolar configuration, with the CMOS devices suitably changed for bipolar devices .
The present invention has been described by way of example to its implementation in various exemplary systems . One skilled in the art will understand that the invention may be provided in systems other than those systems which are illustrated .

Claims

Claims
1. A floating voltage source connected between the input terminals of first and second output transistors of an output stage of a Class AB amplifier, comprising:
transconductance circuitry for converting a drive voltage to a first transistor of the output stage to a first current flowing in a first node;
current conveyer circuitry for maintaining the first node at a fixed voltage determined by a reference signal, and for conveying the first current to a second node ;
transresi stance circuitry for establishing a second voltage at the second node in dependence on the current flowing in the second node, the second node providing an input to a second transistor of the output stage .
2. The floating voltage source of claim 1 wherein there is unity voltage gain between the input terminals .
3 . The floating voltage source of claim 2 wherein the reciprocal of the transconductance value of the transconductance circuitry is equal to the transresistance value of the transresistance circuitry .
4. The floating voltage source of any preceding claim wherein the transconductance circuitry includes a first transistor .
5 . The floating voltage source of claim 4 wherein the first transistor is a source follower transistor .
6. The floating voltage source of claim 5 wherein the first transistor has a gate connected to the drive voltage, a source connected to the first node, and a drain connected to a supply voltage .
7. The floating voltage source of any preceding claim wherein the current conveyor circuitry comprises a second transistor connecting the first node to the second node, such that the current flowing in the second node corresponds to the current flowing in the first node, and the voltage of the second node is independent of the voltage of the first node .
8. The floating voltage source of claim 7 wherein the source of the second transistor is connected to the first node and the drain of the second transistor is connected to the second node .
9. The floating voltage source of claim 7 or claim 8 wherein the current conveyor circuitry comprises a third transistor having a gate connected to the second node, wherein the gate of the second transistor is connected to the drain of the third transistor, and the drain of the third transistor is further connected to a current source, the reference signal being applied to the source of the third transistor .
10. The floating voltage source of any preceding claim wherein the transresistance circuitry comprises a fourth transistor having a gate and drain connected to the second node, and a source connected to electrical ground .
11. The floating voltage source of any preceding claim wherein the first node is a virtual earth .
12. The floating voltage source of any preceding clam wherein the reference signal represents the desired voltage at the output of the Class AB amplifier in the absence of input signal .
13. The floating voltage source of any preceding claim further comprising reference circuitry for generating the reference signal and for stabilizing a quiescent bias of the output stage over temperature .
14. The floating voltage source of any preceding claim wherein the reference circuitry is adapted to track the sum of voltage changes with respect to temperature of the gate to source voltage of the first transistor of the output stage and the gate to source voltage of the transconductor stage .
15. The floating voltage source of any one of claims 3 to 14 wherein the reference circuitry comprises :
a first scaled replica transistor matching the first transistor of the output stage, having a source connected to the supply and a drain connected to a first current source; a second scaled replica transistor matching the source follower transistor, having a drain connected to the supply, having a gate connected to the gate of the first replica transistor, and a source connected to a second current source; and
a differential amplifier having a negative input connected to a reference voltage, a positive input connected to the drain of the first replica transistor, and an output connected to the gate of the first replica transistor, wherein the reference signal is provided at the source of the second replica transistor .
16. The floating voltage source of claim 15 in which the first current source is used to set the quiescent bias of the first and second transistors of the output stage and the second current source is set to track the current of the source follower transistor .
17. The output stage of any one of claims 13 to 16 further comprising steering circuitry, wherein the steering circuitry receives the reference signal from the reference circuitry, and provides a correcting current to the current conveyor circuitry to fix the voltage at the first node in dependence on the reference signal .
PCT/EP2015/052180 2014-02-04 2015-02-03 Ac floating voltage source for push-pull amplifier stage WO2015117950A1 (en)

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