WO2015113245A1 - Methods for merging candidates list construction - Google Patents
Methods for merging candidates list construction Download PDFInfo
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- WO2015113245A1 WO2015113245A1 PCT/CN2014/071750 CN2014071750W WO2015113245A1 WO 2015113245 A1 WO2015113245 A1 WO 2015113245A1 CN 2014071750 W CN2014071750 W CN 2014071750W WO 2015113245 A1 WO2015113245 A1 WO 2015113245A1
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- size
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- 2nx2n
- partition mode
- merging candidate
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
- H04N19/50—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using predictive coding
- H04N19/597—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using predictive coding specially adapted for multi-view video sequence encoding
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
- H04N19/50—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using predictive coding
- H04N19/503—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using predictive coding involving temporal prediction
- H04N19/51—Motion estimation or motion compensation
- H04N19/56—Motion estimation with initialisation of the vector search, e.g. estimating a good candidate to initiate a search
Abstract
Methods for merging candidate list construction in 3D video coding are disclosed. With the proposed method, the computational complexity of the merging candidate list construction is reduced.
Description
METHODS FOR MERGING CANDIDATES LIST
CONSTRUCTION
TECHNICAL FIELD
[0001] The invention relates generally to video processing. In particular, the present invention relates to methods for merging candidate list construction in 3D video coding.
BACKGROUND
[0002] 3D video coding (3DVC) is developed for encoding or decoding video data of multiple views simultaneously captured by several cameras. Since all cameras capture the same scene from different viewpoints, multi-view video data contains a large amount of inter-view redundancy. To exploit the inter-view redundancy, additional tools such as inter-view motion parameter prediction (IvMC), inter-view disparity compensation (IvDC), view synthesis prediction (VSP), and advanced residual prediction (ARP) have been integrated to conventional 3D-HEVC (High Efficiency Video Coding) , MV-HEVC or 3D-AVC (Advanced Video Coding) codec. IvMC, IvDC, VSP and their variations are used to construct merging candidates in addition to the HEVC merging candidate list. When coding the depth map in 3D- HEVC, motion parameter inheritance (MPI) which is also termed as texture merging candidate is also used to construct additional merging candidate.
[0003] For a current prediction unit (PU), a disparity vector (DV), such as the well-known neighboring block disparity vector (NBDV) or the depth-oriented NBDV (DoNBDV) is derived.
[0004] The basic concept of the inter- view motion parameter prediction (IvMC) in current 3D-HEVC is illustrated in Fig. 1.
[0005] First, a reference block determined by the derived DV is fetched from the already coded picture in the reference view.
[0006] Second, if this reference block is coded using motion compensated prediction (MCP), the associated motion parameters are used as candidate motion
parameters for the current PU.
[0007] Finally, these motion parameters, either at sub-PU level or PU level, are added as an additional merging candidate of the current PU.
[0008] The derived DV can also be used as merging candidate for inter- view disparity compensation (IvDC).
[0009] Some variations of IvMC and IvDC can also be included into the merging candidate construction process in 3D-HEVC. For example, a second IvMC candidate can fetch motion parameters from the right bottom position instead of the center position of the reference block determined by the derived DV in the reference view. A second IvDC can be obtained by shifting the first IvDC.
[0010] The basic concept of the VSP in current 3D-HEVC is illustrated in Fig. 2.
[OOllJFirst, given the derived DV, a depth block is fetched from a reference view depth image and used as an estimator for the depth information of the current PU.
[0012] Second, the current processed PU is divided into multiple sub-PUs. The size of sub-PU can be 8x4 or 4x8, and is determined by the size of PU or the depth values in the 4 corners of the current processed PU's corresponding depth block.
[0013]Finally, for each sub-PU, its corresponding depth sub-block is used to derive a new DV for disparity compensation.
[0014] The VSP method can also be used as an additional merging candidate in current 3D-HEVC.
[0015] The basic concept of the MPI for depth coding in current 3D-HEVC is illustrated in Fig. 3.
[0016]First, the collocated texture block is fetched from the corresponding texture picture.
[0017] Second, if the texture block is coded using MCP, the associated motion parameters are used as candidate motion parameters for the current depth block.
[0018]When coding the depth map, the MPI method is used as an additional merging candidate in current 3D-HEVC.
[0019] The IvMC, IvDC, VSP, MPI, and their variations candidates require a new module for merging candidate list construction.
[0020] The IvMC, IvDC, VSP, MPI, and their variations candidates in current 3D-HEVC are enabled for all PU partition modes as shown in Fig. 4. However, sub- PU level IvMC is only enabled in SIZE_2Nx2N PU partition mode.
[0021]When the PU partition mode is not PART_2Nx2N, i.e. multiple PUs in a
coding unit (CU), the current VSP method need to access 4 corresponding depth values and use them to determine the sub-PU size for each PU in the worst case.
SUMMARY [0022] In light of the previously described problems, the restriction methods for merging candidate list construction are proposed.
[0023] Other aspects and features of the invention will become apparent to those with ordinary skill in the art upon review of the following descriptions of specific embodiments.
BRIEF DESCRIPTION OF DRAWINGS
[0024] The invention can be more fully understood by reading the subsequent detailed description and examples with references made to the accompanying drawings, wherein:
[0025]Fig. 1 is a diagram illustrating the concept of IvMC.
[0026] Fig. 2 is a diagram illustrating the concept of VSP.
[0027] Fig.3 is a diagram illustrating the concept of MPI.
[0028]Fig. 4 is a diagram showing the PU partition modes in current 3D-FIEVC.
DETAILED DESCRIPTION
[0029] The following description is of the best-contemplated mode of carrying out the invention. This description is made for the purpose of illustrating the general principles of the invention and should not be taken in a limiting sense. The scope of the invention is best determined by reference to the appended claims.
[0030] Proposed method 1 :
[0031] It is proposed to use the HEVC merging candidate list construction method when the PU partition mode PartMode is not equal to PART_2Nx2N, i.e., all the 3DVC coding tools IvMC, IvDC, and VSP, et al, are excluded from the merging
candidate list.
[0032] Proposed method 2:
[0033] It is proposed to disable IvMC, either sub-PU level or PU level, when the PU partition mode PartMode is not equal to PART_2Nx2N.
[0034] Proposed method 3 :
[0035] It is proposed to disable IvDC, either sub-PU level or PU level, when the PU partition mode PartMode is not equal to PART_2Nx2N.
[0036] Proposed method 4:
[0037] It is proposed to disable VSP when the PU partition mode PartMode is not equal to PART_2Nx2N.
[0038] Proposed method 5:
[0039] It is proposed to disable variations of IvMC, either at sub-PU level or PU level, when the PU partition mode PartMode is not equal to PART_2Nx2N.
[0040] Proposed method 6:
[0041]It is proposed to disable variations of IvDC, either at sub-PU level or PU level, when the PU partition mode PartMode is not equal to PART_2Nx2N.
[0042] Proposed method 7:
[0043] It is proposed to disable motion parameter inheritance (MPI) or texture merging candidate, either at sub-PU level or PU level, when the PU partition mode PartMode is not equal to PART_2Nx2N.
[0044] The proposed methods described above can be used in a video encoder as well as in a video decoder. Embodiments of the proposed method according to the present invention as described above may be implemented in various hardware, software codes, or a combination of both. For example, an embodiment of the present invention can be a circuit integrated into a video compression chip or program codes integrated into video compression software to perform the processing described herein. An embodiment of the present invention may also be program codes to be executed on a Digital Signal Processor (DSP) to perform the processing described herein. The invention may also involve a number of functions to be performed by a computer processor, a digital signal processor, a microprocessor, or field programmable gate array (FPGA). These processors can be configured to perform particular tasks according to the invention, by executing machine-readable software code or firmware code that defines the particular methods embodied by the invention. The software code or firmware codes may be developed in different programming languages and
different format or style. The software code may also be compiled for different target platform. However, different code formats, styles and languages of software codes and other means of configuring code to perform the tasks in accordance with the invention will not depart from the spirit and scope of the invention.
[0045] The invention may be embodied in other specific forms without departing from its spirit or essential characteristics. The described examples are to be considered in all respects only as illustrative and not restrictive. To the contrary, it is intended to cover various modifications and similar arrangements (as would be apparent to those skilled in the art). Therefore, the scope of the appended claims should be accorded the broadest interpretation so as to encompass all such modifications and similar arrangements.
Claims
1. A method of restriction for merging candidate list construction in video coding.
2. The method as claimed in claim 1, wherein the merging candidate list construction method depends on PU partition mode.
3. The method as claimed in claim 2, wherein the merging candidate list in HEVC is used when the PU partition mode is not equal to SIZE_2Nx2N.
4. The method as claimed in claim 3, when the PU partition mode PartMode is equal to SIZE_2NxN, SIZE_Nx2N, SIZE_2NxnU, SIZE_2NxnD, SIZE_nLx2N or SIZE_nRx2N, the merging candidate list in HEVC is used.
5. The method as claimed in claim 2, wherein only merge candidates specified in HEVC is included in the merging candidate list when the PU partition mode is not equal to SIZE_2Nx2N, and new merging candidates specified in 3D- HEVC only is not included in the merging candidate list when the PU partition mode is not equal to SIZE_2Nx2N.
6. The method as claimed in claim 3, wherein new merging candidates include inter-view motion parameter prediction (IvMC), inter-view disparity compensation (IvDC), motion parameter inheritance (MPI) specified in 3D-HEVC is included in the merging candidate list, either at sub-PU level or PU level when the PU partition mode is equal to SIZE_2Nx2N.
7. The method as claimed in claim 5, wherein IvMC is disabled when the PU partition mode PartMode is not equal to PART_2Nx2N.
8. The method as claimed in claim 7, when the PU partition mode PartMode is equal to SIZE_2NxN, SIZE_Nx2N, SIZE_2NxnU, SIZE_2NxnD, SIZE_nLx2N or SIZE_nRx2N, IvMC is disabled.
9. The method as claimed in claim 5, wherein IvDC is disabled when the PU partition mode PartMode is not equal to PART_2Nx2N.
10. The method as claimed in claim 9, when the PU partition mode PartMode is equal to SIZE_2NxN, SIZE_Nx2N, SIZE_2NxnU, SIZE_2NxnD, SIZE_nLx2N or SIZE_nRx2N, IvDC is disabled.
11. The method as claimed in claim 5, wherein VSP is disabled when the PU partition mode PartMode is not equal to PART_2Nx2N.
12. The method as claimed in claim 11, when the PU partition mode PartMode
is equal to SIZE_2NxN, SIZE_Nx2N, SIZE_2NxnU, SIZE_2NxnD, SIZE_nLx2N or SIZE_nRx2N, VSP is disabled.
13. The method as claimed in claim 5, wherein MPI is disabled when the PU partition mode PartMode is not equal to PART_2Nx2N.
14. The method as claimed in claim 13, when the PU partition mode PartMode is equal to SIZE_2NxN, SIZE_Nx2N, SIZE_2NxnU, SIZE_2NxnD, SIZE_nLx2N or SIZE_nRx2N, MPI is disabled.
15. The method as claimed in claim 5, wherein texture merging candidate is disabled when the PU partition mode PartMode is not equal to PART_2Nx2N.
16. The method as claimed in claim 13, when the PU partition mode PartMode is equal to SIZE_2NxN, SIZE_Nx2N, SIZE_2NxnU, SIZE_2NxnD, SIZE_nLx2N or SIZE_nRx2N, the texture merging candidate is disabled.
17. The method as claimed in claim 5, wherein variations of IvMC are disabled when the PU partition mode PartMode is not equal to PART_2Nx2N.
18. The method as claimed in claim 17, when the PU partition mode PartMode is equal to SIZE_2NxN, SIZE_Nx2N, SIZE_2NxnU, SIZE_2NxnD, SIZE_nLx2N or SIZE_nRx2N, variations of IvMC are disabled.
19. The method as claimed in claim 5, wherein variations of IvDC are disabled when the PU partition mode PartMode is not equal to PART_2Nx2N.
20. The method as claimed in claim 19, when the PU partition mode PartMode is equal to SIZE_2NxN, SIZE_Nx2N, SIZE_2NxnU, SIZE_2NxnD, SIZE_nLx2N or SIZE_nRx2N, variations of IvDC are disabled.
21. The method as claimed in claim 1, wherein the HEVC merging candidate list is used when the Merge mode is coded and the PU partition is not equal to PART_2Nx2N; and only when the Skip mode is coded or the Merge mode is coded with 2Nx2N PU partition, additional merging candidate(s) for 3D-HEVC are included in the merging candidate list.
22. The method as claimed in claim 21, the additional merging candidate(s) for 3D-HEVC include at least one of the IvMC, IvDC, VSP candidates for texture coding.
23. The method as claimed in claim 21, the additional merging candidate(s) for 3D-HEVC include at least one of the IvMC, IvDC, VSP, MPI/texture merging candidates for depth coding.
24. The method as claimed in claim 1, wherein the sub-PU merging candidates
are not included in the merging candidate list when the Merge mode is coded and the PU partition is not equal to PART_2Nx2N; and only when the Skip mode is coded or the Merge mode is coded with 2Nx2N PU partition, sub-PU merging candidates are included in the merging candidate list; the sub-PU merging candidates include the Sub-PU IvMC candidate and the VSP candidate.
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| PCT/CN2014/071750 WO2015113245A1 (en) | 2014-01-29 | 2014-01-29 | Methods for merging candidates list construction |
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| PCT/CN2014/071750 WO2015113245A1 (en) | 2014-01-29 | 2014-01-29 | Methods for merging candidates list construction |
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| US20130188715A1 (en) * | 2012-01-09 | 2013-07-25 | Qualcomm Incorporated | Device and methods for merge list reordering in video coding |
| US20130202038A1 (en) * | 2012-02-08 | 2013-08-08 | Qualcomm Incorporated | Restriction of prediction units in b slices to uni-directional inter prediction |
| CN103283222A (en) * | 2011-09-13 | 2013-09-04 | 联发科技（新加坡）私人有限公司 | Method and apparatus for intra mode coding in HEVC |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20120230411A1 (en) * | 2011-03-09 | 2012-09-13 | Mediatek Singapore Pte. Ltd. | Method and Apparatus of Transform Unit Partition with Reduced Complexity |
| US20120320984A1 (en) * | 2011-06-14 | 2012-12-20 | Minhua Zhou | Inter-Prediction Candidate Index Coding Independent of Inter-Prediction Candidate List Construction in Video Coding |
| CN103283222A (en) * | 2011-09-13 | 2013-09-04 | 联发科技（新加坡）私人有限公司 | Method and apparatus for intra mode coding in HEVC |
| US20130188715A1 (en) * | 2012-01-09 | 2013-07-25 | Qualcomm Incorporated | Device and methods for merge list reordering in video coding |
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