WO2015113230A1 - Procédé et dispositif de transmission de données, et procédé et dispositif de réception de données - Google Patents

Procédé et dispositif de transmission de données, et procédé et dispositif de réception de données Download PDF

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Publication number
WO2015113230A1
WO2015113230A1 PCT/CN2014/071714 CN2014071714W WO2015113230A1 WO 2015113230 A1 WO2015113230 A1 WO 2015113230A1 CN 2014071714 W CN2014071714 W CN 2014071714W WO 2015113230 A1 WO2015113230 A1 WO 2015113230A1
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WIPO (PCT)
Prior art keywords
different
repetition
processes
data
levels
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PCT/CN2014/071714
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English (en)
Inventor
Chi GAO
Hidetoshi Suzuki
Lilei Wang
Masayuki Hoshino
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Panasonic Intellectual Property Corporation Of America
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Application filed by Panasonic Intellectual Property Corporation Of America filed Critical Panasonic Intellectual Property Corporation Of America
Priority to US15/111,456 priority Critical patent/US10009885B2/en
Priority to CN201480073178.7A priority patent/CN106063145B/zh
Priority to PCT/CN2014/071714 priority patent/WO2015113230A1/fr
Priority to JP2016535049A priority patent/JP6408001B2/ja
Publication of WO2015113230A1 publication Critical patent/WO2015113230A1/fr

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Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0067—Rate matching
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W72/00—Local resource management
    • H04W72/20—Control channels or signalling for resource management
    • H04W72/23—Control channels or signalling for resource management in the downlink direction of a wireless link, i.e. towards a terminal
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0061—Error detection codes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/0078—Avoidance of errors by organising the transmitted data in a format specifically designed to deal with errors, e.g. location
    • H04L1/0083—Formatting with frames or packets; Protocol or part of protocol for error control
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/08—Arrangements for detecting or preventing errors in the information received by repeating transmission, e.g. Verdan system
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W4/00—Services specially adapted for wireless communication networks; Facilities therefor
    • H04W4/70—Services for machine-to-machine communication [M2M] or machine type communication [MTC]
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0071—Use of interleaving

Definitions

  • the present disclosure relates to the field of data transmission with multiple repetition levels in Machine-Type Communication.
  • MTC Machine-Type Communication
  • LTE Long Term Evolution
  • MTC UEs User Equipments
  • communication another is improving the coverage of MTC UEs, for example 15dB coverage
  • E)PDCCH (Enhanced) Physical downlink Control Channel).
  • coverage enhancement target for (E)PDCCH is 9.6dB for FDD (Frequency-Division Duplex) and 14.6dB for TDD (Time-Division Duplex).
  • (E)PDCCH repetition in time domain is the main method to improve the coverage. Based on simulation results presented in 3GPP (The 3rd Generation Partnership Project) meeting, hundreds of repetitions are needed for (E)PDCCH transmission. For example, for (E)PDCCH with the coverage enhancement target 9.6dB as described above, approximately 100-200 repetitions are required. To satisfy multiple different coverage requirements, multiple repetition levels are supported and different repetition levels correspond to different integral (E)PDCCH repetition numbers. (E)PDCCH repetitions will be transmitted in multiple concentrated subframes. For each repetition level, integral (E)PDCCH repetitions transmit signals carrying one DCI (Downlink control information).
  • DCI Downlink control information
  • a method for transmitting data comprising: processing the data in at least five processes of cyclic redundancy check attachment, channel coding, rate matching, modulation and resource element mapping to generate a signal; and transmitting the signal in a plurality of subframes with a repetition level i, wherein the repetition level i is selected from a repetition level set including at least two different repetition levels, and for repetition level i, the data are transmitted in Ri subframes, and for different repetition levels, values of Ri are different, and wherein the data are processed by the five processes or by the five processes and at least one additional process to generate different signals to be transmitted according to different repetition levels.
  • a device for transmitting data comprising: a processing unit configured to process the data in at least five processes of cyclic redundancy check attachment, channel coding, rate matching, modulation and resource element mapping to generate a signal; and a transmission unit configured to transmit the signal in a plurality of subframes with a repetition level i, wherein the repetition level i is selected from a repetition level set including at least two different repetition levels, and for repetition level i, the data are transmitted in Ri subframes, and for different repetition levels, values of Ri are different, and wherein the data are processed by the five processes or by the five processes and at least one additional process to generate different signals to be transmitted according to different repetition levels.
  • a method for receiving data comprising: receiving a signal transmitted in a plurality of subframes with a repetition level i and obtaining the repetition level i based on the received signal, wherein the data are processed in at least five processes of cyclic redundancy check attachment, channel coding, rate matching, modulation and resource element mapping to generate the signal, wherein the repetition level i is selected from a repetition level set including at least two different repetition levels, and for repetition level i, the data are transmitted in Ri subframes, and for different repetition levels, values of Ri are different, and wherein the data are processed by the five processes or by the five processes and at least one additional process to generate different signals to be transmitted according to different repetition levels.
  • a device for receiving data comprising: a reception unit configured to receive a signal transmitted in a plurality of subframes with a repetition level i and to obtain the repetition level i based on the received signal, wherein the data are processed in at least five processes of cyclic redundancy check attachment, channel coding, rate matching, modulation and resource element mapping to generate the signal, wherein the repetition level i is selected from a repetition level set including at least two different repetition levels, and for repetition level i, the data are transmitted in Ri subframes, and for different repetition levels, values of Ri are different, and wherein the data are processed by the five processes or by the five processes and at least one additional process to generate different signals to be transmitted according to different repetition levels.
  • the data are processed by the five processes or by the five processes and at least one additional process to generate different signals to be transmitted according to different repetition levels, thereby the repetition level can be indicated implicitly without additional cost and accordingly the misunderstanding of the repetition level can be avoided.
  • Fig.1 is a schematic diagram showing an example of the timing relationship between (E)PDCCH and PDSCH;
  • Fig.2 is a schematic diagram showing an example of transmitting by eNB and receiving by UE (E)PDCCH and scheduled PDSCH;
  • Fig.3 is a schematic block diagram showing five processes for processing data needed to be transmitted
  • Fig.4 is a flow chart of a method for transmitting data according to the first embodiment of the present disclosure
  • Fig.5 is a schematic block diagram showing processes for processing the data according to the second embodiment of the present disclosure.
  • Fig.6 is a schematic diagram showing an example of the process of bit permutation according to the second embodiment of the present disclosure
  • Fig.7 is a schematic block diagram showing processes for processing the data according to the third embodiment of the present disclosure
  • Fig.8 is a schematic block diagram showing processes for processing the data according to the fourth embodiment of the present disclosure.
  • Fig.9 is a schematic diagram showing an example of the processes of repetition
  • Fig.10 is a schematic diagram showing another example of the processes of repetition 31 1 and bit permutation 312 according to the fourth embodiment of the present disclosure
  • Fig.1 1 is a schematic block diagram showing processes for processing the data according to the fifth embodiment of the present disclosure
  • Fig.12 is a schematic block diagram showing processes for processing the data according to the sixth embodiment of the present disclosure.
  • Fig.13 is a schematic block diagram showing processes for processing the data according to the seventh embodiment of the present disclosure.
  • Fig.14 is a schematic diagram showing an example of the processes of RE mapping 305' according to the seventh embodiment of the present disclosure.
  • Fig.15 is a schematic block diagram showing processes for processing the data according to the eighth embodiment of the present disclosure.
  • Fig.16 is a schematic block diagram showing processes for processing the data according to the ninth embodiment of the present disclosure.
  • Fig.17 is a schematic diagram showing an example of the process of CRC attachment 301 ' according to the ninth embodiment of the present disclosure
  • Fig.18 is a block diagram showing a device for transmitting data according to the eleventh embodiment of the present disclosure.
  • Fig.19 is a flow chart of a method for receiving data according to the twelfth embodiment of the present disclosure.
  • Fig.20 is a block diagram showing a device for receiving data according to the thirteenth embodiment of the present disclosure.
  • UEs or normal UEs in MTC mode need to receive the MTC (E)PDCCH repetitions and combine them to get the content of DCI.
  • the PDSCH (Physical Downlink Shared Channel) scheduled by the MTC (E)PDCCH will be transmitted on the subframes after the subframes transmitting the MTC (E)PDCCH repetitions.
  • the timing relationship between MTC (E)PDCCH and PDSCH is usually predefined. And, the starting subframe of PDSCH depends on the end of the (E)PDCCH.
  • the timing relationship between (E)PDCCH and PDSCH is known by UE, and an example thereof is illustrated in Fig.1 .
  • Fig.1 is a schematic diagram showing an example of the timing relationship between (E)PDCCH and PDSCH. As shown in Fig.1 , each box represents one subframe.
  • slash filled boxes represent subframes transmitting (E)PDCCH
  • dot filled boxes represent subframes transmitting PDSCH.
  • Blank boxes therebetween represents an interval of multiple subframes between (E)PDCCH and scheduled PDSCH. That is to say, PDSCH starts to be transmitted after the transmission of all the (E)PDCCH repetitions ends.
  • the number of subframes between the last repetition of (E)PDCCH and the first repetition of PDSCH is usually known by UE for receiving and decoding the starting of PDSCH accurately.
  • UE may decode the (E)PDCCH successfully with less repetitions than eNB (eNode B) transmits. If so, UE cannot know the exact end of integral (E)PDCCH repetitions, which may cause the UE misunderstand the starting subframe of scheduled PDSCH repetitions and cannot decode the PDSCH successfully.
  • Fig.2 is a schematic diagram showing an example of transmitting by eNB and receiving by UE (E)PDCCH and scheduled PDSCH. Similarly with Fig.1 , in Fig.2, each box represents one subframe. Specifically, along the time axis, slash filled boxes represent subframes transmitting (E)PDCCH, and dot filled boxes represent subframes
  • Blank boxes therebetween represents an interval between
  • (E)PDCCH and scheduled PDSCH are also possible. Also, the upper row corresponds to subframes transmitted by eNB while the lower row corresponds to subframes received by UE.
  • eNB are going to transmit one (E)PDCCH 100 repetitions in 100 subframes as indicated in the upper row, while UE may successfully decode the
  • (E)PDCCH when only 75 repetitions are received as indicated in the lower row.
  • UE will start to receive the corresponding PDSCH when its known interval between (E)PDCCH and scheduled PDSCH ends after reception of 75 (E)PDCCH repetitions.
  • actually the PDSCH is not transmitted from eNB yet at this time.
  • the misunderstanding of repetition level (or repetition number, or subframe number) of (E)PDCCH occurs, and accordingly, UE cannot detect the scheduled
  • repetition level ambiguity of MTC (E)PDCCH is a problem to be solved.
  • a straightforward solution is that the repetition level of MTC (E)PDCCH is informed to UE directly, and accordingly, the UE can confirm the transmitting subframes of scheduled PDSCH.
  • the straightforward solution needs additional signaling and the signaling should be received before PDSCH reception. In this case, the precondition of correctly decoding of PDSCH is correctly receiving of the signaling.
  • This double-step PDSCH transmission scheme will impact the robustness of (E)PDCCH transmission.
  • an approach capable of indicating the repetition level implicitly to UE without additional cost is desired.
  • Fig.3 is a schematic block diagram showing the five processes for processing data needed to be transmitted.
  • DCI for MTC (E)PDCCH is taken as an example of the data needed to be transmitted here for only the purpose of explanation, and the present disclosure is not limited thereto.
  • the five processes may include CRC (Cyclic Redundancy Check) attachment 301 , channel coding 302, rate matching 303, modulation 304 and RE (Resource element) mapping 305.
  • CRC Cyclic Redundancy Check
  • CRC parity bits are performed in the process of CRC attachment 301 .
  • channel coding 302 DCI bits attached with CRC parity bits are performed channel coding based on specific transmission channel.
  • rate matching 303 information bits obtained after channel coding are performed rate matching by using suitable coding rate to match with specific condition of transmission channel.
  • modulation 304 information bits obtained after rate matching is modulated into symbols.
  • one or more other processes than the above five processes may be added additionally. And, for different repetition levels, at least one of the above five processes and the added processes is different. In the following, details thereof will be described in respective embodiments.
  • Fig.4 is a flow chart of a method 40 for transmitting data according to the first embodiment of the present disclosure.
  • the method 40 includes two steps S401 and S402.
  • the data are processed in at least five processes of CRC attachment, channel coding, rate matching, modulation and RE mapping to generate a signal.
  • the signal is transmitted in multiple subframes with a repetition level i.
  • the repetition level i is selected from a repetition level set including at least two different repetition levels, and for repetition level i, the data are transmitted in Ri subframes, and for different repetition levels, values of Ri are different.
  • the data are processed by the five processes or by the five processes and at least one additional process to generate different signals to be transmitted according to different repetition levels.
  • the five processes of CRC attachment, channel coding, rate matching, modulation and RE mapping in the step S401 are similar with those shown in Fig.3.
  • the processes 301 -305 are generally same, which may cause misunderstanding the repletion level as described above.
  • the data may be for example DCI for MTC (E)PDCCH as shown in Fig.3, but the present disclosure is not limited thereto.
  • the data include control information bits such as DCI or traffic data bits.
  • the method 40 can be used for not only (E)PDCCH, but also PDSCH, PUSCH (Physical Uplink Shared Channel) and so on.
  • i represents repetition level number and may be an integer larger than 0, while Ri represents the number of subframes transmitting the data and may be an integer larger than 0.
  • R1 e.g. 50
  • R2 e.g. 100
  • DCI for MTC (E)PDCCH is also taken as an example for only the purpose of illustration in the following
  • the present disclosure is not limited thereto. Rather, all the embodiments of the present disclosure can be used for PDSCH, PUSCH and so on, either.
  • the method 40 as shown in Fig.4 may further include a process of bit permutation after the process of CRC attachment and before the process of channel coding. And, in the process of bit permutation, bit permutation patterns are different for different repetition levels.
  • Fig.5 is a schematic block diagram showing processes for processing the data according to the second embodiment of the present disclosure.
  • the five processes 301 -305 are unchanged, but a process of bit permutation 310 is newly added between the process of CRC attachment 301 and the process of channel coding 302. That is, DCI bits together with CRC parity bits obtained after the process 301 are additionally performed the processing of bit permutation.
  • Fig.6 shows a typical example of the process 310.
  • Fig.6 is a schematic diagram showing an example of the process of bit permutation 310 according to the second embodiment of the present disclosure.
  • slash filled boxes represent information bits (DCI bits) while dot filled boxes represent CRC parity bits.
  • Fig.6(a) shows a case that DCI bits has been experienced the process of CRC attachment 301 , but has not yet been experienced the process of bit permutation 310.
  • CRC parity bits are calculated based on information bits and are attached to the end of information bits as shown in Fig.6(a).
  • the position of CRC parity bits is generally as shown in Fig.6(a) and maintains unchanged for different repetition levels, which may cause misunderstanding the repetition level as described above.
  • information bits together with CRC parity bits obtained after the process 301 as shown in Fig.6(a) will be further subject to the process of bit permutation 310 in which information bits together with CRC parity bits as shown in Fig.6(a) will be performed bit permutation by using different bit permutation patterns according to different repetition levels.
  • Fig.6(b) further shows an exemplary case of after bit permutation 310 when there are for example three repetition levels, i.e. repetition level 1 , repetition level 2 and repetition level 3.
  • bit permutation 310 As shown in Fig.6(b), for different repetition levels, the position of CRC parity bits as a whole is different after bit permutation 310. Subsequently, bit sequences obtained after the process of bit permutation 310 will be further subject to the process 302-305 and finally mapped onto subframes for transmission.
  • bit permutation 310 is not limited to position adjustment of only CRC parity bits as a whole as shown in Fig.6(b); rather, positions of any bits of information bits and CRC parity bits can be adjusted to form different bit permutation patterns according to different repetition levels.
  • the repetition levels can be distinguished by using different bit permutation patterns according to different repetition levels through simple and easy implementation without any impact on decoding complexity, thus the repetition level can be indicated implicitly without additional cost and accordingly the misunderstanding of the repetition level can be avoided.
  • coding rates are different for different repetition levels in the process of rate matching.
  • Fig.7 is a schematic block diagram showing processes for processing the data according to the third embodiment of the present disclosure.
  • the four processes 301 -302 and 304-305 are unchanged, but the process of rate matching 303 is replaced by a process of rate matching 303'.
  • a same coding rate is generally used for different repetition levels.
  • coding rates are different according to different repetition levels.
  • bit sequence of bi, b 2 ,..., b m is obtained after the process of channel coding 302 and that a bit sequence of bi , b 2 ,..., b n is obtained after the process of rate matching 303', as shown in Fig.7. That is to say, the bit numbers before and after the process of rate matching 303' are respectively m and n.
  • repetition level 1 and repetition level 2 are transmitted on R1 subframes; while for repetition level 2, the data are transmitted on R2 subframes, in which it is assumed that R1 >R2.
  • coding rate C1 is used for repetition level 1 while coding rate C2 is used for repetition level 2, in which C1 ⁇ C2.
  • bit number after the rate matching 303' is n1 ; while for repetition level 2, the bit number after the rate matching 303' is n2, in which n1 >n2.
  • n1 bits are further processed in the processes 304 and 305 and finally mapped onto REs in M1 subframes; while for repetition level 2, n2 bits are processed in the processes 304 and 305 and finally mapped onto REs in M2 subframes, in which M1 >M2.
  • M1 subframes obtained after the process 305 may be repeated multiple times as a whole to form R1 subframes at last.
  • k1 repetitions of M1 subframes are enough for decoding the data successfully at the receiver side in which k1 * M1 i3 ⁇ 4 R1
  • only a part of M1 subframes may be repeated into (R1 -k1 * M1 ) subframes subsequent to the k1 * M1 subframes.
  • repetition level 2 is similar with it and will not be further described for avoiding redundancy.
  • the method 40 as shown in Fig.4 may further include two processes of repetition and bit permutation after the process of rate matching and before the process of modulation. And, in the process of repetition, m bits obtained after the process of rate matching are repeated into m * M bits in which M is no more than Ri, and in the process of bit permutation, bit permutation patterns are different for different repetition levels.
  • Fig.8 is a schematic block diagram showing processes for processing the data according to the fourth embodiment of the present disclosure. As compared with Fig.3, in Fig.8, the five processes 301 -305 are unchanged, but two processes of repetition 31 1 and bit permutation 312 are newly added between the process of rate matching
  • Fig.9 shows a typical example of the processes 31 1 and 312.
  • Fig.9 is a schematic diagram showing an example of the processes of repetition 31 1 and bit permutation 312 according to the fourth embodiment of the present disclosure.
  • M 3m bits bi , b 2 , ..., b 3m are obtained after the process of repetition 31 1 and before the process of bit permutation 312, as shown in the first row of boxes in which the number in each box represents bit index.
  • these 3m bits are performed the processing of bit permutation by using different bit permutation patterns according to different repetition levels.
  • the second row of boxes and the third row of boxes in Fig.9 shows an exemplary case of after bit permutation 312 when there are for example two repetition levels, i.e. repetition level 1 and repetition level 2.
  • repetition level 1 repetition level 1
  • repetition level 2 repetition level 2
  • bit permutation 312 the arrangement order of bit indexes is changed from that shown in the first row of boxes, and the arrangement order of bit indexes for repetition level 1 as shown in the second row of boxes is different from that for repetition level 2 as shown in the third row of boxes.
  • their 3m bits with different bit permutation patterns are respectively mapped onto 3 subframes as shown in Fig.9.
  • positions of any bits of bit sequence obtained after the process of repetition 31 1 can be adjusted to form different bit permutation patterns according to different repetition levels.
  • Mi3 ⁇ 4 Ri here.
  • M subframes obtained after the process 305 may be repeated multiple times as a whole to form Ri subframes at last.
  • k repetitions of M subframes are enough for decoding the data successfully at the receiver side in which k * M ⁇ S Ri, only a part of M subframes may be repeated into (Ri-k * M) subframes subsequent to the k * M subframes.
  • values of M may be different for different repetition levels.
  • Fig.9 only illustrates a case that m bits are repeated into m * M bits for both repetition level 1 and repetition level 2 in the repetition 31 1
  • values of M may be different for different repletion levels.
  • m bits may be repeated into m * M1 bits; while for repetition level 2, m bits may be repeated into m * M2 bits, in which M1 is unequal to M2.
  • m * M1 bits are finally mapped onto M1 subframes; while for repetition level 2, m * M2 bits are finally mapped onto M2 subframes.
  • Fig.10 shows an example of the processes 31 1 and 312 when values of M are different for different repetition levels.
  • Fig.10 is a schematic diagram showing another example of the processes of repetition 31 1 and bit permutation 312 according to the fourth embodiment of the present disclosure.
  • the repetition levels can be distinguished by repeating bits obtained after rate matching and permutating the repeated bits using different bit permutation patterns according to different repetition levels, thus the repetition level can be indicated implicitly without additional cost and accordingly the misunderstanding of the repetition level can be avoided.
  • the method 40 as shown in Fig.4 may further include a process of symbol permutation after the process of modulation and before the process of RE mapping. And, in the process of symbol permutation, symbol permutation patterns are different for different repetition levels, and symbols after the process of symbol permutation are mapped onto one subframe.
  • Fig.1 1 is a schematic block diagram showing processes for processing the data according to the fifth embodiment of the present disclosure. As compared with Fig.3, in Fig.1 1 , the five processes 301 -305 are unchanged, but a process of symbol permutation 313 is newly added between the process of modulation 304 and the process of RE mapping 305.
  • n symbols s ⁇ , s 2 ,..., s n obtained after the process 304 are permutated into n symbols s'i , s' 2 ,..., s' n in the process of symbol permutation 313. Subsequently, n symbols s'i , s' 2 , ..., s' n are mapped onto REs in one subframe by the process of RE mapping 305 as shown in Fig.1 1.
  • these n symbols Si , s 2 ,..., s n corresponding to one subframe are performed symbol permutation using different symbol permutation patterns according to different repetition levels, thus repetition levels can be distinguished for the receiver side.
  • the repetition levels can be distinguished by using different symbol permutation patterns according to different repetition levels through simple and easy implementation without any impact on decoding complexity, thus the repetition level can be indicated implicitly without additional cost and accordingly the misunderstanding of the repetition level can be avoided.
  • the method 40 as shown in Fig.4 may further include a process of repetition after the process of modulation and before the process of symbol permutation. And, in the process of repetition, n symbols obtained after the process of modulation are repeated into n * N symbols in which N is no more than Ri, and the n * N symbols are mapped onto N subframes.
  • Fig.12 is a schematic block diagram showing processes for processing the data according to the sixth embodiment of the present disclosure.
  • the five processes 301 -305 and the process of symbol permutation 313 are unchanged, but a process of repetition 314 is newly added between the process of modulation 304 and the process of symbol permutation 313.
  • n symbols s ⁇ , s 2 , ..., s n obtained after the process of modulation 304 are repeated into n * N symbols s ⁇ , s 2 ,..., s n *N in the process of repetition 314.
  • n * N symbols Si , s 2 , ..., s n *N are performed symbol permutation by using different symbol permutation patterns for different repetition levels in the process of symbol permutation 313.
  • n * N symbols after symbol permutation are mapped onto N subframes by the process of RE mapping 305 as shown in Fig.12.
  • n symbols which are finally mapped onto one subframe are performed the symbol permutation.
  • n * N symbols which are finally mapped onto N subframes are performed the symbol permutation.
  • the symbol permutation may happens within symbols which are finally mapped onto one subframe or may be happens within symbols which are finally mapped onto more than one subframes.
  • N subframes obtained after the process 305 may be repeated multiple times as a whole to form Ri subframes at last.
  • N subframes obtained after the process 305 may be repeated multiple times as a whole to form Ri subframes at last.
  • k repetitions of N subframes are enough for decoding the data successfully at the receiver side in which k * N ⁇ S Ri, only a part of N subframes may be repeated into (Ri-k * N) subframes subsequent to the k * N subframes.
  • values of N may be different for different repetition levels.
  • repetition 314 and repetition 31 1 are the same.
  • values of N may be different for different repetition levels.
  • n symbols may be repeated into n * N1 symbols; while for repetition level 2, n symbols may be repeated into n * N2 symbols, in which N1 is unequal to N2.
  • n * N1 symbols are finally mapped onto N1 subframes; while for repetition level 2, n * N2 symbols are finally mapped onto N2 subframes. Since the principle of repetition 314 is similar with that of repetition 31 1 , no specific example of repetition 314 is further given here for avoiding redundancy.
  • the repetition levels can be distinguished by repeating symbols obtained after modulation and permutating the repeated symbols using different symbol permutation patterns according to different repetition levels, thus the repetition level can be indicated implicitly without additional cost and accordingly the misunderstanding of the repetition level can be avoided.
  • the method 40 as shown in Fig.4 may further include a process of repetition after the process of modulation and before the process of RE mapping. And, in the process of repetition, n symbols obtained after the process of modulation are repeated into n * N symbols in which N is no more than Ri, and values of N are different for different repetition levels, and in the process of RE mapping, n * N symbols are mapped onto N subframes in the increasing order of first time domain and then frequency domain.
  • Fig.13 is a schematic block diagram showing processes for processing the data according to the seventh embodiment of the present disclosure.
  • n symbols obtained after the process of modulation 304 are repeated into n * N symbols, and values of N are different for different repetition levels. For example, for repetition level 1 , n symbols may be repeated into n * N1 symbols; while for repetition level 2, n symbols may be repeated into n * N2 symbols, in which N1 is unequal to N2.
  • n * N symbols obtained after repetition 314 are no longer permutated and directly mapped onto REs in N subframes by the process of RE mapping 305'.
  • n * N symbols are mapped onto N subframes in the increasing order of first time domain and then frequency domain.
  • Fig.14 shows an example of the process of RE mapping 305'.
  • repeated symbols after the process of repetition 314 are mapped onto REs in 2 subframes in the process of RE mapping 305'.
  • two adjacent subframes i.e. subframe #w and subframe #w+1 , are illustrated exemplarily.
  • the horizontal axis represents time axis and the vertical axis represents frequency axis.
  • dot filled boxes represent REs where repeated symbols are mapped, in which each number represents symbol index. It can be seen from Fig.14 that the mapping order of repeated symbols is that the repeated symbols are sequentially mapped onto REs in 2 subframes as a whole along first the time axis and then frequency axis, that is, in the increasing order of first time domain and then frequency domain.
  • N subframes obtained after the process 305' may be repeated multiple times as a whole to form Ri subframes at last.
  • N subframes obtained after the process 305' may be repeated multiple times as a whole to form Ri subframes at last.
  • k repetitions of N subframes are enough for decoding the data successfully at the receiver side in which k * Ni3 ⁇ 4 Ri
  • only a part of N subframes may be repeated into (Ri-k * N) subframes subsequent to the k * N subframes.
  • the repetition level can be indicated implicitly without additional cost and accordingly the misunderstanding of the repetition level can be avoided.
  • symbols obtained after the process of modulation are mapped onto different REs in one subframe for different repetition levels in the process of RE mapping.
  • Fig.15 is a schematic block diagram showing processes for processing the data according to the eighth embodiment of the present disclosure.
  • the four processes 301 -304 are unchanged, but the process of RE mapping 305 is replaced by a process of RE mapping 305".
  • a same manner of RE mapping is generally employed, that is, symbols are usually mapped onto same REs in one subframe.
  • symbols obtained after the process of modulation are mapped onto different REs in one subframe for different repetition levels.
  • each subframe one (E)PDCCH repetition is transmitted.
  • L (E)CCE (Enhanced) Control Channel Element) subsets in one subframe, in which L is an integer larger than 0.
  • one (E)PDCCH repetition can be transmitted.
  • the (E)PDCCH is mapped onto #11 (E)CCE subset in one subframe; while for repetition level 2, the (E)PDCCH is mapped onto #12 (E)CCE subset in one subframe, in which #11 and #12 represent subset indexes for different two (E)CCE subsets among the L (E)CCE subsets.
  • the repetition level can be indicated implicitly without additional cost and accordingly the misunderstanding of the repetition level can be avoided.
  • the processing of the CRC bits attaching is different for different repetition levels in the process of CRC attachment.
  • Fig.16 is a schematic block diagram showing processes for processing the data according to the ninth embodiment of the present disclosure.
  • the four processes 302-305 are unchanged, but the process of CRC attachment 301 is replaced by a process of CRC attachment 301 '.
  • the processing of the CRC bits attaching is usually same, that is, the bit sequence and position of CRC parity bits are same.
  • the processing of the CRC bits attaching is different for different repetition levels.
  • Fig.17 shows an example of the process of CRC attachment 301 '.
  • Fig.17 is a schematic diagram showing an example of the process of CRC attachment 301 ' according to the ninth embodiment of the present disclosure.
  • slash filled boxes represent information bits (DCI bits) while dot filled boxes represent CRC parity bits.
  • Fig.17(a) shows a case of the process of CRC attachment 301 .
  • CRC parity bits are calculated based on information bits and are attached to the end of information bits no matter whether different repetition levels are used, which may cause misunderstanding the repetition level as described above.
  • Fig.17(b) further shows an exemplary case of CRC attachment 301 ' when there are for example three repetition levels, i.e. repetition level 1 , repetition level 2 and repetition level 3.
  • the position of CRC parity bits as a whole is different so as to distinguish repetition levels.
  • Fig.17(b) only illustrate one manner of CRC bits attaching in the process of CRC attachment 301 ', and the present disclosure is not limited thereto.
  • the bit sequence thereof may be different according to different repetition levels.
  • the CRC parity bits may be 1 101 101 1 ; while for repetition level 2, the CRC parity bits may be 1 1000100.
  • the repetition level can be indicated implicitly without additional cost and accordingly the misunderstanding of the repetition level can be avoided.
  • the processing of the channel coding may be different for different repetition levels in the process of channel coding.
  • the process of channel coding 302 in Fig.3 may also be replaced by a process of channel coding 301 ' in which the processing of the channel coding is different according to different repetition levels, so that the repetition level can be indicated implicitly without additional cost and accordingly the misunderstanding of the repetition level can be avoided.
  • different modulation schemes may be used for different repetition levels in the process of modulation.
  • the process of modulation 304 in Fig.3 may also be replaced by a process of modulation 304' in which different modulation schemes are used according to different repetition levels, so that the repetition level can be indicated implicitly without additional cost and accordingly the misunderstanding of the repetition level can be avoided.
  • the repetition level can be indicated implicitly without additional cost and accordingly the misunderstanding of the repetition level can be avoided.
  • the present disclosure is not limited thereto, and any combination of the above embodiments, that is, any combination of the above processing of the above processes, may also indicate implicitly the repetition level without additional cost and accordingly avoid the misunderstanding of the repetition level.
  • Fig.18 is a block diagram showing a device 1800 for transmitting data according to the eleventh embodiment of the present disclosure.
  • the device 1800 for transmitting data includes: a processing unit 1801 configured to process the data in at least five processes of CRC attachment, channel coding, rate matching, modulation and RE mapping to generate a signal; and a transmission unit 1803 configured to transmit the signal in multiple subframes with a repetition level i.
  • the repetition level i is selected from a repetition level set including at least two different repetition levels, and for repetition level i, the data are transmitted in Ri subframes, and for different repetition levels, values of Ri are different.
  • the data are processed by the five processes or by the five processes and at least one additional process to generate different signals to be transmitted according to different repetition levels.
  • the device 1800 for transmitting data may further include a CPU (Central Processing Unit) 1810 for executing related programs to process various data and control operations of respective units in the device 1800, a ROM (Read Only Memory) 1830 for storing various programs required for performing various process and control by the CPU 1810, a RAM (Random Access Memory) 1850 for storing intermediate data temporarily produced in the procedure of process and control by the CPU 1810, and/or a storage unit 1870 for storing various programs, data and so on.
  • the above processing unit 1801 , transmission unit 1803, CPU 1810, ROM 1830, RAM 1850 and/or storage unit 1870 etc. may be interconnected via data and/or command bus 1890 and transfer signals between one another.
  • Respective units as described above do not limit the scope of the present disclosure. According to one embodiment of the disclosure, the function of any of the above processing unit 1801 and transmission unit 1803 may also be implemented by functional software in combination with the above CPU 1810, ROM 1830, RAM 1850 and/or storage unit 1870 etc.
  • the processing unit 1801 may further includes a process of bit permutation after the process of CRC attachment and before the process of channel coding. And, in the process of bit permutation, bit permutation patterns are different for different repetition levels.
  • coding rates may be different for different repetition levels in the process of rate matching.
  • the processing unit 1801 may further includes two processes of repetition and bit permutation after the process of rate matching and before the process of modulation.
  • m bits obtained after the process of rate matching are repeated into m * M bits in which M is no more than Ri.
  • bit permutation bit permutation patterns are different for different repetition levels.
  • the processing unit 1801 may further includes a process of symbol permutation after the process of modulation and before the process of RE mapping. And, in the process of symbol permutation, symbol permutation patterns are different for different repetition levels.
  • the processing unit 1801 may further includes a process of repetition after the process of modulation and before the process of symbol permutation. And, in the process of repetition, n symbols obtained after the process of modulation are repeated into n * N symbols in which N is no more than Ri. According to the present embodiment, in the device 1800, the processing unit 1801 may further includes a process of repetition after the process of modulation and before the process of RE mapping. In the process of repetition, n symbols obtained after the process of modulation are repeated into n * N symbols in which N is no more than Ri, and values of N are different for different repetition levels. And, in the process of RE mapping, n * N symbols are mapped onto N subframes in the increasing order of first time domain and then frequency domain.
  • symbols obtained after the process of modulation may be mapped onto different REs in one subframe for different repetition levels in the process of RE mapping.
  • the data include control information bits such as DCI or traffic data bits.
  • the device 1800 for transmitting data can be used for (E)PDCCH, PDSCH, PUSCH and so on.
  • the device 1800 can be implemented at both UE side and eNB side.
  • the device 1800 for transmitting data can implement the method 40 as described in any one of the above first to tenth embodiments or any combination thereof.
  • Fig.19 is a flow chart of a method 190 for receiving data according to the twelfth embodiment of the present disclosure. As shown in Fig.19, the method 190 includes a step S1901 . At the step S1901 , a signal transmitted in multiple subframes with a repetition level i is received and the repetition level i is obtained based on the received signal.
  • the data are processed in at least five processes of CRC attachment, channel coding, rate matching, modulation and RE mapping to generate the signal.
  • the repetition level i is selected from a repetition level set including at least two different repetition levels, and for repetition level i, the data are transmitted in Ri subframes, and for different repetition levels, values of Ri are different.
  • the data are processed by the five processes or by the five processes and at least one additional process to generate different signals to be transmitted according to different repetition levels.
  • the method 190 according to the present embodiment can be used for receiving the data transmitted by the method 40 as described in any one of the above first to tenth embodiments or any combination thereof.
  • the data are processed by the five processes or by the five processes and at least one additional process to generate different signals to be transmitted according to different repetition levels, thereby the repetition level can be indicated implicitly without additional cost and accordingly the misunderstanding of the repetition level can be avoided.
  • Fig.20 is a block diagram showing a device 2000 for receiving data according to the thirteenth embodiment of the present disclosure.
  • the device 2000 includes a reception unit 2001 configured to receive a signal transmitted in multiple subframes with a repetition level i and to obtain the repetition level i based on the received signal.
  • the data are processed in at least five processes of CRC attachment, channel coding, rate matching, modulation and RE mapping to generate the signal.
  • the repetition level i is selected from a repetition level set including at least two different repetition levels, and for repetition level i, the data are transmitted in Ri subframes, and for different repetition levels, values of Ri are different.
  • the data are processed by the five processes or by the five processes and at least one additional process to generate different signals to be transmitted according to different repetition levels.
  • the device 2000 for receiving data may further include a CPU 2010 for executing related programs to process various data and control operations of respective units in the device 2000, a ROM 2013 for storing various programs required for performing various process and control by the CPU 2010, a RAM 2015 for storing intermediate data temporarily produced in the procedure of process and control by the CPU 2010, and/or a storage unit 2017 for storing various programs, data and so on.
  • the above reception unit 2001 , CPU 2010, ROM 2013, RAM 2015 and/or storage unit 2017 etc. may be interconnected via data and/or command bus 2020 and transfer signals between one another.
  • Respective units as described above do not limit the scope of the present disclosure.
  • the function of the above reception unit 2001 may also be implemented by functional software in combination with the above CPU 2010, ROM 2013, RAM 2015 and/or storage unit 2017 etc.
  • the data include control information bits such as DCI or traffic data bits.
  • the device 2000 for receiving data can be used for (E)PDCCH, PDSCH, PUSCH and so on.
  • the device 2000 can be implemented at both UE side and eNB side.
  • the device 2000 for receiving data can implement the method 190 as described in the above twelfth embodiment. That is, the device 2000 for receiving data can be used for receiving the data transmitted by the method 40 as described in any one of the above first to tenth embodiments or any combination thereof.
  • the data are processed by the five processes or by the five processes and at least one additional process to generate different signals to be transmitted according to different repetition levels, thereby the repetition level can be indicated implicitly without additional cost and accordingly the misunderstanding of the repetition level can be avoided.
  • a signal bearing medium examples include, but are not limited to, the following: a recordable type medium such as a floppy disk, a hard disk drive, a Compact Disc (CD), a Digital Video Disk (DVD), a digital tape, a computer memory, etc.; and a transmission type medium such as a digital and/or an analog communication medium (e.g., a fiber optic cable, a waveguide, a wired communications link, a wireless communication link, etc.).

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Mobile Radio Communication Systems (AREA)
  • Error Detection And Correction (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)

Abstract

L'invention concerne un procédé et un dispositif de transmission de données, et un procédé et un dispositif de réception de données. Le procédé de transmission de données consiste à : traiter les données dans au moins cinq processus de rattachement de contrôle par redondance cyclique, codage de voie, adaptation en débit, modulation, et mappage d'élément de ressource, pour générer un signal ; et transmettre le signal dans une pluralité de sous-trames, avec un niveau de répétition i. Le niveau de répétition i est sélectionné dans un ensemble de niveaux de répétition comprenant au moins deux niveaux de répétition différents. Pour un niveau de répétition i, les données sont transmises dans des sous-trames Ri. Pour différents niveaux de répétition, des valeurs de Ri sont différentes. Les données sont traitées dans les cinq processus, ou dans les cinq processus et au moins un autre processus, pour générer différents signaux devant être transmis selon différents niveaux de répétition.
PCT/CN2014/071714 2014-01-28 2014-01-28 Procédé et dispositif de transmission de données, et procédé et dispositif de réception de données WO2015113230A1 (fr)

Priority Applications (4)

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US15/111,456 US10009885B2 (en) 2014-01-28 2014-01-28 Method and device for transmitting data at different repetition levels, and method and device for receiving data at different repetition levels
CN201480073178.7A CN106063145B (zh) 2014-01-28 2014-01-28 用于发射数据的方法和装置和用于接收数据的方法和装置
PCT/CN2014/071714 WO2015113230A1 (fr) 2014-01-28 2014-01-28 Procédé et dispositif de transmission de données, et procédé et dispositif de réception de données
JP2016535049A JP6408001B2 (ja) 2014-01-28 2014-01-28 データ送信方法および装置、データ送受信方法、ならびに通信システム

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Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104348580A (zh) * 2013-08-06 2015-02-11 夏普株式会社 下行物理信道的发送和接收方法以及基站和用户设备
KR101940344B1 (ko) * 2013-09-26 2019-01-21 주식회사 케이티 하향링크 제어 정보 송수신 방법 및 장치
US10749648B2 (en) * 2015-07-14 2020-08-18 Lg Electronics Inc. Method and user equipment for receiving downlink signal, and method and base station for transmitting downlink signal
KR102107713B1 (ko) * 2018-04-16 2020-05-07 엘지전자 주식회사 무선 통신 시스템에서 물리 하향링크 공유 채널을 송수신하기 위한 방법 및 이를 지원하는 장치

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101330671A (zh) * 2007-06-20 2008-12-24 北京三星通信技术研究有限公司 发送广播信息的设备和方法
WO2011046334A2 (fr) * 2009-10-12 2011-04-21 Pantech Co.,Ltd. Appareil et procédé d'envoi et de réception d'informations de commande dans un système de communication sans fil
US20110122825A1 (en) * 2008-07-25 2011-05-26 Moon Il Lee Method and apparatus of receiving data in wireless communication system
EP2547017A2 (fr) * 2010-03-11 2013-01-16 LG Electronics Inc. Procédé d'allocation de voie de signalisation et son appareil

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4806665B2 (ja) * 2007-06-19 2011-11-02 株式会社エヌ・ティ・ティ・ドコモ 基地局装置、送信方法、及び通信システム
CN101453262B (zh) * 2007-12-06 2012-04-18 大唐移动通信设备有限公司 下行同步方法及装置
US8724636B2 (en) 2008-03-31 2014-05-13 Qualcomm Incorporated Methods of reliably sending control signal
KR101573072B1 (ko) * 2008-08-27 2015-12-01 엘지전자 주식회사 무선통신 시스템에서 제어정보 전송방법
CN101814980B (zh) * 2009-02-25 2013-08-07 电信科学技术研究院 一种实现重复ack/nack传输的方法和装置
US8380135B2 (en) * 2009-05-04 2013-02-19 Lg Electronics Inc. Method of transmitting control information in wireless communication system
KR101663617B1 (ko) * 2009-10-29 2016-10-07 엘지전자 주식회사 하향링크 기준신호 송수신 방법 및, 이를 이용한 기지국 및 사용자기기
CN102136886A (zh) * 2011-04-14 2011-07-27 西安新邮通信设备有限公司 一种正交重复累积码的编译码方法及装置
US8724722B2 (en) * 2011-04-14 2014-05-13 Lsi Corporation Method for reducing latency on LTE DL implementation
US9185564B2 (en) * 2012-05-11 2015-11-10 Sharp Kabushiki Kaisha Devices for sending and receiving feedback information
KR102096927B1 (ko) * 2012-09-04 2020-04-06 삼성전자주식회사 제어 채널 엘리먼트들에 대한 어그리게이션 레벨들 개수 조정 장치 및 방법

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101330671A (zh) * 2007-06-20 2008-12-24 北京三星通信技术研究有限公司 发送广播信息的设备和方法
US20110122825A1 (en) * 2008-07-25 2011-05-26 Moon Il Lee Method and apparatus of receiving data in wireless communication system
WO2011046334A2 (fr) * 2009-10-12 2011-04-21 Pantech Co.,Ltd. Appareil et procédé d'envoi et de réception d'informations de commande dans un système de communication sans fil
EP2547017A2 (fr) * 2010-03-11 2013-01-16 LG Electronics Inc. Procédé d'allocation de voie de signalisation et son appareil

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JP6408001B2 (ja) 2018-10-17
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CN106063145A (zh) 2016-10-26
JP2017510097A (ja) 2017-04-06
US10009885B2 (en) 2018-06-26

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