WO2015110185A1

WO2015110185A1 - A multilevel converter with reduced ac fault handling rating

Info

Publication number: WO2015110185A1
Application number: PCT/EP2014/065673
Authority: WO
Inventors: Alireza NAMI; Frans Dijkhuizen; Jiaqi Liang; Liwei Wang; Tomas Jonsson
Original assignee: Abb Technology Ltd
Priority date: 2014-01-21
Filing date: 2014-07-22
Publication date: 2015-07-30

Abstract

A multilevel converter (10) converting between AC and DC comprises a phase leg having a first and a second phase arm, the first phase arm being connected between a first pole (P1) and a first AC terminal (ACA1) and the second phase arm being connected between the first AC terminal (ACA1) and ground, where the phase leg comprises cells of a first type having a unipolar voltage contribution and cells of a second type having a bipolar voltage contribution, where each cell comprises at least one energy storage element for providing the voltage contribution and cell switches for controlling the voltage contribution, wherein the first phase arm comprises cells of the second type and the energy storage elements of all the converter cells of the second phase arm are configured to be bypassed in case of a phase fault on the AC side of the multilevel converter.

Description

A MULTILEVEL CONVERTER WITH REDUCED AC FAULT HANDLING

RATING

FIELD OF INVENTION

The present invention generally relates to multilevel converters. More particularly the present invention relates to a multilevel converter configured to convert between alternating current and direct current.

BACKGROUND

Multilevel converters are of interest to use in a number of different power transmission environments. They may for instance be used as voltage source

converters in direct current power transmission systems such as high voltage direct current (HVDC) and

alternating current power transmission systems, such as flexible alternating current transmission system

(FACTS) . They may also be used as reactive compensation circuits such as Static VAR compensators.

In order to reduce harmonic distortion in the output of power electronic converters, where the output voltages can assume several discrete levels, so called

multilevel converters have been proposed. In

particular, converters where a number of cascaded converter cells, each comprising a number of switching units and an energy storage unit in the form of a DC capacitor have been proposed. Examples of such converters can be found in

Marquardt, ' ew Concept for high voltage-Modular

multilevel converter', IEEE 2004, A. Lesnicar, R.

Marquardt, "A new modular voltage source inverter topology", EPE 2003, WO 2010/149200 and WO 2011/124260.

Converter elements or cells in such a converter may for instance be of the half-bridge, full-bridge or clamped double cell type. These may be connected in upper and lower phase arms of a phase leg.

A half-bridge connection in upper and lower arms provides unipolar cell voltage contributions and offers the simplest structure of the chain link converter. This type is described by Marquardt, ' ew Concept for high voltage-Modular multilevel converter' , IEEE 2004 and A. Lesnicar, R. Marquardt, "A new modular voltage source inverter topology", EPE 2003. However, there is a problem with the half-bridge topology in that the fault current blocking ability in the case of a DC fault, such as a DC pole-to-pole or a DC pole-to-ground fault, is limited. One way to address this is through the use of full- bridge cells. This is described in WO 2011/012174.

Series connection of full-bridge cells offers four quadrant power flows through the energy storage element of the cell capacitor as well as DC fault voltage blocking capability by imposing a reverse voltage.

However, the use of full-bridge cells doubles the number of components compared with a half-bridge cell. One way to reduce the number of components combined with a retained fault current limiting ability is through mixing the cells of the half- and full-bridge type. Half of the cells may then be full-bridge cells used for imposing the reverse voltage due to the rating of the cascaded converter cells. This is for instance described in WO 2011/042050. The mixing of cells reduces the number of components further while

retaining a good fault current limitation ability.

The traditional way of mixing the cells is to have the same mix of full and half bridge cells in the upper and lower phase arm. However there is still room for improvement with regard to component reduction combined with fault current limitation .

SUMMARY OF THE INVENTION

The present invention is directed towards providing a reduction of the converter voltage rating required for a phase arm in order to handle AC phase faults. This object is according to a first aspect achieved through a multilevel converter configured to convert between alternating current and direct current and comprising

a phase leg having a first and a second phase arm, the first phase arm being connected between a first pole and a first AC terminal and the second phase arm being connected between the first AC terminal and ground, the phase leg comprising cells of a first type having a unipolar voltage contribution and cells of a second type having a bipolar voltage contribution, where each cell comprises at least one energy storage element for providing said voltage contribution and cell switches for controlling the voltage contribution,

wherein the first phase arm comprises cells of the second type and the energy storage elements of all the converter cells of the second phase arm are configured to be bypassed in case of a phase fault on the AC side of the multilevel converter.

This object is according to a second aspect achieved through a method of controlling fault handling in a phase leg of a multilevel converter converting between alternating current and direct current, the phase leg having a first and a second phase arm, where the first phase arm is connected between a first pole and a first AC terminal, the second phase arm is connected between the first AC terminal and ground and the phase leg comprises cells of a first type having a unipolar voltage contribution and cells of a second type having a bipolar voltage contribution, where each cell

comprises at least one energy storage element for providing the voltage contribution and cell switches for controlling the voltage contribution, the method comprising

upon the detection of a phase fault on the AC side of the multilevel converter,

blocking cell switches of the cells in the phase leg, and

controlling the energy storage elements of all the converter cells in the second phase arm to be bypassed. The invention has a number of advantages in addition to DC fault current blocking capability. It reduces the overvoltage experienced by the first phase arm in case of AC faults. Thereby the converter can be made

considerably smaller while still allowing the AC phase faults be handled safely.

BRIEF DESCRIPTION OF THE DRAWINGS

The present invention will in the following be

described with reference being made to the accompanying drawings, where fig. 1 schematically shows a cell-based voltage source converter connected between a pole and ground,

fig. 2 schematically shows a first version of a full- bridge cell,

fig. 3 schematically shows the structure of a first version of a half-bridge cell,

fig. 4 schematically shows the structure of a second version of a half-bridge cell,

fig. 5 schematically shows a control unit of the converter,

fig. 6 shows an equivalent circuit for a converter with mixed half and full bridge cells with blocked switches during an AC phase fault in a connected AC system, fig. 7 shows a converter configuration for reducing the required converter voltage rating, where the converter is realized as an asymmetric monopole converter, fig. 8 schematically shows the structure of a second version of a full-bridge cell employing a first type of bypass switch for use in reducing the required

converter voltage rating,

fig. 9 schematically shows an asymmetric monopole converter employing the full-bridge cell with the first type of bypass switch,

fig. 10 schematically shows an asymmetric monopole converter configuration employing a full-bridge cell with a second type of bypass switch connected between cell connection terminals,

fig. 11 shows the converter configuration from fig. 7 realized as a symmetrical bipole converter,

fig. 12 schematically shows an asymmetric monopole converter configuration that uses a variation of a bipolar voltage contribution employing an alternative bypass switch realized as an IGCT,

fig. 13 shows an asymmetric monopole converter

configuration that uses another variation of a bipolar voltage contribution cell employing the IGCT variation of first type of bypass switch,

fig. 14 schematically shows currents and voltages of the converter in fig. lin order to inject reactive power during a pole fault.

DETAILED DESCRIPTION OF THE INVENTION

In the following, a detailed description of preferred embodiments of the invention will be given.

Fig. 1 shows one variation of a multilevel converter in the form of a cell based voltage source converter 10. The converter operates to convert between alternating current (AC) and direct current (DC) . The converter 10 in fig. 1 comprises a three-phase bridge made up of a number of phase legs. There are in this case three phase legs. It should however be realized that as an alternative there may be for instance only two phase legs. There is thus a first phase leg PL1, a second phase leg PL2 and a third phase leg PL3. The phase legs are more particularly connected between a first DC pole PI and ground, where the mid points of the phase legs are connected to corresponding alternating current terminals ACA1, ACB1, ACC1. The current la output on the AC terminal ACA1 is also indicated. A phase leg is in this example divided into two halves, a first upper half and a second lower half, where such a half is also termed a phase arm.

The first DC pole PI furthermore has a first potential Vp that may be positive. The first pole PI may

therefore also be termed a positive pole. The pole may furthermore be part of a DC power transmission system such as a High Voltage Direct Current (HVDC) power transmission system. The AC terminals ACA1, ACB2, ACC3 may in turn be connected to an AC system, such as a flexible alternating current transmission system

(FACTS), for instance via a transformer. A phase arm between the first pole PI and a first AC terminal ACA1, ACB1 and ACC1 may be termed a first phase arm or an upper phase arm, while a phase arm between the first AC terminal and ground may be termed a second phase arm or a lower phase arm. As mentioned above, the type of voltage source

converter shown in fig. 1 is only one example of a multilevel converter where the invention may be used. It is for instance possible to provide the three phase legs in series with each other between the two poles, where these then make up a first set of phase legs. It is then possible to provide a second set of series- connected phase legs in parallel with the first set. In this case the midpoints of the phase legs of the first set forms primary AC terminals and the midpoints of the phase legs of the second set forms secondary AC

terminals for the three phases. The voltage source converter depicted in fig. 1 has an asymmetric monopole configuration. It is thus connected between a pole and ground. As an alternative it may be connected in a symmetric bipole configuration. In a symmetric bipole configuration there would be a second pole P2 having a second negative potential that may be as large as the first potential but with the opposite polarity. In the bipole configuration, there would furthermore be a third and a fourth phase arm in the phase leg, where the second and third phase arms would be connected to ground, the first phase arm connected between the positive voltage and the second phase arm and the fourth phase arm connected between the negative voltage of the second pole P2 and the third phase arm. A first AC terminal of a phase leg would in the

symmetric bipole configuration be provided between the first and second phase arms, while a second AC terminal of the same phase leg would be provided between the third and fourth phase arms. The phase arms are

furthermore connected to the AC terminals via phase reactors.

The phase arms of the voltage source converter 10 in the example in fig. 1 comprise cells. A cell is a unit that may be switched for providing a voltage

contribution to the voltage on the corresponding AC terminal. A cell then comprises one or more energy storage elements, for instance in the form of

capacitors, and the cell may be switched to provide a voltage contribution corresponding to the voltage of the energy storage element or a zero voltage

contribution. If more than one energy storage element is included in a cell it is possible with even further voltage contributions.

The cells are with advantage connected in series or in cascade in a phase arm. In the example given in fig. 1 there are five series- connected or cascaded cells in each phase arm. Thus the upper phase arm of the first phase leg PL1 includes five cells Clpl, C2pl, C3pl, C4pl and C5pl, while the lower phase arm of the first phase leg PL1 includes five cells Clnl, C2nl, C3nl, C4nl and C5nl . Across the cells of the upper phase arm there is a first phase arm voltage Vap and through the upper phase arm there runs a first phase arm current lap. As the upper phase arm is connected to the first pole PI it may also be considered to be a positive phase arm. Across the cells of the lower phase arm there is a second phase arm voltage Van and through the lower phase arm there runs a second phase arm current Ian. The upper phase arm is furthermore joined to the AC terminal ACA1 via a first or upper arm reactor Laarml, while the lower phase arm is joined to the same AC terminal ACA1 via a second or lower arm reactor Laarm2. In a similar fashion the upper phase arm of the second phase leg PL2 includes five cells Clp2, C2p2, C3p2, C4p2 and C5p2 while the lower phase arm of the second phase leg PL2 includes five cells Cln2, C2n2, C3n2, C4n2 and C5n2. Finally the upper phase arm of the third phase leg PL3 includes five cells Clp3, C2p3, C3p3, C4p3 and C5p3 while the lower phase arm of the third phase leg PL3 includes five cells Cln3, C2n3, C3n3, C4n3 and C5n3. The upper phase arms are furthermore joined to the corresponding AC terminals ACBl and ACCl via corresponding first or upper arm reactors Lbarml and Lcarml, respectively, while the lower phase arms are joined to the same AC terminal ACBl and ACCl via corresponding second or lower arm reactors Lbarm2 and Lcarm2, respectively. The number of cells provided in fig. 1 is only an example. It therefore has to be stressed that the number of cells in a phase arm may vary. It is often favorable to have many more cells in each phase arm, especially in HVDC applications. A phase arm may for instance comprise hundreds of cells. There may however also be fewer.

Control of each cell in a phase arm is normally done through providing the cell with a control signal directed towards controlling the contribution of that cell to meeting a reference voltage. The reference voltage may be provided for obtaining a waveform on the AC terminal of a phase leg, for instance a sine wave. In order to control the cells there is therefore a control unit 12.

The control unit 12 is provided for controlling all the phase arms of the converter. However, in order to simplify the figure only the control of the upper phase arm of the first phase leg PL is indicated in fig. 1.

The other phase arms are controlled in a similar manner in order to form output waveforms on the three AC terminals AC1, AC2 and AC3.

The control unit 12 may furthermore be used for some dedicated control with regard to handling of reactive power injection into the AC system during pole faults or with regard to operation at AC phase faults. These two situations will be described in more detail later.

There are a number of different cell types that can be used in the converter, such as full-bridge cells and half-bridge cells.

According to one variation of the invention all the cells of the upper phase arms are full-bridge cells, while all the cells in the lower phase arms are half- bridge cells or at least act as half-bridge cells when there is an AC side fault.

Fig. 2 shows a first version of a full-bridge cell FBA that is to be provided in the upper phase arm of the first phase leg.

The cell FBA is thus a full-bridge converter cell and includes an energy storage element, here in the form of a capacitor C, which is connected in parallel with a first group of switches SI and S2. The energy storage element C provides a voltage Udm, and therefore has a positive and negative end, where the positive end has a higher potential than the negative end. The switches SI and S2 in the first group are connected in series with each other, where each switch may be realized in the form of a switching element that may be an IGBT

(Insulated Gate Bipolar Transistor) transistor together with an anti-parallel unidirectional conducting

element. In fig. 2 the first switch SI has a first transistor Tl with a first anti-parallel diode Dl . The first diode Dl is connected between the emitter and collector of the transistor Tl and has a direction of conductivity from the emitter to the collector as well as towards the positive end of the energy storage element C. The second switch S2 has a second transistor T2 with a second anti-parallel diode D2. The second diode D2 is connected in the same way in relation to the energy storage element C as the first diode Dl, i.e. conducts current towards the positive end of the energy storage element C. The first switch SI is furthermore connected to the positive end of the energy storage element C, while the second switch S2 is connected to the negative end of the energy storage element C.

There is also a second group of series-connected switches S3 and S4. This second group of switches is here connected in parallel with the first group as well as with the energy storage element C. The second group includes a third switch S3, here provided through a third transistor T3 with anti-parallel third diode D3 and a fourth switch S4, here provided through a fourth transistor T4 with anti-parallel fourth diode D4. The fourth switch S4 is furthermore connected to the positive end of the energy storage element C, while the third switch S3 is connected to the negative end of the energy storage element C. Both the diodes D3 and D4 furthermore have a direction of current conduction towards the positive end of the energy storage element C. The switches in the second group are thus connected in series with each other. The switches are here also denoted cell switches.

This full-bridge cell FBA comprises a first cell connection terminal TEFBAl and a second cell connection terminal TEFB2, each providing a connection for the cell to the upper phase arm of the first phase leg of the voltage source converter. In this full-bridge cell the first cell connection terminal TEFBAl more

particularly provides a connection from the upper phase arm to the junction between the first and the second switches SI and S2, while the second cell connection terminal TEFBA2 provides a connection between the upper phase arm and a connection point between the third and fourth switches S3 and S4. The junction between the first and second switches SI and S2 thus provides one cell connection terminal TEFBAl, while the junction between the third and fourth switches S3 and S4 provides a second cell connection terminal TEFBA2.

These connection terminals TEFBAl and TEFBA2 thus provide points where the cell FBA can be connected to the upper phase arm of the first phase leg. The first cell connection terminal TEFBAl thereby joins the upper phase arm with the connection point or junction between two of the series-connected switches of the first group, here the first and second switches, while the second cell connection terminal TEFBA2 joins the upper phase arm with a connection point between two of the series connected switches of the second group, here between the third and fourth switches S3 and S4. The first cell connection terminal TEFBA1 furthermore faces the first pole and thereby couples the cell to the first pole, while the second cell connection terminal TEFBA2 faces the AC terminal of the phase leg and thereby couples the cell to the AC terminal.

The expression couple or coupling is intended to indicate that more components, such as more cells and inductors, may be connected between the pole and the cell, while the expression connect or connecting is intended to indicate a direct connection between two components such as two cells. There is thus no

component in-between two components that are connected to each other.

Fig. 3 schematically shows a first version of a half- bridge converter cell HBA that may be used in the upper phase arm of the first phase leg. Also this cell includes an energy storage element, here in the form of a capacitor C, which is connected in parallel with a group of switches. Also this energy storage element C provides a voltage Udm, and thus also has a positive and negative end, where the positive end has a higher potential than the negative end. The switches in this group are connected in series with each other. The group here includes a sixth and a fifth switch S6 and S5 (shown as dashed boxes) , where each switch S6, S5 may be realized in the form of a switching element that may be an IGBT (Insulated Gate Bipolar Transistor) transistor together with an anti-parallel

unidirectional conduction element, which may be a diode. In fig. 3 there is therefore a sixth switch S6 having a sixth transistor T6 with a sixth anti-parallel diode D6, where the diode D6 has a direction of current conduction towards the positive end of the energy storage element C and a fifth switch S5 connected in series with the sixth switch S4 and having a fifth transistor T5 with anti-parallel diode D5, where the diode D5 has the same direction of current conduction as the sixth diode D4. The sixth switch S6 is connected to the positive end of the energy storage element C, while the fifth switch S5 is connected to the negative end of the energy storage element C.

This first type of half-bridge cell HBA also comprises a first cell connection terminal TEHBA1 and a second cell connection terminal TEHBA2, each providing a connection for the cell to the upper phase arm of the first phase leg of the voltage source converter. In this first type of cell the first cell connection terminal TEHBA1 more particularly provides a connection from the upper phase arm to the junction between the sixth switch S6 and the capacitor C, while the second connection terminal TEHBA2 provides a connection from the upper phase arm to the junction between the sixth and the fifth switches S6 and S5. These cell connection terminals thus provide points where the cell can be connected to the upper phase arm. The second cell connection terminal TEHBA2 thus joins the phase arm with the connection point or junction between two of the series-connected switches of the first group, here the sixth and fifth switches S6 and S5, while the first cell connection terminal TEHBA1 joins the upper phase arm with a connection point between the sixth switch S4 and the positive end of the capacitor C. Also here the first cell connection terminal TEHBA1 faces the first pole, while the second cell connection terminal TEHBA2 faces the AC terminal of the phase leg.

Fig. 4 shows a second type of half-bridge cell HBB for connection in the lower phase arm of the first phase leg. It comprises a group of switches comprising a sixth and fifth switch S6 and S5 connected in the same way as the sixth and fifth switches of the first type of half-bridge cell. However, in this second type of half-bridge cell the first cell connection terminal TEHBB1 provides a connection from the lower phase arm to the junction between the sixth and the fifth

switches S6 and S5, while the second cell connection terminal TEHBB2 provides a connection from the lower phase arm to the junction between the fifth switch S5 and the negative end of the capacitor C. In this case the first cell connection terminal TEHBB1 faces the ground connection, while the second cell connection terminal TEHBB2 faces the AC terminal of the phase leg.

The half-bridge cell is a first type of cell having unipolar voltage contribution capability, while the full-bridge cell is a second type of cell having bipolar voltage contribution capability.

As can be seen in fig. 5, the control unit 12 may comprise a conversion control element 14 for providing regular control where an AC voltage waveform is formed, an AC fault handling element 16 and a pole fault handling element 18. The control unit 12 is with advantage implemented through using a computer with computer program code comprising computer program instructions providing the above-mentioned elements.

One problem that may exist in multilevel converters that employ full-bridge cells is that the voltage rating of the converter needs to be high in order to handle phase faults.

The equivalent circuit of a blocked traditional

asymmetric monopole converter that uses a mixture of half-bridge and full bridge cells with three phase legs during an AC phase ground fault is shown in fig. 6. The DC side of the converter has two capacitors connected between the pole PI and ground, each with the voltage Ud. The converter is traditional in the sense that both the first and second phase arms of all the phase legs comprise a mixture of regular full-bridge and half- bridge cells. The equivalent circuit in fig. 6 represents the

situation when there is an internal phase-to-ground fault, after which blocking of all cell switches has been made. An internal phase-to-ground-fault is not a fault in the connected AC system but an AC fault in the environment of the converter, such as in an AC busbar provided in a converter station.

As can be seen in the equivalent circuit in fig. 6, the upper or first phase arm of each phase leg comprises a first capacitive branch BR1 in series with a diode with a direction of current towards the first pole PI. This branch BR1 comprises the sum of the capacitances of the full bridge cell capacitors in the upper phase arm. There is also a second capacitive branch BR2 in series with a diode having a conduction direction away from the first pole. The second capacitive branch BR2 comprises the sum of capacitances of the full bridge cell capacitors in series with the sum of the

capacitances of the half-bridge cell capacitors in the upper phase arm. The first and second capacitive branches BR1 and BR2 are connected in parallel with each other. In a similar manner there is a third capacitive branch BR3 in series with a diode with a direction of current away from ground. This branch BR3 comprises the sum of the capacitances of the full bridge cell capacitors in the lower phase arm. There is also a fourth capacitive branch BR4 in series with a diode with a conduction direction towards ground. The fourth capacitive branch BR4 comprises the sum of capacitances of the full bridge cell capacitors in series with the sum of the capacitances of the half- bridge cell capacitors in the lower phase arm. The third and fourth capacitive branches BR3 and BR4 are connected in parallel with each other.

In case of a ground fault on one of the phases, this phase fault grounds the midpoint of the corresponding phase leg. The two other phase leg midpoints may then be seen as connected to AC voltage sources VAC1 and VAC2 via source impedances, which are typically

transformers. These voltages have, because of the transformer, been raised with a value of as

compared with before the fault.

This means that the peak voltage of the healthy phases after the converter transformer becomes ±1.732 Ud. At the negative peak of VAC = -1.732 Ud, this will charge the lower arm full-bridge capacitors from Ud to 1.732 Ud (73% overvoltage) , and charge the upper arm (both half and full bridge) capacitors from 2Ud to 3.732 Ud (87% overvoltage).

There is thus a considerable overvoltage that has to be handled by the converter. In asymmetric monopole and symmetric bipole system configurations, the upper converter arm thus faces an over voltage rating of almost 80%-90% when there is an AC converter internal fault. This overvoltage exceeds the typical blocking voltage of an IGBT.

This situation would typically have to be handled through redundancy, i.e. through using additional cells that are only used for voltage rating purposes. The size of the converter will thus have to be

unnecessarily large in order to handle the overvoltages caused by this type of fault.

It can be seen that if the third capacitive branch BR3 is short-circuited, then the overvoltage of the upper or first phase arm would be drastically limited.

This insight has been be used for providing a converter design according to the invention in which the energy storage elements of all the converter cells of the lower or second phase arm are configured to be bypassed in case of a phase fault on the AC side of the multilevel converter. A first aspect of the invention is directed towards this.

One first way in which the above-mentioned short- circuiting may be obtained is through only connecting unipolar cells in a phase arm that stretches between an AC terminal and ground. Thereby the cells with two voltage contribution polarities, such as regular full- bridge cells, are all connected in a branch between a pole and an AC terminal. This situation is

schematically shown in fig. 7 for a converter with a asymmetric monopole structure. As can be seen only half-bridge cells are connected in the lower or second phase arm, while all the full bridge cells that have dual polarity voltage contributing abilities are connected in the upper phase arm. In this way the cell capacitors in the lower or second phase arm are

automatically bypassed as the cell switches are blocked during the AC fault. It should here be realized that it is possible that also half-bridge cells may be

connected in the upper or first phase arm as long as the required pole fault current limiting ability is retained . The operation of this converter is the following. The

AC fault handling element 16 of the control unit 12 may detect an AC bus fault on the AC side of the converter, for instance based on measured currents and/or

voltages. This detection may be the detection of an AC fault on any of phases. Therefore, when a converter station internal phase-to-ground fault occurs, all the cell switches are blocked by the AC fault handling element 16 of the control unit 12. Thereby the energy storage elements of all the converter cells of the half-bridge cells in the second phase arm are also controlled to be bypassed. At the negative peak of VAC (-1.732 Ud) , the low arm diode conducts with high surge current. This is the same case as a normal half-bridge converter. The surge current creates voltage drops across the source

impedance. If it is assumed that Lac, i.e. the

inductance associated with the AC source VAC1 or VAC2 is approximately equal to Larm, then the midpoint voltage between the upper and lower arms is

approximately -0.866 Ud. This charges the upper arm (both half and full bridges) capacitors from 2 Ud to 2.866 Ud (43% overvoltage) . This overvoltage level is the same as for a normal half-bridge converter, and will be further reduced if the source impedance Lac is higher than the arm impedance Larm. It can thus be seen that the overvoltage handled by the upper phase arm is considerably reduced.

It may be of interest to have dual-polarity cells in the second phase arm. In order to obtain a bypass of the capacitors of these cells a bypass switch may be provided in the dual polarity cells in the second phase arm, which dual polarity cells are here the above described full bridge cells. The second phase arm thus comprises at least some full-bridge cells, where all are provided with a bypass switch that can be

controlled to bypass the cell capacitor. As is

indicated in fig. 6, full-bridge cells in the lower arm can charge up to the line voltage in a negative cycle and cause the over voltage in the upper arm of the converter. In order to avoid the lower arm charging, this variation proposes a bypassing of the full-bridge capacitors .

One variation of a full-bridge cell FBB having a bypass switch is shown in fig. 8. The bypass switch may be provided as a thyristor switch TH and placed as a part of the third switch S3 in parallel with the third transistor T3. It may thus be a part of a cell switch used in the control of the cell voltage contribution made by the cell.

The thyristor switch TH furthermore has a current conduction direction that is the opposite of the current conduction direction of the diode D3 of the switch S3.

A converter having the second type of full-bridge cell is schematically shown in fig. 9. As can be seen both the upper and lower phase arms comprise full-bridge and half-bridge cells of the first and second types. The cells of the first variations FBA and HBA are then placed in the upper phase arm and the cells of the second variations FBB and HBB in the lower phase arm. This type of bypassing may also reduce the current rating of the diodes in addition to lowering the voltage rating of the upper phase arm. In this case the AC fault handling element 16 of the control unit 12 may in addition to blocking the cell switches when a converter station internal phase-to- ground fault occurs, activate the bypass switches to bypass corresponding energy storage elements when the phase fault occurs on the AC side of the multilevel converter. The AC fault handling element 16 may thus also close the bypass switches. This closing may be delayed in relation to the blocking. The closing may take place about 0.5 - 2 ms after the blocking. The AC fault handling element 16 of the control unit 12 may thus be configured to switch on the bypass switch TH of all full-bridge cells in the second or lower phase arm when an AC fault is detected. This detection may be the detection of an AC fault on another phase than the phase the phase leg in question is connected to. The closing of the bypass switches TH will lead to the short-circuiting of the above-mentioned third

capacitive branch BR3 and thereby the phase arm

inductance is grounded. This will in turn lead to a lowering of the rating of the upper phase arm.

The bypass switch is not necessarily connected in parallel with the third transistor T3, but may instead be connected between the two cell connection terminals with a current conduction direction towards the AC phase terminal of the phase leg. This is schematically shown in fig . 10.

Another alternative of a bypass switch that is a part of a cell switch used in the control of the cell voltage contribution is to implement the switch S3 as an Integrated Gate-Commutated Thyristor (IGCT) with anti-parallel diode instead of an IGBT with anti- parallel diode. In case of a fault on an AC phase, the IGCT is then switched on (while the other switches are blocked) and thereby the full-bridge capacitor is bypassed. The surge current capability of IGCT is 10 times higher than that of IGB . The IGCT also has a stable short circuit failure behavior. The examples above were all related to asymmetric monopole converters. However, the above described teachings may all be used also in symmetric bipole converters. In a phase leg of such a converter

configuration there is a first phase arm corresponding to the above-mentioned upper phase arm and a second phase arm corresponding to the above-mentioned lower phase arm connected in series between a first pole and ground, where the first AC terminal is provided between these two phase arms. However in addition to these phase arms there is a third phase arm between ground and a second AC terminal and a fourth phase arm between the second AC terminal and a second pole. In this case the third phase arm will be configured in the same way as the second phase arm, i.e. configured so that all the cell capacitors of the third phase arm are bypassed in case of a phase to ground fault either through only comprising half-bridge cells or through dual polarity cells with bipolar voltage contributions with bypass switches, such as full-bridge cells with bypass

switches, while the fourth phase arm, just as the first phase arm, comprises dual polarity cells with bipolar voltage contributions without bypassing options. A converter only comprising full-bridge cells of the first type in the first and fourth phase arms and half- bridge cells in the second and third phase arms, is schematically shown in fig. 11. This has the same structure as that in fig. 7 but mirrored around a ground potential. This means that an upper half of the converter comprising the first and second phase arms is the same as that shown in fig. 7. The lower half then comprises the third and fourth phase arms, where all the half-bridge cells are connected in the third phase arm and all the full bridge cells are provided in the fourth phase arm. Each phase leg also comprises two AC terminals ACA1, ACA2, ACB1, ACB2, ACC1 and ACC2.

It should furthermore be realized that the full bridge cells for which the various bypass solutions are applied is not limited to the described regular full- bridge cells, but can be used also for other dual polarity cells, such as hybrid full bridge cells, so- called clamped double cells or asymmetric monopole mixed cells. The concept may thus be used for any type of cell having a bipolar voltage contribution using at least one energy storage element.

A hybrid full-bridge cell is in the context discussed here defined as a full-bridge cell where one bridge unit of a regular full-bridge cell comprising at least one switching element anti-parallel unidirectional conducting element pair is replaced by at least one unidirectional conducting element. A hybrid full-bridge cell in the definition used here is in one specific example thus a full-bridge where one of the switches is replaced by a diode. Thereby the cell can furthermore be termed an asymmetric full-bridge cell or an

asymmetric hybrid full-bridge cell.

Fig. 12 shows an example of an asymmetric monopole converter with hybrid full-bridge cells using an IGCT as bypass switch in the second phase arm. Fig. 13 shows a variation of the asymmetric monopole converter of fig. 12, where the full-bridge cells are replaced by clamped double cells. In the clamped double cell the IGCT is provided as a part of an

interconnecting switch interconnecting two cell halves, where each cell half is made up of a half-bridge.

The invention according to the previously described aspects has a number of advantages. It reduces the cost by having 50% full-bridge cells in converter phase instead of 100% FB arms for DC current fault blocking capability within the converter. It avoids the extra rating and thus provides a cost reduction of converter by minimizing the AC fault phase to ground over rating (from 80% to 40%) . It minimizes converter loss by reducing the over voltage rating. At the same time it enables the provision of full DC fault blocking

capability without DC breaker and avoids an extra rating of diodes.

As mentioned earlier, the reason for using full-bridge cells is in order to limit and sometimes also block fault currents in case of a DC pole fault, such as a pole-to-pole fault or a pole-to-ground fault. When there is a pole-to-ground fault the voltage at the AC terminal of a phase leg can be considered as forming an AC voltage source VAC feeding the phase leg with an AC voltage. When such a fault occurs, the switching elements of all the switches may be opened by the control unit of the converter. The fault current will, when running towards pole or ground, bypass the capacitor of any half-bridge cell but run through the capacitor of the full bridge cells of the corresponding phase arm thereby limiting the fault current.

When there are pole faults on one or more poles of the converter, it may additionally be of interest to inject reactive power into the AC system via the AC terminals, such as the first AC terminal ACAl of the first phase leg PL1. If for instance there is a pole to ground fault on the first pole PI, then the lower phase arm may be used for such injection, while the cells in the upper phase arm are being blocked.

If for instance there is a fault on the first pole PI, then the positive pole voltage drops partially or fully depending on the fault impedance, i.e., Vdp = 0~Vfault and Vfault < 2Ud.

When such a fault is detected, which may be detected by the pole fault handling element 18, all switches in the first phase arm as well as second phase arm are

blocked. If there are bypass switches in the second arm, these remain switched off. The pole fault handling element 18 may then investigate if the DC fault current has reached a current limitation threshold, which may be that a zero current has been reached or that a current level has been reached where the operation of the cells is not jeopardized well as if any of the cells have an over voltage. It may keep all switches blocked until this situation is reached. If the current limitation threshold level is set to be zero, then this blocking will result in zero current in all the upper phase arms, i.e. lap = Ibp = Icp = 0. As a result, the DC fault current will also become zero.

When the DC fault current has reached the current limitation threshold and there is no cell overvoltage, the pole fault handling element 18 may then deblock the switches in the second phase arm. These deblocked switches are then controlled by the pole fault handling element 18 to deliver reactive power to the AC terminal ACA1.

Reactive power current may then be supplied from the second phase arm cells, which in fig. 7 would be the lower arm half-bridge cells.

In order to supply reactive power, the lower-arm half bridge cells are then inserted, under the control of the pole fault handling element 18, in the phase leg to synthesize an AC voltage waveform with a DC voltage offset, V_an = U_D + V_l sin( cot) > 0 , where the AC output voltage Va = Van. As can be seen the DD offset may be half the pole voltage 2Ud.

Fig. 14 schematically shows the injected current Ian as well as the upper phase leg current lap during a pole fault together with the corresponding phase leg

voltages Van and Vap . It can also be seen that as the first pole is grounded, the voltage Vap across the first phase arm will be the opposite to the voltage generated by the lower phase arm. In this way reactive power is injected to an AC system from an asymmetric monopole system.

If there is a pole fault in a bipole system, the same operation would be applied. A pole fault on the first pole PI would result in the same type of operation described above. In the case of a pole to ground fault on the second pole P2, then the cells of the third phase arm may be used for injecting reactive power, while the cells in the fourth phase arm are being blocked .

In case there is a pole-to-pole fault in a symmetric bipole system, then the cells of the second and third phase arms may be used for injecting reactive power, while the cells in first and fourth phase arms are blocked .

When there is a mixture of full-bridge cells and half bridge cells in a phase arm, the distribution between them may vary. The percentage of full bridge cells in a phase arm may for instance vary between 20 and 100%. As an alternative it may vary between 20 and 50%. 50% is normally the percentage required for full fault current blocking ability. A higher percentage may be wanted if redundancy is an issue, while a lower may be used if only fault current limitation is desired. The other cells, i.e. the cells that are not full-bridge cells, are furthermore not necessarily half-bridge cells. They can also be full-bridge cells or clamped double-cells. It is furthermore possible with a

different distribution of full-bridge cells in the two phase arms. The full-bridge cells may furthermore be provided in other types of converters than the ones shown, such as in converters that employ full bridge- cells combined with director switches, which director switches operate at a fundamental frequency for

selectively connecting an AC terminal to a waveform produced by cells in a phase arm.

From the foregoing discussion it is evident that the present invention can be varied in a multitude of ways. It shall consequently be realized that the present invention is only to be limited by the following claims .

Claims

1. A multilevel converter (10) configured to convert between alternating current (AC) and direct current (DC) and comprising

a phase leg (PL1) having a first and a second phase arm, said first phase arm being connected between a first pole (PI) and a first AC terminal (ACA1) and the second phase arm being connected between the first AC terminal (ACA1) and ground,

said phase leg comprising cells of a first type (HBA; HBB) having a unipolar voltage contribution and cells of a second type (FBA; FBB) having a bipolar voltage contribution, where each cell comprises at least one energy storage element (C) for providing said voltage contribution and cell switches (SI, S2, S3, S4; S5, S6) for controlling the voltage contribution,

2. The multilevel converter according to claim 1, wherein all cells of the second phase arm are cells of the first type, the energy storage elements of which are automatically bypassed as the cell switches are blocked during such AC side faults.

3. The multilevel converter according to claim 2, wherein all cells of the first phase arm are cells of the second type.

4. The multilevel converter according to claim 1, wherein at least some of the cells of the second phase arm are cells of the second type, each comprising a bypass switch (TH) controllable to bypass the

corresponding energy storage element.

5. The multilevel converter according to claim 4, wherein the bypass switch is provided as a part of a cell switch used in control of the voltage contribution by the cell.

6. The multilevel converter according to claim 4, wherein the bypass switch is connected between cell connection terminals (TEFBB1, TEFBB2) used for

connecting the cell to the phase arm.

7. The multilevel converter according to any previous claim, further comprising a control unit (12)

configured to control, when there is a pole fault on a pole connected to an AC terminal via a phase arm, the cells of another phase arm connected between the AC terminal and ground to synthesize an AC voltage

waveform for injecting reactive power into the AC terminal .

8. The multilevel converter according to claim 7, wherein the waveform comprises a DC component that has a value being half the pole voltage.

9. The multilevel converter according to any previous claim, the phase leg further comprising a third phase arm between a second AC terminal (ACA2) and ground and a fourth phase arm between the second AC terminal and a second pole (P2), wherein the fourth phase arm

comprises at least one cell of the second type and the energy storage elements of all the converter cells of the third phase arm are configured to be bypassed in case of a phase fault on the AC side of the multilevel converter .

10. A method of controlling fault handling in a phase leg (PL1) of a multilevel converter converting between alternating current (AC) and direct current (DC) , the phase leg (PL1) having a first and a second phase arm, said first phase arm being connected between a first pole (PI) and a first AC terminal (ACA1) and the second phase arm being connected between the first AC terminal (ACA1) and ground, said phase leg comprising cells of a first type having a unipolar voltage contribution and cells of a second type having a bipolar voltage

contribution, where each cell comprises at least one energy storage element for providing said voltage contribution and cell switches (SI, S2, S3, S4; S5, S6) for controlling the voltage contribution, the method comprising

upon the detection of a phase fault on the AC side of the multilevel converter,

blocking cell switches of the cells in the phase leg, and

controlling the energy storage elements of all the converter cells in the second phase arm to be bypassed.

11. The method according to claim 10, wherein at least some of the cells of the second phase arm are cells of the second type, each comprising a bypass switch (TH) and the controlling comprises activating the bypass switches to bypass corresponding energy storage

elements when the phase fault occurs on the AC side of the multilevel converter.

12. The method according to claim 11, wherein at least one bypass switch is provided as a part of a cell switch used in control of the voltage contribution by a corresponding cell.

13. The method according to claim 11 or 12, wherein at least one bypass switch is connected between cell connection terminals (TEFBB1, TEFBB2) used for

connecting a corresponding cell to the phase arm.

14. The method according to any of claims 10 - 13, the phase leg further comprising a third phase arm between a second AC terminal (ACA2) and ground and a fourth phase arm between the second AC terminal (ACA2) and a second pole (P2), the method further comprising

controlling the energy storage elements of all the converter cells in the third phase arm to be bypassed in case of a phase fault on the AC side of the

multilevel converter.

15. The method according to any of claims 10 - 14, wherein the fault occurs on another phase than the phase to which the first AC terminal is connected.

16. The method according to any of claims 10 - 15, further comprising detecting a DC fault on a pole (PI) connected to an AC terminal via a phase arm, blocking the switches of the cells of the phase leg until a DC fault current is cleared, deblocking, after clearing of a DC fault current, the cells of another phase arm connected between the AC terminal and ground and controlling the deblocked cells to synthesize an AC voltage waveform for injecting reactive power into the AC terminal .