WO2015107392A1

WO2015107392A1 - Systems and methods for basis function orthogonalization for digital predistortion

Info

Publication number: WO2015107392A1
Application number: PCT/IB2014/058343
Authority: WO
Inventors: Mark Edward Rollins; Arthur Thomas Gerald Fuller
Original assignee: Telefonaktiebolaget L M Ericsson (Publ)
Priority date: 2014-01-16
Filing date: 2014-01-16
Publication date: 2015-07-23

Abstract

Systems and methods are disclosed for digitally predistorting an input signal of a non-linear subsystem according to a digital predistortion model that orthogonalizes a set of basis functions of the digital predistortion model to provide improved numerical stability for single band and multi-band systems. In some embodiments, the digital predistortion model orthogonalizes outputs of a set of basis functions that includes both primary basis functions for a frequency band and at least one additional basis function. In some embodiments, the at least one additional basis function includes a delayed version(s) of one or more of the primary basis functions. In other embodiments, the non-linear subsystem is a concurrent multi-band system, and the at least one additional basis function includes primary basis functions for one or more additional frequency bands.

Description

SYSTEMS AND METHODS FOR BASIS FUNCTION ORTHOGONALIZA TION

FOR DIGITAL PREDISTORTION

Field of the Disclosure

[0001] The present disclosure relates to digital predistortion and more specifically relates to basis function orthogonalization for digital predistortion.

Background

[0002] A radio frequency transmitter includes a power amplifier that operates to amplify a signal to be transmitted to a power level that is sufficient to enable receipt of the signal by a remote receiver. Radio frequency transmitters satisfy specifications for signal levels at frequencies other than the intended

transmission frequencies. Some specifications are set by government regulatory bodies, while others are set by radio communications standards such as the 3^rd Generation Partnership Project (3GPP) standards or the IEEE 802.1 1 standards. One specification is adjacent channel power, which is directly related to power amplifier linearity. Power amplifier linearity corresponds to an ability to reproduce an amplified version of the input signal. Also, power amplifiers are often described in terms of their efficiency, which is defined as some comparison between average transmit signal power and total average power required to generate the transmit signal power.

[0003] At a circuit level, power amplifier linearity may be achieved by biasing transistors in such a manner that the power amplifier operates in a linear fashion. However, doing so has a cost in terms of very low operating efficiency. Power amplifiers are typically most efficient when operated at or near the saturation point. However, the response of the power amplifier when operating at or near the saturation point is non-linear. Thus, while many modern power amplifiers are configured to operate at maximum efficiency, these power amplifiers exhibit nonlinear behavior (i.e., have poor linearity).

[0004] One way to correct for the non-linear characteristic of a power amplifier is to utilize Digital Predistortion (DPD) to digitally predistort the input signal of the power amplifier to compensate for distortion resulting from the non-linear characteristic of the power amplifier. In effect, the predistortion applied to the input signal is the inverse of the distortion introduced by the power amplifier. Typically, the predistortion (i.e., a distortion function) is modeled as a sum of a number of output signals produced from non-orthogonal basis functions weighted by a corresponding set of tap coefficients.

[0005] Conventional DPD systems exhibit a lack of robustness due to numerical instability issues of matrix inversion computations utilized for predistortion which result from the non-orthogonality of the basis functions employed by the DPD actuator (i.e., the predistorter). As discussed below in detail, U.S. Patent No. 8,368,466, entitled ORTHOGONAL BASIS FUNCTION SET FOR DIGITAL PREDISTORTER, which issued on February 5, 2013, discloses systems and methods for orthogonalizing basis function output signals. However, the techniques disclosed in U.S. Patent No. 8,368,466 still result in less than optimal numerical stability for the matrix inversion computations for DPD systems with strong memory effects.

[0006] As such, there is a need for systems and methods for orthogonalizing basis function output signals that provides high numerical stability for the matrix inversion computations, particularly for DPD systems with strong memory effects.

Summary

[0007] Systems and methods are disclosed for digitally predistorting an input signal of a non-linear subsystem according to a digital predistortion model that orthogonalizes a set of basis functions of the digital predistortion model to provide improved numerical stability for single band and multi-band systems. In some embodiments, the digital predistortion model orthogonalizes outputs of a set of basis functions that includes both primary basis functions for a frequency band and at least one additional basis function. In some embodiments, the at least one additional basis function includes a delayed version(s) of one or more of the primary basis functions. In this manner, high numerical stability is provided for matrix inversion operations utilized to train the digital predistortion model even when the non-linear subsystem has strong memory effects. In other embodiments, the non-linear subsystem is a concurrent multi-band system, and the at least one additional basis function includes primary basis functions for one or more additional frequency bands. In this manner, improved numerical stability is provided for matrix inversion operations utilized to train the digital predistortion model for the concurrent multi-band system.

[0008] In one embodiment, one or more digital input signals are processed according to a digital predistortion model that orthogonalizes a set of basis functions for the digital predistortion model that comprises a first plurality of primary basis functions for a first frequency band and at least one additional basis function to provide one or more predistorted digital input signals. The one or more predistorted digital input signals are provided to a non-linear subsystem to thereby compensate for a non-linear characteristic of the non-linear

subsystem.

[0009] In one embodiment, processing the one or more digital input signals according to the digital predistortion model includes processing the one or more digital input signals according to the first primary basis functions for the first frequency band to thereby provide first primary basis function output signals and, according to the at least one additional basis function, to provide at least one additional basis function output signal. The processing of the one or more digital input signals further includes orthogonalizing the first primary basis function output signals and the at least one additional basis function output signal to provide first orthogonalized primary basis function output signals and at least one additional orthogonalized basis function output signal, and processing the first orthogonalized primary basis function output signals and the at least one additional orthogonalized basis function output signal to provide the one or more predistorted digital input signals for the first frequency band.

[0010] In one embodiment, the first primary basis function output signals and the at least one additional basis function output signal are orthogonalized via a two-dimensional lattice orthogonalizer. In another embodiment, the first primary basis function output signals and the at least one additional basis function output signal are orthogonalized via a recursive QR Decomposition Based Recursive Least Squares (QR-RLS) orthogonalizer.

[0011 ] In one embodiment, the at least one additional basis function includes an additional basis function that provides a delayed version of one of the first primary basis function output signals. In another embodiment, the at least one additional basis function includes, for each primary basis function output signal of the first primary basis function output signals, a number (M-1 ) of additional basis functions that provide different delayed versions of the primary basis function output signal as corresponding ones of the at least one additional basis function output signal, where M is a desired memory depth and is greater than or equal to 1 .

[0012] In one embodiment, the one or more digital input signals include two or more digital input signals for two or more frequency bands of a concurrent multi- band signal, the one or more predistorted digital input signals include two or more digital input signals for the two or more frequency bands of the concurrent multi-band signal, and the non-linear subsystem is a concurrent multi-band system that operates on the two or more predistorted input signals to provide the concurrent multi-band signal. The two or more frequency bands include the first frequency band and one or more additional frequency bands. Further, in one embodiment, the at least one additional basis function includes, for each additional frequency band, additional primary basis functions for the additional frequency band of the concurrent multi-band signal. In one embodiment, the at least one additional basis function further includes, for each primary basis function output signal of the first primary basis function output signals and each additional primary basis function output signal of the additional primary basis functions for the additional frequency bands, a number (M-1 ) of additional basis functions that provide different delayed versions of the primary basis function output signal, where M is a desired memory depth and is greater than or equal to 1 .

[0013] Those skilled in the art will appreciate the scope of the present disclosure and realize additional aspects thereof after reading the following detailed description of the embodiments in association with the accompanying drawing figures.

Brief Description of the Drawing Figures

[0014] The accompanying drawing figures incorporated in and forming a part of this specification illustrate several aspects of the disclosure, and together with the description serve to explain the principles of the disclosure.

[0015] Figure 1 illustrates a single band transmitter that includes a

conventional Digital Predistortion (DPD) system;

[0016] Figure 2 illustrates one embodiment of a DPD actuator, or model of the DPD actuator, of the DPD system of Figure 1 that utilizes a set of basis functions having non-orthogonal output signals;

[0017] Figure 3 illustrates another embodiment of the DPD actuator, or model of the DPD actuator, of the DPD system of Figure 1 that is similar to that of Figure 2 but further includes a Two-Dimensional (2-D) lattice orthogonalizer that orthogonalizes the output signals of the set of basis functions;

[0018] Figures 4 through 6 illustrate the 2-D lattice orthogonalizer of Figure 3 in more detail;

[0019] Figure 7 illustrates a single band transmitter that includes a DPD actuator that operates according to a DPD model that includes a number of delay basis functions and an orthogonalizer that orthogonalizes output signals of the delay basis functions according to one embodiment of the present disclosure;

[0020] Figure 8 is a more detailed illustration of the DPD actuator, or a digital predistortion model of the DPD actuator, of Figure 7 according to one

embodiment of the present disclosure;

[0021] Figure 9 illustrates the DPD actuator, or a digital predistortion model of the DPD actuator, of Figure 8 according to one embodiment in which the orthogonalizer is a 2-D lattice orthogonalizer;

[0022] Figures 10 through 12 illustrate the 2-D lattice orthogonalizer of Figure 9 in more detail according to one embodiment of the present disclosure; [0023] Figure 13 illustrates the DPD actuator, or a digital predistortion model of the DPD actuator, of Figure 8 according to one embodiment in which the orthogonalizer is a recursive QR Recursive Least Squares (QR-RLS)

orthogonalizer;

[0024] Figure 14 graphically illustrates one example of the operation of the QR-RLS orthogonalizer of Figure 13 according to one embodiment of the present disclosure;

[0025] Figures 15 and 16 graphically illustrate a spectral broadening phenomenon introduced into the orthogonalized output samples as a result of tap noise introduced by a non-unity value of the forgetting factor;

[0026] Figure 17 illustrates a concurrent multi-band transmitter that includes, for each frequency band, a DPD actuator that operates according to a DPD model that includes a number of delay basis functions and an orthogonalizer that orthogonalizes output signals of the delay basis functions according to one embodiment of the present disclosure;

[0027] Figure 18 is a more detailed illustration of the DPD actuator for one of the frequency bands, or a digital predistortion model of the DPD actuator for one of the frequency bands, of Figure 17 according to one embodiment of the present disclosure;

[0028] Figure 19 illustrates the DPD actuator, or a digital predistortion model of the DPD actuator, of Figure 18 according to one embodiment in which the orthogonalizer is a 2-D lattice orthogonalizer;

[0029] Figures 20 through 22 illustrate the 2-D lattice orthogonalizer of Figure 19 in more detail according to one embodiment of the present disclosure;

[0030] Figure 23 illustrates the DPD actuator, or a digital predistortion model of the DPD actuator, of Figure 19 according to one embodiment in which the orthogonalizer is a recursive QR-RLS orthogonalizer;

[0031] Figure 24 illustrates the DPD subsystem of Figure 17 in more detail according to another embodiment of the present disclosure in which a single orthogonalizer orthogonalizes all basis function output signals of all delay basis functions for all frequency bands; [0032] Figure 25 is a more detailed illustration of the DPD actuator for one of the frequency bands, or a digital predistortion model of the DPD actuator for one of the frequency bands, of Figure 17 according to another embodiment of the present disclosure;

[0033] Figure 26 illustrates the DPD actuator, or a digital predistortion model of the DPD actuator, of Figure 25 according to one embodiment in which the orthogonalizer is a 2-D lattice orthogonalizer;

[0034] Figure 27 illustrates the DPD actuator, or a digital predistortion model of the DPD actuator, of Figure 25 according to one embodiment in which the orthogonalizer is a recursive QR-RLS orthogonalizer;

[0035] Figure 28 illustrates the DPD subsystem of Figure 17 in more detail according to another embodiment of the present disclosure in which a single orthogonalizer orthogonalizes all primary basis function output signals for all primary basis functions for all frequency bands;

[0036] Figure 29 is a flow chart that illustrates a digital predistortion process according to one embodiment of the present disclosure;

[0037] Figure 30 illustrates one embodiment of processing one or more digital input signals to provide one or more predistorted digital input signals according to the first step of Figure 29;

[0038] Figure 31 is a more detailed illustration of the first step of the process of Figure 30 according to one embodiment of the present disclosure;

[0039] Figure 32 is a more detailed illustration of the first step of the process of Figure 30 according to another embodiment of the present; and

[0040] Figure 33 is a more detailed illustration of the first step of the process of Figure 30 according to yet another embodiment of the present disclosure.

Detailed Description

[0041] The embodiments set forth below represent information to enable those skilled in the art to practice the embodiments and illustrate the best mode of practicing the embodiments. Upon reading the following description in light of the accompanying drawing figures, those skilled in the art will understand the concepts of the disclosure and will recognize applications of these concepts not particularly addressed herein. It should be understood that these concepts and applications fall within the scope of the disclosure and the accompanying claims.

[0042] Systems and methods are disclosed for digitally predistorting an input signal of a non-linear subsystem according to a digital predistortion model that orthogonalizes a set of basis functions of the digital predistortion model to provide improved numerical stability for single band and multi-band systems. In some embodiments, the digital predistortion model orthogonalizes outputs of a set of basis functions that includes both primary basis functions for a frequency band and at least one additional basis function. In some embodiments, the at least one additional basis function includes a delayed version(s) of one or more of the primary basis functions. In this manner, high numerical stability is provided for matrix inversion operations utilized to train the digital predistortion model even when the non-linear subsystem has strong memory effects. In other

embodiments, the non-linear subsystem is a concurrent multi-band system, and the at least one additional basis function includes primary basis functions for one or more additional frequency bands. In this manner, improved numerical stability is provided for matrix inversion operations utilized to train the digital predistortion model for the concurrent multi-band system.

[0043] Before discussing embodiments of the present disclosure, a discussion of existing Digital Predistortion (DPD) technology with respect to Figures 1 through 6 is beneficial. In this regard, Figure 1 illustrates a single-band transmitter 10 that includes a conventional DPD system 12. The DPD system 12 includes a DPD actuator 14 and an adaptor, which in this embodiment is a predistorter tap weight evaluation function 16. As illustrated, the transmitter 10 includes a source 18, the DPD actuator 14, upconversion and Digital-to-Analog (D/A) conversion circuitry 20, and a Power Amplifier (PA) 22. Notably, the transmitter 10 is single-band in that only one contiguous band of frequency is input to the PA 22. With respect to cellular communications networks, note that the term "contiguous" applies in the sense of spectral allocation to a network operator where a single contiguous frequency band is allocated to that lone operator. The operator may elect to populate that band with one or more transmitted signals. The upconversion and D/A conversion circuitry 20 and the PA 22 form a non-linear subsystem having a non-linear characteristic. The PA 22 is operated in a non-linear mode (i.e., at or near saturation) and, as such, the non-linear characteristic of the non-linear subsystem is more particularly a nonlinear characteristic of the PA 22. The transmitter 10 also includes a feedback path including a transmit observation receiver 24 including downconversion and digitization circuitry 26 as well as the predistorter tap weight evaluation function 16. The downconversion and digitization circuitry 26 is coupled to an output of the PA 22 via a coupler 28.

[0044] In operation, the source 18 outputs a digital input signal u (n) , which is a complex-valued baseband information bearing signal. The DPD actuator 14 is configured by the predistorter tap weight evaluation function 16 to apply a desired predistortion to the digital input signal u (n) to thereby provide a predistorted digital input signal y {n) , which is also a complex valued signal. The desired predistortion is, or is approximately, an inverse of a distortion caused by the non-linear characteristic of the PA 22, which in turn effectively linearizes the PA 22. The predistorted digital input signal y (n) is upconverted to a desired carrier frequency and D/A converted by the upconversion and D/A conversion circuitry 20 to provide a radio frequency analog input signal ¾ (n) to the PA 22.

Notably, the predistorted digital input signal y (n) may be upconverted and D/A converted by, for example, Digital Radio Frequency (DRF) upconversion followed by D/A conversion or D/A conversion followed by analog upconversion. The PA

22 amplifies the radio frequency analog input signal ¾ (n) to provide a radio frequency analog output signal z₀ {n) .

[0045] In the feedback path, the downconversion and digitization circuitry 26 downconverts and digitizes the radio frequency analog output signal z₀ {n) to provide a digital feedback signal, which may in some example embodiments be at baseband. The predistorter tap weight evaluation function 16 utilizes a desired adaptation scheme to update, or dynamically configure, tap weights applied by the DPD actuator 14. As discussed below, the DPD actuator 14 generally operates according to a DPD model in which a number of basis function output signals are weighted according to the tap weights and combined to provide the predistorted digital input signal y {n) . As such, the predistorter tap weight evaluation function 16 dynamically configures the tap weights such that the predistortion applied by the DPD actuator 14 minimizes the effects of the distortion of the PA 22.

[0046] Figure 2 illustrates one embodiment of the DPD actuator 14, or a DPD model for the DPD actuator 14, of Figure 1 in more detail. As illustrated, the DPD actuator 14 includes a number (B) of branches 30-1 through 30-B, where B is a number of basis functions used to provide the desired predistortion. As illustrated with respect to branch 30-b, the branch 30-b includes a basis function 32 (also referred to as basis function b), a tapped delay line memory model 34 includes a series of delays 36-1 through 36-M where M is a memory depth of the DPD model, a number of multipliers 38-0 through 38-M, and a number of combiners 40-1 through 40-M connected as shown. In the same manner, the other branches 30 also include basis functions 32, tapped delay line memory models 34, multipliers 38, and combiners 40. In general, each j-th branch output (where j e 1,... , B ) consists of a sum of (1 +M) terms Sj (n) , Sj (n -M ) produced at the output of a tapped delay line driven by a non-linear basis function ψ_} {-) operating on the current input sample u (n) . The complex-valued tap weights {w_bi } for ί = 0, ... , M are set by the predistorter tap weight evaluation function 16 of Figure 1 to synthesize the desired predistortion response.

[0047] Again using the branch 30-b as an example, in operation, the basis function 32 ( ¾, (^■) ) processes the digital input signal u (n) to provide a basis function output signal s_b (n) . The basis function output signal s_b (n) is passed through the tapped delay line memory model 34 such that the delays 36-1 through 36-M output different delayed versions of the basis function output signal s_b (n) , which are referenced as s_b (n -l) , s_b (n -M ) . The signals s_b (n) through s_b (n -M ) are referred to as tap output signals. The multipliers 38-0 through 38-M apply tap weights w_b1 through w_bM (configured by the predistorter tap weight evaluation function 16) to the tap output signals s_b (n) through s_b (n -M ) , respectively. The weighted tap output signals are then combined by the combiners 40-1 through 40-M. In the same manner, the other branches 30 output branch output signals. The branch output signals of the branches 30-1 through 30-B are combined by combiners 42 to provide the predistorted digital input signal y (n) .

[0048] The DPD actuator 14 of Figure 2 (which is a DPD actuator with memory) can be represented as:

M B

y {ⁿ) = ∑w_{j Sj} {n - i)

. (1 )

Equation (1 ) applies for any desired predistortion scheme. Some popular predistortion schemes are listed below, but some other predistortion schemes are predistortion schemes based on the classical polynomials or even the

Zernike polynomials (see Leticia Aladren et al., "High Power Amplifier

Linearization Using Zernike Polynomials in a LTE Transmission," 2012 IEEE Vehicular Technology Conference (VTC Fall), September 3-6, 2012, pages 1 -5 (hereinafter "Aladren). Some popular predistortion schemes are:

• A memory polynomial predistortion scheme such as that described in Lei Ding et al., "A Robust Digital Baseband Predistorter Constructed Using Memory Polynomials," IEEE Transactions on Communications, Vol. 51 , No. 1 , January 2004, pages 1 59-165 (hereinafter "Ding"). The memory polynomial redistortion scheme uses basis functions

iff . (u (n)) =

for j = l, ... , B using even (and sometimes odd) powers q . In this case, each basis function ψ (·) is a memoryless nonlinear function.

• A generalized memory polynomial predistortion scheme such as that described in Dennis R. Morgan et al., "A Generalized Memory Polynomial Model for Digital Predistortion of RF Power Amplifiers," IEEE Transactions on Signal Processing, Vol. 54, No. 10, October 2006, pages 3852-3860 (hereinafter "Morgan"). The generalized memory polynomial predistortion scheme uses basis functions ψ_] (u (n)) = u (n) -

for j = l,... , B , where the "time-skew" parameter r may be positive for a delay or negative for an advance. In this case, each basis function ψ_] (·) is a nonlinear function with memory.

• An orthogonal complex Gaussian polynomial predistortion scheme such as that described in Raviv Raich et al., Orthogonal Polynomials for Complex Gaussian Processes," IEEE Transactions on Signal Processing, Vol. 52, No. 10, October 2004, pages 2788-2797 (hereinafter "Raich"). The orthogonal complex Gaussian polynomial predistortion scheme uses basis functions defined as:

for j = l,... , B where σ_Η is the standard deviation of u (n) . Note that in Equation (2), the "m" is the order of the non-linearity (i.e., 2^nd order, 3^rd order, 4^th order, etc.). When u (n) is a complex Gaussian process, this basis function yields orthogonal outputs such that E s_p (n) s_q ^* («)}≠ 0 for p≠q . Here, ψ_} {-) is a memoryless non-linear function.

• A Volterra series predistortion scheme such as that described in Gil M.

Raz et al., "Baseband Volterra Filters for Implementing Carrier Based Nonlinearities," IEEE Transactions on Signal Processing, Vol. 46, No. 1 , January 1998, pages 103-114 (hereinafter "Raz"). The Volterra series predistortion scheme uses basis functions defined as:

q+l 2q+l

/_j(u(n)) = Yu(n-m_p) Y u (n-m_v) (3) p=l v=q+2

for j = l,...,B. Here, ^ ( ) is a non-linear function with memory. For a

Volterra series predistortion scheme, the tap delay line would contain only a single tap (i.e., M=0).

[0049] The predistorter tap weight evaluation function 16 may solve for the tap weights {w_y.,.}(for j = l,...,B and ί = Ο,.,.,Μ ) using a least squares procedure that fits the basis function output signals {s_;}of the basis functions 32 of the branches 30-1 through 30-B to the desired response d(n) obtained via the transmit observation receiver 24. More specifically, the tap output signals s_b{n),...,s_b{n-M) at time n are collected into a row vector s_b = s_b (n),...,s_b (n- )] . A data matrix U may be formed by collecting each {s .;j = l,...,B} into a larger row with B-(l+M) elements, and then collecting rows for time instants (or samples) n,n + l,...,n + (N -I) . The resulting data matrix U has NxB-(l+M) elements. Using the desired response vector d =

may be solved using the least squares solution given by:

w = (u^†xU)^_1x(u^†xd), (4) where† denotes the conjugate transpose.

The solution to Equation (4) involves inversion of the matrix

The numerical computations performed during a matrix inverse can exhibit severe stability problems in which small perturbations to the input can cause huge variations in the output, yielding unreliable results. The "condition number" AT( A ) = |A_max / _min | of a matrix A provides a measure of the degree to which the matrix A may be "ill-conditioned," or susceptible to these numerical stability issues, where and _miB are the maximum and minimum eigenvalues of matrix A , respectively.

[0051 ] In practice, matrix A≡(u^†xU) ¹ may have a high condition number ic(A) because the basis functions [ψ_ί (□)} are highly correlated. As a result, matrix A may be ill-conditioned, or susceptible, to these numerical stability issues. In addition to the numerical stability issues, attractive low-cost Stochastic Gradient (SG) or Least Mean Square (LMS) approaches to solving for the taps weights { } adaptively (as opposed to solving Equation (4) directly) where there is a large (A) exhibit slow convergence behavior with a large eigenvalue spread. This phenomenon is particularly problematic for non-linear systems.

[0052] Using orthogonal basis functions ψ (·)] can reduce the condition number significantly; for the best case of the unity matrix κ(\) = 1. Therefore,

DPD systems may employ orthogonal basis functions in order to improve their robustness by minimizing or eliminating the aforementioned numerical stability issues as well as to enable fast convergence for low-cost SG or LMS approaches to solving for the tap weights {\ν ) . As discussed above, the predistortion scheme disclosed in Raich provides a specific set of closed-form basis functions that are mutually orthogonal for the specific case where u (n) is a complex- valued Gaussian process. These basis functions are orthogonal between different powers, but also at different time instants such that

E { s_p (n ) s_q ^* (n - r)] = 0 when r≠0 . Other classical polynomials provide similar closed-form orthogonality for particular weightings of the statistics of u (n) .

However, in practice, one often does not control the statistics of u (n) .

[0053] Commonly owned and assigned U.S. Patent No. 8,368,466, entitled ORTHOGONAL BASIS FUNCTION SET FOR DIGITAL PREDISTORTER, which issued on February 5, 2013, discloses systems and methods for orthogonalizing basis function output signals regardless of the input statistics of u {n) using a

Two-Dimensional (2-D) lattice filter to implement a Gram-Schmidt

orthogonalization. More specifically, Figure 3 illustrates an embodiment of the DPD actuator 14 of Figure 1 that includes a 2-D lattice orthogonalizer 44 as taught by U.S. Patent No. 8,368,466. As illustrated, the DPD actuator 14 includes basis functions 46-1 through 46-B, the lattice orthogonalizer 44, and branches 48-1 through 48-B connected as shown. As illustrated with respect to branch 48-b, the branch 48-b includes a tapped delay line memory model 50 including a series of delays 52-1 through 52-M where M is a memory depth of the DPD model, a number of multipliers 54-0 through 54-M, and a number of combiners 56-1 through 56-M connected as shown. In the same manner, the other branches 48 also include tapped delay line memory models 50, multipliers 54, and combiners 56.

[0054] In operation, the basis functions 46-1 through 46-B process the digital input signal u (n) to provide corresponding basis function output signals

(n) ,... , s_B (n) . The basis function output signals s₁ (n) ,... , s_B (n) are then orthogonalized by the lattice orthogonalizer 44 to thereby provide orthogonalized basis function output signals ^ (n) ,... ,J_B (n) , which are passed through the corresponding branches 48-1 through 48-B to provide branch output signals. More specifically, using the branch 48-b as an example, the orthogonalized basis function output signal J_b (n) is passed through the tapped delay line memory model 50 such that the delays 52-1 through 52-M output different delayed versions of the orthogonalized basis function output signal J_b (n) , which are referenced as J_b (n) ,...,J_b (n -M ) . The signals J_b (n) ,...,J_b (n -M ) are referred to as tap output signals. The multipliers 54-0 through 54-M apply tap weights w_b0 through w_bM (configured by the predistorter tap weight evaluation function 16) to the tap output signals l_b {n) ,...,l_b {n -M ) , respectively. The weighted tap output signals are then combined by the combiners 56-1 through 56-M to provide a branch output signal for the branch 48-b. In the same manner, the other branches 48 output branch output signals. The branch output signals of the branches 48-1 through 48-B are combined by combiners 58 to provide the predistorted digital input signal y (n) .

[0055] Figures 4 through 6 illustrate the lattice orthogonalizer 44 of Figure 3 in more detail. Figure 4 illustrates a system that implements both the basis functions 46-1 through 46-B and the lattice orthogonalizer 44 of Figure 3. As illustrated in Figure 4, the system includes B separate B-nodes 60, one for each of the (non-orthogonal) basis functions 46-1 through 46-B. In the illustrated example, B=6. Outputs of the B-nodes 60 are input to a 2-D triangular lattice filter 62 that includes L-nodes 64 that each perform a one-step orthogonalization of its forward (F) and backward (B) inputs. A backward output signal of the B- node 60 (1 , 1 ) is the orthogonalized basis function output signal ^ (n) , and backward output signals of the L-nodes 64 (2,1 ), (3,1 ), (6,1 ) are the orthogonalized basis function output signals I₂ (n) ,I₃ (n) ,... ,I₆ (n) , respectively.

The orthogonalized basis function output signals ^ («) ,..., ¾ («) are orthogonal in the sense that Els_p (n) s_q ^* (n - r)] = 0 for p≠q and any r , and have unit = 1 . This scheme implements a normalized

orthogonalization of the basis function output signals s₁ (n) ,... , s_B («) .

[0056] Figure 5 is a more detailed illustration of one of the B-nodes 60 of Figure 4. Using the b-th B-node 60 as an example, the B-node 60 includes the corresponding basis function 46-b that generates the basis function output signal s_b (n) and a multiplier 66 that applies a normalizing scaling factor a _b to normalize the variance of the basis function output signal s_b (n) to provide forward and backward output signals f_hb («) and _b («) , respectively, where f\,b iⁿ) ⁼ Kb iⁿ) ^{= a}\,b ' ^sb iⁿ)■ ^Tne scaling factor a _b is a function of measured statistics of s_b (n) and is defined as:

where ¼≡ E{s_b(n)} .

[0057] Figure 6 is a more detailed illustration of one of the L-nodes 64 of Figure 4. Using L-node (k,b) as an example, the L-node (k,b) updates two input signals, one forward input signal f_k__hb (n) and one backward input signal iⁿ) _> using a cross-connected lattice filter stage with a complex-valued reflection coefficient T_{k b} and then normalizes for unit variance using a scaling factor _kb . More specifically, the cross-connected lattice filter stage includes multipliers 68 and 70 and combiners 72 and 74 connected as shown. The multiplier 68 applies the reflection coefficient T_{k b} to the forward input signal

Λ i,6 iⁿ)■ ^Tne output of the multiplier 68 is then combined with the backward input signal b_k__{l l} (n) . Likewise, the multiplier 70 applies the conjugate of the reflection coefficient Γ^* _b to the backward input signal b_k__{l l} (n) . The output of the multiplier 70 is then combined with the forward input signal f_k__hb (n) .

Multipliers 76 and 78 apply the scaling factor _{k b} to the output signals of the combiners 72 and 74 to provide backward and forward output signals b_{k b} (n) and f_kb (n) , respectively. The reflection coefficient T_{k b} is computed based on the measured statistics of the input signals and is defined as:

The scaling factor _{k b} , or normalization coefficient, is defined as: ak,b = I ¹ . (⁷)

^E{{b_k,{n)- _kb)-{f_kb{n)- _kb) \ where ^_{k b}≡ E{b_{k b} (n)) is the mean of the updated backward input signal b_{k b} (n) . [0058] Some simulations demonstrate limitations of the DPD actuator 14 of Figure 4 under certain scenarios. Specifically, the simulations consider 5^th order memory polynomial predistortion for the single-band transmitter 10 for two scenarios, namely, a memoryless scenario where the PA 22 uses a memoryless tanh() model and a strong memory model where the PA 22 uses a memoryless tanh() model followed by a linear output filter (i.e., a Hammerstein non-linear model). In this case, there are three basis functions (i.e., B=3), namely:

^₃ (w (n ) ) = w (n) - |w (n )|⁴ . (10)

Table 1 below provides a summary of the data matrix condition numbers (A) obtained with (i) the original (non-orthogonal) basis functions and (ii) using the orthogonalization scheme of Figures 4-6. The results shown in Table 1 show that the orthogonalization scheme of Figures 4-6 works very well under memoryless conditions (i.e., M=0). This is because, without a tapped delay line, there is very little correlation left between the branch output signals. However, when the PA 22 exhibits stronger memory effects (in this case M=4), the orthogonalization scheme of Figures 4-6 shows only a small reduction in JC(A) but does not come close to near-ideal performance under the memoryless conditions. This is because the branch output signals exhibit significant correlation due to the tapped delay lines (i.e., the basis function output signals are orthogonalized for a single sample n, but are not orthogonalized across multiple samples, e.g., s^n) and s₂(n - l) are not orthogonal). As such, an improved DPD scheme is desired for scenarios where the PA 22 (or other nonlinear component) exhibits strong memory effects. (A)

DPD Model

M=0 M=4

Non-Orthogonal Basis Function Outputs 4.1 147x10^s 4.0434x10^s

Orthogonalized Basis Function Outputs with

1 .00024 3.4015x10⁶ Subsequent Tapped Memory Delay Lines

Table 1

[0059] Figure 7 illustrates a single-band transmitter 80 that includes a DPD system 82 that provides high numerical stability even when the DPD system 82 compensates for strong memory effects according to one embodiment of the present disclosure. Note that while the DPD system 82 is described herein with respect to the transmitter 80, the DPD system 82 may be used to provide predistortion to compensate for distortion introduced by any type of non-linear subsystem. The DPD system 82 includes a DPD subsystem 84 including a DPD actuator 86, and an adaptor, which in this embodiment is a predistorter tap weight evaluation function 88. The DPD system 82 can be implemented using any suitable hardware or any suitable combination of hardware and software. As discussed below, the DPD actuator 86 operates according to a DPD model that includes a number of delay basis functions that each include a primary basis function that outputs a primary basis function output signal and M secondary basis functions that output different delayed versions of the primary basis function output signal (which are referred to herein as secondary basis function output signals), where M is the memory depth of the DPD model. The DPD actuator 86 also includes an orthogonalizer that orthogonalizes both the primary and the secondary basis function output signals of the delay basis functions. By orthogonalizing both the primary basis function output signal and the delayed versions of the primary basis function output signal (i.e., the secondary basis function output signals), numerical stability is provided even for scenarios where there are strong memory effects (e.g., M > 4). [0060] As illustrated, the transmitter 80 includes a source 90, the DPD actuator 86, upconversion and D/A conversion circuitry 92, and a PA 94 connected as shown. Notably, the transmitter 80 is single-band in that only one contiguous band of frequency is input to the PA 94. With respect to cellular communications networks, note that the term "contiguous" applies in the sense of spectral allocation to a network operator where a single contiguous frequency band is allocated to that lone operator. The operator may elect to populate that band with one or more transmitted signals. The upconversion and D/A

conversion circuitry 92 and the PA 94 form a non-linear subsystem having a nonlinear characteristic. The PA 94 is operated in a non-linear mode (i.e., at or near saturation) and, as such, the non-linear characteristic of the non-linear subsystem is more particularly a non-linear characteristic of the PA 94. The transmitter 80 also includes a feedback path including a transmit observation receiver 96 including downconversion and digitization circuitry 98 as well as the predistorter tap weight evaluation function 88. The downconversion and digitization circuitry 98 is coupled to an output of the PA 94 via a coupler 100.

[0061] In operation, the source 90 outputs a digital input signal u (n) , which is a complex-valued baseband information bearing signal. The DPD actuator 86 is configured by the predistorter tap weight evaluation function 88 to apply a desired predistortion to the digital input signal u (n) to thereby provide a predistorted digital input signal y (n) , which is also a complex valued signal. The desired predistortion is, or is approximately, an inverse of a distortion caused by the non-linear characteristic of the PA 94, which in turn effectively linearizes the PA 94. The predistorted digital input signal y (n) is upconverted to a desired carrier frequency and D/A converted by the upconversion and D/A conversion circuitry 92 to provide a radio frequency analog input signal ¾ («) to the PA 94.

Notably, the predistorted digital input signal y (n) may be upconverted and D/A converted by, for example, DRF upconversion followed by D/A conversion or D/A conversion followed by analog upconversion. The PA 94 amplifies the radio frequency analog input signal ¾ («) to provide a radio frequency analog output signal l₀ (w) .

[0062] In the feedback path, the downconversion and digitization circuitry 98 downconverts and digitizes the radio frequency analog output signal z₀ («) to provide a digital feedback signal, which may be at baseband. The predistorter tap weight evaluation function 88 utilizes a desired adaptation scheme (e.g., Least Squares, LMS, or SG) to update, or dynamically configure, tap weights applied by the DPD actuator 86. As discussed below, the DPD actuator 86 generally operates according to a DPD model in which a number of basis function output signals are orthogonalized, weighted according to the tap weights, and then combined to provide the predistorted digital input signal y (n) .

As such, the predistorter tap weight evaluation function 88 dynamically configures the tap weights such that the predistortion applied by the DPD actuator 86 minimizes the effects of the distortion of the PA 94.

[0063] Figure 8 illustrates the DPD actuator 86, or a DPD model for the DPD actuator 86, of Figure 7 in more detail according to one embodiment of the present disclosure. As illustrated, the DPD actuator 86 includes a number B of delay basis functions 102-1 through 102-B, where B is a number of delay basis functions 102 used to provide the desired predistortion. As illustrated with respect to the delay basis function 102-b, the delay basis function 102-b includes a primary basis function 104 and a number of secondary basis functions 105. The total number of basis functions 104, 105 in the delay basis function 102-b is M+1 , where M is a memory depth of the DPD model. Likewise, the other delay basis functions 102 also include primary and secondary basis functions 104 and 105 (not shown). Note that while in the embodiments described herein, M is the same for all of the delay basis functions 102-1 through 102-B. However, the present disclosure is not limited thereto. Since each of the delay basis functions 102-1 through 102-B have M+1 basis functions, the total number of basis functions 104 and 105 for all of the delay basis functions 102-1 through 102-B is B(M+1 ). Thus, the basis functions 104 and 105 in the delay basis function 102-1 (not shown) are referenced as basis functions 1 through M+1 , the basis functions 104 and 105 in the delay basis function 102-2 (not shown) are referenced as basis functions M+2 through 2M+2, the basis functions 104 and 105 in the delay basis function 102-b (shown) are referenced as basis functions (b-1 )M+b through bM+b, and the basis functions 104 and 105 in the delay basis function 102-B (not shown) are referenced as basis functions (B-1 )M+B through BM+B=B(M+1 ).

[0064] The primary basis functions 104 for all of the delay basis functions 102-1 through 102-B are mathematically represented as primary basis functions

{i/f_j } for j = l,... , B . Notably, the primary basis functions {ψ^ for = l,... , B for the delay basis functions 102-1 through 102-B, respectively, can be any suitable basis functions for digital predistortion of the digital input signal u ( n) for a desired non-linear order. For example, the primary basis functions {ψ^ for the delay basis functions 102-1 through 102-B may be:

• Basis functions ψ_} (u ( n) ) = u (n ) - \u

using even (and sometimes odd) powers q for a memory polynomial predistortion scheme. In this case, each basis function ψ_} {·) is a memoryless non-linear function.

• Basis functions ψ_] u (n) ) = u (n) - (n - r)\^q

for a generalized memory polynomial predistortion scheme, where the "time-skew" parameter r may be positive for a delay or negative for an advance. In this case, each basis function ψ _j (·) is a non-linear function with memory.

• Basis functions for an orthogonal complex Gaussian polynomial

predistortion scheme defined as:

where σ„ is the standard deviation of u (n) and "m" is the order of the non-linearity. Here, ψ_] {·) is a memoryless non-linear function. [0065] Using the delay basis function 102-b as an example, the primary basis function 104 outputs a primary basis function output signal s_b(n) where s_b (n) = _b u (n)) , and the secondary basis functions 105 output corresponding secondary basis function output signals s_b(n-i), s_b(n-2), s_b(n-M), which are different delayed versions of the primary basis function output signal s_b (n) created by a tapped delay line memory model including a number (M) of delays 106-1 through 106-M connected as shown. In the same manner, the delay basis function 102-1 outputs a primary basis function output signal ¾ (n) and secondary basis function output signals s^n-l), s (n-2), ¾ (n-M) , which are different delayed versions of the primary basis function output signal ¾ (n) ; the delay basis function 102-2 outputs a primary basis function output signal s₂(n) and secondary basis function output signals s₂(n-l), s₂(n-2), s₂ (n-M), which are different delayed versions of the primary basis function output signal s₂ (n) ; etc. Thus, the delay basis functions 102-1 through 102-B output a set of basis function output signals {s («-?^')} for j = l,...,B and i = 0,...,M .

[0066] The DPD actuator 86 also includes an orthogonalizer 108 that operates to orthogonalize both the primary and secondary basis function output signals («-?^')} (for j = l,...,B and i = 0,...,M ) to provide corresponding orthogonalized primary and secondary basis function output signals [ _j («-*)}

(for j = l,...,B and i = 0,...,M). The orthogonalizer 108 can utilize any suitable orthogonalization scheme. However, as discussed below, in one embodiment, the orthogonalizer 108 utilizes a 2-D lattice filter to orthogonalize the basis function output signals

(«-?^')} (for j = l,...,B and i = 0,...,M). In another embodiment, the orthogonalizer utilizes a recursive QR Decomposition Based Recursive Least Squares (QR-RLS) orthogonalization scheme. [0067] The DPD actuator 86 further includes a number (B) of composite branches 110-1 through 110-B that operate to weight the orthogonalized basis function output signals { («-*^')} (^for j = ---, and i = 0,...,M ) using corresponding tap weights [\ν ] , which are configured by the predistorter tap weight evaluation function 88. Using the composite branch 110-b as an example, the composite branch 110-b includes multipliers 112-0 through 112-M that apply weights w_b0 through w_bM to the orthogonalized basis function output signals s_b{n) through s_b(n-M), respectively, to provide corresponding branch output signals. In this manner, the composite branches 110-1 through 110-B weight the orthogonalized basis function output signals («-*^')} (^for j = ---,B and i = 0,...,M ) using the corresponding tap weights [\ν ] to provide the branch output signals. The branch output signals are combined by combiners 114 to provide the predistorted digital input signal y{n).

[0068] The DPD actuator 86 of Figure 8 (which is a DPD actuator with memory) can be represented as:

where

J_j (n-i) = orth({s_j (n -?^')}), and

The orth(») function represents the operation of the orthogonalizer 108 to output an orthogonalized version of Sj(n-i) for all input index pairs {(?^', )}.

[0069] The predistorter tap weight evaluation function 88 may solve for the tap weights {¼> } using a least squares procedure that fits the primary and secondary basis function output signals («-?)} of the delay basis functions 102 to the desired response d(n) obtained via the transmit observation receiver 96. More specifically, the basis function output signals S_j(n-i) for each particular value of j and for i = 0,...,M at time n are collected into a row vector

S_j = s_j (n ),..., S_j (n- )] . A data matrix U may be formed by collecting each

{s_y.;j = l,...,B} into a larger row with B-(l+M) elements, and then collecting rows for time instants (or samples) n,n + \,...,n + (N -\). The resulting data matrix U has NxB-(l+M) elements. Using the desired response vector d = (n) ,... ,d (n - N + , the tap weights {w_y.J may be solved using the least squares solution given by:

w = (U^†xU)^_1x(U^†xd), (12) where† denotes the conjugate transpose.

70] The solution to Equation (12) involves inversion of the matrix

As discussed above, the numerical computations performed during a matrix inverse can exhibit severe stability problems in which small perturbations to the input can cause huge variations in the output, yielding unreliable results. However, in this embodiment, by orthogonalizing both the primary and the secondary basis function output signals, the condition number (A) = |/l_max/yl_min| of matrix A when using the DPD actuator 86 is small (i.e., matrix A is well conditioned and numerically stable) even if there are strong memory effects. The small JC(A) also enables fast convergence of low-cost SG or LMS approaches to solving for the taps weights [\ν ] adaptively (as opposed to solving Equation (12) directly).

[0071] Table 2 below provides a summary of the data matrix condition numbers JC(A) obtained with (i) the original (non-orthogonal) basis functions for the single-band transmitter 10, (ii) using the orthogonalization scheme of Figures 4-6 where the tapped delay line memory model 34 follows the lattice

orthogonalizer 44, and (iii) using the orthogonalization scheme of Figure 8 where both the primary and secondary basis function outputs of the delay basis functions 102 are orthogonalized. The results shown in Table 2 show that the orthogonalization scheme of Figure 8 works very well even under strong memory conditions.

Table 2

[0072] Figure 9 illustrates the DPD actuator 86 of Figure 8 according to one embodiment in which the orthogonalizer 108 is a 2-D lattice orthogonalizer 1 16. Otherwise, the DPD actuator 86 is the same as the embodiment of Figure 8. In this embodiment, the 2-D lattice orthogonalizer 1 16 orthogonalizes the primary and secondary basis function output signals

(« -?^')} (for j = l,... , B and i = 0,... ,M ) using a 2-D lattice filter.

[0073] Figures 10 through 12 illustrate a system that implements the delay basis functions 102-1 through 102-B and the 2-D lattice orthogonalizer 1 16 of Figure 9 in more detail according to one embodiment of the present disclosure. As illustrated in Figure 10, the system includes Bx(M +1) separate B-nodes

1 18, one for each of the (non-orthogonal) basis functions 104 and 105 in each of the delay basis functions 102-1 through 102-B. In the illustrated example, B=6 and M=4 and, as such, there is a total of 30 B-nodes 1 18. Notably, the B-nodes 1 18 are referenced individually as B-node (1 ,1 ) through B-node (1 , H ), where H = 1, . . . , β ( + 1) . Outputs of the B-nodes 1 18 are input to a 2-D triangular lattice filter 120 that includes L-nodes 122 that each perform a one-step orthogonalization of its forward (F) and backward (B) inputs. A backward output signal of the B-node (1,1) is the orthogonalized basis function output signal ¾ (n) , and backward output signals of the L-nodes (2,1) through (30,1) are the orthogonalized basis function output signals ¾ (n-1) J^(n-4), J₂(n),...,

J₂(n-4),..., J₆(n),..., J₆ (n- 4) , respectively. The orthogonalized basis function output signals [ _j (n-i)] are orthogonal in the sense that

E^s_p (n-u)s_q ^* (n-r)J =0 for any p and any q as long as r≠u and have unit variance E^s_p (n - r) s_b ^* (n - r)J = 1 for any b and any r. This scheme implements a normalized orthogonalization of the basis function output signals (n-i)] .

[0074] Figure 11 is a more detailed illustration of one of the B-nodes 118 of Figure 10 according to one embodiment of the present disclosure. Using B-node (1 ,h) as an example (where h H and H -\,...,B(M +1) ), the B-node 118 includes the corresponding basis function 104 or 105 (Figure 9) that generates the basis function output signal Sj(n-i) for j = quotient (h,M +1) + 1 and

* = (/zmod( +l))-l, where quotient (h,M+ 1) returns the quotient of h/(M +1) .

The B-node 118 also includes a multiplier 124 that applies a normalizing scaling factor _h to normalize the variance of the basis function output signal Sj (n-i) to provide forward and backward output signals f_hh (n) and b_hh (n) , respectively, where f_hh (n) =b_hh (n) = _hh -Sj (n-i) . The scaling factor _h is a function of measured statistics of S (n-i) and is defined as:

where μ_1ι≡ E{SJ (n-i)] . Notably, as discussed above, if the basis function h is a secondary basis function 105, the basis function h can be implemented as an i-th delay in the tapped delay memory line. Also, in this embodiment, the combination of the multipliers 124 of the B-nodes 1 18 and the 2-D triangular lattice filter 120 form the 2-D lattice orthogonalizer 1 16 of Figure 9.

[0075] Figure 12 is a more detailed illustration of one of the L-nodes 122 of Figure 10. Using L-node (k,h) as an example, the L-node (k,h) updates two input signals, one forward input signal f_k __{l h} (n) and one backward input signal

¾_Hjl+l (n) , using a cross-connected lattice filter stage with a complex-valued reflection coefficient T_{k h} and then normalizes for unit variance using a scaling factor a_k . More specifically, the cross-connected lattice filter stage includes multipliers 126 and 128 and combiners 130 and 132 connected as shown. The multiplier 126 applies the reflection coefficient r_{¾ h} to the forward input signal

I_k-u iⁿ)■ ^Tne output of the multiplier 126 is then combined with the backward input signal ¾__ljh+1 («) . Likewise, the multiplier 128 applies the conjugate of the reflection coefficient Γ^* _h to the backward input signal ¾__ljh+1 («) . The output of the multiplier 128 is then combined with the forward input signal f_k__hh (n) .

Multipliers 134 and 136 apply the scaling factor a_k to the output signals of the combiners 130 and 132 to provide backward and forward output signals b_{k h} (n) and f_{k h} (n) , respectively. The reflection coefficient T_{k h} is computed based on the measured statistics of the in ut signals and is defined as:

The scaling factor a_k , or normalization coefficient, is defined as: jE {{b_{k h} {n ) - _{k h} ) - ( f_{k h} {n ) - _{k h} ) \ where ^_{k h}≡ E{b_{k h} (n)) is the mean of the updated backward input signal b_{k h} (n) .

[0076] Figure 13 illustrates the DPD actuator 86 of Figure 8 according to one embodiment in which the orthogonalizer 108 is a recursive QR-RLS orthogonalizer 138. Otherwise, the DPD actuator 86 is the same as the embodiment of Figure 8. In this embodiment, the recursive QR-RLS

orthogonalizer 138 orthogonalizes the primary and secondary basis function output signals {s\ («-?^')} (for j = l,...,B and ί = 0,...,M ) using a recursive QR- RLS scheme. The 2-D lattice orthogonalization scheme discussed above utilizes a block-oriented approach to solve for the lattice filter coefficients from correlation statistics from a single block of data using Burg's algorithm. In systems where the statistics change slowly over time, these coefficients are updated on a block- by-block basis. Such schemes often involve a significant computation and memory storage as compared to the recursive scheme utilized for the recursive QR-RLS orthogonalizer 138. While the QR-RLS orthogonalizer 138 can be implemented in any suitable hardware or combination of hardware and software, in one particular embodiment, the QR-RLS orthogonalizer 138 is implemented efficiently in hardware using systolic array architectures suitable for Very Large Scale Integration (VLSI) implementation such as, for example, the array architectures described in Simon Haykin, "Adaptive Filter Theory," 2^nd Edition, Prentice Hall, 1991, pages 516-521 (hereinafter "Haykin").

[0077] An ideal DPD orthogonalizer operates on the basis function samples

collected into a vector y = \ y₁ («),..., y B(M+\) \^N) = s (n-M), s_b(n), s_b(n-l), s_b(n-M), s_B(n), s_B(n-l), s_B(n-M) . The lower-triangular matrix W of ideal tap weights produce output z = Wxy such that E{zz^†} = WCW^† = I , where the covariance matrix C = E{yy^†} . The ideal

W = R^† , where R is the upper triangular matrix forming the Cholesky

decomposition of C = R^†R .

[0078] In one embodiment, the recursive QR-RLS orthogonalizer 138 utilizes a QR decomposition based scheme to directly compute the orthogonalized basis function signals {s\ («-?^')} (for j = l,...,B and i = 0,...,M ) from the non- orthogonalized basis function signals {s («-?^')} (for j = l,...,B and i = 0,...,M). The QR-RLS scheme formulates a recursive least squares estimation problem to choose tap weights w(«) to minimize a sum of exponentially weighted errors in

Equation (16) below, where d (n) is the desired signal and 0□ λ≤ 1 is a forgetting factor to rovide a tracking capability in non-stationary scenarios.

[0079] Note that both d («) and w («) in Equation (16) are not used to solve the orthogonalization problem of interest here, but the RLS framework supporting their solution may also be leveraged to compute both z = Wx y and W = R^† as follows. Assume R(« -l) is available from a previous recursion. At time n , new data y (n) arrives to be orthogonalized. In Figure 13, the data y (n) to be orthogonalized is a column vector of the current samples of the basis function output signals (« -*^')} for j = l,... , B and i = 0,... M . The block matrix in

Equation (17) below may be formed using R(« -l) and y (n) , and then operated on by an orthogonal transformation Q(«) .

where η is an independent gain control parameter, which can be used to set the output power E{(z(n)z^*(n)} of the orthogonalized outputs to any desired value, as discussed below, γ(η) is a conversion factor, and z («) is a column vector of the samples of the orthogonalized basis function output signals [ _j (« -?)} for j = l,... , B and i = 0,... M . The conversion factor γ{η) maps an a priori estimation error prior to the update into an a posteriori estimation error obtained after the update. This quantity is not used for orthogonalization, and thus is not computed during evaluation of Equation (17). [0080] The matrix Q(«) = Q_B(M+1)(n),...,Q₁(n)={Q,(n)} for i = B(M

is a (B M +1)X(B-M +1) is an orthogonal matrix consisting of B Given's rotations where Q_j (n) is given in Equation (18) below.

Elements #,.(«) and v_t(n) are chosen to zero the element at position (#( +l) + u) in the block matrix under transposition using a Given's rotation. This may be achieved using Equation (19) below. Note that ¾(«) is real-valued whereas ,. («) is complex-valued. The diagonals r_u{n-\) are real-valued and remain so after Q(«) is applied.

y

(19)

[0081] After all B Given's rotations have been applied, the vector y^†(n) in

Equation (17) is transformed into 0_lxB(M+1) ,

is transformed into R(«) , and 0_B(M+1)xl is transformed into z(«). Thus, using this scheme, the recursive

QR-RLS orthogonalizer 138 can directly compute z(«), which as discussed above is a column vector of the current samples of the orthogonalized basis function output signals {s\ («-?^')} for j = l,...,B and i = 0,...M . The fact that

V -R(n-l) is transformed into R(«) and 0_B(M+1)xl is transformed into z(«) may be verified by the matrix identity in Equation (20) below which applies for any orthonormal matrix Q .

Specifically, defining

A₂— A_j , (22)

B₂ = B_j (24) and using Equation (20) yields the exponentially weighted rank-one update for the covariance matrix C(«) = R^† (n) R (n) as shown in Equation (25) below.

-l) + y (/z) . y^†(/z)_≡C(/z) (25)

Similarly, defining

^JB(M+l)xl

2≡ (27) η

R (n)

B_1≡ , and (28)

0 lxB(M+l)

and using Equation (20) yields the computation of the orthogonalized basis function vector z (n) = R^"† - y (n) as shown in Equation (30)below. η · γ (η)≡R^† (n) - z (n)→z (n) = - R^"† (n) - y (n) (30)

Note that Equation (30) shows that η provides an independent gain control for the algorithm, allowing one to set the variance of the orthogonalized basis functions z(n) to any desirable value. Since the RLS algorithm imparts a gain of

X onto its estimate of the covariance matrix C(n) , choosi ηη ==

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and then applies a first Given's rotation The Given's rotation parameters q_x (n) and V_j (n) are computed as discussed above. Since the Given's elements

<¾ (n) , v* (n) , -V_j (n) , and <¾ (n) in the first Given's rotation are contained in rows 1 and 4, only the elements at row 1 and row 4 are affected by the Given's rotation. Specifically, the value contained in row 1 , column 1 is updated to the computed value of r_n(n) and the value contained in row 4, column 1 is zeroed, as illustrated above in Equation (19). All other values in row 1 and row 4 are updated with the output of the 2x2 Givens rotation that results from Equation (18).

[0083] Next, a second Given's rotation Q₂(«) is applied to the updated results matrix (i.e., the results matrix after applying the first Given's rotation (¾(«) ). Since the Given's elements q₂ (n) , v^* (n) , -v₂ («) , and q₂ (n) in the second

Given's rotation Q₂(«) are contained in rows 2 and 4, only the elements at row 2 and row 4 are affected by the Given's rotation. Specifically, the value contained in row 2, column 2 is updated to the computed value of r₂₂(n) and the value contained in row 4, column 2 is zeroed, as illustrated above in Equation (19). All other values in row 2 and row 4 are updated with the output of the 2x2 Givens rotation that results from Equation (18). Lastly, a third Given's rotation Q₃(«) is applied to the updated results matrix (i.e., the results matrix after applying the second Given's rotation Q₂(«) ). Since the Given's elements <¾ («) , v^* («) ,

-v₃ (n) , and <¾ (n) in the third Given's rotation Q₃(«) are contained in rows 3 and

4, only the elements at row 3and row 4are affected by the Given's rotation.

Specifically, the value contained in row 3, column 3 is updated to the computed value of r₃₃ (n) and the value contained in row 4, column 3 is zeroed, as illustrated above in Equation (19). All other values in row 3 and row 4 are updated with the output of the 2x2 Givens rotation that results from Equation (18). At that point, the current samples z («) of the orthogonalized basis function output signals {s (« -?^')} have been computed.

[0084] In the embodiment described above, the recursive QR-RLS

orthogonalizer 138 directly computes the orthogonalized basis function output signals J_j (n - i) for j = l, ... , B and i = 0, ... M . In another embodiment, the predistorter tap weight evaluation function 88 (Figure 7) utilizes a recursive QR- RLS scheme to obtain a solution for W = R^† , where the tap weights can then be applied to the non-orthogonalized basis function signals S_j (n - i) (for j = l,... , B and i = 0,... ,M ) by the recursive QR-RLS orthogonalizer 138 according to the equation z = W x y to thereby provide the orthogonalized basis function signals J_j (n -i) (for 7 = 1,... , B and i = 0,... ,M ). This embodiment may be particularly beneficial for a time-varying system.

[0085] More specifically, simulations demonstrate the impact of the forgetting factor 1 on the performance of the QR-RLS orthogonalization algorithm. Figure 15 shows the Power Spectral Density (PSD) of the output of the linear basis function of the QR-RLS orthogonalization, whereas Figure 16 shows the PSD of the output of the third order basis function of the QR-RLS orthogonalization. The traces shown for 1=0.999 and 1=0.99999 show the PSD for embodiments where the orthogonalized basis function output signals are computed directly using the algorithm discussed above. The traces for 1=0.999 E and 1=0.99999 E correspond to embodiments in which the QR-RLS scheme is utilized to update the weight matrix W = R^† , as described below.

[0086] Figure 15 illustrates a spectral broadening phenomenon introduced into the orthogonalized output samples z («) as a result of the tap noise inherent in R(«) introduced by a non-unity value of the forgetting factor 1. This tap noise represents a multiplicative distortion since z (n) = R^†■ y (n) , resulting in the spectral broadening seen for the trace in Figure 15 for 1=0.999. The effect may still be observed in the trace for 1=0.99999 although at a much reduced level.

[0087] Figure 16 demonstrates that the spectral broadening effect is amplified for the third order basis function. The broadening occurs at a level of -40 dBc for 1=0.999, whereas it occurs at -75 dBc for 1=0.99999. The spectral broadening distortion may be driven down to arbitrarily lower levels as 1→1 , so this behavior doesn't prevent the use of this algorithm for systems with stationary statistics.

[0088] For a time-varying system, lis chosen such that the memory of the RLS algorithm, namely 1/(1-1) , is suitable to track the rate of variation of its statistics. However, the spectral broadening distortion may not be driven down to a suitably small level for this choice of Λ. The effect of the tap noise may be reduced significantly by utilizing the QR-RLS scheme to update the W = R^† , which can be updated infrequently or relatively infrequently, rather than directly computing the samples of the orthogonalized basis function output signals.

Figures 15 and 16 show the spectral broadening distortion may be eliminated when the tap weight matrix W = R^"† is extracted infrequently (i.e., at a rate suitable to track any time-variation in the system statistics, on the order of the RLS memory 1/(1-1) ) and applied on a block-by-block basis to the input data y(n) using the fixed set of orthogonalization coefficients (i.e., the tap weight matrix). These results are denoted with an "E" in Figures 15 and 16.

[0089] More specifically, in one embodiment, the predistorter tap weight evaluation function 88 (Figure 7) utilizes a recursive QR-RLS scheme to obtain a solution for W = R^"† in the following manner. The block matrix of Equation (1 7) may be augmented with additional columns to compute explicitly the ideal weight matrix W = R^† recursively as part of the normal QR update as shown in Equation (31 ) below.

l - R (n - l) l/VX- /r^†(rc R (n) R^ {n) z {n)

Q (n) (31 )

/ ( ") °lxB(M₊l) °ixB(M₊i) S^T («) r{n)

[0090] The matrix identity in Equation (20) may be used to demonstrate that Equation (31 ) provides the proper recursion for R^† by setting

R (n)

B_1≡ , and (34)

B_2≡ (35)

and showing as in Equation (36) below that the updated R represents the proper Hermitian inverse of R(«) after the recursion is complete.

R^† (« -!) · R^"† {n -1) = I≡ R^† (n) · R^"† (n) (36)

Using the modified QR recursion in Equation (31 ), the W = R^† may be extracted infrequently as dictated by any time-variation in the source statistics, and the recursive QR-RLS orthogonalizer 138 may include a separate matrix

multiplication circuitry to compute the orthogonalized basis function output signals according to z = W as opposed to computing z as part of the QR recursion. Note that the right-most column of the block matrix may be omitted in Equation (31 ) in embodiments where weight matrix extraction is performed.

[0091 ] The embodiments described above for the single-band transmitter 80 can be extended to a concurrent multi-band transmitter 140 as illustrated in Figure 17. The embodiment of the multi-band transmitter 140 illustrated in Figure 17 is one example. Other variations will be apparent to one of ordinary skill in the art. As illustrated, the multi-band transmitter 140 includes multiple sources 142-1 through 142-S, a DPD system 144 including a DPD subsystem 146 having a number (S) of DPD actuators 148-1 through 148-S and a number (S) of predistorter tap weight evaluation functions 150-1 through 150-S, a combiner 152, upconversion and D/A conversion circuitry 154, a PA 156, and a transmit observation receiver 158 including downconversion and digitization circuitry 160 coupled to an output of the PA 1 56 via a coupler 162. The number S is the number of frequency bands in a concurrent multi-band signal transmitted by the multi-band transmitter 140. The DPD system 144 can be implemented using any suitable hardware or any suitable combination of hardware and software.

[0092] In operation, the sources 142-1 through 142-S provide corresponding digital input signals u_x (n) through u_s («) for the S frequency bands of the concurrent multi-band signal to be transmitted by the multi-band transmitter 140. The digital input signals u (n) through u_s (n) are predistorted by the DPD actuators 148-1 through 148-S to provide predistorted digital input signals y (n) through y_s (n) for the S frequency bands of the concurrent multi-band signal. More specifically, the DPD actuator 148-1 generates the predistorted digital input signal y {n) for the first frequency band of the concurrent multi-band signal based on the digital input signals u_x (n) through u_s (n) and, as discussed below, a number of basis functions that are designed to compensate for intra-band and, in some embodiments, inter-band distortion. Likewise, the other DPD actuators 148-2 through 148-S generate the predistorted digital input signals y₂ (n) through y_s (n) for the second through S-th frequency bands of the concurrent multiband signal based on the digital input signals u (n) through u_s (n) and, as discussed below, corresponding basis functions that are designed to compensate for intra- band and, in some embodiments, inter-band distortion. The predistorted digital input signals y (n) through y_s (n) are combined by the combiner 152 to provide a predistorted multi-band input signal y (n) that is then upconverted and D/A converted by the upconversion and D/A conversion circuitry 154 to provide a multi-band input signal ¾ (n) for the PA 156. The PA 156 amplifies the multi- band input signal to provide a multi-band output signal z₀ (n) .

[0093] In the feedback path, the downconversion and digitization circuitry 160 downconverts and digitizes the multi-band output signal z₀ (n) to provide, in this embodiment, separate digital feedback signals for the S frequency bands of the concurrent multi-band signal. The digital feedback signals may be at baseband. The predistorter tap weight evaluation function 150-1 utilizes a desired

adaptation scheme (e.g., Least Squares, LMS, or SG) to update, or dynamically configure, tap weights applied by the DPD actuator 148-1 to compensate for intra-band and, in some embodiments, inter-band distortion within the first frequency band. Likewise, the predistorter tap weight evaluation functions 150-2 through 150-S utilize a desired adaptation scheme (e.g., Least Squares, LMS, or SG) to update, or dynamically configure, tap weights applied by the DPD actuators 148-2 through 148-S, respectively, to compensate for intra-band and, in some embodiments, inter-band distortion within the second through Sth frequency bands.

[0094] As discussed below, each of the DPD actuators 148-1 through 148-S generally operate according to a DPD model in which a number of basis function output signals are orthogonalized, weighted according to the tap weights, and then combined to provide the predistorted digital input signal for the

corresponding frequency band. As such, the predistorter tap weight evaluation functions 150-1 through 150-S dynamically configure the tap weights such that the predistortion applied by the DPD actuators 148-1 through 148-S minimizes the effects of the distortion of the PA 156.

[0095] Figure 18 illustrates the one of the DPD actuators 148-X, or a DPD model for the DPD actuator 148-X, of Figure 17 in more detail according to one embodiment of the present disclosure. In general, the DPD actuator 148-X is similar to the DPD actuator 86 of Figure 8. More specifically, as illustrated, the DPD actuator 148-X includes a number B of delay basis functions 164-1 through 164-B, where B is a number of delay basis functions 164 used to provide the desired predistortion. As illustrated with respect to the delay basis function 164- b, the delay basis function 164-b includes a primary basis function 166 and a number of secondary basis functions 167. The total number of basis functions 166, 167 in the delay basis function 164-b is M+1 , where M is a memory depth of the DPD model. Likewise, the other delay basis functions 164 also include primary and secondary basis functions 166 and 167 (not shown). Note that while in the embodiments described herein, M is the same for all of the delay basis functions 164-1 through 164-B. However, the present disclosure is not limited thereto. Since each of the delay basis functions 164-1 through 164-B have M+1 basis functions, the total number of basis functions 166 and 167 for all of the delay basis functions 164-1 through 164-B is B(M+1 ). Thus, the basis functions 166 and 167 in the delay basis function 164-1 (not shown) are referenced as basis functions 1 through M+1 for frequency band X, the basis functions 166 and 167 in the delay basis function 164-2 (not shown) are referenced as basis functions M+2 through 2M+2 for frequency band X, the basis functions 166 and 167 in the delay basis function 164-b (shown) are referenced as basis functions (b-1)M+b through bM+b for frequency band X, and the basis functions 166 and 167 in the delay basis function 164-B (not shown) are referenced as basis functions (B-1)M+B through BM+B=B(M+1) for frequency band X.

[0096] The primary basis functions 166 for all of the delay basis functions 164-1 through 164-B for the frequency band X are mathematically represented as a basis functions { _X } j = l,..., . Notably, the primary basis functions [ψ_{Χ ]}] for 7 = 1,... ,B can be any suitable basis functions for digital predistortion for the Xth frequency band of the concurrent multi-band signal for a desired nonlinear order.

[0097] For example, for the dual-band scenario (i.e., S=2) with memory, the predistorted digital input signals can be defined as:

where s_hj{n) = i/f_hj(u_l(n),u₂(n)), and

M B

yi iⁿ) =∑∑¾;_< ^■ ¾,,· [n-i) , where s_{2 j}(n) = /_{2 j}(u_l(n),u₂(n)) .

For this dual-band scenario, in one embodiment, the primary basis

functions^ _;.} for 7 = 1,...,B for the first frequency band (i.e., for X=1) may be

(considering 5^th order): ψ_χ J [u_x (n),u₂ («)) = M_j (n) -|w₂ («)| , and

Wi,6 (^Mi (").«2 (")) = ^Μι (")·|^Μι (")|² |^M2 iⁿ)\^2■

Similarly, the primary basis functions^ _;] for = l,...,B for the second frequency band (i.e., forX=2) may be (considering 5^th order):

Ψι, L u_x (n),u₂ (ft)) - u₂ (n) , (43)

Ψι, ₂ (MJ (n),u₂ («)) = u₂ (n)^■

, (44)

Ψι, 3 (MJ (n) ,u₂ («)) = u₂ (n)^■ |"i (")|²> (45)

Ψι, ₄ (w_j («) ,u₂ («)) = u₂ («) · w₂(?i)⁴, (46)

Ψι, ₅ (wj («),M₂ (ⁿ)) ⁼ u₂ («) · !«_! («)|⁴, and (47)

Ψι, ₆ (Wj («),M₂ {ⁿ)) ⁼ u₂ (n)^■ |«I («)|² |M₂ («)|² - (48)

Note, however, that the primary basis functions given above are only examples. Any suitable primary basis functions may be used.

[0098] Using the delay basis function 164-X as an example, the primary basis function 166 outputs a primary basis function output signal s_XJ) (n) for the Xth frequency band where sx*{ⁿ) = Vx,b{^ui(ⁿ)^>-^us{ⁿ)) > ^and (⁴⁹) the secondary basis functions 167 output corresponding secondary basis function output signals s_{X b}(n-l), s_xb(n-2), s_xb(n-M), which are different delayed versions of the primary basis function output signal s_{x b} (n) created by a tapped delay line memory model including a number (M) of delays 168-1 through 168-M connected as shown. In this manner, the delay basis function 164-1 outputs a primary basis function output signal s_{X i} (n) and secondary basis function output signals s_xl(n-i), s_xl(n-2), s_xl (n-M) , which are different delayed versions of the primary basis function output signal s_{x l} (n) ; the delay basis function 164-2 outputs a primary basis function output signal s_X2(n) and secondary basis function output signals s_X2(n-l), s_X2(n-2), s_X2(n-M), which are different delayed versions of the primary basis function output signal s_X2(n) ; etc. Thus, the delay basis functions 164-1 through 164-B output, for the

Xth frequency band, corresponding basis function output signals {s_x (n-i)] for j = l,...,B and i = 0,...,M .

[0099] The DPD actuator 148-X also includes an orthogonalizer 170 that operates to orthogonalize both the primary and secondary basis function output signals {s_{X j} {n-i)] (for j = l,...,B and i = 0,...,M ) to provide corresponding orthogonalized primary and secondary basis function output signals { _x (n-i)]

(for j = l,...,B and i = 0,...,M ) for the Xth frequency band. The orthogonalizer

170 can utilize any suitable orthogonalization scheme such as, for example, a 2- D lattice filter orthogonalization scheme or a recursive QR-RLS orthogonalization scheme similar to those described above for the single-band system.

[00100] The DPD actuator 148-X further includes a number (B) of composite branches 172-1 through 172-B that operate to weight the orthogonalized basis function output signals s_x (n-i)] (for j = l,...,B and i = 0,...,M ) using corresponding tap weights {w_{X i}] for the Xth frequency band, which are configured by the predistorter tap weight evaluation function 150-X. Using the composite branch 172-b as an example, the composite branch 172-b includes multipliers 174-0 through 174-M that apply weights w_{x b0} through w_{x hM} to the orthogonalized basis function output signals s_xb(n) through s_xb(n-M), respectively, to provide corresponding branch output signals. In this manner, the composite branches 172-1 through 172-B weight the orthogonalized basis function output signals { _X (n-i)] (for j = l,...,B and i = 0,...,M ) using the corresponding tap weights {w_x ] to provide the branch output signals. The branch output signals are combined by combiners 176 to provide the predistorted digital input signal y_x (n) for the X-th frequency band. [00101] The DPD actuator 148-X of Figure 18 (which is a DPD actuator with memory) can be represented as:

M B

y_x («)=∑∑¾^■¾ («- . (5°) where

J_{x j}(n-m) = orth({s_{x j}(n-i) ^, and (51)

Sx {n) = Wx {u{n)). (52) The orth(») function represents the orthogonalization of s_X (n-i) by the orthogonalizer 170.

[00102] The predistorter tap weight evaluation function 150-X may solve for the tap weights {w_{X i}} using a least squares procedure that fits the primary and secondary basis function output signals [s_X {n-i)} of the delay basis functions

164-1 through 164-B to the desired response d(n) for the X-th frequency band obtained via the transmit observation receiver 158. More specifically, the basis function output signals [s_X {n-i)} for each particular value of j and for i = 0,...,M at time n are collected into a row vector

s_X A data matrix U may be formed by collecting

each {s_XJ; j = 1,...,B} into a larger row with B-(l + M) elements, and then collecting rows for time instants (or samples) n,n + l,...,n + (N -I) . The resulting data matrix U has NxB-(l + M) elements. Using the desired response vector d = (n),...,d (n-N + , the tap weights {w_{x β}] may be solved using the least squares solution given by:

w = (U^†xU)^_1x(U^†xd), (53) where† denotes the conjugate transpose. [00103] The solution to Equation (53) involves inversion of the matrix

A≡(u^†x U) \ As discussed above, the numerical computations performed during a matrix inverse can exhibit severe stability problems in which small perturbations to the input can cause huge variations in the output, yielding unreliable results. However, in this embodiment, by orthogonalizing both the primary and the secondary basis function output signals, the condition number (A) = |/l_max/yl_min| of matrix A when using the DPD actuator 148-X is small (i.e., matrix A is well conditioned and numerical stable) even if there are strong memory effects. The small JC(A) also enables fast convergence of low-cost SG or LMS approaches to solving for the tap weights {w_{X i} adaptively (as opposed to solving Equation (53) directly). Like for the single-band case, simulations show that the condition number for the multi-band case using the DPD actuators

148-1 through 148-S is 1 .00024 for M=0 and 1 .00033 for M=4.

[00104] Figure 1 9 illustrates the DPD actuator 148-X of Figure 1 8 according to one embodiment in which the orthogonalizer 170 is a 2-D lattice orthogonalizer

178. Otherwise, the DPD actuator 148-X is the same as the embodiment of

Figure 18. In this embodiment, the 2-D lattice orthogonalizer 1 78 orthogonalizes the primary and secondary basis function output signals [ s_X (« - *^')} (^for j = l,... , B and i = 0,... ,M ) for the Xth frequency band using a 2-D lattice filter.

[00105] Figures 20 through 22 illustrate a system that implements the delay basis functions 164-1 through 164-B and the 2-D lattice orthogonalizer 178 of Figure 19 for frequency band X in more detail according to one embodiment of the present disclosure. As illustrated in Figure 20, the system includes

Bx(M +1) separate B-nodes 180, one for each of the (non-orthogonal) basis functions 166 and 167 in each of the delay basis functions 164-1 through 164-B for frequency band X. In the illustrated example, B=6 and M=4. Notably, the B- nodes 180 are referenced individually as B-node (1 ,1 ) through B-node (1 , H ) for frequency band X, where H - 1,... , B (M + 1) . Outputs of the B-nodes 180 are input to a 2-D triangular lattice filter 182 that includes L-nodes 184 that each perform a one-step orthogonalization of its forward (F) and backward (B) inputs. A backward output signal of the B-node (1,1) is the orthogonalized basis function output signal ¾(«), and backward output signals of the L-nodes (2,1) through

(30,1) are the orthogonalized basis function output signals J_{x l} («-l)

J_xl{n-4), J_X2(n),..., J_X2{n-4),..., J_x6(n),..., J_{x 6} (n- 4) , respectively. The orthogonalized basis function output signals [j_X {n-i)] are orthogonal in the sense that for any p and any q as long as r≠u , and hhaavvee uunniitt vv -- rr ))jj == 11 ffoorr aannyy bb aanndd aannyy rr.. TThhiiss sscchheemmee

iimmpplleemmeennttss aa nnoorrmmaalliizzeedd oorrtthhooggoonnaalliizzaattiioonn ooff tthhee bbaassiiss ffuunnccttiioonn oouuttppuutt ssiiggnnaallss

[00106] Figure 21 is a more detailed illustration of one of the B-nodes 180 of Figure 20 according to one embodiment of the present disclosure. Using B-node (1 ,h) as an example (where he H and H -1,...,B(M +1) ), the B-node 180 includes the corresponding primary or secondary basis function 166 or 167 (Figure 18) that generates the basis function output signal s_X {n-i) for j = quotient (h,M +l) + l and i = {h mod (M + l)) -1 , where quotient (h,M+l) returns the quotient of h/(M +1) . The B-node 180 also includes a multiplier 186 that applies a normalizing scaling factor ce _b to normalize the variance of the basis function output signal s_X]{n-i) to provide forward and backward output signals f_h (n) and b_hh (n) , respectively, where f_hh {n)=b_hh {n) = cc -s_j {n-i) . The scaling factor ce _b is a function of measured statistics of Sj {n-i) and is defined as:

(X_{1 h} (54)

where μ_1ι≡E {s_X (n - i)} . Notably, as discussed above, if the basis function h is a secondary basis function 167, the basis function h can be implemented as an i- th delay in the tapped delay memory line. Also, in this embodiment, the combination of the multipliers 186 of the B-nodes 180 and the 2-D triangular lattice filter 182 (Figure 20) form the 2-D lattice orthogonalizer 178 of Figure 19.

[00107] Figure 22 is a more detailed illustration of one of the L-nodes 184 of Figure 20. Using L-node (k,h) as an example, the L-node (k,h) updates two input signals, one forward input signal f_k __{l h} (n) and one backward input signal

¾_HJ1+I (n) , using a cross-connected lattice filter stage with a complex-valued reflection coefficient T_{k h} and then normalizes for unit variance using a scaling factor a_k . More specifically, the cross-connected lattice filter stage includes multipliers 188 and 190 and combiners 192 and 194 connected as shown. The multiplier 188 applies the reflection coefficient r_{¾ h} to the forward input signal f_k-u iⁿ)■ ^Tne output of the multiplier 192 is then combined with the backward input signal ¾__1>h+1 («) . Likewise, the multiplier 190 applies the conjugate of the reflection coefficient Γ^* _h to the backward input signal ¾__ljh+1 («) . The output of the multiplier 190 is then combined with the forward input signal f_k__hh (n) .

Multipliers 196 and 198 apply the scaling factor a_k to the output signals of the combiners 192 and 194 to provide backward and forward output signals b_{k h} (n) and f_{k h} (n) , respectively. The reflection coefficient T_{k h} is computed based on the measured statistics of the in ut signals and is defined as:

The scaling factor _k , or normalization coefficient, is defined as: a, (56)

where μ_{Ι[ h}≡ E{b_{k h} (n)] is the mean of the updated backward input signal b_{k h} (n) .

[00108] Figure 23 illustrates the DPD actuator 148-X of Figure 18 according to one embodiment in which the orthogonalizer 170 is a recursive QR-RLS orthogonalizer 200. Otherwise, the DPD actuator 148-X is the same as the embodiment of Figure 18. In this embodiment, the recursive QR-RLS

orthogonalizer 200 orthogonalizes the primary and secondary basis function output signals {s_{X j} (n - i)} (for j = l,... , B and i = 0,... ,M ) for the X-th frequency band using a recursive QR-RLS scheme. The details of the recursive QR-RLS scheme are described above and, as such, are not repeated. In one

embodiment, the recursive QR-RLS orthogonalizer 200 utilizes a QR

decomposition based scheme to directly compute the orthogonalized basis function signals { _X (n - i)} (for j = l,... , B and i = 0,... ,M ) from the non- orthogonalized basis function signals {s_{X J} (« -?^')} (for j = l,... , B and

i = 0,... ,M ). In another embodiment, the predistorter tap weight evaluation function 150-X (Figure 17) utilizes a recursive QR-RLS scheme to obtain a solution for W = R^† for the Xth frequency band as described above. The tap weights can then be applied to the non-orthogonalized basis function signals s_{j X} (n -i) (for j = l,... , B and i = ,... ,M ) by the recursive QR-RLS

orthogonalizer 200 according to the equation z = Wxy to thereby provide the orthogonalized basis function signals { _X (n - i)} (for j = l,... , B and i = 0,... ,M )-

[00109] In the embodiments of Figures 18-23, the DPD subsystem 146 utilizes separate orthogonalizers 170, 178, and 200 for each of the S frequency bands. However, in another embodiment, a single orthogonalizer is utilized to

orthogonalize all of the basis functions for all of the frequency bands. In other words, this single orthogonalizer operates to orthogonalize all S B (M +1) basis functions (primary and secondary). In this regard, Figure 24 illustrates another embodiment of the DPD subsystem 146 that includes delay basis functions 164- 1 (1 ) through 164-B(1 ) for the first frequency band, delay basis functions 164-1 (X) through 164-B(X) for the X-th frequency band, and delay basis functions 164- 1 (S) through 164-B(S) for the S-th frequency band. Using frequency band X as an example, the delay basis functions 164-1(X) through 164-B(X) are the same as the delay basis functions 164-1 through 164-B described for the frequency band X in the embodiments above. The same is true for the other frequency bands. Unlike in the previously described embodiments, the DPD subsystem 146 includes a single orthogonalizer 201 that operates to orthogonalize all of the basis function output signals {s_xj(n-i)] for j = l,...,B, i = 0,...,M , and x = l,...,S output by the delay basis functions 164. The orthogonalizer 201 may use any suitable orthogonalization scheme such as, for example, a 2-D lattice orthogonalization scheme or a recursive QR-RLS orthogonalization scheme like those described above.

[00110] The orthogonalized basis function output signals [ _x (n-i)) for j = l,...,B, i = 0,...,M , and x = l,...,S output by the orthogonalizer 201 are processed by composite branches 172 to provide branch output signals for each of the frequency bands. For each branch 172, the details are the same as that of the composite branches 172 illustrated in Figure 18. More specifically, the orthogonalized basis function output signals (n-i)] (for j = l,...,B, i = 0,...,M ) for the first frequency band are processed by corresponding composite branches 172-1(1) through 172-B(1) (i.e., weighted by corresponding tap weights) to provide corresponding branch output signals for the first frequency band. The branch output signals for the first frequency band are combined to provide the predistorted digital input signal y (n) for the first frequency band. Likewise, the orthogonalized basis function output signals

[s_Xj (n-i)] (for j = l,...,B, i = 0,...,M ) for the X-th frequency band are processed by corresponding composite branches 172-1(X) through 172-B(X) (i.e., weighted by corresponding tap weights) to provide corresponding branch output signals for the X-th frequency band. The branch output signals for the X- th frequency band are combined to provide the predistorted digital input signal y_x (n) for the X-th frequency band. In the same manner, the orthogonalized basis function output signals { _{S j} (n - i)] (for j = l, ... , B , i = 0, ... ,M ) for the S-th frequency band are processed by corresponding composite branches 172-1 (S) through 172-B(S) (i.e., weighted by corresponding tap weights) to provide corresponding branch output signals for the S-th frequency band. The branch output signals for the S-th frequency band are combined to provide the predistorted digital input signal y_s (n) for the S-th frequency band.

[00111] In the embodiments of Figures 18-23, the DPD actuators 148-1 through 148-S include the delay basis functions 164-1 through 164-B. Figure 25 illustrates another embodiment of the DPD actuators 148-1 through 148-S, using the DPD actuator 148-X as an example, in which only the outputs of the primary basis functions are orthogonalized. The memory effects are modeled via corresponding tapped delay line memory models after orthogonalization.

[00112] More specifically, as illustrated in Figure 25, the DPD actuator 148-X includes a number B of basis functions 202-1 through 202-B for the Xth frequency band, where B is a number of basis functions 202 used to provide the desired predistortion. The basis functions 202-1 through 202-B correspond to the primary basis functions in the embodiments above and are mathematically represented as a basis functions { _X } for = l,... ,B . The basis functions 202-

1 through 202-B can be any suitable basis functions for digital predistortion for the Xth frequency band of the concurrent multi-band signal for a desired nonlinear order such as, for example, basis functions for a memory polynomial predistortion scheme, basis functions for a generalized memory polynomial predistortion scheme, or the like.

[00113] For example, for the dual-band scenario (i.e., S=2) with memory, the predistorted digital input signals can be defined as: - . ^wnere

M B

yi (ⁿ) =∑∑^w2 i^{■ s}2,j iⁿ - . where s_2j(n) = /_2j(u₁(n),u₂(n)).

For this dual-band scenario, in one embodiment, the basis functions!^.} for j = 1,...,B for the first frequency band (i.e., for X=1) may be (considering 5^th order):

ψ_χχ {u_x (n),u₂ («)) = u_x (n) (57) ψ_{χ 2} [u_x (n),u₂ (n)) = u_x (n) ^•|"i(")f > (58) ψ_χ 3 {u_x (n) ,u₂ (n)) = u_x (n) ^•|«₂(n)|² (59) ψ_χ4 [u_x (n),M₂ (ⁿ)) ^{= M}i (ⁿ) ^• "i (")|⁴ > (60) and (61)

«₂(n)². (62)

χ [u_x (n),u₂ (rc)) - u₂ (n) , (63)

Ψι, ₂ {u_x (n),u₂ (η)) = u₂ (n) · |«₂(n)|² (64)

Ψι, 3 {u_x (n),u₂ (n)) = u₂ (n)^■ |"i (")|². (65)

Ψι, ₄ [u_x (n),u₂ (n)) = u₂ (n) · h(«)f (66)

Ψι, ₅ {u_x (n),u₂ (n)) = u₂ (n) · |"i(") > and (67)

Ψι, ₆ {u_x (n),u₂ (n)) = ^M2 (ⁿ) ^' l^Mi (68)

Note, however, that the primary basis functions given above are only examples. Any suitable primary basis functions may be used. [00114] The basis functions 202-1 through 202-B output corresponding basis function output signals {s_{X j} (rc)} for j = l,..., B for the Xth frequency band where s Aⁿ) = yxA^ui - ^Ms { ⁿ)) -

The DPD actuator 148-X also includes an orthogonalizer 204 that operates to orthogonalize both the basis function output signals (for j = \,... , B ) \o provide corresponding orthogonalized basis function output signals {½_{, ·} («)} (for j = 1,... , B ) for the Xth frequency band. The orthogonalizer 204 can utilize any suitable orthogonalization scheme such as, for example, a 2-D lattice filter orthogonalization scheme or a recursive QR-RLS orthogonalization scheme similar to those described above.

[00115] The DPD actuator 148-X further includes a number (B) of branches 206-1 through 206-B. Using the branch 206-b as an example, the branch 206-b includes a tapped delay line memory model 208 that includes a number of delays 210-1 through 210-M that generate corresponding delayed versions of the orthogonalized basis function output signal J_{X >} (n) . Multipliers 212-0 through 212-M apply tap weights {w_x ] for the Xth frequency band to the tap output signals [ _X (n - i)] (for j = l,... , B and i = 0,... ,M ). The tap weights {w_{X i} ) are configured by the predistorter tap weight evaluation function 150-X. The weighted tap output signals output by the multipliers 212-0 through 212-M are combined by combiners 214-1 through 214-M to provide a branch output signal for the branch 206-b. The branch output signals of the branches 206-1 through 206-B are combined by combiners 216 to provide the predistorted digital input signal y_x (n) for the Xth frequency band.

[00116] The predistorter tap weight evaluation function 150-X may solve for the tap weights {w_{X i} using a least squares procedure that fits the basis function output signals {s_{j X} (n) oi the basis functions 202-1 through 202-B to the desired response d (n) obtained via the transmit observation receiver 158 for frequency band X. More specifically, the tap output signals s_X (« -*)} for each particular value of j at time n axe collected into a row vector

I_X = l_X (n) ,... ,I_X (n -M )^~^ . A data matrix U may be formed by collecting each {?_XJ;j = l,...,B} into a larger row with B - (l + M ) elements, and then collecting rows for time instants (or samples) n, n + l,... ,n + (N -i) . The resulting data matrix U has NxB - (l + M ) elements. Using the desired response vector d = [d (n) ,... , d (n - N + 1) , the tap weights {w_{X i}} may be solved using the least squares solution given by:

w = (u^†xU)^_1 x(u^†xd) , (69) where† denotes the conjugate transpose.

[00117] Again, the solution to Equation (69) involves inversion of the matrix

A≡ (u^† x u) ¹. As discussed above, the numerical computations performed during a matrix inverse can exhibit severe stability problems in which small perturbations to the input can cause huge variations in the output, yielding unreliable results. However, in this embodiment, by orthogonalizing both the primary and the secondary basis function output signals, the condition number (A) = |/l_max/yl_min| of matrix A when using the DPD actuator 148-X is small (i.e., matrix A is well conditioned and numerical stable) with low or no memory effects and is improved for large memory effects. Simulations show that the condition number for the multi-band case using the DPD actuators 148-1 through 148-S of Figure 25 is 1 .00024 for M=0 and between 3x10⁶ and 4x10⁶ for different dual- band scenarios for M=4, which is an improvement from architectures without orthogonalization which were simulated to have conditions numbers of about 2.3x10⁶ for M=0 and 2.1 x10⁹ for M=4.

[00118] Figure 26 illustrates the DPD actuator 148-X of Figure 25 according to one embodiment in which the orthogonalizer 204 is a 2-D lattice orthogonalizer 218. Otherwise, the DPD actuator 148-X is the same as the embodiment of Figure 25. In this embodiment, the 2-D lattice orthogonalizer 218 orthogonalizes the basis function output signals s_{X j} (n) (for j = l, ... , B ) for the Xth frequency band using a 2-D lattice filter, in the manner described above.

[00119] Figure 27 illustrates the DPD actuator 148-X of Figure 25 according to one embodiment in which the orthogonalizer 204 is a recursive QR-RLS orthogonalizer 220. Otherwise, the DPD actuator 148-X is the same as the embodiment of Figure 25. In this embodiment, the recursive QR-RLS

orthogonalizer 220 orthogonalizes the basis function output signals s_XJ (n) (for j = l,... , B ) using a recursive QR-RLS scheme. The details of the recursive QR- RLS scheme are described above and, as such, are not repeated. In one embodiment, the recursive QR-RLS orthogonalizer 220 utilizes a QR

decomposition based scheme to directly compute the orthogonalized basis function signals _XJ {n) (for j = l,... , B ) from the non-orthogonalized basis function signals s_XJ (n) (for j = l,... , B ). In another embodiment, the predistorter tap weight evaluation function 150-X (Figure 17) utilizes a recursive QR-RLS scheme to obtain a solution for W = R^† for the Xth frequency band as described above. The tap weights can then be applied to the non-orthogonalized basis function signals s_{X j} (n) (for j = l,... , B ) by the recursive QR-RLS orthogonalizer 220 according to the equation z = Wxy to thereby provide the orthogonalized basis function signals _XJ {n) (for j = l, ... , B ).

[00120] In the embodiments of Figures 25-27, the DPD subsystem 146 utilizes separate orthogonalizers 204, 218, and 220 for each of the S frequency bands. However, in another embodiment, a single orthogonalizer is utilized to

orthogonalize all of the basis functions for all of the frequency bands. In other words, this single orthogonalizer operates to orthogonalize all S B basis functions. In this regard, Figure 28 illustrates another embodiment of the DPD subsystem 146 that includes basis functions 202-1 (1 ) through 202-B(1 ) for the first frequency band, basis functions 202-1 (X) through 202-B(X) for the X-th frequency band, and basis functions 202-1 (S) through 202-B(S) for the S-th frequency band. Using frequency band X as an example, the basis functions 202-1 (X) through 202-B(X) are the same as the basis functions 202-1 through 202-B described for the frequency band X in the embodiments above. The same is true for the other frequency bands. Unlike in the previously described embodiments, the DPD subsystem 146 includes a single orthogonalizer 222 that operates to orthogonalize all of the basis function output signals {s_{x j} («)} for j = l,... , B and x = l,... , S output by the basis functions 202. The orthogonalizer 222 may use any suitable orthogonalization scheme such as, for example, a 2-D lattice orthogonalization scheme or a recursive QR-RLS orthogonalization scheme like those described above.

[00121] The orthogonalized basis function output signals { _x («)} for j = l,... , B and x = l,... , S output by the orthogonalizer 222 are processed by branches 206 to provide branch output signals for each of the frequency bands. For each branch 206, the details are the same as that of the branches 206 illustrated in Figure 25. More specifically, the orthogonalized basis function output signal (for j = l,... , B ) for the first frequency band are processed by corresponding composite branches 206-1 (1 ) through 206-B(1 ) (i.e., delayed by corresponding delay line memory models where resulting tap outputs are weighted by corresponding tap weights and then combined) to provide corresponding branch output signals for the first frequency band. The branch output signals for the first frequency band are combined to provide the predistorted digital input signal y (n) for the first frequency band. Likewise, the orthogonalized basis function output signals {¾ («)} (for j = l,... , B ) for the X-th frequency band are processed by corresponding composite branches 206-1 (X) through 206-B(X) to provide corresponding branch output signals for the X-th frequency band. The branch output signals for the X-th frequency band are combined to provide the predistorted digital input signal y_x (n) for the X-th frequency band. In the same manner, the orthogonalized basis function output signals {s_{S j} («)} (for j = 1,... , B ) for the S-th frequency band are processed by corresponding composite branches 206-1 (S) through 206-B(S) (i.e., weighted by corresponding tap weights) to provide corresponding branch output signals for the S-th frequency band. The branch output signals for the S-th frequency band are combined to provide the predistorted digital input signal y_s (n) for the S-th frequency band.

[00122] Figure 29 illustrates a process for generating and providing one or more predistorted digital input signals according to one embodiment of the present disclosure. First, one or more digital input signals are processed according to a DPD model that orthogonalizes a set of basis functions including primary basis functions for a first frequency band and at least one additional basis function to provide one or more predistorted digital input signals (step 1000). As discussed above, the additional basis function(s) can include secondary basis function(s) that generate delayed versions of the output(s) of a primary basis function(s) and/or additional primary basis functions for one or more additional frequency bands (i.e., in the case of a multi-band system). The predistorted digital input signal(s) are provided to a non-linear subsystem to thereby compensate for a non-linear characteristic of the non-linear subsystem (step 1002). For example, in the embodiments above, the predistorted digital input signal(s) are provided to a non-linear subsystem that includes a PA having a non-linear characteristic. The predistortion applied to the input signal(s) compensates for the non-linear characteristic of the PA (i.e., linearizes the output of the PA). Note, however, that the DPD schemes disclosed herein can be applied for any suitable type of non-linear subsystem and are not limited to compensating for the non-linear characteristic of a PA nor a transmitter.

[00123] Figure 30 is a more detailed illustration of step 1000 of Figure 29 according to one embodiment of the present disclosure. In this embodiment, in order to process the one or more digital input signals according to the DPD model, the one or more digital input signals are processed according to the primary basis functions for the first frequency band to thereby provide primary basis function output signals and processed according to the at least one additional basis function to provide at least one additional basis function output signal (step 1 100). The basis function output signals (i.e., both the primary basis function output signals and the at least one additional basis function output signal) are orthogonalized, as described above (step 1 102), and the

orthogonalized basis function output signals are then processed to provide the one or more predistorted digital input signals (step 1 104). As described above, in one embodiment, the basis function output signals are orthogonalized via a 2-D lattice orthogonalizer. In another embodiment, the basis function output signals are orthogonalized via a recursive QR-RLS orthogonalizer.

[00124] In one embodiment, the one or more digital input signals consist of a single digital input signal for a single frequency band, and the one or more predistorted digital input signals consist of a single predistorted digital input signal for the frequency band. Further, in one embodiment, the at least one additional basis function includes, for each primary basis function output signal, a number, M, of secondary basis functions that provide different delayed versions of the primary basis function output signal as corresponding additional basis function output signals, where M is a desired memory depth and is greater than or equal to 1 . In this regard, Figure 31 illustrates step 1 100 of Figure 30 according to one such embodiment. As illustrated, in order to process the digital input signal according to the DPD model, the digital input signal is processed according to the primary basis functions for the single frequency band (step 1200). Then, for each primary basis function output signal, the primary basis function output signal is processed according to the secondary basis functions to provide the different delayed versions of the primary basis function output signal (step 1202).

[00125] In another embodiment, the digital input signals include multiple digital input signals each being for a different one a number of frequency bands of a concurrent multi-band signal, and the predistorted digital input signals include multiple predistorted digital input signals each being for a different one of the number of frequency bands of the concurrent multi-band signal. Further, in one embodiment, the at least one additional basis function includes for each additional frequency band of the concurrent multi-band signal (i.e., each frequency band in addition to the first frequency band), additional primary basis functions for the additional frequency band of the concurrent multi-band signal. In one embodiment, the basis functions for each frequency band includes primary basis functions for both intra-band and inter-band distortion. In this regard, Figure 32 illustrates step 1 100 of Figure 30 in more detail according to one embodiment in which the at least one additional basis function includes additional primary basis functions for one or more additional frequency bands of a concurrent multi-band signal. As illustrated, the digital input signals for all of the frequency bands are processed according to the primary basis functions for each of the frequency bands (step 1300-1 through 1300-S). As a result, primary basis function output signals are provided for each of the frequency bands.

Then, as discussed above, the primary basis function output signals may be orthogonalized and then processed to provide predistorted digital input signals for the frequency bands.

[00126] In another embodiment, in addition to the primary basis functions for the additional frequency bands, the at least one additional basis function includes, for each primary basis function, a number of secondary basis functions that provide different delayed versions of the corresponding primary basis function output signal. In this regard, Figure 33 illustrates step 1 100 of Figure 30 in more detail according to one such embodiment. As illustrated, the digital input signals for all of the frequency bands (i.e., the first frequency band and the one or more additional frequency bands) are processed according to the primary basis functions for each of the frequency bands (step 1400). In addition, for each primary basis function output signal, the primary basis function output signal is processed by a number of secondary basis functions to provide different delayed versions of the primary basis function output signal (step 1402). Then, as discussed above, the basis function output signals (i.e., the primary basis function output signals and the secondary or delayed basis function output signals) are orthogonalized and then processed to provide the predistorted digital input signals for the multiple frequency bands.

[00127] Notably, as discussed above, in one embodiment, the basis function output signals are separately orthogonalized for each frequency band (i.e., there are separate orthogonalizers for each frequency band). In another embodiment, a single orthogonalizer is utilized to orthogonalize all of the basis function output signals of all of the frequency bands.

[00128] The following acronyms are used throughout this disclosure.

2-D Two-Dimensional

3GPP 3^rd Generation Partnership Project

D/A Digital-to-Analog

DPD Digital Predistortion

DRF Digital Radio Frequency

LMS Least Means Square

PA Power Amplifier

PSD Power Spectral Density

QR-RLS QR Decomposition Based Recursive Least Squares

SG Stochastic Gradient

VLSI Very Large Scale Integration

[00129] Those skilled in the art will recognize improvements and modifications to the embodiments of the present disclosure. All such improvements and modifications are considered within the scope of the concepts disclosed herein and the claims that follow.

Claims

Claims What is claimed is:

1 . A method comprising:

processing one or more digital input signals according to a digital predistortion model that orthogonalizes a set of basis functions (104, 166, 202) for the digital predistortion model comprising a first plurality of primary basis functions (104, 166, 202) for a first frequency band and at least one additional basis function (105, 166, 167, 202) to provide one or more predistorted digital input signals; and

providing the one or more predistorted digital input signals to a non-linear subsystem (92, 94, 154, 156) to thereby compensate for a non-linear

characteristic of the non-linear subsystem (92, 94, 154, 156).

2. The method of claim 1 wherein processing the one or more digital input signals according to the digital predistortion model comprises:

processing the one or more digital input signals according to the first plurality of primary basis functions (104, 166, 202) for the first frequency band to thereby provide a first plurality of primary basis function output signals and according to the at least one additional basis function (105, 166, 167, 202) to provide at least one additional basis function output signal;

orthogonalizing the first plurality of primary basis function output signals and the at least one additional basis function output signal to provide a first plurality of orthogonalized primary basis function output signals and at least one additional orthogonalized basis function output signal; and

processing the first plurality of orthogonalized primary basis function output signals and the at least one additional orthogonalized basis function output signal to provide the one or more predistorted digital input signals.

3. The method of claim 2 wherein orthogonalizing the first plurality of primary basis function output signals and the at least one additional basis function output signal comprises orthogonalizing the first plurality of primary basis function output signals and the at least one additional basis function output signal via a 2-D lattice orthogonalizer (1 16, 178, 218).

4. The method of claim 2 wherein orthogonalizing the first plurality of primary basis function output signals and the at least one additional basis function output signal comprises orthogonalizing the first plurality of primary basis function output signals and the at least one additional basis function output signal via a recursive QR-RLS orthogonalizer (138, 200, 220).

5. The method of claim 2 wherein the one or more digital input signals consist of a digital input signal for the first frequency band, the one or more predistorted digital input signals consist of a predistorted digital input signal for the first frequency band, and processing the one or more digital input signals comprises processing the digital input signal to provide the predistorted digital input signal.

6. The method of claim 5 wherein the at least one additional basis function (105, 166, 167, 202) comprises a secondary basis function (105, 167) that provides a delayed version of one of the first plurality of primary basis function output signals as a corresponding one of the at least one additional basis function output signals.

7. The method of claim 6 wherein processing the digital input signal comprises:

processing the digital input signal according to the first plurality of primary basis functions (104, 166, 202) to thereby provide the first plurality of primary basis function output signals; and

processing the one of the first plurality of primary basis function output signals according to the secondary basis function (105, 167) to provide the delayed version of the one of the first plurality of primary basis function output signals as the corresponding one of the at least one additional basis function output signal.

8. The method of claim 5 wherein the at least one additional basis function (105, 166, 167, 202) comprises, for each primary basis function output signal of the first plurality of primary basis function output signals, a number, M, of secondary basis functions (105, 167) that provide different delayed versions of the primary basis function output signal as corresponding ones of the at least one additional basis function output signal, where M is a desired memory depth and is greater than or equal to 1 .

9. The method of claim 8 wherein processing the digital input signal comprises:

for each primary basis function output signal of the first plurality of primary basis function output signals, processing the primary basis function output signal according to the secondary basis functions (105, 167) to provide the different delayed versions of the primary basis function output signal as the corresponding ones of the at least one additional basis function output signal.

10. The method of claim 8 wherein processing the first plurality of

orthogonalized primary basis function output signals and the at least one additional orthogonalized basis function output signal comprises:

applying weights to the first plurality of orthogonalized primary basis function output signals and the at least one additional orthogonalized basis function output signal to provide corresponding weighted signals; and

combining the corresponding weighted signals to provide the predistorted digital input signal.

1 1 . The method of claim 2 wherein:

the one or more digital input signals comprise two or more digital input signals for two or more frequency bands of a concurrent multi-band signal, the two or more frequency bands of the concurrent multi-band signal comprising the first frequency band and one or more additional frequency bands;

the one or more predistorted digital input signals comprise two or more predistorted digital input signals for the two or more frequency bands of the concurrent multi-band signal; and

processing the two or more digital input signals comprises processing the two or more digital input signals to provide the two or more predistorted digital input signals.

12. The method of claim 1 1 wherein the at least one additional basis function (105, 166, 167, 202) comprises, for each additional frequency band of the concurrent multi-band signal, an additional plurality of primary basis functions (166) for the additional frequency band of the concurrent multi-band signal such that the at least one additional basis function output signal comprises an additional plurality of primary basis function output signals for the additional frequency band.

13. The method of claim 12 wherein:

the first plurality of primary basis functions (104, 166, 202) for the first frequency band comprises primary basis functions for both intra-band and inter- band distortion; and

for each additional frequency band of the two or more frequency bands, the additional plurality of primary basis functions (166) for the additional frequency band comprises primary basis functions for both intra-band and inter- band distortion.

14. The method of claim 13 wherein the at least one additional basis function (105, 166, 167, 202) further comprises, for each primary basis function output signal of the first plurality of primary basis function output signals and each additional plurality of primary basis function output signals, a number, M, of secondary basis functions (167) that provide different delayed versions of the primary basis function output signal as corresponding ones of the at least one additional basis function output signal, where M is a desired memory depth and is greater than or equal to 1 .

15. The method of claim 14 wherein processing the two or more digital input signals comprises:

processing the two or more digital input signals according to the first plurality of primary basis functions (104, 166, 202) to thereby provide the first plurality of primary basis function output signals for the first frequency band; for each additional frequency band of the one or more additional frequency bands, processing the two or more digital input signals according to the additional plurality of primary basis functions (166) for the additional frequency band to thereby provide the additional plurality of primary basis function output signals for the additional frequency band; and

for each primary basis function output signal of the first plurality of primary basis function output signals and each additional plurality of primary basis function output signals, processing the primary basis function output signal according to the number of secondary basis functions (167) to provide the different delayed versions of the primary basis function output signal as the corresponding ones of the at least one additional basis function output signal.

16. The method of claim 14 wherein processing the first plurality of orthogonalized primary basis function output signals and the at least one additional orthogonalized basis function output signal comprises:

applying weights to the first plurality of orthogonalized primary basis function output signals and the at least one additional orthogonalized basis function output signal to provide corresponding weighted signals; and for each frequency band of the two or more frequency bands, combining ones of the corresponding weighted signals generated for the frequency band to provide one of the two or more predistorted digital input signals for the frequency band.

17. The method of claim 13 wherein processing the first plurality of orthogonalized primary basis function output signals and the at least one additional orthogonalized basis function output signal comprises:

passing each orthogonalized primary basis function output signal of the first plurality of orthogonalized primary basis function output signals and the at least one additional orthogonalized basis function output signal through a corresponding memory delay line (168-1 through 168-M) to provide one or more delayed versions of each of the first plurality of orthogonalized primary basis function output signals and each of the at least one additional orthogonalized basis function output signal;

applying weights to the first plurality of orthogonalized basis function output signals, the at least one additional orthogonalized basis function output signal, and the one or more delayed versions of each of the first plurality of orthogonalized basis function output signals and each of the at least one additional orthogonalized basis function output signals to provide corresponding weighted signals; and

for each frequency band of the two or more frequency bands, combining ones of the corresponding weighted signals generated for the frequency band to provide one of the two or more predistorted digital input signals for the frequency band.

18. The method of claim 12 wherein orthogonalizing the first plurality of primary basis function output signals and the at least one additional basis function output signal comprises:

orthogonalizing the first plurality of primary basis function output signals and at least one additional basis function output signal using separate orthogonalizers (170, 178, 200, 204, 218, 220) for each frequency band of the first frequency band and the one or more additional frequency bands.

19. The method of claim 12 wherein orthogonalizing the first plurality of primary basis function output signals and the at least one additional basis function output signal comprises:

orthogonalizing the first plurality of primary basis function output signals and at least one additional basis function output signal using a single

orthogonalizer (201 , 222) for all frequency bands of the first frequency band and the one or more additional frequency bands.

20. The method of claim 1 wherein the non-linear subsystem (92, 94, 154, 156) comprises a power amplifier (94, 156).

21 . A system comprising:

a digital predistortion subsystem (84, 146) configured to process one or more digital input signals according to a digital predistortion model that orthogonalizes a set of basis functions (104, 166, 202) for the digital predistortion model that comprises a first plurality of primary basis functions (104, 166, 202) for a first frequency band and at least one additional basis function (105, 166, 167, 202) to provide one or more predistorted digital input signals; and

a non-linear subsystem (92, 94, 154, 156) comprising a non-linear component (94, 156) configured to process the one or more predistorted digital input signals to provide an output signal.

22. The system of claim 21 wherein the at least one additional basis function (105, 166, 167, 202) comprises a secondary basis function (105, 167) that provides a delayed version of an output signal of one of the first plurality of primary basis functions (104, 166, 202) as an output signal of a corresponding one of the at least one additional basis functions (105, 166, 167, 202).

23. The system of claim 21 wherein:

the digital predistortion subsystem (84, 146) is configured to process the two or more digital input signals according to the digital predistortion model to provide the two or more predistorted digital input signals.

24. The system of claim 23 wherein the at least one additional basis function (105, 166, 167, 202) comprises, for each additional frequency band of the concurrent multi-band signal, an additional plurality of primary basis functions (166, 202) for the additional frequency band of the concurrent multi-band signal.

25. The system of claim 24 wherein the at least one additional basis function (105, 166, 167, 202) further comprises, for each primary basis function of the first plurality of primary basis functions (104, 166, 202) and each additional plurality of primary basis functions, a number, M, of secondary basis functions (167) that provide different delayed versions of an output signal of the primary basis function, where M is a desired memory depth and is greater than or equal to 1 .

26. The system of claim 21 wherein:

the one or more digital input signals consist of a digital input signal;

the one or more predistorted digital input signals consist of a predistorted digital input signal; and

the digital predistortion subsystem (84) comprises a digital predistortion actuator (86) comprising: a plurality of delay basis functions (102), each delay basis function (102) comprising a primary basis function (104) configured to process the digital input signal to output a primary basis function output signal and one or more secondary basis functions (105) configured to output one or more secondary basis function output signals, each secondary basis function output signal of the one or more secondary basis function output signals being a different delayed version of the primary basis function output signal;

an orthogonalizer (108, 1 16, 138) configured to orthogonalize the primary basis function output signals and the secondary basis function output signals to provide orthogonalized primary and secondary basis function output signals; and

a plurality of branches (1 10) configured to process the orthogonalized primary and secondary basis function output signals to provide the predistorted digital input signal.

27. The system of claim 26 wherein the orthogonalizer (108, 1 16, 138) is a 2- D lattice orthogonalizer (1 16).

28. The system of claim 26 wherein the orthogonalizer (108, 1 16, 138) is a recursive QR-RLS orthogonalizer (138).

29. The system of claim 21 wherein:

the one or more digital input signals comprise a plurality of digital input signals each being for a different one of a plurality of frequency bands of a concurrent multi-band signal;

the one or more predistorted digital input signals comprise a plurality of predistorted digital input signals each being for a different one of the plurality of frequency bands of the concurrent multi-band signal; and the digital predistortion subsystem (146) comprises, for each frequency band of the plurality of frequency bands, a digital predistortion actuator (148) comprising:

a plurality of delay basis functions (164) for the frequency band, each delay basis function (164) comprising a primary basis function (166) for the frequency band configured to process the plurality of digital input signals to output a primary basis function output signal and one or more secondary basis functions (167) configured to output one or more secondary basis function output signals, each secondary basis function output signal of the one or more secondary basis function output signals being a different delayed version of the primary basis function output signal;

an orthogonalizer (170, 178, 200) configured to orthogonalize the primary basis function output signals and the secondary basis function output signals to provide orthogonalized primary and secondary basis function output signals for the frequency band; and

a plurality of branches (172) configured to process the orthogonalized primary and secondary basis function output signals for the frequency band to provide the predistorted digital input signal for the frequency band.

30. The system of claim 29 wherein the orthogonalizer (170, 178, 200) is a 2- D lattice orthogonalizer (178).

31 . The system of claim 29 wherein the orthogonalizer (170, 178, 200) is a recursive QR-RLS orthogonalizer (200).

32. The system of claim 21 wherein:

the one or more digital input signals comprise a plurality of digital input signals each being for a different one of a plurality of frequency bands of a concurrent multi-band signal; the one or more predistorted digital input signals comprise a plurality of predistorted digital input signals each being for a different one of the plurality of frequency bands of the concurrent multi-band signal; and

the digital predistortion subsystem (146) comprises:

for each frequency band of the plurality of frequency bands, a plurality of delay basis functions (164) for the frequency band, each delay basis function (164) comprising a primary basis function (166) for the frequency band configured to process the plurality of digital input signals to output a primary basis function output signal and one or more secondary basis functions (167) configured to output one or more secondary basis function output signals, each secondary basis function output signal of the one or more secondary basis function output signals being a different delayed version of the primary basis function output signal;

an orthogonalizer (201 ) configured to orthogonalize the primary and secondary basis function output signals output by the plurality of delay basis functions (164) for all of the plurality of frequency bands to provide orthogonalized primary and secondary basis function output signals for all of the plurality of frequency bands; and

a plurality of branches (172) configured to process the orthogonalized primary and secondary basis function output signals to provide the plurality of predistorted digital input signals.

33. The system of claim 32 wherein the orthogonalizer (201 ) is a 2-D lattice orthogonalizer.

34. The system of claim 32 wherein the orthogonalizer (201 ) is a recursive QR-RLS orthogonalizer.

35. The system of claim 21 wherein: the one or more digital input signals comprise a plurality of digital input signals each being for a different one of a plurality of frequency bands of a concurrent multi-band signal;

the one or more predistorted digital input signals comprise a plurality of predistorted digital input signals each being for a different one of the plurality of frequency bands of the concurrent multi-band signal; and

the digital predistortion subsystem (146) comprises, for each frequency band of the plurality of frequency bands, a digital predistortion actuator (148) comprising:

a plurality of primary basis functions (202) for the frequency band configured to process the plurality of digital input signals to output a primary basis function output signal for the frequency band;

an orthogonalizer (204, 218, 220) configured to orthogonalize the primary basis function output signals for the frequency band; and

a plurality of branches (206) configured to process the orthogonalized primary basis function output signals for the frequency band to provide the predistorted digital input signal for the frequency band.

36. The system of claim 35 wherein the orthogonalizer (204, 218, 220) is a 2- D lattice orthogonalizer (218).

37. The system of claim 35 wherein the orthogonalizer (204, 218, 220) is a recursive QR-RLS orthogonalizer (220).

38. The system of claim 21 wherein:

the one or more predistorted digital input signals comprise a plurality of predistorted digital input signals each being for a different one of the plurality of frequency bands of the concurrent multi-band signal; and the digital predistortion subsystem (146) comprises:

for each frequency band of the plurality of frequency bands, a plurality of primary basis functions (202) for the frequency band configured to process the plurality of digital input signals to output primary basis function output signals for the frequency band;

an orthogonalizer (222) configured to orthogonalize the primary basis function output signals output by the plurality of primary basis functions (202) for all of the plurality of frequency bands to provide orthogonalized primary basis function output signals for all of the plurality of frequency bands; and

a plurality of branches (206) configured to process the orthogonalized primary basis function output signals to provide the plurality of predistorted digital input signals.

39. The system of claim 38 wherein the orthogonalizer (222) is a 2D-lattice orthogonalizer.

40. The system of claim 38 wherein the orthogonalizer (222) is a recursive QR-RLS orthogonalizer.