WO2015100720A1

WO2015100720A1 - Envelope amplifier and base station

Info

Publication number: WO2015100720A1
Application number: PCT/CN2014/070034
Authority: WO
Inventors: 蔡中华; 王开展
Original assignee: 华为技术有限公司
Priority date: 2014-01-02
Filing date: 2014-01-02
Publication date: 2015-07-09
Also published as: CN105264768A; CN105264768B

Abstract

Embodiments of the present invention provide an envelope amplifier and a base station. The envelope amplifier comprises: a voltage generation module, used for generating n voltages, n being a positive integer greater than 1; and a voltage selection module, used for receiving a control signal, receiving the n voltages from the voltage generation module, and selecting m voltages from the n voltages according to the control signal, and generating an envelope voltage according to the m voltages, the envelope voltage being used for tracking an envelope of a signal, m being a positive integer less than or equal to n. In the embodiments of the present invention, the voltage selection module selects m voltages from n voltages according to a control signal, and generates an envelope voltage according to the m voltages, thereby effectively tracking a signal envelope.

Description

Envelope amplifier and base station

The present invention relates to the field of communications and, in particular, to envelope amplifiers and base stations. Background technique

Radio Frequency (RF) Power Amplifier (PA) is an indispensable part of wireless base stations. The efficiency of RF power amplifiers determines the power consumption, size and thermal design of the base station. However, in order to improve the efficiency of the RF power amplifier, it is usually required to operate in a saturated state, which inevitably causes severe nonlinear distortion. The nonlinear distortion of the RF power amplifier reduces the signal quality and also spreads the spectrum of the signal, causing large interference to adjacent channels. One approach is to use a power backoff method to operate the RF power amplifier in Class A or Class AB states. For example, in order to improve the utilization efficiency of the spectrum, the Long Term Evolution (LTE) system adopts Orthogonal Frequency Division Multiplexing (OFDMA) technology, and the signal of the system has a high peak-to-average ratio ( Peak-to-Average Power Ratio), approximately 10~12dB. The peak-to-average ratio signal in the base station has higher requirements for the RF power amplifier. In order to make the RF power amplifier amplify these peak-to-average signals without distortion, the power back-off method can be used to amplify these peak-to-average signals. However, depending on the characteristics of the power amplifier tube, this method causes a significant drop in the efficiency of the power amplifier, and the energy consumption of the base station is greatly increased at the same output power.

Another approach is to use a high-efficiency nonlinear power amplifier combined with linear digital technology such as Data Pre Distortion (DPD) to amplify the signal, especially the peak-to-average ratio signal. In this way, a better power amplifier efficiency can be obtained, and the linear characteristics of the power amplifier can also meet the requirements of the relevant protocol. Among them, Envelope Tracking (ET) technology has been widely studied as a high-efficiency nonlinear power amplifier technology. The principle of ET technology is to use the dynamic voltage regulation method to control the drain (or collector) voltage of the RF power amplifier by using the signal envelope, so that the power amplifier tube works in the P-ldB (decibel) or P-2dB state, achieving high The purpose of efficiency. However, there is currently no effective solution for implementing envelope tracking. Summary of the invention

The embodiment of the invention provides an envelope amplifier and a base station, which can effectively implement the signal envelope. In a first aspect, an envelope amplifier is provided, comprising: a voltage generating module for generating n voltages, n being a positive integer greater than 1; a voltage selecting module, configured to: receive a control signal, from the voltage generating module Receiving the n voltages, selecting m voltages from the n voltages according to the control signal, and generating an envelope voltage according to the m voltages, wherein the envelope voltage is used to track an envelope of the signal, m Is a positive integer less than or equal to n.

In conjunction with the first aspect, in a first possible implementation, the voltage selection module is specifically configured to add the m voltages to obtain the envelope voltage.

In conjunction with the first possible implementation of the first aspect, in a second possible implementation, the voltage generating module has n outputs, and the n outputs are respectively used to output the n voltages; The voltage selection module includes n sub-modules connected in series, the n sub-modules are respectively connected to the n output ends; the control signal is used to select m sub-modules from the n sub-modules, so that the m The m voltages respectively received by the sub-modules are added to obtain the envelope voltage.

With reference to the second possible implementation of the first aspect, in a third possible implementation, the ith submodule of the n submodules includes a first FET, a second FET, and a first gate a driving unit and a second gate driving unit, i being a positive integer ranging from 1 to n; wherein a gate of the first FET is connected to an output end of the first gate driving unit, a gate of the second FET is connected to an output of the second gate driving unit, and a source of the first FET is connected to an ith output of the n output terminals, the first FET a drain and a drain of the second FET are both connected to an output end of the ith submodule; the first gate driving unit is an in-phase driver, and the second gate driving unit is an inverting driver, An input end of the first gate driving unit and an input end of the second gate driving unit are both configured to receive the control signal.

With reference to the second possible implementation manner or the third possible implementation manner of the first aspect, in a fourth possible implementation manner, the control signal is an n-bit digital envelope signal, where the n-bit and the Said n sub-modules - corresponding.

In combination with the first aspect or the foregoing implementation manner, in a fifth possible implementation, the voltage selection module is further configured to receive the control signal from a baseband unit.

In combination with the first aspect or the foregoing implementation manner, in a sixth possible implementation, the voltage generating module includes a power control circuit and a transformer, and the power control circuit is connected to a primary of the transformer. The secondary of the transformer has n windings; the power supply controls the electricity And a transformer for converting the DC voltage to generate n voltages on the n windings, respectively.

In a second aspect, a base station is provided, including: the foregoing envelope amplifier, a baseband unit, and a radio frequency power amplifier;

The baseband unit is configured to generate a control signal according to the baseband signal; the envelope amplifier is configured to receive the control signal from the baseband unit, and generate an envelope voltage according to the control signal, the envelope The voltage is used to track an envelope of the radio frequency signal, the radio frequency signal being generated based on the baseband signal; the radio frequency power amplifier for receiving the envelope voltage from the envelope amplifier and based on the envelope The voltage amplifies the radio frequency signal.

In the embodiment of the present invention, the voltage selection module selects m voltages from the n voltages according to the control signal, and generates an envelope voltage according to the m voltages, so that the tracking of the signal envelope can be effectively realized. DRAWINGS

In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings to be used in the embodiments of the present invention will be briefly described below. Obviously, the drawings described below are only some embodiments of the present invention. Other drawings may also be obtained from those of ordinary skill in the art in view of the drawings.

1 is a schematic block diagram of an envelope amplifier in accordance with one embodiment of the present invention.

2 is a schematic block diagram of an envelope amplifier in accordance with another embodiment of the present invention.

3 is a schematic block diagram of a base station in accordance with an embodiment of the present invention.

4 is a schematic block diagram of a base station in accordance with one embodiment of the present invention.

FIG. 5 is a schematic diagram of a circuit configuration of a voltage generating module according to an embodiment of the present invention. 6 is a circuit diagram showing the structure of a sub-module in a voltage selection module according to an embodiment of the present invention.

7 is a schematic diagram of a circuit configuration of a voltage selection module in accordance with one embodiment of the present invention. Figure 8 is a graph of simulation results in accordance with one embodiment of the present invention. detailed description

The technical solutions in the embodiments of the present invention are clearly and completely described in the following with reference to the accompanying drawings in the embodiments of the present invention. It is obvious that the described embodiments are a part of the embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, those of ordinary skill in the art are not making All other embodiments obtained under the premise of productive labor are within the scope of the invention. The technical solution of the present invention can be applied to various communication systems, such as: Global System of Mobile communication (GSM), Code Division Multiple Access (CDMA) system, Wideband Code Division Multiple Access ( Wideband Code Division Multiple Access Wireless (WCDMA), General Packet Radio Service (GPRS), Long Term Evolution (LTE), Universal Mobile Telecommunication System (UMTS), etc.

In the embodiment of the present invention, the base station may be a Base Transceiver Station (BTS) in GSM or CDMA, or may be a base station (NodeB) in WCDMA, or may be an evolved Node B (eNB or eNB in LTE). e-NodeB), the present invention is not limited.

1 is a schematic block diagram of an envelope amplifier in accordance with one embodiment of the present invention. The envelope amplifier 100 of FIG. 1 includes a voltage generation module 110 and a voltage selection module 120.

The voltage generation module 110 generates n voltages, n being a positive integer greater than one. The voltage selection module 120 receives the control signal, receives n voltages from the voltage generating module 110, selects m voltages from the n voltages according to the control signal, and generates an envelope voltage according to the m voltages, and the envelope voltage is used to track the signal packets. Network, m is a positive integer less than or equal to n.

In the embodiment of the present invention, the voltage selection module selects m voltages from the n voltages according to the control signal, and generates an envelope voltage according to the m voltages, so that the tracking of the signal envelope can be effectively realized.

In addition, in the embodiment of the present invention, the linear characteristics of the RF power amplifier can be satisfied under the control of the envelope voltage, and the efficiency of the RF power amplifier can be improved.

Alternatively, as an embodiment, the voltage selection module 120 may add m voltages to obtain an envelope voltage.

Specifically, in the case where m is 1, the voltage selection module 120 can use the selected one voltage as the envelope voltage. In the case where m is greater than 1, the voltage selection module 120 can sum the m voltages, and the result of the summation is the envelope voltage.

It can be seen that the voltage selection module 120 can combine n voltages. According to the arrangement and combination algorithm, it can be known that by combining n voltages, (2 ⁿ -1 ) voltages can be obtained.

If switching between n voltages is used to select one of the n voltages as the envelope voltage, then the error will cause a large voltage blank, resulting in energy loss. In this embodiment, by selecting one of the n voltages or adding a plurality of voltages of the n voltages, (2 ⁿ -1 ) voltages can be obtained, so that the envelope voltage is closer to the envelope voltage. Can effectively improve the tracking of the envelope Accuracy and reduced energy loss, and can effectively improve the efficiency of the RF power amplifier while ensuring that the linear characteristics of the RF power amplifier meet the requirements.

Optionally, as another embodiment, as shown in FIG. 2, the voltage generating module 110 may have n outputs, and the n outputs are respectively used to output n voltages. The voltage selection module 120 can include n sub-modules in series, and the n sub-modules are respectively coupled to the n outputs.

The control signal is used to select m sub-modules from the n sub-modules, so that the m voltages respectively received by the m sub-modules are added to obtain the envelope voltage.

Specifically, n sub-modules may be connected in series. Each submodule can receive one of n voltages. Each submodule can output its own received voltage or not output its own received voltage under the control of the control signal. When the submodule outputs its own received voltage, the voltage is selected as one of the m voltages. When the submodule does not output the voltage it receives, the submodule at this time is equivalent to a shorted line. In other words, voltage generation module 110 can be considered to include n voltage sources. The control signal is used to select m sub-modules from n sub-modules, that is, the control signal is used to select m voltage sources from n voltage sources, so that m voltage sources are connected in series, so that m of m voltage sources are output. The voltages are added to obtain an envelope voltage. The voltage sources other than the m voltage sources among the n voltage sources are bypassed, so the voltages of the other voltage sources are not superimposed.

Optionally, as another embodiment, the ith submodule of the n submodules may include a first field effect transistor (FET), a second FET, a first gate driving unit, and a second gate driving. The unit, i is a positive integer from 1 to n.

The gate of the first FET is connected to the output end of the first gate driving unit, the gate of the second FET is connected to the output end of the second gate driving unit, and the source and voltage generating module of the first FET The ith output of the n outputs is connected, and the drains of the first FET and the drain of the second FET are both connected to the output of the ith submodule.

The first gate driving unit is an in-phase driver, and the second gate driving unit is an inverting driver, and an input end of the first gate driving unit and an input end of the second gate driving unit are both used to receive the control signal.

In particular, each sub-module may include two FETs and two gate drive units, namely a first FET, a second FET, a first gate drive unit, and a second gate drive unit.

The source of the first FET can receive one of the n voltages generated by the voltage generating module 110, and the source of the second FET can be connected to the reference voltage. The drain of the first FET is coupled to the drain of the second FET as an output of the sub-module.

a first gate driving unit for driving the first FET, and a second gate driving unit for driving the second FET. The first gate driving unit may be an in-phase driver, and the second gate driving unit may be an inverting driver. Therefore, at the same time, one of the first FET and the second FET is turned on, and the other is turned off.

Specifically, the i-th sub-module of the n sub-modules is connected to the i-th output of the n output terminals of the voltage generating module 110 for receiving the ith voltage. When the first FET is turned on and the second FET is turned off, the first FET can output the ith voltage received by its source to the output of the sub-module. When the first FET is turned off and the second FET is turned on, the first FET does not output the voltage received by its source to the output of the sub-module. At this point, the submodule is equivalent to a shorted line.

It can be seen that by turning on or off both the first FET and the second FET, the voltage output or the output received by the sub-module can be controlled, so that the combination between the n voltages can be effectively realized.

The first FET and the second FET described above may be GaN (gallium nitride) FETs. If the first FET and the second FET are Si-silicon-based Metal-Oxide-Side Field-Effect Transistors (MOSFETs), the FETs 601 and 602 described above need to use MOSFETs of different polarities. achieve. However, due to the high speed required for this work, P-type devices do not meet the requirements in terms of speed. GaN FETs are well suited to the operational requirements of envelope amplifiers.

In addition, each sub-module may further include a first voltage isolation unit and a second voltage isolation unit. The first voltage isolation unit may be coupled to the input of the first gate drive unit, and the first gate drive unit may receive the control signal through the first voltage isolation unit. The second voltage isolation unit may be coupled to the input of the second gate drive unit, and the second gate drive unit may receive the control signal via the first voltage isolation unit.

Optionally, as another embodiment, the control signal may be an n-bit digital envelope signal, and n bits correspond to n sub-modules.

In other words, the i-th sub-module of the n sub-modules can receive the i-th bit of the n-bit and can receive the ith voltage output by the ith output of the voltage generating module 110. The i-th bit can control the i-th sub-module to output the i-th voltage as one of the m voltages, or can control the i-th sub-module not to output the i-th voltage.

In particular, each bit of the digital envelope signal can be used to control one sub-module. For example, when the bit is "1", the corresponding sub-module can output the received voltage as one of the m voltages. That is, when the bit is "1", the first FET in the corresponding sub-module is turned on, and the second FET is turned off. When the bit is "0", the corresponding submodule may not output the received voltage. That is, when the bit is "0", the first FET in the corresponding sub-module is turned off, and the second FET is turned on.

It should be understood that only the control side of each bit pair submodule in the digital envelope signal is exemplified here. Style. In another embodiment, the following manner may also be adopted: When the bit is "1", the corresponding submodule may not output the received voltage. When the bit is "0", the corresponding sub-module can output the received voltage as one of the m voltages.

The envelope voltage and the digital envelope signal may correspond. Optionally, as another embodiment, the value of the envelope voltage may be a decimal value corresponding to the digital envelope signal. For example, when n is 4, the digital envelope signal can be "1111" (binary), and "1111" is "15" (decimal), then the voltage selection module 120 can generate an envelope voltage of 15V.

Optionally, as another embodiment, the voltage selection module 120 may receive the above control signal from the baseband unit. For example, the baseband unit can modulate the baseband signal to obtain a digital envelope signal. The baseband unit can transmit a digital envelope signal to voltage selection module 120. At the same time, the baseband unit can transmit a baseband signal to the transmit channel.

It should be understood that since the digital processing process of the signal of the transmission channel is usually complicated, the delay is large. However, the processing of the digital envelope signal is much more than the processing of the signal by the transmitting channel, so the delay is small. Therefore, in order to match the digital envelope signal with the signal of the transmission channel, the baseband unit can delay the digital envelope signal. The voltage selection module 120 can derive the envelope voltage based on the digital envelope signal. The envelope voltage can be used to track the envelope of the signal of the transmit channel. Since the signal obtained by the transmission channel to the baseband signal is a radio frequency signal, the envelope voltage is used to track the radio frequency signal.

Alternatively, as another embodiment, the voltage generating module 110 may include a power control circuit and a transformer, the power control circuit is connected to the primary of the transformer, and the secondary of the transformer has n windings.

The power control circuit can convert the voltage of the power supply to a DC voltage. The transformer can couple the DC voltage so that n voltages are generated across the n windings.

Specifically, the power control circuit can convert the voltage supplied by the power supply to the required DC voltage. The DC voltage is coupled by the transformer to the secondary, resulting in n voltages on the n windings of the secondary of the transformer.

In addition, a rectifier unit and a filtering unit may be connected to the secondary of the transformer. For example, the rectification unit can be a rectifier diode. The filtering unit can be a filter capacitor. The DC voltage is coupled to the secondary by a transformer. The secondary voltage is rectified by a rectifier diode, filtered by a filter capacitor, and then n voltages are obtained in each of the n windings. The voltage of each winding can be adjusted by adjusting their corresponding secondary line turns.

The envelope amplifier of the embodiment of the present invention has been described above. The envelope amplifier can be applied to a base station. 3 is a schematic block diagram of a base station in accordance with an embodiment of the present invention. The base station 300 of FIG. 3 may include an envelope amplifier 100, a baseband unit 310, and an RF power amplifier 320.

The baseband unit 100 generates a control signal based on the baseband signal. The envelope amplifier 100 receives a control signal from the baseband unit 100 and generates an envelope voltage based on the control signal, the envelope voltage being used to track the envelope of the radio frequency signal, which is generated from the baseband signal. The RF power amplifier 320 receives the envelope voltage from the envelope amplifier 310 and amplifies the RF signal based on the envelope voltage.

For example, the envelope voltage can be used as the drain voltage or collector voltage of the RF power amplifier 320 so that the RF power amplifier can operate in the P-ldB or P-2dB state.

In the embodiment of the present invention, the envelope voltage is generated by the envelope amplifier according to the control signal, and the RF power amplifier amplifies the RF signal based on the envelope voltage, which not only can effectively track the envelope of the RF signal, but also can ensure the RF power amplifier. The linear characteristics meet the requirements while improving the efficiency of the RF power amplifier.

Optionally, as another embodiment, the foregoing control signal may be a digital envelope signal. For example, baseband unit 100 can modulate the baseband signal to obtain a digital envelope signal.

The embodiments of the present invention will be described in detail below with reference to specific examples. It is to be understood that the examples are intended to be illustrative of the embodiments of the invention.

4 is a schematic block diagram of a base station in accordance with one embodiment of the present invention. The base station 400 of FIG. 4 may be an example of the base station 300 of FIG.

Base station 400 can include baseband unit 410 and medium radio unit 420. The medium RF unit 420 may include an envelope amplifier 421, an RF power amplifier 422, a Transmitter (Tx) digital to analog converter (DAC) 423, a modulator 424, and a driver amplifier (Driver Amplifier, Driver AMP). 425, Feedback Analog to Digital Converter (EPS) 426 and mixer (or demodulator) 427.

The baseband unit 410 can generate a baseband signal and output a baseband signal to the middle radio frequency unit 420. The baseband signal is converted to a radio frequency signal by the TX DAC 423 and the modulator 424, and the radio frequency signal is input to the RF power amplifier 422 by the driver amplifier 425.

Feedback ADC 426 and mixer (or demodulator) 427 can frequency convert the RF signal to an intermediate frequency for feedback ADC 426 to sample, and then provide the sampled data to baseband unit 410 for predistortion processing by feedback ADC 426.

As shown in FIG. 4, the envelope amplifier 421 may include a voltage generating module 421a and a voltage selecting module 421b. The power supply 430 can supply power to the envelope amplifier 421. Specifically, the power supply 430 can supply power to the voltage generating module 421a. The power supply 430 can provide an alternating current (AC) or a direct current (DC).

The voltage generating module 421a can convert the voltage of the power supply 430 into a direct current voltage, and can generate n voltages according to the obtained direct current voltage. The voltage generation module 421a can output n voltages to the voltage selection module 421b. The voltage selection module 421b can combine between n voltages to obtain an envelope voltage. According to the arrangement and combination algorithm, by combining n voltages, ( 2 ⁿ -1 ) voltages can be obtained, so that the envelope voltage is closer to the envelope voltage, which can effectively improve the tracking accuracy of the envelope and reduce the energy loss. And can effectively improve the efficiency of the RF power amplifier while ensuring that the linear characteristics of the RF power amplifier meet the requirements.

At the same time, the baseband unit 410 can generate a digital envelope signal based on the baseband signal. For example, baseband unit 410 can modulate the baseband signal to obtain a digital envelope signal. The baseband unit 410 can transmit a digital envelope signal to the voltage selection module 421b.

The voltage selection module 421b can receive the digital envelope signal from the baseband unit 410, select m voltages from the n voltages generated by the voltage generation module 421a based on the digital envelope signal, and generate an envelope voltage based on the m voltages. The output voltage corresponds to the digital envelope signal, which is used to track the envelope. Specifically, when m is greater than 1, the voltage selection module 421b can add m voltages to obtain an envelope voltage. For example, when n is 4, the digital envelope signal can be "1111" (binary), and "1111" is "15" (decimal), then the voltage selection module 421a can generate an envelope voltage of 15V. When m is equal to 1, the voltage selection module 421b can use the selected voltage as the envelope voltage.

Then, the voltage selection module 421b can output the above envelope voltage to the RF power amplifier 422. For example, the voltage selection module 421b may output the envelope voltage to the drain of the RF power amplifier 422 or may output the envelope voltage to the collector of the RF power amplifier 422.

The RF power amplifier 422 can amplify and output the input RF signal based on the envelope voltage.

In the embodiment of the present invention, the envelope voltage is generated by the envelope amplifier according to the control signal, and the RF power amplifier amplifies the signal based on the envelope voltage, which can improve the tracking accuracy of the envelope and reduce the energy loss, and can ensure the RF power. The linear characteristics of the amplifier can meet the requirements while improving the efficiency of the RF power amplifier.

The function of the voltage generating module can be realized by various circuit configurations. A circuit structure will be described below with reference to specific examples. FIG. 5 is a circuit diagram of a voltage generating module according to an embodiment of the present invention Schematic diagram of the structure. In FIG. 5, assuming that n is 4, the voltage generating module 500 is an example of the voltage generating module 421a in FIG. The voltage generating module 500 can generate four voltages.

As shown in FIG. 5, the voltage generating module 500 can include a power supply control circuit 501, a transformer 502, a rectifier diode 503, and a filter capacitor 504.

The power control circuit 501 is connected to the primary of the transformer 502, and the rectifier diode 503 and the filter capacitor 504 are connected in the secondary of the transformer 502. If the power supply is an AC power source, the power control circuit 501 can be an AC/DC converter. If the power supply is a DC power source, the power control circuit 501 can be a DC/DC converter.

Specifically, the power supply control circuit 501 can convert the voltage supplied from the power supply to the required DC voltage. The DC voltage is coupled to the secondary by transformer 502, the secondary voltage is rectified by rectifying diode 503, filtered by filter capacitor 504, and then four voltages are obtained in the four windings of the secondary of transformer 502. It is assumed here that the number of secondary line turns corresponding to the four windings is a 2-fold relationship, so the four voltages can be represented by Vx, 2Vx, 4Vx, and 8Vx, respectively. The reference voltages of the reference terminals corresponding to the respective windings can be represented by REF0, REF1, REF2, and REF3, respectively. Further, by feeding back FB+ and FB- to the power supply control circuit 501, the size of Vx can be controlled by the power supply control circuit 501.

It should be understood that the above description is only taking the rectifier diode and the filter capacitor as an example. The rectifier diode can be replaced with other modules capable of realizing the rectification function, and the filter capacitor can be replaced with other modules capable of implementing the filtering function. For example, the filtering module can be a filtering network consisting of an inductor and a capacitor.

In the embodiment, the circuit of the voltage generating module realizes the single unit, and the cost is low. In addition, it is also possible to perform conversion according to the circuit configuration shown in Fig. 5 to obtain other circuit structures that can realize the functions of the voltage generating module. For example, the voltage generation module can include n independent voltage sources, and n independent voltage sources are used to output n voltages, respectively.

The voltage selection module can include n sub-modules, and n sub-modules correspond to n voltages. The voltage generation module can output a voltage to each submodule.

The digital envelope signal can be n bits, each bit corresponding to a submodule. In this way, each sub-module can output its own received voltage under the control of the corresponding bit in the digital envelope signal, or bypass the received voltage.

The function of the sub-module can be realized by various circuit structures. The following will be described in conjunction with specific examples. A circuit structure that implements the functions of a sub-module. FIG. 6 is a schematic diagram showing the circuit structure of a sub-module in a voltage selection module according to an embodiment of the present invention. In Fig. 6, it will be described in conjunction with Fig. 5. The sub-module corresponding to Vx in FIG. 5 will be described as an example.

As shown in FIG. 6, the sub-module may include a Field Effect Transistor (FET) 601, a FET 602, gate drive units 603 and 604, and voltage isolation units 605 and 606.

The voltage isolation unit 605 can be connected to the gate driving unit 603, and the gate driving unit 603 can be connected to the gate of the FET 601 (the G terminal in Fig. 6). The voltage isolation unit 606 can be coupled to the gate drive unit 604, which can be coupled to the gate of the FET 602 (Segment G in Figure 6).

Both voltage isolation unit 605 and voltage isolation unit 606 can be coupled to interface B to receive digital envelope signals via interface B. The drain of the FET 601 (the D terminal in Figure 6) and the drain of the FET 602 (the D terminal in Figure 6) can be connected to the interface A as the output of the submodule.

The source of the FET 601 (S terminal in Figure 6) can receive one of the n voltages generated by the voltage generating module from the voltage generating module, for example, here Vx. The source of FET 602 (S terminal in Figure 6) can receive a reference voltage, for example, here REF.

The gate driving unit 603 is an in-phase driver, and the gate driving unit 604 is an inverting driver.

Interface B in the sub-module can receive one bit of the digital envelope signal from the baseband unit. The voltage generating module 421a can output Vx to the source of the FET 601. Interface A of this submodule can output Vx.

Assume that the bit received by interface B from the baseband unit is "1". At this time, the digital signal "1" passes through the voltage isolation unit 605 and the gate driving unit 603, and is input to the gate of the FET 601, so that the FET 601 is turned on, and the Vx on the source of the FET 601 can be output to the drain of the FET 601. On the pole, it is output from the drain to interface A. At the same time, the digital signal "1" passes through the voltage isolation unit 606 and the gate driving unit 604, and is input to the gate of the FET 602. Since the gate drive unit 604 is a phase driver, the FET 602 is turned off.

It is assumed that the bit received by the interface B from the baseband unit is "0". At this time, the digital signal "0" passes through the voltage isolation unit 605 and the gate driving unit 603, and is input to the gate of the FET 601, so that the FET 601 is turned off. At this time, the Vx on the source of the FET 601 is not outputted. Interface A. At the same time, the digital signal "0" is input to the gate of the FET 602 after passing through the voltage isolation unit 606 and the gate driving unit 604. Since the gate drive unit 604 is an inverting driver, the FET 602 is turned on. At this point, the submodule is equivalent to a shorted wire. If the FET 601 and the FET 602 are Si (silicon) based Metal-Oxide-Side Field-Effect Transistors (MOSFETs), the FET 601 and the FET 602 described above need to be implemented using MOSFETs of different polarities. However, due to the relatively high speed required here, the use of P-type devices does not meet the requirements in terms of speed. Therefore, preferably, the FET 601 and the FET 602 described above may be GaN (gallium nitride) FETs.

In the embodiment, the circuit of the voltage generating module realizes the single unit, and the cost is low. In addition, it is also possible to perform conversion according to the circuit configuration shown in Fig. 6, and to obtain other circuit structures that can realize the functions of the sub-modules in the voltage selection module.

An example of the circuit configuration of the voltage selection module will be described below with reference to Figs. 5 and 6. 7 is a schematic diagram of a circuit configuration of a voltage selection module in accordance with one embodiment of the present invention. In Fig. 7, the voltage selection module 700 is an example of the voltage selection module 421b of Fig. 4.

Corresponding to the voltage generating module 500 of FIG. 5, the voltage selecting module 700 can include four sub-modules, namely, a sub-module 710, a sub-module 720, a sub-module 730, and a sub-module 740. The circuit configurations of the submodule 710, the submodule 720, the submodule 730, and the submodule 740 may be the same as those of the submodule of FIG.

As shown in FIG. 7, sub-module 710 can include FET 711, FET 712, gate drive units 713 and 714, voltage isolation units 715 and 716; sub-module 720 can include FET 721, FET 722, gate drive units 723, and 724. Voltage isolation units 725 and 726; sub-module 730 may include FET 731, FET 732, gate drive units 733 and 734, voltage isolation units 735 and 736; sub-module 740 may include FET 741, FET 742, gate drive unit 743 And 744, voltage isolation units 745 and 746. The working principle of each sub-module is the same as that of the sub-module of Figure 6, and will not be described again.

The submodule 710 can receive Vx, the submodule 720 can receive 2Vx, the submodule 730 can receive 4Vx, and the submodule 740 can receive 8Vx.

The sub-modules 710 to 740 are connected in series. As shown in FIG. 7, the interface A0 of the sub-module 710 is connected to the source of the FET 722 of the sub-module 720, the interface A1 of the sub-module 720 and the source of the FET 732 of the sub-module 730. Connected, interface A2 of sub-module 730 is coupled to the source of FET 742 of sub-module 740. Interface A3 of submodule 740 can output an envelope voltage to the RF power amplifier.

As can be seen from the description of Figure 6, interface B of the sub-module can receive digital envelope signals from the baseband unit. Interface B of each submodule receives one bit of the digital envelope signal. As shown in Figure 7, the digital envelope signal can be 4 bits, here denoted "bzb^o". B _{3 of} sub-module 740 can receive bit "b ₃ ", and interface B _{2 of} sub-module 730 can receive bit "b ₂ ", which is connected to sub-module 720 The port ^ can receive the bit "b, the interface B of the submodule 710. The bit "bo" can be received. For example, when the digital envelope signal is "1111", the FET 741 of the submodule 740, the FET 731 in the submodule 730, The FET 721 of the sub-module 720 and the FET 711 of the sub-module 710 are both turned on. That is, each of the submodules outputs a voltage received from the voltage generating module 500. Then, the envelope voltage outputted by interface A3 of sub-module 740 can be 15Vx.

When the digital envelope signal is "1110", the FET 741 of the sub-module 740, the FET 731 of the sub-module 730, and the FET 721 of the sub-module 720 are both turned on, and the FET 712 of the sub-module 710 is turned on. At this time, the submodule 740, the submodule 730, and the submodule 720 output the voltage received from the voltage generating module 500. The submodule 710 is equivalent to a short-circuited conductor and does not output the voltage Vx received from the voltage generating module 500. . Then, the envelope voltage outputted by the interface A3 of the submodule 740 can be deduced by analogy. When the digital envelope signal is "1101" to "0001", the voltage selection module 700 outputs the envelope voltages "13Vx" to "Vx", respectively. . It can be seen that the voltage selection module 700 can output 15 envelope voltages, so that the envelope voltage is closer to the envelope voltage, which can effectively improve the tracking accuracy of the envelope and reduce the energy loss, and can ensure the linear characteristics of the RF power amplifier. It can effectively improve the efficiency of the RF power amplifier while meeting the requirements.

Figure 8 is a graph of simulation results in accordance with one embodiment of the present invention. In Fig. 8, the circuit structure shown in Fig. 7 is simulated. It can be seen that the envelope voltage output by the voltage selection module in the embodiment of the present invention is close to the signal envelope. The RF power amplifier amplifies the signal based on this envelope voltage and can be more than 90% efficient. Moreover, energy loss can be reduced.

Those of ordinary skill in the art will appreciate that the elements and algorithm steps of the various examples described in connection with the embodiments disclosed herein can be implemented in a combination of electronic hardware or computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the solution. A person skilled in the art can use different methods for implementing the described functions for each particular application, but such implementation should not be considered to be beyond the scope of the present invention.

It will be apparent to those skilled in the art that, for the convenience of the description and the cleaning process, the specific operation of the system, the device and the unit described above may be referred to the corresponding processes in the foregoing method embodiments, and details are not described herein again.

In the several embodiments provided herein, it should be understood that the disclosed systems, devices, and methods may be implemented in other ways. For example, the device embodiments described above are merely illustrative. For example, the division of the unit is only a logical function division. In actual implementation, there may be another division manner, for example, multiple units or components may be combined or Can be integrated into another The system, or some features can be ignored, or not executed. In addition, the mutual coupling or direct coupling or communication connection shown or discussed may be an indirect coupling or communication connection through some interface, device or unit, and may be in an electrical, mechanical or other form.

The units described as separate components may or may not be physically separate, and the components displayed as units may or may not be physical units, that is, may be located in one place, or may be distributed to multiple network units. Some or all of the units may be selected according to actual needs to achieve the objectives of the solution of the embodiment.

In addition, each functional unit in each embodiment of the present invention may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit.

The functions, if implemented in the form of software functional units and sold or used as separate products, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present invention, which is essential to the prior art or part of the technical solution, may be embodied in the form of a software product stored in a storage medium, including The instructions are used to cause a computer device (which may be a personal computer, server, or network device, etc.) to perform all or part of the steps of the methods described in various embodiments of the present invention. The foregoing storage medium includes: a U disk, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk, and the like, which can store program codes. .

The above is only the specific embodiment of the present invention, but the scope of the present invention is not limited thereto, and any person skilled in the art can easily think of changes or substitutions within the technical scope of the present invention. It should be covered by the scope of the present invention. Therefore, the scope of the invention should be determined by the scope of the appended claims.

Claims

Rights request

An envelope amplifier, comprising:

a voltage generating module, configured to generate n voltages, where n is a positive integer greater than one;

a voltage selection module, configured to: receive a control signal, receive the n voltages from the voltage generating module, select m voltages from the n voltages according to the control signal, and generate a packet according to the m voltages The envelope voltage is used to track the envelope of the signal, and m is a positive integer less than or equal to n.

The envelope amplifier according to claim 1, wherein the voltage selection module is specifically configured to add the m voltages to obtain the envelope voltage.

3. The envelope amplifier of claim 2, wherein

The voltage generating module has n outputs, and the n outputs are respectively used to output the n voltages;

The voltage selection module includes n sub-modules connected in series, and the n sub-modules are respectively connected to the n output ends;

4. The envelope amplifier of claim 3, wherein

The i-th sub-module of the n sub-modules includes a first FET FET, a second FET, a first gate driving unit, and a second gate driving unit, where i is a positive integer ranging from 1 to n;

The gate of the first FET is connected to the output end of the first gate driving unit, and the gate of the second FET is connected to the output end of the second gate driving unit, a source of the first FET is connected to an ith output of the n outputs, and a drain of the first FET and a drain of the second FET are both connected to an output of the ith submodule Connected

The first gate driving unit is an in-phase driver, the second gate driving unit is an inverting driver, and an input end of the first gate driving unit and an input end of the second gate driving unit are used Receiving the control signal.

The envelope amplifier according to claim 3 or 4, wherein the control signal is an n-bit digital envelope signal, and the n bits correspond to the n sub-modules.

The envelope amplifier according to any one of claims 1 to 5, wherein the voltage selection module is further configured to receive the control signal from a baseband unit.

The envelope amplifier according to any one of claims 1 to 6, wherein The voltage generating module includes a power control circuit and a transformer, the power control circuit is connected to a primary of the transformer, and a secondary of the transformer has n windings;

The power control circuit is configured to convert a voltage of the power supply to a DC voltage; and the transformer is configured to couple the DC voltage so that n voltages are generated on the n windings respectively.

A base station, comprising:

The envelope amplifier according to any one of claims 1 to 7, a baseband unit and a radio frequency power amplifier; wherein the baseband unit is configured to generate a control signal according to the baseband signal;

The envelope amplifier is configured to receive the control signal from the baseband unit, and generate an envelope voltage according to the control signal, where the envelope voltage is used to track an envelope of a radio frequency signal, where the radio frequency signal is based on The baseband signal is generated;

The radio frequency power amplifier is configured to receive the envelope voltage from the envelope amplifier and amplify the radio frequency signal based on the envelope voltage.