WO2015094032A1

WO2015094032A1 - Provision of stable clock information

Info

Publication number: WO2015094032A1
Application number: PCT/SE2013/051528
Authority: WO
Inventors: Chunhui Zhang; Garry Irvine
Original assignee: Telefonaktiebolaget L M Ericsson (Publ)
Priority date: 2013-12-17
Filing date: 2013-12-17
Publication date: 2015-06-25

Abstract

There is provided a synchronization module for providing stable clock information. The synchronization module receives a high stability clock frequency signal from a first external clock source at least temporarily. The synchronization module receives a master clock signal from a second external clock source at least temporarily. The synchronization module generates a slave clock signal from the high stability clock frequency signal and the master clock signal. The synchronization module provides the slave clock signal to at least one radio base station.

Description

PROVISION OF STABLE CLOCK INFORMATION

TECHNICAL FIELD

Embodiments presented herein relate to stable clock information, and particularly to a method, a synchronization module, a computer program, and a computer program product for providing stable clock information to at least one radio base station.

BACKGROUND

In communication networks, it maybe challenging to obtain good

performance and capacity for a given communications protocol, its parameters and the physical environment in which the communication network is deployed.

Navigation systems such as global positioning system (GPS) receivers, are commonly used in telecommunications Radio Base Station (RBS)

deployment for RBSs to achieve good time/frequency synchronization. As an example, in the fourth generation mobile telecommunications technology and standard Time-Division duplex Long-Term Evolution (TDD-LTE), the air time accuracy relative to the GPS time needs to be +/- 1.5 microseconds to meet the 3rd Generation Partnership Project (3GPP) standard. The National Marine Electronics Association (NMEA) standard NMEA 0183 is used as the layer 3 protocol. This standard is a combined electrical and data specification for communication between electronic device.

The precision time protocol (PTP) is an IEEE 1588 standard protocol (where IEEE is short for the Institute of Electrical and Electronics Engineers). The PTP is widely used to distribute either frequency or time to the time client with high accuracy over a packet switched communications network.

One issue with current GPS receivers is the use of the RS-232/422 standard to distribute a one pulse per second (lPPS) signal. In general terms, there is a restriction of the port number where the GPS receiver may have to connect to the RBS. At the same time the RBS need a specific RS-232/422 port to connect to the GPS receiver.

Though a so called GPS splitter could be used to increase the connectivity of multiple receivers of the lPPS signal, the use of a GPS splitter increase the deployment cost and also increases the system complexity to monitor the GPS receiver.

Further, jamming of the GPS signal in some countries causes a low

availability of the GPS signal. In turn this affects the time distribution to the RBS. However, it is costly to equip each RBS with a high stability clock frequency signal, such as a signal provided by a Rubidium clock, to achieve a time holdover capability.

Hence, there is still a need for providing improved clock information incommuni cation networks.

SUMMARY

An object of embodiments herein is to provide improved clock information in communication networks.

According to a first aspect there is presented a method for providing stable clock information. The method is performed by a synchronization module. The method comprises receiving a high stability clock frequency signal from a first external clock source at least temporarily. The method comprises receiving a master clock signal from a second external clock source at least temporarily. The method comprises generating a slave clock signal from the high stability clock frequency signal and the master clock signal. The method comprises providing the slave clock signal to at least one radio base station (RBS).

According to a second aspect there is presented a synchronization module for providing stable clock information. The synchronization module comprises a processing unit. The processing unit is arranged to receive a high stability clock frequency signal from a first external clock source at least temporarily. The processing unit is arranged to receive a master clock signal from a second external clock source at least temporarily. The processing unit is arranged to generate a slave clock signal from the high stability clock frequency signal and the master clock signal. The processing unit is arranged to provide the slave clock signal to at least one radio base station (RBS).

Advantageously this provides improved clock information in communication networks.

Advantageously this enables high availability of the slave clock signal. For example, the slave clock signal may improve the GPS time availability at either jamming or bad weather condition where no satellite is observed.

Advantageously this enables a low-cost synchronization module to be provided since the synchronization module does not need to be equipped with a costly oscillator to implement the high stability clock frequency signal.

Advantageously this enables the connectivity of the slave clock signal to RBSs to be increased since it eliminates the need to use a dedicated RS-232/422 port for provision of the slave clock signal to the at least one RBS. In turn this enables the cost of the at least one RBS to be lowered since it does not need to implement the RS-232/422 port.

According to a third aspect there is presented a computer program for providing stable clock information, the computer program comprising computer program code which, when run on a synchronization module, causes the synchronization module to perform a method according to the first aspect.

According to a fourth aspect there is presented a computer program product comprising a computer program according to the third aspect and a computer readable means on which the computer program is stored.

It is to be noted that any feature of the first, second, third and fourth aspects may be applied to any other aspect, wherever appropriate. Likewise, any advantage of the first aspect may equally apply to the second, third, and/or fourth aspect, respectively, and vice versa. Other objectives, features and advantages of the enclosed embodiments will be apparent from the following detailed disclosure, from the attached dependent claims as well as from the drawings. Generally, all terms used in the claims are to be interpreted according to their ordinary meaning in the technical field, unless explicitly defined otherwise herein. All references to "a/an/the element, apparatus, component, means, step, etc." are to be interpreted openly as referring to at least one instance of the element, apparatus, component, means, step, etc., unless explicitly stated otherwise. The steps of any method disclosed herein do not have to be performed in the exact order disclosed, unless explicitly stated.

BRIEF DESCRIPTION OF THE DRAWINGS

The inventive concept is now described, by way of example, with reference to the accompanying drawings, in which: Fig 1 is a schematic diagram illustrating a communication network according to embodiments;

Fig 2a is a schematic diagram showing functional modules of a

synchronization module according to an embodiment;

Fig 2b is a schematic diagram showing functional units of a synchronization module according to an embodiment;

Fig 2c is a schematic diagram showing components of a synchronization module according to an embodiment;

Fig 3 shows one example of a computer program product comprising computer readable means according to an embodiment; Figs 4 and 5 are flowcharts of methods according to embodiments; and

Fig 6 schematically illustrates components of a radio base station according to an embodiment. DETAILED DESCRIPTION

The inventive concept will now be described more fully hereinafter with reference to the accompanying drawings, in which certain embodiments of the inventive concept are shown. This inventive concept may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided by way of example so that this disclosure will be thorough and complete, and will fully convey the scope of the inventive concept to those skilled in the art. Like numbers refer to like elements throughout the description. Any step or feature illustrated by dashed lines should be regarded as optional.

Fig l is a schematic diagram illustrating a communication network n where embodiments presented herein can be applied. The communication network 11 can be that of any of wireless communication technologies like the second, third or fourth generation (2G/3G/4G) wireless communication networks, wireless local loop, Wi-Fi, WiMAX or other wide area network (WAN) technology, as long as the herein presented embodiments apply.

The communications network 11 comprises a number of radio base stations (RBS) 13a, 13b, 13c. Each RBS provides network coverage to wireless devices (not illustrated). In general terms, the RBS is a radio receiver/transmitter that serves as the hub of a wireless network, and may also serve as a gateway between a wired network and the wireless network. In general terms, the RBS facilitates wireless communication between the wireless devices and a network. Wireless devices are devices such as mobile phones (handsets), wireless local loop (WLL) phones, and computers with wireless Internet connectivity. The RBS is also referred to as a base transceiver station (BTS) in 2G networks, node B in 3G networks, and evolved node B in 4G networks .

The communication network 11 further comprises an Internet Protocol (IP) router 17. In general terms, a router is a device that forwards data packets between computer networks, creating an overlay internetwork. A router is connected to two or more data lines from different networks. When a data packet comes in one of the lines, the router reads the address information in the packet to determine its ultimate destination. Then, using information in its routing table or routing policy, it directs the packet to the next network on its journey.

The communication network 11 further comprises an IP network 16. The IP network provides services and data to the wireless devices operatively connected to the RBSs.

The communication network 11 further comprises a primary reference clock (PRC) 15. The PRC provides a highly accurate primary reference clock which may be distributed network wide using synchronization links and

synchronization supply units.

The communication network 11 further comprises a global navigation satellite system (GNSS) 14. In general terms, a satellite navigation system is a system of satellites that provide autonomous geo-spatial positioning with global coverage. It allows small electronic receivers to determine their location (longitude, latitude, and altitude) to high precision (such as within a few metres) using time signals transmitted along a line of sight by radio from satellites. The signals also allow the electronic receivers to calculate the current local time to high precision, which allows time synchronisation. A satellite navigation system with global coverage maybe termed a global navigation satellite system or GNSS.

Services running on the communication network 11 may require accurate synchronization for correct operation. Example of such services include, but are not limited to, time-division duplex in Long Term Evolution (LTE) telecommunications networks, and LTE multimedia broadcast multicast services (eMBMS) as part of LTE release 9, positioning, etc. For example, if switches do not operate with the same clock rates, slips may occur and degrade performance. The communication network 11 may therefore rely on the use of highly accurate reference clocks which are distributed network wide using synchronization links and synchronization supply units. Each RBS 13a, 13b, 13c, the IP router 17, and the PRC 15 comprises an external clock source, hereinafter denoted a first external clock source 18a, 18b, 18c, i8d. The first external clock source provides a high stability clock frequency signal. The GNSS 14 and the RBS 13a comprises an external clock source, hereinafter denoted a second external clock source 20a, 20b. The second external clock source provides a master clock signal.

The embodiments disclosed herein relate to providing stable clock

information. In order to obtain provision of stable clock information there is provided a synchronization module, a method performed by the

synchronization module, a computer program comprising code, for example in the form of a computer program product, that when run on a

synchronization module, causes the synchronization module to perform the method. Fig 2a schematically illustrates, in terms of a number of functional modules, the components of a synchronization module 12 according to an

embodiment. A processing unit 21 is provided using any combination of one or more of a suitable central processing unit (CPU), multiprocessor, microcontroller, digital signal processor (DSP), application specific integrated circuit (ASIC), field programmable gate arrays (FPGA) etc., capable of executing software instructions stored in a computer program product 30 (as in Fig 3), e.g. in the form of a storage medium 23. Thus the processing unit 21 is thereby arranged to execute methods as herein disclosed. The a storage medium 23 may also comprise persistent storage, which, for example, can be any single one or combination of magnetic memory, optical memory, solid state memory or even remotely mounted memory. The synchronization module 12 may further comprise a

communications interface 22 for communications with any of a RBS I3a-c, a GNSS 14, an IP router 17, an IP network 16, and a PRC 15. As such the communications interface 22 may comprise one or more transmitters and receivers, comprising analogue and digital components, a suitable number of antennae for radio communications, and/or a suitable number of interfaces for wired communications. The processing unit 21 controls the general operation of the synchronization module 12 e.g. by sending data and control signals to the communications interface 22 and the storage medium 23, by receiving data and reports from the communications interface 22, and by retrieving data and instructions from the storage medium 23. Other components, as well as the related functionality, of the synchronization module 12 are omitted in order not to obscure the concepts presented herein.

Fig 2b schematically illustrates, in terms of a number of functional units, the components of a synchronization module 12 according to an embodiment. The synchronization module 12 of Fig 2b comprises a number of functional units; a receive unit 21a, a generate unit 21b, and a provide unit 21c. The synchronization module 12 of Fig 2b may further comprises a number of optional functional units, such as any of a synchronize unit 23, a detect unit 23ε, a select unit 23f, and a maintain unit 23g. The functionality of each functional unit 23a-g will be further disclosed below in the context of which the functional units may be used. In general terms, each functional unit 23a-g maybe implemented in hardware or in software. The processing unit 21 may thus be arranged to from the storage medium 23 fetch instructions as provided by a functional unit 23a-g and to execute these instructions, thereby performing any steps as will be disclosed hereinafter.

Fig 2c is a schematic diagram showing hardware components of a

synchronization module 12 according to an embodiment. The

synchronization module 12 comprises an antenna 12a for receiving a master clock signal. A master clock signal (e.g., a GPS Li Band coarse acquisition signal) as generated by a GNSS 14 is commonly distributed as a spread- spectrum RF signal with power spectrum density spread over a large bandwidth. Reception requires the received signal to be correlated with replicas of the known spreading sequence where the local clock is delayed by time offset in order of fractions of the chip period (e.g., 1/ 1023 ms) over a correlation period in repeated trials until a large correlation indicates correct frequency and phase alignment with the received signal. This processing is performed by a RF chain 12b (comprising an amplifier, a mixer and an intermediate frequency (IF) converter), an analog to digital converter (ADC) 12c, and a signal processor I2d. The synchronization module 12 is then said to be phase aligned with a particular satellite vehicle (SV) in a process called acquisition and may switch to a tracking mode. The propagation distance between the receiver (i.e., the synchronization module 12) and the SV is known at this stage; however, since the position of the receiver is not necessarily known, the local clock is not necessarily time-aligned with the GNSS time base. A slave clock signal may then be provided by the signal processor i2d to a communications interface i2f. Further details related thereto will be provided below.

In general terms, the minimum correlation period is the duration of the spreading code (e.g., lms) with a minimum granularity of time offset between trials of half a chip. The RF carrier frequency of the GNSS signal is subject to Doppler shifts depending on the earth location of the synchronization module 12 relative to the satellite orbital location of the GNSS transmitter as well as frequency error and drift of the clock frequency of the receiver of the master clock signal at the synchronization module 12. With an approximate earth location and knowledge of the GNSS almanac, the Doppler shift can be substantially eliminated.

In practice, the trials associated with acquisition may use parallel correlations at different frequencies and time-offsets that represent a two-dimensional search window. In general terms, the granularity of the search window (i.e., the correlation period and frequency offset) maybe dictated by the amount of processing resources available and affects the acquisition sensitivity or minimum signal to noise ratio (SNR) required for detection. Reducing the search window (e.g., having an accurate frequency) allows the frequency search dimension to be reduced which allows the processing resources to be allocated over a longer correlation period thus improving correlation gain and hence improving acquisition sensitivity, or permitting fewer processing resources to achieve equivalent sensitivity or a combination of both. Any wander of the local clock over the correlation period in the order of the chip period will impair/reduce the correlation gain. Hence it is necessary to have a sufficiently stable local clock over the duration of the correlation period. Longer correlation period increases the correlation gain. The synchronization module 12 therefore receives a high stability clock frequency signals which, via a phase locked loop (PLL) i2e is provided to the RF chain 12b, the ADC 12c, and the signal processor i2d. The high stability clock frequency signal is received via the communications interface i2f and is provided to a clock recovery receiver I2g. The clock recovery receiver I2g may provide a holdover capability. Holdover will be further disclosed below.

Once acquired, phase alignment to a particular SV is maintained using a tracking loop but can use processing resources in essentially a much smaller search window. Tracking also involves demodulating the navigation message which among other things includes data on the precise orbital deviations of each SV. As a result, the tracking sensitivity is usually superior to acquisition sensitivity. Having superior local clock frequency stability allows the search window to be even smaller with an associated improvement to sensitivity.

In general terms, a minimum of four SVs may be be acquired in order to transfer the absolute timing reference from the GNSS to the synchronization module 12; three SVs to establish the position and one SV to establish the time offset between the local clock of the synchronization module i2and the GNSS time base. For a stationary synchronization module 12, once its position has been accurately established, only one SV is necessary to establish the absolute timing reference. Figs 4 and 5 are flow chart illustrating embodiments of methods for providing stable clock information. The methods are performed by the synchronization module 12. The methods are advantageously provided as computer programs 31. Fig 3 shows one example of a computer program product 30 comprising computer readable means 32. On this computer readable means 32, a computer program 31 can be stored, which computer program 31 can cause the processing unit 21 and thereto operatively coupled entities and devices, such as the communications interface 22 and the storage medium 23 to execute methods according to embodiments described herein. The computer program 31 and/or computer program product 30 may thus provide means for performing any steps as herein disclosed. In the example of Fig 3, the computer program product 30 is illustrated as an optical disc, such as a CD (compact disc) or a DVD (digital versatile disc) or a Blu-Ray disc. The computer program product 30 could also be embodied as a memory, such as a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM), or an electrically erasable programmable read-only memory (EEPROM) and more particularly as a non-volatile storage medium of a device in an external memory such as a USB (Universal Serial Bus) memory. Thus, while the computer program 31 is here schematically shown as a track on the depicted optical disk, the computer program 31 can be stored in any way which is suitable for the computer program product 32.

Reference is now made to Fig 4 illustrating a method for providing stable clock information according to an embodiment. The method is performed by the synchronization module 12.

First the synchronization module 12 receives a high stability clock frequency signal and a master clock signal. These signals are received from external clock sources. It is thus assumed that external clock sources are available at least temporarily. The processing unit 21 of the synchronization module 12 is arranged to, in a step S101, receive a high stability clock frequency signal from a first external clock source 18a, 18b, 18c, i8d at least temporarily. Examples of the first external clock source and how the high stability clock frequency signal maybe received will be provided below. The processing unit 21 of the synchronization module 12 is arranged to, in a step S102, receive a master clock signal from a second external clock source 20a, 20b at least temporarily. Examples of the second external clock source and how the master clock signal may be received will be provided below. Based on the received high stability clock frequency signal and the received master clock signal the synchronization module 12 generates a slave clock signal. Particularly, the processing unit 21 of the synchronization module 12 is arranged to, in a step S103, generate a slave clock signal from the high stability clock frequency signal and the master clock signal. Examples of how the slave clock signal is provided to the at least one RBS will be provided below. Hence the synchronization module 12 is enabled to generate a slave clock signal without accessing, or even comprising, an internal high stability clock frequency signal generator and/or internal master clock signal generator.

The generated slave clock signal is then provided to a RBS. The processing unit 21 of the synchronization module 12 is thus arranged to, in a step S104, provide the slave clock signal to at least one radio base station, RBS 13a, 13b, 13c. Embodiments relating to further details of providing stable clock information will now be disclosed.

Dedicated synchronization links may be used to communicate the high stability clock frequency signal and the master clock signal to the

synchronization module 12. According to one embodiment the high stability clock frequency signal is received on a first dedicated synchronization link, and the master clock signal is received on a second dedicated synchronization link.

Reference is now made to Fig 5 illustrating methods for providing stable clock information according to further embodiments. The methods are performed by the synchronization module 12.

There may be different ways for the synchronization module 12 to generate the slave clock signal. Some considerations related thereto have been disclosed above with reference to Fig 2c. According to one embodiment the processing unit 21 of the synchronization module 12 is arranged to, in an optional step Si03a, synchronize the received master clock signal with the received high stability clock frequency signal. The synchronizing in step Si03a may comprise facilitating and maintaining reception of the master clock signal and extracting time and phase from the master clock signal. The slave clock signal may then comprise the extracted time and phase. There may be different ways for the synchronization module 12 to receive the high stability clock frequency signal (as in step S101). Different embodiments relating thereto will now be described in turn. According to one embodiment the first external clock source is part of a radio base station (RBS) 13b, 13c. For example, the high stability clock frequency signal may be a physical layer signal. For example, the high stability clock frequency signal may be received on a synchronous Ethernet (syncE) interface. Examples of physical layer signals include, but are not limited to: Synchronous-Ethernet (ITU-T

G.8262) or, Common Public Radio Interface (CPRI Specification V4.0) or xDSL ITU G.991, ITU G.992, and ITU G.993. According to another

embodiment the first external clock source is part of a primary reference clock (PRC) 15. According to yet another embodiment the first external clock source is part of an Internet protocol (IP) router 17.

Properties of the high stability clock frequency signal will now be disclosed. For example, the high stability clock frequency signal may be a reference oscillation signal. For example, the high stability clock frequency signal may be received from several devices. According to an embodiment the processing unit 21 of the synchronization module 12 is arranged to, in an optional step Sioia, detect at least two first external clock sources for receiving the high stability clock frequency signal from. The synchronization module 12 may then determine which of these at least two first external clock sources to use. According to this embodiment the processing unit 21 of the synchronization module 12 is therefore arranged to, in an optional step Sioib, select from which one of the at least two first external clock sources to receive the high stability clock frequency signal (as in step S101) to generate the slave clock signal (as in step S103). There may be different ways for the synchronization module 12 to select from which one of the at least two first external clock sources to receive the high stability clock frequency signal from. For example, the synchronization module 12 may receive the high stability clock frequency signal from an RBS when no syncE signal (or interface) is available.

There may be different ways for the synchronization module 12 to receive the master clock signal (as in step S102). Different embodiments relating thereto will now be described in turn. According to one embodiment the second external clock source is part of a global navigation satellite system (GNSS) 14. According to another embodiment the second external clock source is part of a radio base station (RBS) 13a. The interface on which the master clock signal is received from may depend on which type of second external clock source is. Examples of interfaces on which the master clock signal is received from include, but are not limited to: a one pulse per signal (lPPS) interface, a national marine electronics association (NMEA) interface, or a radio frequency (RF) interface. Also combinations of interfaces are possible. One such combination is to use both a lPPS interface and an NMEA interface. The NMEA may hold status and other associated context information. For the RF interface the master clock signal may be received on a RF broadcast channel.

According to an embodiment the processing unit 21 of the synchronization module 12 is arranged to, in an optional step Si02a, detect at least two second external clock sources for receiving the master clock signal from.

According to this embodiment the processing unit 21 of the synchronization module 12 is further arranged to, in an optional step Si02b, select from which one of the at least two second external clock sources to receive the master clock signal to generate the slave clock signal. There may be different ways for the synchronization module 12 to determine from which one of the at least two second external clock sources to receive the master clock signal from. For example, the processing unit 21 of the synchronization module 12 maybe arranged to, in an optional step Si02c, receive the master clock signal from the RBS when a master clock signal from the GNSS is not receivable by the synchronization module. The synchronization module 12 may further receive the master clock signal simultaneously from at least two devices, such as from two neighboring RBSs, and then compare the master clock signal from these at least two devices. There may be different ways for the synchronization module 12 to provide the slave clock signal to the at least one RBS. Different embodiments relating thereto will now be described in turn.

According to an embodiment, the slave clock signal may be provided to the at least one RBS on a precision time protocol (PTP) signaling based interface. Alternatively, a common public radio interface (CPRI), or other precision- time distribution method may be used, as long as the distribution path delay is measured and compensated for. According to another embodiment the slave clock signal is provided to the at least one RBS on a radio frequency (RF) based interface.

According to an embodiment the synchronization module 12 may provide a holdover capability. According to this embodiment the processing unit 21 of the synchronization module 12 is arranged to, in an optional step Si04a, provide a time holdover capability for the at least one RBS when high stability clock frequency signal from the GNSS is not receivable by the

synchronization module 12. An internal clock source maybe used in case of signal interruption. According to this embodiment the processing unit 21 of the synchronization module 12 is arranged to, in an optional step Si04b, and during interruption of receiving one of the high stability clock frequency signal and the master clock signal, maintain the slave clock signal by using one of an internally generated high stability clock frequency signal and an internally generated master clock signal.

One particular embodiment relating to the operation of the synchronization module 12 will now be disclosed. The particular embodiment will be described by a number of phases.

One phase involves configuration of devices operatively connected to the synchronization module 12. The first external clock source 18a, 18b, 18c, i8d is configured to provide a high stability clock frequency signal to the synchronization module 12. The second external clock source 20a, 20b is configured to provide a master clock signal to the synchronization module 12. l6

The at least one RBS 13a, 13b, 13c is configured to receive a slave clock signal from the synchronization module 12.

One phase involves configuration of the synchronization module 12. The synchronization module 12 is configured to select from which first external clock source and second external clock source to receive signals from.

Depending on which first external clock source and which second external clock source are selected, corresponding interfaces of the synchronization module 12 are configured. These interfaces of the synchronization module 12 are then synchronized with a respective one of the selected first external clock source and the selected second external clock source.

One phase involves the synchronization module 12 to provide stable clock information. This phase involves steps S101, S102, S103, and S104. This phase may further involve any of the optional steps Sioia, Sioib, Si02a, Si02b, Si02c, Si03a, Si04a, and Si04b. For example, if it is detected that the master clock signal is temporarily unavailable the synchronization module 12 may provide holdover (as in step Si04b). As a first step, if the master clock signal is not available from the GNSS 14 the synchronization module 12 may select to receive the master clock signal from the RBS 13a (as in step Si02c). as a second step, if the master clock signal is not available from the RBS 13a the synchronization module 12 may provide holdover.

Fig 6 schematically illustrates components of a radio base station (RBS) 13a, 13b, 13c according to an embodiment. In particular, Fig 6 schematically illustrates how an RBS 13a, 13b, 13c, may interact with a synchronization module 12. The RBS 13a, 13b, 13c comprises a first external clock source 18b, 18c, i8e. The first external clock source 18b, 18c, i8e is arranged to generate a high stability clock frequency signal. The RBS 13a, 13b, 13c is arranged to provide the high stability clock frequency signal to the synchronization module 12. The RBS 13a, 13b, 13c is arranged to receive a slave clock signal from the synchronization module 12. The high stability clock frequency signal as generated by the first external clock source 18b, 18c, i8e is by the RBS 13a, 13b, 13c phase corrected by means of the received slave clock signal in a phase correction unit 24.

In summary there has been provided methods for providing stable clock information and a synchronization module 12 implementing such methods. The synchronization module 12 may equip an Ethernet PHY signal with time stamping information, and thereby distribute a GPS time signal using PTP like protocols. A clock recovered from syncE may be used to drive the PLL of the synchronization module i2to save cost and improve the GPS time availability when no GNSS satellites are observed (for example at either bad weather or jamming situations). A time regeneration functionality may be provided to prolong the time holdover when the master clock signal lost, for example by the synchronization module 12 using a syncE clock frequency to continue to generate the slave clock to provide the time to at least one RBS. The synchronization module 12 may be equipped with any of a

LTE/WCDMA/ GSM compatible RF module to decode the broadcasting channel and to to synchronize with the RBS it listens to it.

The inventive concept has mainly been described above with reference to a few embodiments. However, as is readily appreciated by a person skilled in the art, other embodiments than the ones disclosed above are equally possible within the scope of the inventive concept, as defined by the appended patent claims.

Claims

l8 CLAIMS

1. A method for providing stable clock information, the method being performed by a synchronization module (12), comprising the steps of:

receiving (S101) a high stability clock frequency signal from a first external clock source (18a, 18b, 18c, i8d) at least temporarily;

receiving (S102) a master clock signal from a second external clock source (20a, 20b) at least temporarily;

generating (S103) a slave clock signal from said high stability clock frequency signal and said master clock signal; and

providing (S104) said slave clock signal to at least one radio base station, RBS (13a, 13b, 13c).

2. The method according to claim 1, wherein generating said slave clock signal comprises:

synchronizing (Si03a) said received master clock signal with said received high stability clock frequency signal.

3. The method according to claim 2, wherein said synchronizing (Si03a) comprises facilitating and maintaining reception of said master clock signal and extracting time and phase from said master clock signal, and wherein said slave clock signal comprises said time and phase.

4. The method according to any one of claims 1 to 3, wherein said high stability clock frequency signal is a reference oscillation signal.

5. The method according to any one of claims 1 to 4, further comprising: detecting (Sioia) at least two first external clock sources for receiving said high stability clock frequency signal from; and

selecting (Sioib) from which one of said at least two first external clock sources to receive said high stability clock frequency signal to generate said slave clock signal.

6. The method according to any one of claims 1 to 5, wherein said second external clock source is part of a global navigation satellite system, GNSS (14), or a radio base station, RBS (13a).

7. The method according to claim 6, wherein said master clock signal is received on a one pulse per signal, lPPS, interface, a national marine electronics association, NMEA, interface, or a radio frequency, RF, interface.

8. The method according to claim 6 or 7, wherein said master clock signal is received on a RF broadcast channel.

9. The method according to any one of claims 1 to 8, wherein said first external clock source is part of a radio base station, RBS (13b, 13c).

10. The method according to claim 9, wherein said high stability clock frequency signal is a physical layer signal.

11. The method according to any one of claims 1 to 8, wherein said first external clock source is part of a primary reference clock, PRC (15), or an Internet protocol, IP, router (17).

12. The method according to any one of claims 1 to 11, further comprising: detecting (Si02a) at least two second external clock sources for receiving said master clock signal from; and

selecting (Si02b) from which one of said at least two second external clock sources to receive said master clock signal to generate said slave clock signal.

13. The method according to claim 6 or 12, further comprising:

selecting (Si02c) to receive said master clock signal from said RBS when master clock signal from said GNSS is not receivable by the

synchronization module.

14. The method according to claim 6 or 13, further comprising:

providing (Si04a) a time holdover capability for said at least one RBS when high stability clock frequency signal from said GNSS is not receivable by the synchronization module.

15. The method according to any one of claims 1 to 14, further comprising, during interruption of receiving one of said high stability clock frequency signal and said master clock signal:

maintaining (Si04b) said slave clock signal by using one of an internally generated high stability clock frequency signal and an internally generated master clock signal.

16. The method according to any one of claims 1 to 15, wherein said slave clock signal is provided to said at least one RBS on a precision time protocol,

PTP, signaling based interface.

17. The method according to any one of claims 1 to 15, wherein said slave clock signal is provided to said at least one RBS on a radio frequency, RF, based interface.

18. The method according to any one of claims 1 to 17, wherein said high stability clock frequency signal is received on a first dedicated

synchronization link, and wherein said master clock signal is received on a second dedicated synchronization link.

19. A synchronization module (12) for providing stable clock information, comprising a processing unit, the processing unit being arranged to:

receive a high stability clock frequency signal from a first external clock source (18a, 18b, 18c, i8d) at least temporarily;

receive a master clock signal from a second external clock source (20a, 20b) at least temporarily;

generate a slave clock signal from said high stability clock frequency signal and said master clock signal; and

provide said slave clock signal to at least one radio base station, RBS (13a, 13b, 13c).

20. A computer program (31) for providing stable clock information, the computer program comprising computer program code which, when run on a synchronization module (12), causes the synchronization module to:

receive (S101) a high stability clock frequency signal from a first external clock source (18a, 18b, 18c, i8d) at least temporarily;

receive (S102) a master clock signal from a second external clock source (20a, 20b) at least temporarily;

generate (S103) a slave clock signal from said high stability clock frequency signal and said master clock signal; and

provide (S104) said slave clock signal to at least one radio base station, RBS (13a, 13b, 13c).

21. A computer program product (30) comprising a computer program (31) according to claim 20, and a computer readable means (32) on which the computer program is stored.