WO2015080550A1 - Method of forming nanomaterials on packaged device platform - Google Patents

Method of forming nanomaterials on packaged device platform Download PDF

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Publication number
WO2015080550A1
WO2015080550A1 PCT/MY2014/000118 MY2014000118W WO2015080550A1 WO 2015080550 A1 WO2015080550 A1 WO 2015080550A1 MY 2014000118 W MY2014000118 W MY 2014000118W WO 2015080550 A1 WO2015080550 A1 WO 2015080550A1
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WO
WIPO (PCT)
Prior art keywords
forming
sensor device
packaged
device platform
platform
Prior art date
Application number
PCT/MY2014/000118
Other languages
French (fr)
Inventor
WAHID Khairul Anuar Bin ABD
Wai Yee Lee
Bien Chia Sheng Daniel
RASHID Amirul Bin ABD
Original Assignee
Mimos Berhad
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Application filed by Mimos Berhad filed Critical Mimos Berhad
Publication of WO2015080550A1 publication Critical patent/WO2015080550A1/en

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    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
    • B81C1/00015—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
    • B81C1/00206—Processes for functionalising a surface, e.g. provide the surface with specific mechanical, chemical or biological properties
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
    • B81B2201/00—Specific applications of microelectromechanical systems
    • B81B2201/02—Sensors
    • B81B2201/0214—Biosensors; Chemical sensors
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C2201/00—Manufacture or treatment of microstructural devices or systems
    • B81C2201/01—Manufacture or treatment of microstructural devices or systems in or on a substrate
    • B81C2201/0174—Manufacture or treatment of microstructural devices or systems in or on a substrate for making multi-layered devices, film deposition or growing
    • B81C2201/0183—Selective deposition
    • B81C2201/0188—Selective deposition techniques not provided for in B81C2201/0184 - B81C2201/0187

Definitions

  • the present invention relates generally to a method of forming nanomaterials on packaged device., and more particularly, to a method to form nanomaterials on packaged device at low temperature and the forming process is separated from wafer fabrication, manufacturing line.
  • nanomateriai as a sensing element has attracted vast attention since it can. remarkably enhance the sensor performance especially in term of sensitivity and resolution. This is because of the quality of material properties at nanoscaie sise as well as the factor of high surface area to volume ratio. Due to these reasons, many industries are now starting to utilise nanomaterials to increase their sensor performance.
  • the nanomateriai synthesis method generally grouped into wet chemical based and gaseous- apor based.
  • the wet chemical method such as hydro-thermal synthesis is considered a cost efficient process since it requires a very low synthesis temperature and sim le synthesis set-up.
  • hydrothermai .method is the accumulated residue in the growth solution during growth process in the form of particles, dust or flakes. These residues are not allowed to exist in wafer fab process in order to prevent any contamination that will lead to defects and yield loss.
  • Another problem ax ⁇ ises in hydrothermai method is the selective growth process.
  • the thickness of catalyst required for the gaseous-vapour method is only a few nanometer while for hydrothermal is in a few microns.
  • Such thick catalyst is hard to be removed via typical liftof process.
  • the nanomaterial will grow at sensing areas and at other device areas as well, such as electrical contact pads which will affect the wire bonding and packaging process.
  • the gaseous-vapor synthesis method ca be done via Chemical Vapor Deposition (CVD) .
  • CVD Chemical Vapor Deposition
  • several gaseous precursors will, employed such, as Ar, 0 . 2, ⁇ 3 ⁇ 4, 8H 3 and nanomaterial gas precursor,
  • a high synthesis temperature is required which is typically above 08°C in vacuum condition with high precision gas flow ratios.
  • Such high temperature will limit the type of metal - i - electrode that can foe used in the sensor element while high precision gas flow rate is very hard to control and this will affect the uniformity of nanomater.ia.1 on full wa er.
  • some type of .metal catalyst used to assist nanomaterial growth in CVD process such as gold is not compatible with integrated circuit wafer fabrication processes. It is known in wafer fabrication industries that the heavy metal such gold will introduce electrical states into silicon wafer which act as trap for charge carrier which in return, will degrade the performance of integrated circuit conductivity.
  • the present invention discloses a method of forming nanomaterial on packaged devices at lo temperature and the nanomaterial will be formed at separate process f om wafer fabrication manufacturing line.
  • the contamination issues, uniformity, tight process control, wire bondin and. packaging problem can be avoided.
  • the device platform such as interdigitated electrodes CXDEs) and field effect transistors ⁇ FETs
  • CXDEs interdigitated electrodes
  • ⁇ FETs field effect transistors
  • embodiments herein provide a method of forming nanometer ictls on packaged device platform.
  • a method of forming nanomateriais on packaged sensor device platform comprises the steps of fabricating a sensor device platform on full scale wafer, sawing the wafer to individual sensor die element, bonding of conductive wires for connecting the sensor element to the sensor device package, protecting the wire bond with epo3 ⁇ 4y while leaving the sensing area exposed for receiving coating of catalyst precursor for the nanomateriai growth, nucleating the coated catalyst precursor at low temperature for forming an active nanoparticie, and providing the active nanoparticie nucieation with nutrient solution for turning them into solid and forming nanostructures for integration of readout circuit for sensing.
  • the method further comprises the ste of testing and qualifying the device sensor platform at full scale wafer by charactering the device electrical properties after the step of fabricating.
  • the step of nucleating comprises the step of heating the coated catalyst precursor die on hotplate for surface treatment and annealing the die for activating it to form the active nanoparticle .
  • the packaged device sensor platform includes interdigitated electrode (IDE) or field effect transistor (FET) .
  • IDE interdigitated electrode
  • FET field effect transistor
  • the readout, circuit includes analogue or digital circuit.
  • the nanomateriais include nanctubes, nanowxres, nanorods, or nanoplatlets .
  • Figure 1 shows a typical synthesis or forming method (100) to integrate nanomat ria1s on device latform;
  • Figure 2a dep cts an example of the nanomateriai synthesis on full wafer that is not uniformed with other typical synthesis or forming method
  • Figure 2b illustrates an example of the nanomateriai synthesis with residue particles that will lead to contamination in manuf cturing line with other typical synthesis or forming method
  • Figure 2c shows an example of the nanomateriai growth on. device contact pad with other typical synthesis or forming method
  • Figure 3 is a flowchart showing a method to form. nanomateriais on packaged sensor devices at low temperature where the synthesis process is carried out in separate process from wafer fabrication manufacturing line of the present invention; and Figure 4 is a process low showing the diagrams of the present method to form nanomaterial on packaged device. e ailed Description of the Preferred Embodiments
  • the present invention is directed to a method to form nanomaterial on packaged device at low temperature in which the nanomaterial forming process is separated from wafer fabrication manufacturing line.
  • this method it can eliminate the risks of co tamination, non-uniformit , inconsistency, peel off problem, wire bonding and packaging problem, and defects on waf fa rication eq ipm nt .
  • Figure 1 shows a typical synthesis or forming method (100) to integrate nanomaterials on device platform in which the nanomaterials could be the nanotubes, nanowires, nanorods , nanoplatlets and nanopartlcles .
  • the device platform such as the interdigitated electrode (IDE) and field effect transistor ⁇ ?S ⁇ platform is first prepared on full wafer (110) where all the fabrication process has been carried out in wafer fabrication manufacturing line as shown in Figure 1-
  • the device will be checked for its qualification by using a standard integrated circuit (IC) test such as wafer probing (120) to measure the resistance, capacitance and IV characteristics.
  • IC integrated circuit
  • the nanomaterial will then: foe -synthesized on full wafer ⁇ 130 ⁇ either by using wet chemical based or gas based method in which the wet cheraical based method will introduce contamination during synthesis process that is not allowed in wafer fabrication manufacturing line.
  • the catalyst in hydrothermal method is very difficult to remove fay using typical lift off process hence will affect the wire bonding and packaging process.
  • the gaseous-vapour method requires very high temperature synthesis temperature of typically above 400 C C, which in turns limits the type of metal that can. foe used as electrodes in the device platform and the examples of such high temperature metals are gold and platinum which is very expensive.
  • Figure 2a to 2c show the examples of issues that occurred when integrating nanomateriais at wafer level in which Figure 2a showing the nanomaterial synthesis on full ' afer that is not uniform, Figure 2b showing the residue particles that will lead to contamination in manufacturing line and Figure 2c showing the nanoinateriai growth- on device contact pad.
  • a method of forming nanomete ala (10) on packaged sensor devices at low temperature -where the forming process is carried out in separate process from wafer fabrication manu acturing line is shown in Figure 3, he nanomaterial is used as sensing elements to detect different type of ions *
  • the low synthesis temperature could be below 200 ⁇ > C.
  • the na.n ⁇ materi Is could he the nanotubes, nanowires, nanorods, and nano lat lets .
  • the nanomate iai in the present invention is conductive metal oxide nanowire which is formed at tempera re as low as 80*0.
  • the complete device platform such as IDEs or FETs is fabricated on full scale wafer ⁇ 11 ⁇ as shown in Figures 3 and 4.
  • the fabrication could be with standard integrated circuit processing technique and flow which includes photolithography, etching and metal deposition. This device platform will be fabricated in wafer fabrication manufact ring line after all the process condition has been standardized.
  • the device on full wafer level will be tested and qualified by standard electrical testing ⁇ 12 ⁇ to check but not limited to the overall resistance, capacitance and current-voltage characteristics
  • the passed wafer will be sent for wafer sawing process ⁇ 13 ⁇ where the wafer will, be sawn into dies where each die represents an individual sensor platform for subsequent device packaging.
  • the dies then sent for wire bonding ⁇ 14 ⁇ and pre-packaged (15) comprising of printed circuit bo rds or ceramic boards to complete the sensor circuit design,
  • the wire bond will be protected with epoxy while sensing area remains exposed (17) for n noma enia! growth as sensing element as shown in Figure 4.
  • the nanomaterial is formed on die (16) at the final stage where the forming process will foe carried out at separate process from, wafer fabrication manuf cturing line as shown in Figure 4.
  • the exposed sensor area will then be coated with catalyst precursor as a seed for nanomaterial growth.
  • the spinner is rotated at 3000rpm for 30 second, for the catalyst precursor coating.
  • the coated pre- packaged dies will then be heated up on hotplate at about 9O a C for surface treatment. After that, the pre-packaged dies will anneal at about 100°C for approximately .1 hour to activate the nucleation sites of catalyst to form the active nanoparticle seed.
  • the annealed pre-packaged dies will then be immersed on nanomaterial nutrition in solution that has been heated up at 8Q e C for about 3 to 9 hours. During the inversion, the active nucleation sites will absorb the nutrition from solution and turn them into solid and font* the nanostructures . Lastly, the pre-packaged die with nanomaterial at sensing a ea will be integrated ⁇ 18 ⁇ with readout circuit such as analogue or digital circuit and use for intended applications as shown in Figure 4.

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Health & Medical Sciences (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • General Health & Medical Sciences (AREA)
  • Molecular Biology (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Investigating Or Analyzing Materials By The Use Of Electric Means (AREA)
  • Catalysts (AREA)

Abstract

A method of forming nanomaterials (10) on packaged sensor- device platform, the method comprising the steps of fabricating (11) a sensor device platform on full scale wafer to form a fully packaged sensor device platform for nanomaterials forming process (10) which comprises the steps of protecting the wire bond with epoxy while leaving the sensing area exposed for receiving coating of catalyst precursor for the nanomaterial growth, nucleating (1.6) the coated catalyst precursor at low temperature for forming an active nanoparticle, and providing the active nanoparticle nucleation with nutrient solution for turning them into solid and forming nanostructures for integration of readout circuit for sensing.

Description

Method of Forming N&n©∑a&feari&ls on Packaged Device Fl& forss
Field of Invention The present invention relates generally to a method of forming nanomaterials on packaged device., and more particularly, to a method to form nanomaterials on packaged device at low temperature and the forming process is separated from wafer fabrication, manufacturing line.
Background of the Invention
The use of nanomateriai as a sensing element has attracted vast attention since it can. remarkably enhance the sensor performance especially in term of sensitivity and resolution. This is because of the quality of material properties at nanoscaie sise as well as the factor of high surface area to volume ratio. Due to these reasons, many industries are now starting to utilise nanomaterials to increase their sensor performance.
The nanomateriai synthesis method generally grouped into wet chemical based and gaseous- apor based. The wet chemical method such as hydro-thermal synthesis is considered a cost efficient process since it requires a very low synthesis temperature and sim le synthesis set-up. However, the main challenge arises when using hydrothermai .method is the accumulated residue in the growth solution during growth process in the form of particles, dust or flakes. These residues are not allowed to exist in wafer fab process in order to prevent any contamination that will lead to defects and yield loss. Another problem ax~ises in hydrothermai method is the selective growth process. n comparison to the gaseous-vapor method, the thickness of catalyst required for the gaseous-vapour method is only a few nanometer while for hydrothermal is in a few microns. Such thick catalyst is hard to be removed via typical liftof process. As a result, the nanomaterial will grow at sensing areas and at other device areas as well, such as electrical contact pads which will affect the wire bonding and packaging process.
The gaseous-vapor synthesis method ca be done via Chemical Vapor Deposition (CVD) . In CVD process, several gaseous precursors will, employed such, as Ar, 0.2,· ¾, 8H3 and nanomaterial gas precursor, However, with CVD, a high synthesis temperature is required which is typically above 08°C in vacuum condition with high precision gas flow ratios. Such high temperature will limit the type of metal - i - electrode that can foe used in the sensor element while high precision gas flow rate is very hard to control and this will affect the uniformity of nanomater.ia.1 on full wa er. Besides, some type of .metal catalyst used to assist nanomaterial growth in CVD process such as gold is not compatible with integrated circuit wafer fabrication processes. It is known in wafer fabrication industries that the heavy metal such gold will introduce electrical states into silicon wafer which act as trap for charge carrier which in return, will degrade the performance of integrated circuit conductivity.
Therefore the present invention discloses a method of forming nanomaterial on packaged devices at lo temperature and the nanomaterial will be formed at separate process f om wafer fabrication manufacturing line. Thus, the contamination issues, uniformity, tight process control, wire bondin and. packaging problem can be avoided. In the present invention, the device platform such as interdigitated electrodes CXDEs) and field effect transistors {FETs) will foe packaged first and the nanomaterial such as nanowires or nanoplatlets will foe for ed on. it thereafter. The process allows the use of printed circuit, board (PCB) as the packaging materials as it is typically not able to withstand temperatures of above 200°C.
Summary of Invention
In view of foregoing, embodiments herein provide a method of forming nanometer ictls on packaged device platform.
A method of forming nanomateriais on packaged sensor device platform comprises the steps of fabricating a sensor device platform on full scale wafer, sawing the wafer to individual sensor die element, bonding of conductive wires for connecting the sensor element to the sensor device package, protecting the wire bond with epo¾y while leaving the sensing area exposed for receiving coating of catalyst precursor for the nanomateriai growth, nucleating the coated catalyst precursor at low temperature for forming an active nanoparticie, and providing the active nanoparticie nucieation with nutrient solution for turning them into solid and forming nanostructures for integration of readout circuit for sensing.
Preferably the method further comprises the ste of testing and qualifying the device sensor platform at full scale wafer by charactering the device electrical properties after the step of fabricating.
Preferably the step of nucleating comprises the step of heating the coated catalyst precursor die on hotplate for surface treatment and annealing the die for activating it to form the active nanoparticle .
Preferably the packaged device sensor platform includes interdigitated electrode (IDE) or field effect transistor (FET) .
Preferably the readout, circuit includes analogue or digital circuit.
Preferably the nanomateriais include nanctubes, nanowxres, nanorods, or nanoplatlets .
These and other objects and features of the present invention will be more fully understood from the following detailed description which should be read in light of the accompanying drawings in which corresponding reference numerals refer to corresponding parts throughout the several views . Brief Description of the Drawing
Figure 1 shows a typical synthesis or forming method (100) to integrate nanomat ria1s on device latform;
Figure 2a dep cts an example of the nanomateriai synthesis on full wafer that is not uniformed with other typical synthesis or forming method;
Figure 2b illustrates an example of the nanomateriai synthesis with residue particles that will lead to contamination in manuf cturing line with other typical synthesis or forming method; Figure 2c shows an example of the nanomateriai growth on. device contact pad with other typical synthesis or forming method;
Figure 3 is a flowchart showing a method to form. nanomateriais on packaged sensor devices at low temperature where the synthesis process is carried out in separate process from wafer fabrication manufacturing line of the present invention; and Figure 4 is a process low showing the diagrams of the present method to form nanomaterial on packaged device. e ailed Description of the Preferred Embodiments
To facilitate an understanding of the principles and features of the invention, it is explained hereinafter with reference to its implementation in illustrative embodiments . In more detail, the present invention is directed to a method to form nanomaterial on packaged device at low temperature in which the nanomaterial forming process is separated from wafer fabrication manufacturing line. By using this method, it can eliminate the risks of co tamination, non-uniformit , inconsistency, peel off problem, wire bonding and packaging problem, and defects on waf fa rication eq ipm nt .
Figure 1 shows a typical synthesis or forming method (100) to integrate nanomaterials on device platform in which the nanomaterials could be the nanotubes, nanowires, nanorods , nanoplatlets and nanopartlcles . The device platform such as the interdigitated electrode (IDE) and field effect transistor { ?S } platform is first prepared on full wafer (110) where all the fabrication process has been carried out in wafer fabrication manufacturing line as shown in Figure 1- The device will be checked for its qualification by using a standard integrated circuit (IC) test such as wafer probing (120) to measure the resistance, capacitance and IV characteristics. The nanomaterial will then: foe -synthesized on full wafer {130} either by using wet chemical based or gas based method in which the wet cheraical based method will introduce contamination during synthesis process that is not allowed in wafer fabrication manufacturing line. Whereas in the gas based method, the catalyst in hydrothermal method is very difficult to remove fay using typical lift off process hence will affect the wire bonding and packaging process. Besides that, the gaseous-vapour method requires very high temperature synthesis temperature of typically above 400 CC, which in turns limits the type of metal that can. foe used as electrodes in the device platform and the examples of such high temperature metals are gold and platinum which is very expensive. Moreover, the gas based method needs a very high precision gas low rate into the chamber in vacuum state, otherwise it will affect the uniformity of nanomaterial synthesis on full wafer. Figure 2a to 2c show the examples of issues that occurred when integrating nanomateriais at wafer level in which Figure 2a showing the nanomaterial synthesis on full' afer that is not uniform, Figure 2b showing the residue particles that will lead to contamination in manufacturing line and Figure 2c showing the nanoinateriai growth- on device contact pad.
A method of forming nanomete ala (10) on packaged sensor devices at low temperature -where the forming process is carried out in separate process from wafer fabrication manu acturing line is shown in Figure 3, he nanomaterial is used as sensing elements to detect different type of ions* The low synthesis temperature could be below 200<>C. The na.n©materi Is could he the nanotubes, nanowires, nanorods, and nano lat lets . Preferably, the nanomate iai in the present invention is conductive metal oxide nanowire which is formed at tempera re as low as 80*0. The complete device platform such as IDEs or FETs is fabricated on full scale wafer {11} as shown in Figures 3 and 4. The fabrication could be with standard integrated circuit processing technique and flow which includes photolithography, etching and metal deposition. This device platform will be fabricated in wafer fabrication manufact ring line after all the process condition has been standardized.
Then, the device on full wafer level will be tested and qualified by standard electrical testing {12} to check but not limited to the overall resistance, capacitance and current-voltage characteristics, The passed wafer will be sent for wafer sawing process {13} where the wafer will, be sawn into dies where each die represents an individual sensor platform for subsequent device packaging. The dies then sent for wire bonding {14} and pre-packaged (15) comprising of printed circuit bo rds or ceramic boards to complete the sensor circuit design, The wire bond will be protected with epoxy while sensing area remains exposed (17) for n noma enia! growth as sensing element as shown in Figure 4.
After that, the nanomaterial is formed on die (16) at the final stage where the forming process will foe carried out at separate process from, wafer fabrication manuf cturing line as shown in Figure 4. The exposed sensor area will then be coated with catalyst precursor as a seed for nanomaterial growth. Pre erably, the spinner is rotated at 3000rpm for 30 second, for the catalyst precursor coating. The coated pre- packaged dies will then be heated up on hotplate at about 9OaC for surface treatment. After that, the pre-packaged dies will anneal at about 100°C for approximately .1 hour to activate the nucleation sites of catalyst to form the active nanoparticle seed. The annealed pre-packaged dies will then be immersed on nanomaterial nutrition in solution that has been heated up at 8QeC for about 3 to 9 hours. During the inversion, the active nucleation sites will absorb the nutrition from solution and turn them into solid and font* the nanostructures . Lastly, the pre-packaged die with nanomaterial at sensing a ea will be integrated {18} with readout circuit such as analogue or digital circuit and use for intended applications as shown in Figure 4.
By using the method of. forming the nanomaterial after the device has been packaged will overcome the problems encountered by other typical methods and also introduces several advantages such as the flexibility of process condition employed during nanomaterial synthesis or forming as different applications may needs different types of nanoxaateriai structure for optimum sensitivity. Therefore the process condition needs to be changed in order to introduce different types of nanomaterial structures onto the device platform. However, having different and multiple process recipes in a wafer fabrication line is not encouraged as it will affect the process stability and also the production throughput. Hence by forming the nanomaterial on packaged device platform allow both low and high volume production of different sensors catering for different applications, Moreover, by forming the nanomaterial packaged devices will eliminate the potential risk or issue of nanoxnaterial peeling off during the wafer back-grinding and sawing process.
While the disclosed system has been particularly shown and described with respect to the preferred embodiments, it is understood by those skilled in the art that various modificat ions in form and detail may be made therein, without departing from the scope of the invention. Accordingly, modifications such as those suggested abov but not limited thereto are to be considered within the scope of the invention, which is to foe determined by reference to the appended ciaims «

Claims

CXAIMS
1. .ft method of forming nanomaterials {10} on packaged sensor device platform, said method comprising the steps of:
fabricating (11) a sensor device platform on full scale wafer;
sawing (13} said wafer to individual censor die element;
bonding (14) of conductive wires for connecting said sensor element to the sensor device package;
protecting said wire bond with epoxy (.17) while leaving the sensing area exposed for receiving coating of catalyst precursor for said nanom.ate.riai growth;
nucleating {16} said coated catalyst precursor at. low temperature for forming an active nanopa ticle; and
providing said active nanoparticle nncieation with nutrient solution for turning them into solid and forming nanostructures for integration of readout circuit (18} for sensing .
2. The method of forming nanomaterials {10} on packaged sensor device platform as claimed in claim 1, wherein said method further comprising the step of testing and qualifying (12; said device sensor platform at full scale wafer by charactering the device electrical properties after the step of fabricating {11} .
3. The laethod of forming nanomat rials (10) on packaged sensor device platform as claimed in claim lt wherein said step of nucleating (16) comprises the step of heating said coated catalyst precursor die on hotplate for surface treatment and annealing said die for activating it to form the active nanoparticle*
4* The method of forming nanoraateria1s (10) on packaged sensor device platform as claimed in claim 3, wherein said step of heating on hotplate is preferably at about 90*0 for surface treatment.
5, he method of forming nanomateriais (10) on packaged sensor device platform as claimed i claim 1, wherein said packaged device sensor platform includes interdigitated. electrode (IDE) or field effect transistor ( FS } .
6. The method of forming nanomateriais (10) on. packaged sensor device platform as claimed in claim 1, wherein said nutrient solution is heated up prior to the step of providing nutrient solution.
?. The method of forming nanomateriais {10} on packaged sensor device platform as claimed in claim 6, wherein said nutrient solution is preferable heated at about 80nC for about 3 to 9 hours.
8. The method of forming nanomate ials (10} on packaged sensor device■ latform as claimed in claim 1, wherein said readout circuit includes analogue or digital circuit.
9. The method of forming' nanornateriais (10) on pac aged sensor device platforts as claimed in claim 1, wherein said nanoisatari ls include nanotubes, nanowires, nanorods, or nanopiatiets .
10. The method of forming nanomete ials (10) on packaged sensor device platform as claimed in claim 1, wherein said senso device package comprises printed circuit board or ceramic boards.
PCT/MY2014/000118 2013-11-26 2014-05-26 Method of forming nanomaterials on packaged device platform WO2015080550A1 (en)

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Cited By (1)

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Citations (1)

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Title
CHANG C-Y ET AL: "Volatile organic compounds sensor with stacked interdigitated electrodes coated with monolayer-protected gold nanoclusters", 2013 TRANSDUCERS & EUROSENSORS XXVII: THE 17TH INTERNATIONAL CONFERENCE ON SOLID-STATE SENSORS, ACTUATORS AND MICROSYSTEMS (TRANSDUCERS & EUROSENSORS XXVII), IEEE, 16 June 2013 (2013-06-16), pages 1170 - 1173, XP032499191, DOI: 10.1109/TRANSDUCERS.2013.6626981 *

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10947109B2 (en) 2017-10-05 2021-03-16 Infineon Technologies Ag Semiconductor component and method for producing same

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