WO2015055008A1

WO2015055008A1 - Storage controller chip and disk packet transmission method

Info

Publication number: WO2015055008A1
Application number: PCT/CN2014/078367
Authority: WO
Inventors: 李宇涛; 姚益民
Original assignee: 华为技术有限公司
Priority date: 2013-10-15
Filing date: 2014-05-26
Publication date: 2015-04-23
Also published as: CN103558995B; CN103558995A

Abstract

A storage controller chip comprising: a network interface module, a processing engine, and a storage interface module. The network interface module comprises a network side interface. The network interface module is connected to an external network via the network side interface. The network interface module is connected to the processing engine via a data channel. The processing engine also is connected to the storage interface via a data channel. The storage interface module comprises a storage side interface. The storage interface module is connected to a disk via the storage side interface. Also comprised is a method related to the storage controller chip. The controller chip and the corresponding method allow for reduced costs of a storage controller and of an interface controller circuit.

Description

The invention relates to a Chinese patent issued on October 15, 2013 by the Chinese Patent Office, the application number is 201310482817.2, and the invention name is "a storage control chip and a disk message transmission method". Priority of the application, the entire contents of which are incorporated herein by reference.

Technical field

The present invention relates to the field of communications, and in particular, to a storage control chip and a disk message transmission method. Background technique

Storage devices are indispensable modules in most current communication devices and electronic devices. The structure of the current storage device mainly includes a storage control and interface control circuit and a storage body (for example, a disk or a hard disk), wherein the storage control and interface control circuit includes a storage controller, a processor, and a network card controller, and the storage controller, The processor and the NIC controller are connected through a Peripheral Component Interconnection Express (PCIE) interface, and the storage controller and the storage port are connected through another interface, for example: Serial Advanced Technology Attachment (SATA) or Serial Attached SCSI (SAS) interface. In addition, the NIC controller is connected to an external network (for example, a device that reads a storage device) through other interfaces. For example, It is connected to the external network through an Ethernet (Eth) interface or a Fibre Channel (FC) interface or an Fibre Channel Over Ehternet (FCoE) interface or an Infini Band (IB) interface. In this way, the storage controller needs to process PCIE, Small Computer System Interface (SCSI) and SATA protocol stacks or protocol stacks for PCIE, SCSI and SAS in the process of reading and writing data, and the processor needs to handle PCIE and SCSI protocol stack, NIC interface needs to handle PCIE, SCSI and Eth stacks or handle PCIE, SCSI and IB protocol stacks.

In summary, current storage control and interface control circuits need to be processed for each device. Multiple protocol stacks, so the circuit can be complicated, resulting in excessive cost of the entire memory control and interface control circuit. Summary of the invention

Embodiments of the present invention provide a storage control chip and a disk packet transmission method, which can reduce the cost of the storage control and the interface control circuit. In a first aspect, an embodiment of the present invention provides a storage control chip, including: a network interface module, a processing engine, and a storage interface module, where the network interface module includes a network side interface, and the network interface module passes the network side The interface is connected to the external network of the chip, the network interface module is connected to the processing engine through a data channel, and the processing engine is further connected to the storage interface module through a data channel, where the storage interface module includes a storage side interface The storage interface module is connected to the disk through the storage side interface; wherein:

The network interface module is configured to implement, by using network side protocol processing, to transmit a message between the external network and the processing engine;

The processing engine is configured to analyze the packet transmitted by the network interface module, or analyze the packet transmitted by the storage interface module, and represent the analysis result as a packet sent to the disk and sent to the device through the data channel. Storing the interface module, and expressing the analysis result as a message for sending to the external network to be sent to the network interface module through a data channel;

The storage interface module is configured to implement, by using a storage side protocol, to transmit a message between the disk and the processing engine.

In a first optional implementation manner of the first aspect, the network interface module is further configured to receive, by using the network side interface, a network side protocol packet that is sent by an external network, including the first internal packet, and The network-side protocol packet is decapsulated to obtain a first target packet that includes the first internal packet, and the first target packet is sent to the processing engine through a data channel;

The processing engine is further configured to: obtain the first internal packet according to the first target packet, analyze and process the first internal packet, and obtain an analysis result, where the analysis result indicates the first internal report When the message is used for sending a message to the disk, the first internal is passed through the data channel Sending a message to the storage interface module;

The storage interface module is further configured to perform storage side protocol encapsulation processing on the first internal packet to obtain a storage side protocol packet, and send the storage side protocol packet to the disk through the storage side interface.

With reference to the first aspect, or the first possible implementation manner of the first aspect, in a second possible implementation manner of the first aspect, the storage interface module is further configured to receive, by using the storage side interface, the sending of the disk a storage side protocol packet including a second internal packet, and decapsulating the storage side protocol packet to obtain the second internal packet, and sending the second internal packet to the device through a data channel Processing engine

The processing engine is further configured to perform analysis processing on the second internal packet to obtain an analysis result. When the analysis result indicates that the second internal packet is used for sending a message to an external network, the data channel is used to Transmitting, by the network interface module, a second target packet that includes the second internal packet;

The network interface module is further configured to perform the encapsulation processing on the second target packet to obtain a network side protocol packet, and send the network side protocol packet to the external network by using the network side interface.

In conjunction with the first possible implementation of the first aspect, in a third possible implementation manner of the first aspect, the network interface module is configured to receive, by using the network side interface, an external network, including the first internal a network-side protocol of the network, and performing network-side protocol decapsulation processing on the network-side protocol to obtain the first internal packet, and then sending the first internal packet through a data channel To the processing engine; or

The network interface module is configured to: when the network side protocol packet includes a multi-layer protocol encapsulation, receive, by the network side interface, a network side protocol packet that is sent by an external network, including the first internal packet, and the The network side protocol packet performs the decapsulation processing of the first layer protocol to obtain the target packet including the first internal packet, and then sends the target packet to the processing engine through the data channel; When the network side protocol packet includes the multi-layer protocol encapsulation, the decapsulation process is performed on the target packet to obtain the first internal packet, and the first internal packet is analyzed and processed to obtain an analysis result. When the analysis result indicates that the first internal message is a message for reading a disk, the first internal message is sent to the storage interface module through a data channel. In conjunction with the second possible implementation of the first aspect, in a fourth possible implementation manner of the first aspect, the processing engine is configured to perform an analysis process on the second internal packet to obtain an analysis result, where the analysis is performed The result indicates that when the second internal message is used for sending a message to the external network, the second internal message is sent to the network interface module through the data channel; or

The processing engine is configured to: when the network side protocol packet includes a multi-layer protocol encapsulation, analyze and process the second internal packet to obtain an analysis result, where the analysis result indicates that the second internal packet is used Encapsulating the second internal packet to obtain a second target packet including the second internal packet, and transmitting the second target packet to the network interface module through a data channel, when the packet is sent to the external network Second target message.

With reference to the first aspect or the first possible implementation manner of the first aspect, in a fifth possible implementation manner of the first aspect, the chip further includes: a management interface module, where the management receiving module includes control management The management interface module is connected to the external processor through the control management interface, and the management interface module is further connected to the processing engine through a management channel;

The management interface module is configured to receive, by using the control management interface, a configuration management document sent by the external processor for configuring and/or managing the processing engine, and send the configuration management packet by using a management channel. To the processing engine;

The processing engine is further configured to configure and/or manage software of the processing engine in accordance with the configuration management message.

With reference to the first aspect, or the first possible implementation manner of the first aspect, in a sixth possible implementation manner of the first aspect, the chip further includes: a memory management unit MMU controller, where the MMU controller includes a memory The MMU controller is connected to the external memory through the memory interface, and the MMU controller is further connected to the processing engine through a data channel;

The MMU controller is configured to store data processed by the processing engine into the external memory.

In conjunction with the sixth possible implementation of the first aspect, in a seventh possible implementation manner of the first aspect, the chip further includes: a direct memory access DMA controller, where the DMA controller passes the control channel and the Processing engine connection, and through the control channel and the MMU Controller connection; where:

The DMA controller is configured to control data transmission between the storage interface module and the external memory when the external memory needs to be used, and control data between the network interface module and the external memory transmission.

With reference to the first aspect, or the first possible implementation manner of the first aspect, in an eighth possible implementation manner of the first aspect, the chip further includes: a data cache, where the data cache passes the data channel and the processing Engine connection; where:

The data cache is used to cache the program code or the message information processed by the processing engine. The processing engine is further configured to invoke the program code of the data cache buffer to perform a processing operation on the message.

In combination with the first aspect or the first possible implementation manner of the first aspect, in a ninth possible implementation manner of the first aspect, the chip further includes: a flash (Flash) interface module, and one port of the Flash interface module Connected to an external Flash chip, the other end of the Flash interface module is connected to the processing engine;

The Flash interface module is configured to store, in a power-off state, a program code of software used by the chip to the external Flash chip.

A second aspect of the present invention provides a disk packet transmission method, including: a storage control chip receiving a first protocol packet including an internal packet sent by a first device, and performing the first protocol packet Decapsulating the protocol packet to obtain the internal packet; the storage control chip analyzing the internal packet to obtain an analysis result; and when the analyzing result indicates that the internal packet is sent to the second And the storage control chip performs a second protocol encapsulation process on the internal packet to obtain a second protocol packet, and sends the second protocol packet to the second device, where:

The first device is a network device connected to the first end of the storage control chip, and the second device is a magnetic disk connected to the second end of the storage control chip; or, the first device is The second device connected to the storage control chip is a network device connected to the first end of the storage control chip.

In a first possible implementation manner of the second aspect, the storage control chip receives a first protocol packet that is sent by the first device and includes an internal packet, and performs the first protocol packet Decapsulating the protocol packet to obtain the internal packet, including:

The storage control chip receives a network side protocol packet that is sent by the network device and includes a first internal packet, and performs network side protocol decapsulation processing on the network side protocol to obtain the first internal text. ;

When the analysis result indicates that the internal packet is a packet for sending to the second device, the storage control chip performs a second protocol encapsulation process on the internal packet to obtain a second protocol packet. And sending the second protocol packet to the second device, including:

When the analysis result indicates that the first internal packet is a packet for sending to a disk, the storage control chip performs a storage side protocol encapsulation process on the first internal packet to obtain a storage side protocol packet. And sending the storage side protocol message to the disk.

With reference to the second aspect, in a second possible implementation manner of the second aspect, the storage control chip receives the first protocol packet that is sent by the first device and includes the internal packet, and the first protocol packet Performing the first protocol packet decapsulation process to obtain the internal packet, including:

The storage control chip receives a storage side protocol packet that is sent by the disk and includes a second internal packet, and performs a storage side protocol decapsulation process on the storage side protocol packet to obtain the second internal packet.

The storage control chip analyzes the second internal packet to obtain an analysis result; when the analysis result indicates that the internal packet is a packet for sending to a second device, the storage control The chip performs a second protocol encapsulation process on the internal packet to obtain a second protocol packet, and sends the second protocol packet to the second device, including:

When the analysis result indicates that the second internal packet is a packet for sending to an external network, the storage control chip performs network side protocol encapsulation processing on the second target packet to obtain a network side protocol. And sending the network side protocol "^" to the network device.

In the above technical solution, the network interface module is connected to the external network through the network side interface, the network interface module is connected to the processing engine through a data channel, and the processing engine is further connected to the storage interface module through a data channel. The storage interface module is connected to the disk through the storage side interface; the network interface module is configured to implement, by using a network side protocol, to transmit a message between the external network and the processing engine; And analyzing the packet transmitted by the network interface module, or analyzing the packet transmitted by the storage interface module; The result of the analysis is that the packet for sending to the disk is sent to the storage interface module through the data channel, and the analysis result is expressed as a packet for sending to the external network, and the packet is sent to the network interface module through the data channel. The storage interface module is configured to implement, by using a storage side protocol, to transmit a message between the disk and the processing engine. In this way, the entire storage control chip only needs to process the protocol stack of the network side protocol and the storage side protocol, and the internal connection is through the data channel. Compared with the prior art, the storage control and the interface control circuit pass through the PCIE interface, that is, the existing In the technology, the storage control and the interface control circuit need to process at least a protocol stack of a PCIE protocol, a network side protocol (for example, an Eth protocol), and a storage side protocol (for example, a SAS protocol), and the embodiment of the present invention can reduce the storage control and the interface control circuit. cost. DRAWINGS

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the embodiments or the description of the prior art will be briefly described below. Obviously, the drawings in the following description are only It is a certain embodiment of the present invention, and other drawings can be obtained from those skilled in the art without any creative work.

1 is a schematic structural diagram of a storage control chip according to an embodiment of the present invention; FIG. 2 is a schematic structural diagram of another storage control chip according to an embodiment of the present invention; FIG. 3 is another storage provided by an embodiment of the present invention. FIG. 4 is a schematic structural diagram of another storage control chip according to an embodiment of the present invention; FIG. 5 is a schematic structural diagram of another storage control chip according to an embodiment of the present invention; FIG. 7 is a schematic structural diagram of another storage control chip according to an embodiment of the present invention; FIG. 8 is a schematic diagram of an optional protocol stack according to an embodiment of the present invention;

FIG. 9 is a schematic flowchart of a disk packet transmission method according to an embodiment of the present invention; FIG. 10 and FIG. 11 are schematic diagrams showing an alternative example according to an embodiment of the present invention. detailed description

The technical solution in the embodiment of the present invention will be further described below with reference to the accompanying drawings in the embodiments of the present invention. The invention is described in a clear and complete manner, and it is obvious that the described embodiments are only a part of the embodiments of the invention, and not all embodiments. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without creative efforts are within the scope of the present invention.

In the embodiment of the present invention, the storage control chip can be equivalent to the storage control and interface control circuit in the prior art. In the embodiment of the present invention, the circuit is integrated into one chip. The storage control chip can be applied to any device that uses a disk, such as a server, a computer, a mobile phone, a tablet, or the like.

In addition, the external network in the embodiment of the present invention may specifically refer to an external device that the user accesses the disk, such as a processor, a switch, and a network card device. This embodiment of the present invention does not limit this. The type and number of the disks are not limited in the embodiment of the present invention. For example, it may be a solid state disk (SSD), a mechanical disk, and/or a non-flash (Not And Flash, NAND Flash). The channel transmitted by the data channel may be a packet after the protocol is unloaded, or may be a protocol encapsulated or decapsulated packet, that is, the packet transmitted through the data channel does not need to be like a network side interface or a storage side. An interface can only transmit packets encapsulated by a specific protocol.

1 is a schematic structural diagram of a storage control chip according to an embodiment of the present invention. As shown in FIG. 1, the system includes: a network interface module 11, a processing engine 12, and a storage interface module 13, wherein the network interface module 11 includes a network. The network interface module 11 is connected to the external network of the chip through the network side interface, the network interface module 11 is connected to the processing engine 12 through a data channel, and the processing engine 12 also passes through the data channel. The storage interface module 13 includes a storage side interface, and the storage interface module 13 is connected to the disk through the storage side interface;

The network interface module 11 is configured to implement transmission of the message between the external network and the processing engine 12 by using network side protocol processing.

Optionally, the network interface module 11 receives the network side protocol packet sent by the external network by using the network side interface, and decapsulates the network side protocol packet to obtain an internal packet, and then transmits the internal packet to the internal interface. Processing engine 12. Or the network interface module 11 passes through the data channel After receiving the internal packet sent by the processing engine 12, the internal packet is encapsulated by the network side protocol to obtain the network side protocol packet, and the network side protocol packet is sent to the external network through the network side interface.

The processing engine 12 is configured to analyze the packet transmitted by the network interface module, or analyze the packet transmitted by the storage interface module, and send the analysis result as a packet for sending to the disk, and send the packet to the The interface module is stored, and the analysis result is expressed as a message for sending to the external network to be sent to the network interface module through a data channel.

The storage interface module 13 is configured to implement, by using a storage side protocol, to transmit a message between the disk and the processing engine.

Optionally, the storage interface module 13 may be configured to receive the internal packet sent by the processing engine 12 through the data channel, and then encapsulate the internal packet into a storage side protocol to obtain a storage side protocol packet, and then store the storage side protocol packet. Sent to the disk through the storage side interface. Or the storage interface module 13 receives the storage side protocol packet sent by the disk through the storage side interface, and then decapsulates the storage side protocol packet by the storage side protocol to obtain an internal packet, and then sends the internal packet to the processing through the data channel. Engine 12.

In the above technical solution, the network interface module is connected to the external network through the network side interface, the network interface module is connected to the processing engine through a data channel, and the processing engine is further connected to the storage interface module through a data channel. The storage interface module is connected to the disk through the storage side interface; the network interface module is configured to implement, by using a network side protocol, to transmit a message between the external network and the processing engine; And analyzing the packet transmitted by the network interface module, or analyzing the packet transmitted by the storage interface module; and expressing the analysis result as a packet sent to the disk, and sending the packet to the storage interface module through the data channel, and Transmitting the analysis result as a packet sent to the external network to the network interface module by using a data channel; the storage interface module is configured to implement the disk and the processing engine by using storage side protocol processing Transfer messages. In this way, the entire storage control chip only needs to process the protocol stack of the network side protocol and the storage side protocol, and the internal connection is through the data channel. Compared with the prior art, the storage control and the interface control circuit pass through the PCIE interface, that is, the existing In the technology, the storage control and the interface control circuit need to process at least a protocol stack of a PCIE protocol, a network side protocol (for example, an Eth protocol), and a storage side protocol (for example, a SAS protocol), which is an embodiment of the present invention. The cost of storage control and interface control circuitry can be reduced. 2 is a schematic structural diagram of a storage control chip according to an embodiment of the present invention. As shown in FIG. 2, the network interface module 21 includes a network interface module 21, a processing engine 22, and a storage interface module 23. The network interface module 21 includes a network. The network interface module 21 is connected to the external network of the chip through the network side interface, the network interface module 21 is connected to the processing engine 22 through a data channel, and the processing engine 22 also passes through the data channel. Connected to the storage interface module 23, the storage interface module 23 includes a storage side interface, and the storage interface module 23 is connected to the disk through the storage side interface;

The network interface module 21 is configured to receive, by using the network side interface, a network side protocol packet that is sent by the external network, including the first internal packet, and perform decapsulation processing on the network side protocol packet to obtain the first The first target message of the internal message is sent to the processing engine 22 through the data channel.

Optionally, the foregoing network interface may be an Eth interface, an FC interface, an FCoE interface, or an IB interface. The network side protocol may be a protocol packet for transmission in the network interface. The first target packet may be a packet encapsulated by a certain protocol, for example, the network interface is an Eth interface, and the network side protocol packet is an Eth protocol encapsulation packet, where the Eth protocol encapsulates the packet. The Internet Protocol (IP) encapsulates the packet, or the IP encapsulated packet carries the Eth frame or the Eth protocol encapsulated packet. The IP encapsulated packet can also carry the Transmission Control Protocol (TCP). The encapsulated packet, or the TCP packet, is carried on the IP-encapsulated packet. The TCP-encapsulated packet can also carry the Internet Small Computer System Interface (iSCSI) protocol encapsulated packet, or the iSCSI encapsulated packet. It is carried on the TCP encapsulation message. The first target packet may be an IP-encapsulated packet, a TCP-encapsulated packet, or an iSCSI-encapsulated packet. The first target packet may be directly the first internal packet, that is, the network interface module 21 completes the network. All protocols of the side protocol are uninstalled. When the network interface module 21 only performs the protocol offloading of the partial layer in the network side protocol, the remaining protocol encapsulation can be uninstalled by the processing engine 22. In this example, the network interface module 21 and the processing engine 22 can cooperate to complete the network side protocol. deal with. The processing engine 22 is configured to obtain the first internal packet according to the first target packet, and analyze the first internal packet to obtain an analysis result, where the analysis result indicates the first internal packet When the packet is sent to the disk, the first internal packet is sent to the storage interface module 23 through the data channel.

Optionally, the obtaining the first internal packet according to the first target packet may be that the first target packet is used as the first internal packet, that is, the network interface module 21 completes the network-side packet. The first internal packet is obtained by performing partial protocol offloading on the first target packet to obtain the first internal packet, that is, the network interface module. 21 only completed the protocol offloading of some protocol layers of the network side message.

Optionally, when the foregoing analysis result is that the first internal message is required to be processed (eg, calculated) by the processing engine 22, the processing engine 22 may further process the file (eg, calculate), The processing engine 22 can also return the processing result to the network interface module 21, and the network interface module returns the processing result to the external network. Of course, the processing engine 22 can also be based on the analysis result (the above analysis result indicates the first internal report) The text is an error message), and the first internal essay is lost.

The storage interface module 23 is configured to perform a storage side protocol encapsulation process on the first internal packet to obtain a storage side protocol packet, and send the storage side protocol packet to the disk by using the storage side interface.

Optionally, the foregoing storage interface may be a SAS interface or a SATA interface. In addition, the storage side protocol packet may be a protocol packet used for transmission in the storage interface.

The above can be implemented by receiving the packet sent by the external network and transmitting the packet to the disk. This embodiment can implement only one protocol processing, one protocol decapsulation of the network side protocol, and the other is the storage side protocol. Package.

Or,

The storage interface module 23 is configured to receive, by using the storage side interface, a storage side protocol packet that is sent by the disk and includes a second internal packet, and perform decapsulation processing on the storage side protocol packet to obtain the second Internal message, and sending the second internal message to the office through the data channel The processing engine 22 is described.

Optionally, the receiving, by the storage interface, the storage side protocol packet that is sent by the disk, including the second internal packet, may be a packet that is actively pushed by the disk, or may be returned according to the request sent by the storage interface module 23. Message.

The processing engine 22 is configured to perform analysis processing on the second internal packet to obtain an analysis result. When the analysis result indicates that the second internal packet is used for sending a message to an external network, the data channel is used to The network interface module 21 sends a second target message including the second internal message.

Optionally, the second target packet may be the first target packet. When the network side protocol packet includes only the single layer protocol encapsulation, the second target packet is the second internal packet, where the network side protocol is used. When the packet includes only the multi-layer protocol encapsulation (for example, the Eth protocol encapsulation, the IP encapsulation, the TCP encapsulation, and the iSCSI protocol encapsulation), the second target packet may be an IP encapsulation packet, a TCP encapsulation packet, or an iSCSI protocol encapsulation packet. The text can also be directly the second internal message. That is, the processing engine 22 can complete at least one of the following encapsulations for the second internal >3⁄4 text:

IP encapsulation, TCP encapsulation, and iSCSI protocol encapsulation.

Of course, the processing engine 22 may not encapsulate the second internal packet, and directly send the second internal packet to the network interface module 21, and the network interface module 21 completes the encapsulation.

The network interface module 21 is configured to perform encapsulation processing on the second target packet to obtain a network side protocol, and send the network side protocol to the external network by using the network side interface 211.

Optionally, when the network side protocol includes only the multi-layer protocol encapsulation (for example, the Eth protocol encapsulation, the IP encapsulation, the TCP encapsulation, and the iSCSI protocol encapsulation), the network interface module 21 can only be the second internal packet. The network protocol module 21 and the processing engine 22 cooperate to complete the network side protocol encapsulation, and the second internal packet completes all the networks. Protocol encapsulation of side protocol packets.

As an optional implementation, the first internal packet may be a SCSI packet, and the second internal packet may be an SCSI packet. The data content of these two messages may be the same or different.

As an optional implementation manner, the network interface module 21 can be used to pass the network side. The interface receives the network side protocol packet that is sent by the external network, and includes the first internal packet, and performs network side protocol decapsulation processing on the network side protocol packet to obtain the first internal packet, and then uses the data channel to The first internal message is sent to the processing engine 22.

For example, the network side interface is an FC interface or an IB interface, that is, the network side protocol packet is a single layer protocol packet, for example, an FC protocol packet or an IB protocol packet. The network interface module 21 can directly decapsulate the network side protocol packet to obtain the first internal message, and then send the first internal message to the processing engine 22 through a data channel. The decapsulation process may be performed by decapsulating the network side protocol packet, removing the network side protocol packet header, and completing the offloading of the network side protocol. Of course, when the network side interface is an Eth interface or an FCoE interface, that is, the network side protocol packet is a multi-layer protocol packet, the network interface module 21 can also perform protocol unloading of all layers of the network side. For example, when the network side interface is an Eth interface, the network interface module 21 performs all the protocol unloading of the network protocol packet, for example, decapsulating the Eth protocol of the network side protocol, and removing the Eth header to obtain an IP packet; The IP packet is decapsulated by the IP packet, and the IP packet header is removed to obtain a TCP packet. The TCP packet is decapsulated by the TCP packet, and the TCP packet header is removed to obtain an iSCSI packet. The iSCSI decapsulation is performed, and the iSCSI packet header is removed to obtain the SCSI packet, that is, the first internal packet is obtained.

As an optional implementation, the network interface module 21 may be configured to: when the network side protocol packet includes a multi-layer protocol encapsulation, receive, by using the network side interface, a network that includes the first internal packet sent by the external network. The side protocol packet is sent to the network side protocol packet to obtain a target packet including the first internal packet, and the target packet is sent to the local device through the data channel. The processing engine 22 is described.

For example, the network interface module 21 performs the protocol unloading of the network protocol packet on the part of the network protocol packet, that is, the decapsulation process of the first layer protocol is performed on the network side protocol packet to obtain the target packet including the first internal packet. The first layer protocol may be one or more layers. For example, when the network side interface is an Eth interface, the first layer protocol includes at least one of the following:

Eth protocol, IP, TCP, and iSCSI.

For example, when the first layer protocol is the Eth protocol, the Eth protocol is decapsulated on the network side protocol, and the Eth packet header is removed to obtain an IP packet, that is, the target packet is When the first layer protocol is the Eth protocol and the IP address, the Eth protocol is decapsulated on the network side protocol, and the Eth packet header is removed to obtain an IP packet. Then, the IP packet is IP-based. The encapsulation is performed, and the IP packet header is removed, and the TCP packet is obtained, that is, the target packet is a TCP packet. When the first layer protocol is Eth protocol, IP, and TCP, you can refer to the above procedure.

The processing engine 22 may be configured to: when the network side protocol packet includes the multi-layer protocol encapsulation, decapsulating the target packet to obtain the first internal packet, and analyzing the first internal packet The processing results in the analysis result. When the analysis result indicates that the first internal message is a packet for reading a disk, the first internal message is sent to the storage interface module 23 through a data channel.

For example, when the first layer protocol is the Eth protocol, the target >3⁄4 text is IP^艮, and the processing engine 22 can perform IP address, IP, TCP, and iSCSI protocol offloading to obtain SCSI packets. When the first layer protocol is the Eth protocol and the IP, that is, when the target packet is a TCP packet, the processing engine 22 can perform the IP/^ message, and the TCP and iSCSI protocols are unloaded to obtain the SCSI packet. . When the Layer 1 protocol is Eth protocol, IP, and TCP, you can refer to the above procedure.

In this embodiment, the network interface module 21 and the processing engine 22 cooperate to complete the offloading of the network side protocol.

As an optional implementation manner, the processing engine 22 may be configured to perform analysis processing on the second internal packet to obtain an analysis result, where the analysis result indicates that the second internal packet is used for sending to an external network. During the message, the second internal message is sent to the network interface module 21 through a data channel.

In this embodiment, the second internal packet can be directly sent to the network interface module 21, for example, the SCSI packet is sent, and the network interface module 21 completes the encapsulation of the network side protocol.

As an optional implementation manner, the processing engine 22 may be configured to: when the network side protocol includes a multi-layer protocol encapsulation, analyze and process the second internal packet to obtain an analysis result, where the analysis result is When the second internal packet is sent to the external network, the second internal packet is encapsulated to obtain a second target packet including the second internal packet, and the data is passed through the second internal packet. The channel sends the second target message to the network interface module 21.

The foregoing second target packet may specifically include at least one layer protocol included in the network side protocol. Encapsulation, for example, when the network interface is an Eth interface, the second target packet can be an iSCSI packet, an IP packet, or a TCP packet. That is, the processing engine 22 can perform iSCSI encapsulation, IP encapsulation, or TCP encapsulation on the second internal authentication. The information about the encapsulation required by the iSCSI encapsulation, the IP encapsulation, or the TCP encapsulation (for example, the TCP port number, the IP address, the MAC address, and the like) may be previously recorded. For example, the processing engine 22 sends the first internal report to the storage interface module 23. Recorded in the text. When the network interface module 21 receives the second target packet, the network side protocol encapsulation that is not completed by the processing engine 22 is completed. For example, when the second target packet is an iSCSI packet, the network interface module 21 is iSCSI packet completion, TCP, IP, and Eth protocol encapsulation. Then send the Eth protocol packet to the external network.

In this embodiment, the encapsulation of the network side protocol by the network interface module 21 and the processing engine 22 can be implemented.

As an optional implementation, the network interface module 21 can also be connected to the processing engine 22 through a management channel. The processing engine 22 can also be used to configure and/or manage the software of the network interface module 21 through the management channel, for example: The software of the network interface module 21 or the software of the unloading network interface module 21, and the like.

As an optional implementation, the storage interface module 23 can also be connected to the processing engine 22 through a management channel. The processing engine 22 can also be used to configure and/or manage the software of the storage interface module 23 through the management channel, for example: The software of the storage interface module 23 or the software of the unloading storage interface module 23 or the like.

The foregoing management channel may specifically be a data or a command for transmitting configuration management, and does not require a channel for specific protocol encapsulation of data or commands during transmission.

As an optional implementation manner, the processing engine 22 performs the analysis processing on the first internal packet to obtain an analysis result. Specifically, the processing engine 22 analyzes and processes the packet header of the first internal packet to obtain an analysis result. Or the processing engine 22 analyzes and processes the payload of the first internal packet to obtain an analysis result, or the processing engine 22 analyzes and processes the header and the payload of the first internal packet. result.

As an optional implementation manner, the processing engine 22 performs an analysis process on the second internal packet to obtain an analysis result. Specifically, the processing engine 22 analyzes and processes the packet header of the second internal packet to obtain an analysis result. Or processing the message entity of the second internal message by the engine 22 The payload is analyzed to obtain an analysis result, or the processing engine 22 analyzes and processes the header and the payload of the second internal packet to obtain an analysis result. In addition, when the storage interface module 23 continuously sends a plurality of packets to the processing engine 22, the processing engine 22 may analyze only the first packet in the packets, and the result of the first packet is equal to the analysis result of the multiple packets. .

In the foregoing technical solution, the packet is sent from the external network to the disk in detail in the foregoing embodiment, and in the process, the storage control chip only needs the network interface module to decapsulate the network side protocol packet (or the network interface). The module and the processing engine cooperate to complete the decapsulation of the network side protocol packet, and the storage interface module encapsulates the internal packet for the storage side protocol. In this way, in the implementation process of sending the external network to the disk, only the network side protocol and the protocol stack of the storage side protocol are processed once. Similarly, the process of sending the message from the disk to the external network is implemented. , only need to process the protocol stack of the network side protocol and the storage side protocol once. Therefore, the embodiment can achieve the cost of reducing the storage control and the interface control circuit. FIG. 3 is a schematic structural diagram of another storage chip according to an embodiment of the present invention. As shown in FIG. 3, the method includes: a network interface module 31, a processing engine 32, a storage interface module 33, and a management interface module 34, wherein, the network For the connection between the interface module 31, the processing engine 32, and the storage interface module 33, and the specific implementation manners, refer to the embodiment shown in FIG. 1. This embodiment does not repeatedly describe this. In addition, the management receiving module 34 includes a control management interface, and the management interface module 34 is connected to an external processor through the control management interface, and the management interface module 34 is further connected to the processing engine 32 through a management channel; :

The management interface module 34 is configured to receive, by using the control management interface, a configuration management message sent by the external processor for configuring and/or managing the processing engine 32, and reporting the configuration management report by using a management channel. The text is sent to the processing engine 32.

The processing engine 32 is further configured to configure and/or manage software of the processing engine 32 in accordance with the configuration management.

Optionally, the foregoing management channel may specifically be a data or a command for transmitting configuration management, and does not require a channel for specific protocol encapsulation of data or commands during transmission.

Optionally, the foregoing control management interface may be a Gigabit Ethernet (GB) interface, a Fast Ethernet (FE) interface, a PCIE interface, or a peripheral component expansion. The Pedpherd Component Interconnect (PCI) and the like are not limited in this embodiment. The management interface module 34 is further configured to receive, by using the control management interface, a configuration management document sent by the external processor for configuring and/or managing the processing engine 32, and solution the configuration management packet. An internal message that can configure and/or manage the software of the processing engine 32 is encapsulated and sent to the processing engine 32 via a management channel. The processing engine 32 can directly configure and/or manage the software of the processing engine 32 by receiving the internal message, such as: software installation, software update, or software uninstallation. Of course, the management interface module 34 may directly send the configuration management message to the processing engine 32, and the processing engine 32 completes decapsulation of the configuration management file to obtain configuration and/or management of the processing engine 32. Internal message of the software.

In another embodiment, as shown in FIG. 4, the chip further includes: a memory management unit (MMU) controller 35, the MMU controller 35 includes a memory interface, and the MMU controller 35 passes the The memory interface is connected to the external memory, and the MMU controller 35 is further connected to the processing engine 32 through a data channel;

The MMU controller 35 is configured to store data processed by the processing engine 32 to the external memory.

Optionally, the MMU controller 35 may specifically use the external memory as a memory of the storage control chip itself, and store the program code of the software used by the MMU controller processing engine 32 in the working state of the storage control chip, or store the processing engine. The 32 processed data is stored in the above external memory.

In this way, the software used by the processing engine 32 or the data processed by the processing engine 32 can be stored in the external memory. For example, when the data buffer included in the storage control chip is not enough, the data processed by the processing engine 32 is stored in the external memory. .

In another embodiment, as shown in FIG. 5, the chip further includes: a direct memory access (DMA) controller 36, wherein the DMA controller is connected to the processing engine 32 through a control channel, respectively. And connecting to the MMU controller through a control channel; wherein:

a DMA controller 36, configured to control data transmission between the storage interface module 33 and the external memory when the external memory needs to be used, and to control the network interface module 33 Data transfer with the external memory.

Optionally, the foregoing control channel may specifically be a channel for transmitting control data or commands, and does not need to perform specific protocol encapsulation on data or commands during transmission.

The DMA controller 36 may specifically store the data of the network interface to the external memory through the processing engine 32. For example, the network interface module 31 decapsulates the network side protocol packet to obtain a packet entity of the network side protocol packet. Payload).

In this way, the external memory can be used to store the packet entity data. Since the processing engine 32 can interpret and analyze the packet according to the packet header, the packet header can be stored in the external memory, for example: Control chip's internal cache module "data cache" (refer to the implementation below). In addition, the processing engine 32 may also analyze the entire packet (including the packet header and the packet entity). For example, when reading data from the disk, the processing engine 32 first analyzes the first internal packet (for example, SCSI packet). It is learned that the first internal message (for example: SCSI message) is an instruction to read the disk, and then initiates a read request to the disk. When the disk sends back data, the processing engine 32 analyzes the first packet sent by the disk (including the packet header and the packet entity), and learns that the first packet is a data stream read from the disk, and then the subsequent packet processing engine 32 Instead of reanalysis, the DMA controller 36 is enabled to transfer the messages sent by the disk to the external memory, and the processing engine 32 notifies the network interface module 31 to retrieve the message data from the external memory. In this way, the processing engine 32 saves the workload of analyzing each message and improves the processing efficiency.

In another embodiment, as shown in FIG. 6, the chip further includes: a data buffer 37, wherein the data cache 37 is connected to the processing engine 32 through a data channel;

The data cache 37 is configured to cache program code or message information processed by the processing engine 32;

The processing engine 32 is further configured to invoke the program code of the data cache buffer to execute a processing operation processing engine 32 for the message.

The data cache 37 may specifically be a software program code for storing the storage control chip in the working state of the storage control chip, and a message header information that is removed when the processing engine 32 decapsulates the packet. Of course, when the network interface module 31 and the storage interface module 33 perform the decapsulation processing on the packet, the removed header information may also be stored in the data cache by the processing engine 32.

In another embodiment, as shown in FIG. 7, the chip further includes: a flash (Flash) interface The port module 38, the port of the flash interface module 38 is connected to an external flash chip, and the other end of the flash interface module 38 is connected to the processing engine 32;

The Flash interface module 38 is configured to store program code of software used by the chip processing engine 32 to the external flash chip in a powered down state.

In this way, the program code of the software used by the memory control chip (for example, the software used by the processing engine 32, the network interface module 31, and the memory interface module 33) is not lost in the power-off state.

The following takes the first internal packet and the second internal packet as SCSI packets as an example. When transmitting the first internal packet and the second internal packet, the protocol stack processed by the control chip is stored, please refer to the figure. 8. When the network side interface is an Eth interface, the network side protocol includes the 801Eth, IP, TCP, and iSCSI protocols shown in FIG. 8. The network interface module 31 can independently perform the decapsulation or encapsulation of the protocol shown in 801, or the network. The interface module 31 and the processing engine 32 cooperate with the decapsulation or encapsulation of the protocol shown in 801. For the implementation of the cooperation, refer to the foregoing implementation manner. When the network side interface is an FC interface, the network side protocol includes the 802FC protocol shown in FIG. 8, and the network interface module 31 can complete the decapsulation or encapsulation of the protocol shown in 802. When the network side interface is an FCoE interface, the network side protocol includes the 803Eth and FCoE protocols shown in FIG. 8, and the network interface module 31 can complete the decapsulation or encapsulation of the protocol shown in 803, or the network interface module 31 and the processing engine 32 cooperate. Complete the decapsulation or encapsulation of the protocol shown in 803. When the network side interface is an IB interface, the network side protocol includes the 804IB protocol shown in FIG. 8, and the network interface module 31 can complete the decapsulation or encapsulation of the protocol shown in 804. When the storage side interface is a SAS or SATA interface, the storage side protocol includes the 805SAS or SATA protocol shown in FIG. 8, and the storage interface module 33 can complete the decapsulation and encapsulation of the protocol shown in 805. When the storage side interface is an SSD interface, the storage side protocol includes the 806 NAND protocol shown in FIG. 8, and the storage interface module 33 can complete the decapsulation and encapsulation of the protocol shown in 806.

In the above technical solution, various alternative embodiments are introduced on the basis of the above embodiments, and the cost of the storage control and the interface control circuit can be reduced. FIG. 9 is a schematic flowchart of a disk packet transmission method according to an embodiment of the present invention. As shown in FIG. 9, the method includes the following steps: 901. The storage control chip receives the first protocol packet that is sent by the first device, and includes the first protocol packet, and performs the first protocol packet decapsulation process on the first protocol packet to obtain the internal packet.

902. The storage control chip analyzes and processes the internal packet to obtain an analysis result.

903. When the analysis result indicates that the internal packet is a packet for sending to the second device, the storage control chip performs a second protocol encapsulation process on the internal packet to obtain a second protocol packet, and Sending the second protocol message to the second device; wherein:

The first device is a network device connected to the first end of the storage control chip, and the second device is a magnetic disk connected to the second end of the storage control chip; or, the first device is The second device connected to the second end of the storage control chip, the second device is connected to the first end of the storage control chip.

Optionally, the foregoing first protocol may be a network side protocol, and the second protocol may be a storage side protocol. The first protocol may be specifically one of a storage side protocol, and the second protocol may be a network side protocol. .

It should be noted that the method may be specifically applied to the storage control chip introduced in the above embodiment, where the network device may specifically be an external network of the storage control chip introduced in the above embodiment.

In another embodiment, step 901 may specifically include:

The storage control chip receives the network side protocol packet that is sent by the network device and includes the first internal packet, and performs network side protocol decapsulation processing on the network side protocol packet to obtain the first internal packet.

The step may be specifically implemented by using the network interface module and the processing engine configuration introduced in the foregoing embodiments. The specific implementation process can refer to the above embodiment.

Optionally, step 902 may specifically include:

The storage control chip analyzes the first internal message to obtain an analysis result.

Optionally, the step 903 may specifically include:

When the analysis result indicates that the first internal packet is a packet for sending to a disk, the storage control chip performs a storage side protocol encapsulation process on the first internal packet to obtain a storage side protocol packet, and The storage side protocol packet is sent to the disk. The step may be specifically implemented by using the storage interface module and the processing engine configuration introduced in the foregoing embodiments. The specific implementation process can refer to the above embodiment.

Optionally, the first internal packet may be a packet that is written to the disk. In this embodiment, a message transmission process in which a storage control chip writes to a disk is introduced, and the process can reduce the cost of the storage control and the interface control circuit.

In another embodiment, step 901 may specifically include:

The storage control chip receives the storage side protocol packet that is sent by the disk and includes the second internal packet, and performs a storage side protocol decapsulation process on the storage side protocol packet to obtain the second internal packet.

The step may be specifically implemented by using the storage interface module and the processing engine configuration introduced in the foregoing embodiments. The specific implementation process can refer to the above embodiment.

Optionally, step 902 may specifically include:

The storage control chip analyzes and processes the second internal packet to obtain an analysis result.

Step 903 specifically includes:

When the analysis result indicates that the second internal packet is a packet for sending to an external network, the storage control chip performs network side protocol encapsulation processing on the second target packet to obtain a network side protocol. And send the network side protocol to the external network.

Optionally, the foregoing second internal packet may be a packet that performs a read operation on the disk. In this embodiment, in the foregoing technical solution, the storage control chip receives the first protocol packet that is sent by the first device and includes the internal packet, and performs decapsulation processing on the first protocol packet by using the first protocol packet. An internal message; the storage control chip analyzes the internal message to obtain an analysis result; and when the analysis result indicates that the internal message is a message for sending to the second device, the storage control chip pairs The internal packet performs a second protocol encapsulation process to obtain a second protocol packet, and sends the second protocol packet to the second device. Thus, the entire storage control chip only needs to process the protocol stack of the first protocol and the second protocol. Compared with the prior art, the storage control and the interface control circuit pass through the PCIE interface, that is, the storage control and the interface control circuit in the prior art need to be processed at least. PCIE protocol, network side protocol (for example: Eth protocol) and storage side protocol The protocol stack (for example: SAS protocol), this embodiment can reduce the cost of the storage control and interface control circuit. The following specific application examples are given as examples.

The structure of the application scenario is as shown in FIG. 10, and the storage control chip 1011 is configured on the storage board 101 of the server. The storage side interface is SAS, the internal disk 1012 is connected, the network side interface is an Eth interface, and the Eth switch connected to the switch board 102 is connected. 1021. The processor 1031 of the server board 103 accesses the storage board 101 by connecting the Eth switch 1021 of the switch board through the Eth network card 1032. The server system runs the iSCSI protocol data. In addition, the memory board 101 may further include a processor 1013. For example, the processor 1013 is configured to configure and manage software for storing the control chip. The operation of the disk 1012 on the storage board 101 is described as an example. The flow of the read operation may be as shown in FIG. 11. The process may include the following steps:

1101. The server board encapsulates the iSCSI packet in the Eth packet and sends it to the Eth switch of the switch board through the NIC.

The Eth switch of the switch board forwards the Eth packet sent by the server board NIC to the storage board.

1103. The network side interface of the storage control chip of the storage board receives the Eth packet, and the network interface module decapsulates the Eth packet to remove the Eth packet header, and transmits the processed IP packet to the processing engine.

1104. The network interface module decapsulates the IP packet, removes the IP packet header and the TCP packet header, and transmits the processed iSCSI packet to the processing engine.

1105. The network interface module decapsulates the iSCSI packet to remove the iSCSI packet header, and transmits the processed SCSI packet to the processing engine.

It should be noted that the protocol offloading of the IP and TCP and the protocol offloading of the iSCSI are optional supported functions. The embodiment of the present invention does not limit this, that is, the steps 1104 and 1105 may be performed by the network interface module, or may be The processing engine may perform the above steps 1104 and 1105. In this embodiment, the network interface module supports the protocol offload function of IP, TCP, and iSCSI as an example. After the protocol is uninstalled, the SCSI packet is processed.

1106, the processing engine receives the SCSI packet sent by the network interface module, when interpreted The SCSI packet is a command request for reading a disk, and the SCSI packet is transmitted to the storage interface module.

1107. The storage interface module receives the SCSI packet, and obtains the SAS packet from the SAS packet header of the SCSI package, and sends the SAS packet to the disk.

1108. After receiving the SAS packet, the controller of the disk analyzes the SAS packet to obtain a read command, and reads the SAS packet including the response data, and returns the SAS packet to the storage interface module.

1109. The storage interface module receives the SAS packet sent by the disk, decapsulates the SAS packet, removes the SAS packet header, and transmits the processed SCSI packet to the processing engine.

1110. The processing engine receives the SCSI packet sent by the storage interface module, and if the SCSI packet is the read disk data, the SCSI packet is transmitted to the network interface module.

The network interface module receives the SCSI packet sent by the processing engine, and encapsulates the iSCSI packet header and the TCP packet according to the previously recorded network interface information (for example, including the TCP port number, the IP address, the MAC address, and the like). The packet header, the IP packet header, and the Eth packet header are sent to the switch board.

1112. The Eth switch of the switch board forwards the Eth packet sent by the storage board storage control chip to the server board.

1113. The server board network card receives the Eth message sent by the switch board, and processes the packet to the processor through the PCIE interface.

A person skilled in the art can understand that all or part of the process of implementing the above embodiment method can be completed by a computer program to instruct related hardware, and the program can be stored in a computer readable storage medium. In execution, the flow of an embodiment of the methods as described above may be included. The storage medium may be a magnetic disk, an optical disk, a read-only memory (ROM), or a random access memory (RAM).

The above is only the preferred embodiment of the present invention, and the scope of the present invention is not limited thereto, and the equivalent changes made in the claims of the present invention are still within the scope of the present invention.

Claims

Rights request

1. A storage control chip, characterized in that it includes: a network interface module, a processing engine and a storage interface module, wherein the network interface module includes a network side interface, and the network interface module communicates with the network interface through the network side interface. The chip is connected to an external network, the network interface module is connected to the processing engine through a data channel, the processing engine is also connected to the storage interface module through a data channel, the storage interface module includes a storage side interface, The storage interface module is connected to the disk through the storage side interface; wherein:

The network interface module is used to transmit messages between the external network and the processing engine through network-side protocol processing;

The processing engine is used to analyze the messages transmitted by the network interface module, or analyze the messages transmitted by the storage interface module; and represent the analysis results as messages sent to the disk through the data channel. Describe the storage interface module, and represent the analysis results as messages for sending to the external network and send them to the network interface module through the data channel;

The storage interface module is used to transmit messages between the disk and the processing engine through storage-side protocol processing.

2. The chip according to claim 1, wherein the network interface module is further configured to receive a network-side protocol message including a first internal message sent by the external network through the network-side interface. , decapsulate the network side protocol message to obtain a first target message including the first internal message, and then send the first target message to the processing engine through a data channel;

The processing engine is further configured to obtain the first internal message according to the first target message, analyze and process the first internal message to obtain an analysis result, and when the analysis result indicates that the first internal message When the message is a message sent to a disk, the first internal message is sent to the storage interface module through a data channel;

The storage interface module is further configured to perform storage-side protocol encapsulation processing on the first internal message to obtain a storage-side protocol message, and send the storage-side protocol message to the disk through the storage-side interface.

3. The chip according to claim 1 or 2, wherein the storage interface module is further configured to receive a storage-side protocol message including a second internal message sent by the disk through the storage-side interface, and decapsulating the storage-side protocol message to obtain the second internal message, and sending the second internal message to the processing engine through a data channel;

The processing engine is also configured to analyze and process the second internal message to obtain an analysis result. When the analysis result indicates that the second internal message is a message for sending to an external network, send the second internal message to the external network through the data channel. The network interface module sends a second target message including the second internal message;

The network interface module is also configured to encapsulate the second target message to obtain a network-side protocol message, and send the network-side protocol message to an external network through the network-side interface.

4. The chip of claim 2, wherein the network interface module is configured to receive a network-side protocol message including a first internal message sent by an external network through the network-side interface, and process the The network side protocol message is subjected to network side protocol decapsulation processing to obtain the first internal message, and then the first internal message is sent to the processing engine through a data channel; or the network interface module is used when all When the network side protocol message includes multi-layer protocol encapsulation, the network side protocol message including the first internal message sent by the external network is received through the network side interface, and the first layer of the network side protocol message is processed. The decapsulation process of the protocol obtains the target message including the first internal message, and then sends the target message to the processing engine through the data channel; the processing engine is used to process the network side protocol message When multi-layer protocol encapsulation is included, the target message is decapsulated to obtain the first internal message, the first internal message is analyzed and processed to obtain an analysis result, and when the analysis result indicates that the first internal message is When the internal message is a message for reading a disk, the first internal message is sent to the storage interface module through a data channel.

5. The chip according to claim 3, wherein the processing engine is used to analyze and process the second internal message to obtain an analysis result, and when the analysis result indicates that the second internal message is When sending a message to the external network, the network interface module is block and send the second internal message; or

The processing engine is configured to analyze and process the second internal message to obtain an analysis result when the network side protocol message includes multi-layer protocol encapsulation. When the analysis result indicates that the second internal message is When sending a message to an external network, the second internal message is encapsulated to obtain a second target message including the second internal message, and the second target message is sent to the network interface module through a data channel. Second destination message.

6. The chip according to claim 1 or 2, characterized in that, the chip further includes: a management interface module, wherein the management receiving module includes a control management interface, and the management interface module passes the control management interface Connected to the external processor of the chip, the management interface module is also connected to the processing engine through a management channel; wherein:

The management interface module is configured to receive a configuration management message sent by the external processor for configuring and/or managing the processing engine through the control management interface, and send the configuration management message through a management channel. to said processing engine;

The processing engine is further configured to configure and/or manage software of the processing engine according to the configuration management message.

7. The chip according to claim 1 or 2, characterized in that, the chip further includes: a memory management unit MMU controller, the MMU controller includes a memory interface, and the MMU controller communicates with the memory interface through the memory interface. External memory connection, the MMU controller is also connected to the processing engine through a data channel; where:

The MMU controller is used to store the data processed by the processing engine into the external memory.

8. The chip according to claim 7, wherein the chip further includes: a direct memory access DMA controller, the DMA controller is connected to the processing engine through a control channel, and is connected to the processing engine through a control channel. The MMU controller connection; where:

The DMA controller is used to control data transmission between the storage interface module and the external memory when the external memory needs to be used, and to control the network interface module and the external memory. Describes data transfer between external memories.

9. The chip according to claim 1 or 2, characterized in that, the chip further includes: a data cache, the data cache is connected to the processing engine through a data channel; wherein:

The data cache is used to cache program codes or message information processed by the processing engine; the processing engine is also used to call the program code cached in the data cache to perform processing operations on messages.

10. The chip according to claim 1 or 2, characterized in that, the chip further includes: a Flash interface module, one port of the Flash interface module is connected to an external Flash chip, and the other end of the Flash interface module is connected to an external Flash chip. the processing engine connection; where:

The Flash interface module is used to store the program code of the software used by the chip to the external Flash chip in the power-off state.

11. A disk message transmission method, characterized by including:

The storage control chip receives a first protocol message including an internal message sent by the first device, and performs a first protocol message decapsulation process on the first protocol message to obtain the internal message; the storage control chip The internal message is analyzed and processed to obtain an analysis result; when the analysis result indicates that the internal message is a message sent to the second device, the storage control chip performs a third processing on the internal message. The second protocol encapsulation process is performed to obtain a second protocol message, and the second protocol message is sent to the second device; wherein:

The first device is a network device connected to the first end of the storage control chip, and the second device is a disk connected to the second end of the storage control chip; or, the first device is a network device connected to the first end of the storage control chip. The second end of the storage control chip is connected to a disk, and the second device is a network device connected to the first end of the storage control chip.

12. The method of claim 11, wherein the storage control chip receives a first protocol message including an internal message sent by the first device, and performs a first protocol on the first protocol message. The internal message is obtained through message decapsulation processing, including: The storage control chip receives a network-side protocol message including a first internal message sent by the network device, and performs network-side protocol decapsulation processing on the network-side protocol message to obtain the first internal message. ;

When the analysis result indicates that the internal message is a message sent to the second device, the storage control chip performs a second protocol encapsulation process on the internal message to obtain a second protocol message, and sending the second protocol message to the second device, including:

When the analysis result indicates that the first internal message is a message for sending to a disk, the storage control chip performs storage-side protocol encapsulation processing on the first internal message to obtain a storage-side protocol message, and sends the storage side protocol message to the disk.

13. The method of claim 11, wherein the storage control chip receives a first protocol message including an internal message sent by the first device, and performs a first protocol on the first protocol message. The internal message is obtained through message decapsulation processing, including:

The storage control chip receives the storage-side protocol message including the second internal message sent by the disk, and performs storage-side protocol decapsulation processing on the storage-side protocol message to obtain the second internal message;

The storage control chip analyzes and processes the second internal message to obtain an analysis result; when the analysis result indicates that the internal message is a message for sending to the second device, the storage control chip The chip performs a second protocol encapsulation process on the internal message to obtain a second protocol message, and sends the second protocol message to the second device, including:

When the analysis result indicates that the second internal message is a message for sending to an external network, the storage control chip performs network-side protocol encapsulation processing on the second target message to obtain a network-side protocol message. , and send the network side protocol message to the network device.