WO2015022784A1 - Electronic component and method of manufacturing same - Google Patents

Electronic component and method of manufacturing same Download PDF

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Publication number
WO2015022784A1
WO2015022784A1 PCT/JP2014/054540 JP2014054540W WO2015022784A1 WO 2015022784 A1 WO2015022784 A1 WO 2015022784A1 JP 2014054540 W JP2014054540 W JP 2014054540W WO 2015022784 A1 WO2015022784 A1 WO 2015022784A1
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Prior art keywords
metal layer
electronic component
electrode
mother substrate
ceramic
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PCT/JP2014/054540
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French (fr)
Japanese (ja)
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悟史 今村
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株式会社村田製作所
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Publication of WO2015022784A1 publication Critical patent/WO2015022784A1/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01CRESISTORS
    • H01C17/00Apparatus or processes specially adapted for manufacturing resistors
    • H01C17/06Apparatus or processes specially adapted for manufacturing resistors adapted for coating resistive material on a base
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01CRESISTORS
    • H01C17/00Apparatus or processes specially adapted for manufacturing resistors
    • H01C17/28Apparatus or processes specially adapted for manufacturing resistors adapted for applying terminals
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01CRESISTORS
    • H01C7/00Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material
    • H01C7/008Thermistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01CRESISTORS
    • H01C7/00Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material
    • H01C7/02Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material having positive temperature coefficient
    • H01C7/021Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material having positive temperature coefficient formed as one or more layers or coatings
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01CRESISTORS
    • H01C7/00Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material
    • H01C7/04Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material having negative temperature coefficient
    • H01C7/041Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material having negative temperature coefficient formed as one or more layers or coatings

Definitions

  • the present invention relates to an electronic component including a ceramic substrate and a bonding electrode formed on the ceramic substrate, and a manufacturing method thereof.
  • this type of electronic component for example, there is a thermistor described in Patent Document 1.
  • This thermistor includes a ceramic base having a positive temperature coefficient and an electrode deposited outside the entire upper surface of the ceramic base. After the dicing, the electronic component is bonded to a substrate on which the electronic component is to be mounted using a bonding apparatus. Hereinafter, the operation of the bonding apparatus will be described in more detail.
  • the bonding apparatus First, in the bonding apparatus, an image when an electronic component at a predetermined position is viewed from above is registered in advance. After the bottom surface of the electronic component is fixed on the mounting substrate, the bonding apparatus takes an image of the electronic component on the mounting substrate from above, and the mounting position of the electronic component is determined based on whether the captured image matches the registered image. Check if it is off. If there is no misalignment, the bonding apparatus secures one end of the bonding wire to the electrode on the upper surface of the electronic component and the other end to the electrode on the mounting substrate.
  • electrodes made of a plurality of metal layers are formed over the entire upper surface of the ceramic substrate.
  • gold is used for the uppermost layer of the electrode from the viewpoint of stability and the like.
  • the electrode may not have the shape as designed during dicing. Specifically, the top surface shape of the electronic component may change due to the occurrence of burrs (metal residue). Due to such deformation, the bonding apparatus may not perform matching correctly.
  • an object of the present invention is to provide an electronic component that can be more accurately matched by a bonding apparatus and a method for manufacturing the same.
  • a first aspect of the present invention is an electronic component that is included in the first surface in a plan view from a first surface and a predetermined first direction, and the first surface.
  • a ceramic substrate including a second surface protruding from the electrode, and a wire bonding electrode formed on the second surface and including at least one metal layer, wherein the first surface of the ceramic substrate includes the first surface, It is visible in a plan view from the first direction.
  • a second aspect of the present invention is a method for manufacturing an electronic component, comprising: a first step of creating a mother substrate made of ceramic; and a method of forming at least one metal layer on at least one surface of the mother substrate. Two steps and a grid-shaped cut having a predetermined depth with respect to the mother substrate on which the metal layer is formed with a first blade having a predetermined width from a first direction substantially perpendicular to the surface of the mother substrate. A third step of forming, and a second blade having a width narrower than that of the first blade is inserted from the first direction with respect to the grid-like cut formed in the third step, and the mother substrate is all cut. And four steps.
  • the bonding apparatus can perform pattern matching more accurately.
  • FIG. 1 is a perspective view of a finished product of an electronic component 1.
  • FIG. 2 is a top view and a longitudinal sectional view of the electronic component 1.
  • FIG. It is the top view and front view of a ceramic base
  • FIG. 1 is a diagram showing a detailed structure of a first electrode and a second electrode.
  • the T-axis direction indicates the direction from the bottom to the top of the electronic component 1
  • the L-axis direction indicates the direction from the left to the right of the electronic component 1
  • the W-axis direction indicates the direction from the front to the back of the electronic component 1.
  • the T-axis direction, the L-axis direction, and the W-axis direction are examples of the first direction, the second direction, and the third direction, and T, L, and W are given as reference numerals for convenience of the following description.
  • FIG. 1 is a perspective view of a finished product of the electronic component 1.
  • FIG. 2 is a plan view of the electronic component 1 from the first direction T (that is, a top view) and a vertical cross section along the one-dot chain line AA ′ in FIG.
  • FIG. 5 is a longitudinal sectional view seen from the third direction W).
  • an electronic component 1 is, for example, a PTC thermistor having a positive temperature coefficient, and includes at least a ceramic substrate 2, a first electrode 3 for wire bonding, and a second electrode which is a bottom electrode. 4 is provided.
  • the base 2 includes a first surface S1, a second surface S2, and a third surface S3 that are substantially orthogonal to the first direction T, as shown in FIG.
  • the surfaces S1 to S3 form a rectangular outline in a plan view from the first direction T (that is, a top view).
  • the surface S3 is the bottom surface of the base 2.
  • the surface S2 is the uppermost surface of the base 2 and protrudes from the surface S1 that is in the middle of both surfaces S2 and S3. In other words, the surface S2 is in the first direction T with respect to the surface S3, and the surface S1 is between both surfaces S2 and S3 with respect to the position in the first direction T.
  • the surface S2 is included in the surface S1 in a plan view from the first direction T.
  • the gravity centers of the surfaces S1 and S2 are G1 and G2
  • the outlines of the surfaces S1 and S3 overlap each other when viewed from above.
  • the above surface S2 is connected to the surface S1 by four side surfaces, and the surface S1 is connected to the surface S3 by another four side surfaces.
  • the dimension along the second direction L (hereinafter referred to as L1) is 290 ⁇ 25 [ ⁇ m], and the dimension along the third direction W (hereinafter referred to as W1) is also 290 ⁇ 25 [ ⁇ m]. It is.
  • the L dimension and W dimension (hereinafter referred to as L2 and W2) of the surface S2 are 230 ⁇ 25 [ ⁇ m].
  • the dimension (henceforth T1) along the 1st direction T of the electronic component 1 is 125 +/- 15 [micrometers].
  • the design target value is described before ⁇ , and tolerance (allowable error range) is described after ⁇ .
  • the dimensions of the substrate 2 are not limited to the above, and other sizes may be used.
  • the ceramic substrate 2 has a positive temperature characteristic, and is made of, for example, a ceramic material in which a predetermined additive is added to BaTiO 3 (barium titanate).
  • the additive is a rare earth, typically Sm (samarium).
  • Nd (neodymium), La (lanthanum), or the like can be used as an additive.
  • the base 2 as described above may have a single-layer structure or a laminate composed of a plurality of ceramic sheets.
  • the electrode 3 is used for wire bonding as described above, and is joined to the surface S2 so as to cover the entire surface S2.
  • the electrode 3 includes a first metal layer 31, a second metal layer 32, and a third metal layer 33 as shown in FIG. These metal layers 31, 32, and 33 are laminated from the surface S ⁇ b> 2 toward the first direction T in this order of description. Since the metal layer 31 is in direct contact with the base 2, the metal layer 31 contains a metal (for example, zinc (Zn)) that can make ohmic contact with the base 2.
  • the metal layer 32 contains a metal (for example, silver (Ag)) that is cheaper and more easily oxidized than the metal layer 33 as a main component, and the metal layer 33 is a metal that is stable even in a low temperature / high temperature environment (for example, , Gold (Au)).
  • a metal for example, silver (Ag)
  • Au Gold
  • the electronic component 1 in order to reduce the height of the electronic component 1, it is necessary to suppress the T dimension of the electrode 3 as much as possible.
  • the electronic component 1 is generally desired to be low cost.
  • Ag and Au excellent in spreadability are used for the metal layers 32 and 33 in this embodiment.
  • the deterioration of the electrode 3 is suppressed by covering Ag which is easily oxidized with Au.
  • the thickness of the metal layer 31 is t1
  • the thickness of the metal layer 32 is t2
  • the thickness of the metal layer 33 is t3.
  • the electrode 3 satisfies 0.02 ⁇ t1 / t2 ⁇ 0.75 and 0.2 ⁇ t3 / t2 ⁇ 1.0 in order to satisfy the requirements such as the above-described reduction in height, cost, and quality.
  • T2 is preferably 1.0 [ ⁇ m] or less.
  • the electrode 4 is a bottom electrode joined to the surface S3 so as to cover the entire surface S3.
  • an electrode 4 having a stacked structure similar to that of the electrode 3 is illustrated.
  • the electrode 4 is not limited to this, and may have a structure different from that of the electrode 3.
  • the manufacturing method of the electronic component 1 generally includes the following steps (A) to (D).
  • a BaTiO 3 ceramic powder capable of obtaining desired characteristics is press-molded to a size of, for example, 35 [mm] ⁇ 25 [mm], thereby obtaining a molded body. Thereafter, degreasing and firing are performed on the molded body. Thereby, a mother substrate to be the base 2 after completion is obtained. The thickness of the mother substrate is adjusted by lapping or the like so that the T dimension of the finished electronic component 1 becomes 125 ⁇ 15 [ ⁇ m].
  • a layer mainly composed of Zn (hereinafter referred to as a Zn layer) is formed on, for example, vapor deposition on both surfaces of the mother substrate so as to obtain an ohmic junction with the ceramic mother substrate.
  • a Zn layer to be the first metal layer 31 after completion of the electronic component 1 and a Zn layer to be the lowermost layer of the electrode 4 are formed on the mother substrate.
  • a layer containing Ag as a main component (hereinafter referred to as Ag layer) is formed by vapor deposition, for example.
  • Ag layer a layer containing Ag as a main component
  • an Ag layer to be the second metal layer 32 after completion and an Ag layer to be the second layer of the electrode 4 are formed on the mother substrate.
  • an Au layer is formed by vapor deposition, for example, on both Zn layers.
  • an Au layer to be the third metal layer 33 after completion and an Au layer to be the third layer of the electrode 4 are formed on the mother substrate.
  • the mother substrate obtained in the step (B) is half-cut by a dicer.
  • a blade or a dicing saw
  • the dicer is half-cut using this blade to form a grid-like cut on the side of the mother substrate on which the metal layer to be the electrode 3 is formed.
  • the cut amount (that is, the depth in the direction opposite to the first direction T) is not particularly limited, but is, for example, about 20 [ ⁇ m].
  • the cutting pitch is about 230 ⁇ 25 [ ⁇ m], similar to the L dimension and W dimension of the surface S2.
  • step (D) The mother substrate obtained in step (C) is fully cut by a dicer. Specifically, a blade having a relatively narrow blade width (for example, about 60 [ ⁇ m]) is attached to the dicer. The dicer uses this blade to cut the mother substrate along the center in the width direction of the grid-like cut formed in the step (C).
  • a blade having a relatively narrow blade width for example, about 60 [ ⁇ m]
  • the electronic component 1 is completed through the above steps (A) to (D).
  • the outline of the second surface S2 is included in the outline of the first surface S1 and protrudes from the first surface S1 when viewed from above. Since the electrode 3 is formed only on the second surface S2 as described above, when viewed from above, the four sides of the electrode 3 are surrounded by a ceramic portion that is less malleable than metal and can be visually recognized. ing. Therefore, when the bonding apparatus photographs the electronic component 1 from above, the deformation amount of the outline of the electronic component 1 in the photographed image is extremely small, and as a result, the bonding apparatus can perform pattern matching more accurately. It becomes.
  • the present inventor produced three types of electronic components (hereinafter referred to as samples No. 1 to No. 3) having different structures of the electrodes 3.
  • the inventor of the present invention has made these sample nos. 1-No.
  • an electronic component hereinafter referred to as a conventional product on which the electrode of Patent Document 1 was formed was produced.
  • sample no. 1 the thickness of the metal layer 31 in the first direction T is 0.15 [ ⁇ m]
  • the thickness of the metal layer 32 is 0.2 [ ⁇ m]
  • the thickness of the metal layer 33 is 0.2 mm. 2 [ ⁇ m].
  • Sample No. 2 no. See Table 1 for details of the three electrodes 3.
  • the inventor of the present invention has a sample no. 1-No. 3 and the conventional product were evaluated for wire bondability, quality (resistance to deterioration over time), and cost.
  • the electronic component 1 demonstrated as a PTC thermistor.
  • the electronic component 1 may be an NTC thermistor having a negative temperature coefficient.
  • the electronic component and the manufacturing method thereof according to the present invention are suitable for NTC thermistors and PTC thermistors because the bonding apparatus can perform pattern matching more accurately.

Abstract

An electronic component (1) is provided with: a ceramic base (2) including a first surface and a second surface, such that said second surface, in plan view from a predetermined first direction (T), is enveloped in the first surface and projects from the first surface; and a wire-bonding-use first electrode (3), which is formed upon the second surface and includes at least one metal layer. The first surface of the ceramic base (2) is visible in plan view from the first direction (T). As a result, it is possible for a bonding device to more accurately perform matching.

Description

電子部品およびその製造方法Electronic component and manufacturing method thereof
 本発明は、セラミック基体と、セラミック基体に形成されたボンディング用の電極と、を備えた電子部品、およびその製造方法に関する。 The present invention relates to an electronic component including a ceramic substrate and a bonding electrode formed on the ceramic substrate, and a manufacturing method thereof.
 従来、この種の電子部品としては、例えば、特許文献1に記載のようなサーミスタがある。このサーミスタは、正の温度係数を有するセラミック基体と、このセラミック基体の上面全域の外側に堆積された電極と、を備えている。電子部品は、ダイシング後、この電子部品を実装すべき基板上にボンディング装置を用いてボンディングされる。以下、ボンディング装置の動作をより詳細に説明する。 Conventionally, as this type of electronic component, for example, there is a thermistor described in Patent Document 1. This thermistor includes a ceramic base having a positive temperature coefficient and an electrode deposited outside the entire upper surface of the ceramic base. After the dicing, the electronic component is bonded to a substrate on which the electronic component is to be mounted using a bonding apparatus. Hereinafter, the operation of the bonding apparatus will be described in more detail.
 まず、ボンディング装置には、所定位置にある電子部品を上方から視た時の画像が予め登録される。電子部品の底面が実装基板上に固定された後、ボンディング装置は、実装基板上の電子部品を上方から撮影し、撮影画像が登録画像とマッチングするか否かに基づき、電子部品の実装位置がずれているか否かをチェックする。位置ずれがなければ、ボンディング装置は、ボンディングワイヤの一方端を電子部品上面の電極に固着し、その他端を実装基板上の電極に固着する。 First, in the bonding apparatus, an image when an electronic component at a predetermined position is viewed from above is registered in advance. After the bottom surface of the electronic component is fixed on the mounting substrate, the bonding apparatus takes an image of the electronic component on the mounting substrate from above, and the mounting position of the electronic component is determined based on whether the captured image matches the registered image. Check if it is off. If there is no misalignment, the bonding apparatus secures one end of the bonding wire to the electrode on the upper surface of the electronic component and the other end to the electrode on the mounting substrate.
特開2002-305102号公報JP 2002-305102 A
 上記電子部品では、複数の金属層からなる電極がセラミック基体の上面全域に形成される。ここで、電極の最上層には、安定性等の観点から金が使用される。しかし、金属の展延性により、ダイシング時に電極が設計通りの形状にならない場合がある。具体的には、バリ(金属の残材部分)が生じることで、電子部品の上面形状が変わってしまうことがある。このような変形により、ボンディング装置が正しくマッチングを行えない場合があった。 In the above-described electronic component, electrodes made of a plurality of metal layers are formed over the entire upper surface of the ceramic substrate. Here, gold is used for the uppermost layer of the electrode from the viewpoint of stability and the like. However, due to the spreadability of the metal, the electrode may not have the shape as designed during dicing. Specifically, the top surface shape of the electronic component may change due to the occurrence of burrs (metal residue). Due to such deformation, the bonding apparatus may not perform matching correctly.
 それゆえに、本発明の目的は、ボンディング装置がより正確にマッチングを行うことが可能な電子部品およびその製造方法を提供することである。 Therefore, an object of the present invention is to provide an electronic component that can be more accurately matched by a bonding apparatus and a method for manufacturing the same.
 上記目的を達成するために、本発明の第一局面は、電子部品であって、第一面と、所定の第一方向からの平面視で前記第一面に内包されると共に前記第一面から突出する第二面と、を含むセラミック基体と、前記第二面上に形成され、少なくとも一つの金属層を含むワイヤボンディング用電極と、を備え、前記セラミック基体の前記第一面は、前記第一方向からの平面視で視認可能となっている。 In order to achieve the above object, a first aspect of the present invention is an electronic component that is included in the first surface in a plan view from a first surface and a predetermined first direction, and the first surface. A ceramic substrate including a second surface protruding from the electrode, and a wire bonding electrode formed on the second surface and including at least one metal layer, wherein the first surface of the ceramic substrate includes the first surface, It is visible in a plan view from the first direction.
 本発明の第二局面は、電子部品の製造方法であって、セラミックからなるマザー基板を作成する第一工程と、前記マザー基板が有する少なくとも一つの面に、少なくとも一つの金属層を形成する第二工程と、前記マザー基板の面に対して略垂直な第一方向から、所定幅の第一ブレードで、前記金属層が形成された前記マザー基板に対し所定深さを有する格子状の切り込みを形成する第三工程と、前記第三工程で形成された格子状の切り込みに対して、前記第一ブレードよりも狭い幅の第二ブレードを前記第一方向から入れて前記マザー基板を全て切り込む第四工程と、を備える。 A second aspect of the present invention is a method for manufacturing an electronic component, comprising: a first step of creating a mother substrate made of ceramic; and a method of forming at least one metal layer on at least one surface of the mother substrate. Two steps and a grid-shaped cut having a predetermined depth with respect to the mother substrate on which the metal layer is formed with a first blade having a predetermined width from a first direction substantially perpendicular to the surface of the mother substrate. A third step of forming, and a second blade having a width narrower than that of the first blade is inserted from the first direction with respect to the grid-like cut formed in the third step, and the mother substrate is all cut. And four steps.
 上記各局面によれば、電子部品を第一方向から視た時の外形線が、金属よりも展延性の小さいセラミックで構成されるため、外形線の変形が少なくなる。これにより、ボンディング装置がより正確にパターンマッチングを行うことが可能となる。 According to each of the above aspects, since the outline when the electronic component is viewed from the first direction is made of ceramic having a smaller extensibility than metal, the deformation of the outline is reduced. As a result, the bonding apparatus can perform pattern matching more accurately.
電子部品1の完成品の斜視図である。1 is a perspective view of a finished product of an electronic component 1. FIG. 電子部品1の上面図および縦断面図である。2 is a top view and a longitudinal sectional view of the electronic component 1. FIG. 図1に示すセラミック基体の上面図および正面図である。It is the top view and front view of a ceramic base | substrate shown in FIG. 図1に第一電極および第二電極の詳細な構造を示す図である。FIG. 1 is a diagram showing a detailed structure of a first electrode and a second electrode.
《実施形態》
 以下、各図を参照して、本発明の一実施形態に係る電子部品およびその製造方法について詳細に説明する。
<Embodiment>
Hereinafter, with reference to each figure, the electronic component which concerns on one Embodiment of this invention, and its manufacturing method are demonstrated in detail.
 まず、いくつかの図面のL軸、W軸およびT軸について説明する。T軸方向は電子部品1の下から上に、L軸方向は電子部品1の左から右に、W軸方向は電子部品1の前から後ろに向かう方向を示す。また、T軸方向、L軸方向、W軸方向は、第一方向、第二方向および第三方向の一例であり、以下の説明の便宜上、参照符号としてのT,L,Wが付けられる。 First, the L axis, W axis, and T axis of several drawings will be described. The T-axis direction indicates the direction from the bottom to the top of the electronic component 1, the L-axis direction indicates the direction from the left to the right of the electronic component 1, and the W-axis direction indicates the direction from the front to the back of the electronic component 1. Further, the T-axis direction, the L-axis direction, and the W-axis direction are examples of the first direction, the second direction, and the third direction, and T, L, and W are given as reference numerals for convenience of the following description.
《実施形態》
 図1は、電子部品1の完成品の斜視図である。また、図2は、電子部品1を第一方向Tから平面視した時の図(つまり、上面図)と、図1の一点鎖線A-A'に沿う縦断面を、矢印Bの方向(つまり、第三方向W)から見た縦断面図である。図1,図2において、電子部品1は、例えば、正の温度係数を有するPTCサーミスタであって、少なくとも、セラミック基体2と、ワイヤボンディング用の第一電極3と、底面電極である第二電極4と、を備えている。
<Embodiment>
FIG. 1 is a perspective view of a finished product of the electronic component 1. FIG. 2 is a plan view of the electronic component 1 from the first direction T (that is, a top view) and a vertical cross section along the one-dot chain line AA ′ in FIG. FIG. 5 is a longitudinal sectional view seen from the third direction W). 1 and 2, an electronic component 1 is, for example, a PTC thermistor having a positive temperature coefficient, and includes at least a ceramic substrate 2, a first electrode 3 for wire bonding, and a second electrode which is a bottom electrode. 4 is provided.
 基体2は、図3に示すように、第一方向Tに略直交する第一面S1、第二面S2および第三面S3を含む。面S1~S3は、第一方向Tからの平面視(つまり、上面視)で矩形形状の外形線を形成する。面S3は基体2の底面である。面S2は、基体2の最上面であって、両面S2,S3の中間にある面S1から突出する。換言すると、面S2は、面S3を基準として第一方向Tにあり、面S1は、第一方向Tの位置に関し、両面S2,S3の間にある。 The base 2 includes a first surface S1, a second surface S2, and a third surface S3 that are substantially orthogonal to the first direction T, as shown in FIG. The surfaces S1 to S3 form a rectangular outline in a plan view from the first direction T (that is, a top view). The surface S3 is the bottom surface of the base 2. The surface S2 is the uppermost surface of the base 2 and protrudes from the surface S1 that is in the middle of both surfaces S2 and S3. In other words, the surface S2 is in the first direction T with respect to the surface S3, and the surface S1 is between both surfaces S2 and S3 with respect to the position in the first direction T.
 また、面S2は、第一方向Tからの平面視で面S1に内包される。ここで、面S1,S2の重心をG1,G2とすると、重心G1,G2がLW平面上で同一位置となるように、面S2は上面視で面S1に内包されることが好ましい。また、面S1,S3の外形線は、上面視で互いに重なりあっている。 Further, the surface S2 is included in the surface S1 in a plan view from the first direction T. Here, when the gravity centers of the surfaces S1 and S2 are G1 and G2, it is preferable that the surface S2 is included in the surface S1 in a top view so that the gravity centers G1 and G2 are at the same position on the LW plane. Further, the outlines of the surfaces S1 and S3 overlap each other when viewed from above.
 以上の面S2は、四つの側面により面S1と接続され、面S1は、別の四つの側面により面S3と接続されている。 The above surface S2 is connected to the surface S1 by four side surfaces, and the surface S1 is connected to the surface S3 by another four side surfaces.
 ここで、図2を再度参照する。面S1,S3に関し、第二方向Lに沿う寸法(以下、L1という)は290±25[μm]であり、第三方向Wに沿う寸法(以下、W1という)もまた290±25[μm]である。面S2のL寸およびW寸(以下、L2,W2という)は、230±25[μm]である。なお、電子部品1の第一方向Tに沿う寸法(以下、T1という)は、125±15[μm]である。上記各寸法では、設計目標値を±の前に記載し、±以降に公差(許容される誤差範囲)を記載している。基体2の寸法は、上記に限らず、他のサイズでも構わない。 Referring now to FIG. 2 again. Regarding the surfaces S1 and S3, the dimension along the second direction L (hereinafter referred to as L1) is 290 ± 25 [μm], and the dimension along the third direction W (hereinafter referred to as W1) is also 290 ± 25 [μm]. It is. The L dimension and W dimension (hereinafter referred to as L2 and W2) of the surface S2 are 230 ± 25 [μm]. In addition, the dimension (henceforth T1) along the 1st direction T of the electronic component 1 is 125 +/- 15 [micrometers]. In each of the above dimensions, the design target value is described before ±, and tolerance (allowable error range) is described after ±. The dimensions of the substrate 2 are not limited to the above, and other sizes may be used.
 次に、基体2の材料について説明する。本実施形態では、セラミック基体2は、正の温度特性を有しており、例えばBaTiO3(チタン酸バリウム)に所定の添加物が加えられたセラミック材料からなる。ここで、添加物は、希土類であり、典型的にはSm(サマリウム)である。これ以外にも、Nd(ネオジム)またはLa(ランタン)等を添加物として用いることが可能である。 Next, the material of the base 2 will be described. In the present embodiment, the ceramic substrate 2 has a positive temperature characteristic, and is made of, for example, a ceramic material in which a predetermined additive is added to BaTiO 3 (barium titanate). Here, the additive is a rare earth, typically Sm (samarium). In addition to this, Nd (neodymium), La (lanthanum), or the like can be used as an additive.
 上記のような基体2は、単層構造であっても良いし、複数のセラミックシートからなる積層体であっても良い。 The base 2 as described above may have a single-layer structure or a laminate composed of a plurality of ceramic sheets.
 電極3は、上記の通りワイヤボンディングに使用され、面S2全域を覆うように面S2に接合している。本実施形態では、好ましい例として、電極3は、図4に示すように、第一金属層31と、第二金属層32と、第三金属層33と、を含んでいる。これら金属層31,32,33は、この記載順で面S2上から第一方向Tに向かって積層されている。金属層31は、基体2と直に接触するので、基体2とのオーミックコンタクトが可能な金属(例えば、亜鉛(Zn))を含有している。金属層32は、金属層33と比較して安価で酸化し易い金属(例えば、銀(Ag))を主成分として含有し、金属層33は、低温・高温環境下でも安定的な金属(例えば、金(Au))からなる。 The electrode 3 is used for wire bonding as described above, and is joined to the surface S2 so as to cover the entire surface S2. In the present embodiment, as a preferred example, the electrode 3 includes a first metal layer 31, a second metal layer 32, and a third metal layer 33 as shown in FIG. These metal layers 31, 32, and 33 are laminated from the surface S <b> 2 toward the first direction T in this order of description. Since the metal layer 31 is in direct contact with the base 2, the metal layer 31 contains a metal (for example, zinc (Zn)) that can make ohmic contact with the base 2. The metal layer 32 contains a metal (for example, silver (Ag)) that is cheaper and more easily oxidized than the metal layer 33 as a main component, and the metal layer 33 is a metal that is stable even in a low temperature / high temperature environment (for example, , Gold (Au)).
 ここで、電子部品1を低背化するには、電極3のT寸は極力抑える必要がある。また、電子部品1は一般的に低コストであることが望まれる。これら二つの要求を満たすため、本実施形態では、金属層32,33に展延性に優れたAg,Auが用いられている。また、酸化し易いAgをAuで覆うことで電極3の劣化を抑制している。 Here, in order to reduce the height of the electronic component 1, it is necessary to suppress the T dimension of the electrode 3 as much as possible. In addition, the electronic component 1 is generally desired to be low cost. In order to satisfy these two requirements, Ag and Au excellent in spreadability are used for the metal layers 32 and 33 in this embodiment. Moreover, the deterioration of the electrode 3 is suppressed by covering Ag which is easily oxidized with Au.
 ここで、金属層31の厚さをt1、金属層32の厚さをt2、金属層33の厚さをt3とする。電極3は、上記のような低背化、低コスト、品質等の要件を満たすため、0.02≦t1/t2≦0.75であり、0.2≦t3/t2≦1.0であり、t2が1.0[μm]以下となっていることが好ましい。 Here, the thickness of the metal layer 31 is t1, the thickness of the metal layer 32 is t2, and the thickness of the metal layer 33 is t3. The electrode 3 satisfies 0.02 ≦ t1 / t2 ≦ 0.75 and 0.2 ≦ t3 / t2 ≦ 1.0 in order to satisfy the requirements such as the above-described reduction in height, cost, and quality. T2 is preferably 1.0 [μm] or less.
 電極4は、面S3全域を覆うように面S3に接合する底面電極である。本実施形態では、電極3と同様の積層構造を有する電極4が例示される。なお、電極4は、これに限らず、電極3とは異なる構造を有していても構わない。 The electrode 4 is a bottom electrode joined to the surface S3 so as to cover the entire surface S3. In the present embodiment, an electrode 4 having a stacked structure similar to that of the electrode 3 is illustrated. The electrode 4 is not limited to this, and may have a structure different from that of the electrode 3.
《実施形態の製法の一例》
 上記電子部品1の製法は、大略的には下記の工程(A)~(D)からなる。
<< Example of Manufacturing Method of Embodiment >>
The manufacturing method of the electronic component 1 generally includes the following steps (A) to (D).
 (A)まず、所望特性を得ることが可能なBaTiO3系セラミック粉末が、例えば35[mm]×25[mm]のサイズにプレス成形され、これによって、成形体が得られる。その後、この成形体に対して脱脂・焼成処理が行われる。これにより、完成後に基体2となるべきマザー基板が得られる。マザー基板の厚さは、ラップ研磨等により、電子部品1の完成品のT寸が125±15[μm]となるように調整される。 (A) First, a BaTiO 3 ceramic powder capable of obtaining desired characteristics is press-molded to a size of, for example, 35 [mm] × 25 [mm], thereby obtaining a molded body. Thereafter, degreasing and firing are performed on the molded body. Thereby, a mother substrate to be the base 2 after completion is obtained. The thickness of the mother substrate is adjusted by lapping or the like so that the T dimension of the finished electronic component 1 becomes 125 ± 15 [μm].
 (B)次に、マザー基板の両面には、セラミック製のマザー基板との間でオーミック接合が得られるように、Znを主成分とする層(以下、Zn層という)が例えば蒸着により形成される。これにより、電子部品1の完成後に第一金属層31となるべきZn層と、電極4の最下層となるZn層とがマザー基板上に形成される。 (B) Next, a layer mainly composed of Zn (hereinafter referred to as a Zn layer) is formed on, for example, vapor deposition on both surfaces of the mother substrate so as to obtain an ohmic junction with the ceramic mother substrate. The As a result, a Zn layer to be the first metal layer 31 after completion of the electronic component 1 and a Zn layer to be the lowermost layer of the electrode 4 are formed on the mother substrate.
 次に、両Zn層上には、Agを主成分とする層(以下、Ag層という)が例えば蒸着により形成される。これによって、完成後に第二金属層32となるべきAg層と、電極4の第二層目となるAg層とがマザー基板に形成される。 Next, on both Zn layers, a layer containing Ag as a main component (hereinafter referred to as Ag layer) is formed by vapor deposition, for example. Thereby, an Ag layer to be the second metal layer 32 after completion and an Ag layer to be the second layer of the electrode 4 are formed on the mother substrate.
 次に、両Zn層上には、Au層が例えば蒸着により形成される。これによって、完成後に第三金属層33となるべきAu層と、電極4の第三層目となるAu層とがマザー基板に形成される。 Next, an Au layer is formed by vapor deposition, for example, on both Zn layers. As a result, an Au layer to be the third metal layer 33 after completion and an Au layer to be the third layer of the electrode 4 are formed on the mother substrate.
 (C)次に、工程(B)で得られたマザー基板は、ダイサーによりハーフカットされる。具体的には、ダイサーには、相対的に幅広の刃幅(例えば、120[μm]程度)を有するブレード(または、ダイシングソー)が取り付けられる。ダイサーは、このブレードを用いてハーフカットすることで、マザー基板において電極3となるべき金属層が形成されている側に、格子状の切れ込みを形成する。この切れ込み量(つまり、第一方向Tとは逆方向への深さ)は、特に限定されないが、例えば20[μm]程度とされる。切断ピッチは、面S2のL寸およびW寸と同じく230±25[μm]程度である。 (C) Next, the mother substrate obtained in the step (B) is half-cut by a dicer. Specifically, a blade (or a dicing saw) having a relatively wide blade width (for example, about 120 [μm]) is attached to the dicer. The dicer is half-cut using this blade to form a grid-like cut on the side of the mother substrate on which the metal layer to be the electrode 3 is formed. The cut amount (that is, the depth in the direction opposite to the first direction T) is not particularly limited, but is, for example, about 20 [μm]. The cutting pitch is about 230 ± 25 [μm], similar to the L dimension and W dimension of the surface S2.
 (D)工程(C)で得られたマザー基板は、ダイサーによりフルカットされる。具体的には、ダイサーには、相対的に幅狭の刃幅(例えば、60[μm]程度)を有するブレードが取り付けられる。ダイサーは、このブレードを用いて、工程(C)で形成された格子状の切れ込みの幅方向中心に沿って、マザー基板を切断していく。 (D) The mother substrate obtained in step (C) is fully cut by a dicer. Specifically, a blade having a relatively narrow blade width (for example, about 60 [μm]) is attached to the dicer. The dicer uses this blade to cut the mother substrate along the center in the width direction of the grid-like cut formed in the step (C).
 以上の工程(A)~(D)により、電子部品1が完成する。 The electronic component 1 is completed through the above steps (A) to (D).
《作用・効果》
 以上説明したように、本電子部品1によれば、第二面S2の外形線は、上面視で、第一面S1の外形線に内包されると共に、第一面S1から突出している。このような第二面S2にのみ電極3が形成されているため、上方から視た時に、電極3の四方は、金属に比べて展延性が小さいセラミック部分で囲まれていて、視認可能となっている。それゆえ、ボンディング装置が、本電子部品1を上方から撮影した時に、撮影画像における電子部品1の外形線の変形量は極めて小さく、その結果、ボンディング装置がより正確にパターンマッチングを行うことが可能となる。
《Action ・ Effect》
As described above, according to the electronic component 1, the outline of the second surface S2 is included in the outline of the first surface S1 and protrudes from the first surface S1 when viewed from above. Since the electrode 3 is formed only on the second surface S2 as described above, when viewed from above, the four sides of the electrode 3 are surrounded by a ceramic portion that is less malleable than metal and can be visually recognized. ing. Therefore, when the bonding apparatus photographs the electronic component 1 from above, the deformation amount of the outline of the electronic component 1 in the photographed image is extremely small, and as a result, the bonding apparatus can perform pattern matching more accurately. It becomes.
 また、本件発明者は、以下の表1に示すように、電極3の構造が互いに異なる三種類の電子部品(以下、サンプルNo.1~No.3という)を作製した。本件発明者は、これらサンプルNo.1~No.3との比較のために、特許文献1の電極が形成された電子部品(以下、従来品という)を作製した。表1に示すように、サンプルNo.1において、金属層31の第一方向Tへの厚さは0.15[μm]であり、金属層32の厚さは0.2[μm]であり、金属層33の厚さは0.2[μm]である。サンプルNo.2,No.3の電極3の詳細については表1を参照されたい。 In addition, as shown in Table 1 below, the present inventor produced three types of electronic components (hereinafter referred to as samples No. 1 to No. 3) having different structures of the electrodes 3. The inventor of the present invention has made these sample nos. 1-No. For comparison with FIG. 3, an electronic component (hereinafter referred to as a conventional product) on which the electrode of Patent Document 1 was formed was produced. As shown in Table 1, sample no. 1, the thickness of the metal layer 31 in the first direction T is 0.15 [μm], the thickness of the metal layer 32 is 0.2 [μm], and the thickness of the metal layer 33 is 0.2 mm. 2 [μm]. Sample No. 2, no. See Table 1 for details of the three electrodes 3.
Figure JPOXMLDOC01-appb-T000001
Figure JPOXMLDOC01-appb-T000001
 また、本件発明者は、サンプルNo.1~No.3および従来品について、ワイヤボンディング性、品質(経時劣化に対する耐性)、コストを評価した。 In addition, the inventor of the present invention has a sample no. 1-No. 3 and the conventional product were evaluated for wire bondability, quality (resistance to deterioration over time), and cost.
 ワイヤボンディング性の評価に関しては、様々な接合強度評価方法があるが、本件発明者は、ROYCE Instruments社製ワイヤーボンドプルテスターを用いて、サンプルNo.1~No.3および従来品について、ワイヤーボンドプルテストを実施した。その結果としては、サンプルNo.1~No.3および従来品のいずれにも、問題は発生しなかった。また、経時劣化に対する耐性は、いずれも、電極の最上層をAuとしているため、良好であった。また、サンプルNo.1~No.3に関してはAuの使用量が少ないため低コスト化を実現できたが、従来品に関しては、Auの使用量が多いため、高コストであった。 There are various bonding strength evaluation methods for the evaluation of wire bonding properties. The present inventor uses a wire bond pull tester manufactured by ROYCE Instruments, Inc. 1-No. 3 and the conventional product were subjected to a wire bond pull test. As a result, sample no. 1-No. There was no problem in either of 3 and the conventional product. In addition, the resistance to deterioration with time was good because the uppermost layer of the electrode was Au. Sample No. 1-No. As for No. 3, since the amount of Au used was small, the cost could be reduced. However, the conventional product was expensive because of the large amount of Au used.
《付記1》
 また、上記実施形態では、電子部品1はPTCサーミスタであるとして説明した。しかし、これに限らず、電子部品1は、負の温度係数を有するNTCサーミスタであっても良い。
<< Appendix 1 >>
Moreover, in the said embodiment, the electronic component 1 demonstrated as a PTC thermistor. However, not limited to this, the electronic component 1 may be an NTC thermistor having a negative temperature coefficient.
 本発明に係る電子部品およびその製造方法は、ボンディング装置がより正確にパターンマッチングを行うことが可能であり、NTCサーミスタ、PTCサーミスタに好適である。 The electronic component and the manufacturing method thereof according to the present invention are suitable for NTC thermistors and PTC thermistors because the bonding apparatus can perform pattern matching more accurately.
 1 電子部品
 2 セラミック基体
 3 第一電極
 31 第一金属層
 32 第二金属層
 33 第三金属層
 4 第二電極
 T 第一方向
 L 第二方向
 W 第三方向
 S1,S2,S3 第一面,第二面,第三面
DESCRIPTION OF SYMBOLS 1 Electronic component 2 Ceramic base | substrate 3 1st electrode 31 1st metal layer 32 2nd metal layer 33 3rd metal layer 4 2nd electrode T 1st direction L 2nd direction W 3rd direction S1, S2, S3 1st surface, Second side, third side

Claims (3)

  1.  第一面と、所定の第一方向からの平面視で前記第一面に内包されると共に前記第一面から突出する第二面と、を含むセラミック基体と、
     前記第二面上に形成され、少なくとも一つの金属層を含むワイヤボンディング用電極と、を備え、
     前記セラミック基体の前記第一面は、前記第一方向からの平面視で視認可能となっている、電子部品。
    A ceramic base including a first surface and a second surface that is included in the first surface and projects from the first surface in a plan view from a predetermined first direction;
    An electrode for wire bonding formed on the second surface and including at least one metal layer,
    The electronic component, wherein the first surface of the ceramic base is visible in a plan view from the first direction.
  2.  前記ワイヤボンディング用電極は、少なくとも一つの金属層として、
      前記セラミック基体とオーミック接合する第一金属層と、
      相対的に酸化し難い金属からなる第二金属層であって、最外層となる第二金属層と、
      相対的に酸化し易い金属からなる第三金属層であって、前記第二金属層の直下に形成される第三金属層と、を含み、
     前記第一金属層の厚さをt1、前記第二金属層の厚さをt2、前記第三金属層の厚さをt3とすると、t1/t2が、0.02≦t1/t2≦0.75であり、t3/t2が、0.2≦t3/t2≦1.0であり、t2は1.0μm以下である、請求項1に記載の電子部品。
    The wire bonding electrode is at least one metal layer,
    A first metal layer in ohmic contact with the ceramic substrate;
    A second metal layer made of a metal that is relatively difficult to oxidize, the second metal layer being the outermost layer;
    A third metal layer made of a metal that is relatively easily oxidized, and a third metal layer formed immediately below the second metal layer,
    When the thickness of the first metal layer is t1, the thickness of the second metal layer is t2, and the thickness of the third metal layer is t3, t1 / t2 is 0.02 ≦ t1 / t2 ≦ 0. The electronic component according to claim 1, wherein t3 / t2 is 0.2 ≦ t3 / t2 ≦ 1.0, and t2 is 1.0 μm or less.
  3.  セラミックからなるマザー基板を作成する第一工程と、
     前記マザー基板が有する少なくとも一つの面に、少なくとも一つの金属層を形成する第二工程と、
     前記マザー基板の面に対して略垂直な第一方向から、所定幅の第一ブレードで、前記金属層が形成された前記マザー基板に対し所定深さを有する格子状の切り込みを形成する第三工程と、
     前記第三工程で形成された格子状の切り込みに対して、前記第一ブレードよりも狭い幅の第二ブレードを前記第一方向から入れて前記マザー基板を全て切り込む第四工程と、を備える、電子部品の製造方法。
    A first step of creating a mother board made of ceramic;
    A second step of forming at least one metal layer on at least one surface of the mother substrate;
    A grid-shaped cut having a predetermined depth is formed on the mother substrate on which the metal layer is formed with a first blade having a predetermined width from a first direction substantially perpendicular to the surface of the mother substrate. Process,
    A fourth step of cutting all the mother substrate by inserting a second blade having a width smaller than that of the first blade from the first direction with respect to the grid-like cut formed in the third step, Manufacturing method of electronic components.
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Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07245233A (en) * 1994-03-03 1995-09-19 Murata Mfg Co Ltd Thin-film capacitor
JP2005203504A (en) * 2004-01-14 2005-07-28 Murata Mfg Co Ltd Electronic part manufacturing method

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07245233A (en) * 1994-03-03 1995-09-19 Murata Mfg Co Ltd Thin-film capacitor
JP2005203504A (en) * 2004-01-14 2005-07-28 Murata Mfg Co Ltd Electronic part manufacturing method

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