WO2014205640A1

WO2014205640A1 - Data processing method, apparatus and system

Info

Publication number: WO2014205640A1
Application number: PCT/CN2013/077833
Authority: WO
Inventors: 王永生; 叶四清
Original assignee: 华为技术有限公司
Priority date: 2013-06-25
Filing date: 2013-06-25
Publication date: 2014-12-31
Also published as: CN104429017B; CN104429017A

Abstract

Disclosed is a data processing method. The method comprises: continuously sending period calibration data from a downlink timeslot start time point; combining the calibration data on which up-conversion processing is performed with service data to obtain combined data; performing radio frequency processing on the combined data to obtain radio frequency data, phases of the radio frequency data being continuous; performing down-conversion processing on the radio frequency data to obtain feedback data, a frequency of the feedback data being consistent with that of the calibration data on which up-conversion processing is not performed, and a phase of the feedback data being consistent with that of the calibration data on which up-conversion processing is performed; and zeroizing vacancies of the feedback data for at least one period, and accumulating the zeroized feedback data on same potions in each period. By using the data processing method provided in the embodiments of the present invention, the continuity of data phases of coherently accumulated data can be ensured, thereby obtaining an accumulated gain.

Description

Method, device and system for data processing

The present invention relates to the field of communications technologies, and in particular, to a data processing method, a data accumulation method, an apparatus, and a system.

Background technique

Frequency Domain Reflectometer (FDR) is a transmission line fault finding technology. It is widely used in communication systems. In the FDR test process, the high-precision standing wave test signal requires a certain signal-to-noise ratio to be measured. Therefore, it is necessary to increase the signal-to-noise ratio of the correction signal by coherent accumulation before testing.

In the frequency division duplexing (FDD) system, downlink data of one frame is started to be used as a correction signal at any time in the downlink start time (DL_Begin) and the downlink end time (DL_End). After the correction signal is subjected to a series of processes such as up-conversion and down-conversion, data accumulation is implemented in the accumulator.

The inventors of the present invention have found that coherent accumulation techniques in FDD systems, if applied to time division duplexing

(TDD, Time Division Duplexing) In the system, when performing FDR test, the coherent accumulation uses only one frame of downlink data, and cannot accumulate data of multiple radio frame lengths, and cannot guarantee the continuity of the phase participating in the coherent accumulated data.

Summary of the invention

Embodiments of the present invention provide a data processing method, which can ensure the continuity of the phase of the coherently accumulated data, thereby obtaining an accumulated gain. The embodiments of the present invention also provide corresponding devices and systems.

A first aspect of the present invention provides a data processing method, including:

Periodic calibration data is continuously issued from the start of the downlink time slot;

Combining the calibration data processed by the up-conversion process with the service data to obtain merged data; performing radio frequency processing on the merged data to obtain radio frequency data, wherein the radio frequency data has a continuous phase; and the radio frequency data is down-converted Obtaining feedback data, the frequency of the feedback data is consistent with the frequency of the calibration data not subjected to up-conversion processing, and the phase of the feedback data is consistent with the phase of the calibration data subjected to up-conversion processing; The vacancy in the feedback data is subjected to at least one full-time zero-padding process, and the feedback data at the same position in each cycle after zero-padding is accumulated.

In conjunction with the first aspect, in a first possible implementation manner of the first aspect, the performing zero-filling processing on the vacancy in the feedback data for at least one full cycle includes:

The first preset number of feedback data in the downlink time slot before the arrival of the uplink time slot and the vacancy of the uplink time slot are replaced with zeros of at least one full cycle.

With reference to the first aspect, in a second possible implementation manner of the first aspect, the performing zero-filling processing on the vacancy in the feedback data for at least one full cycle includes:

The second preset number of feedback data and the vacancies of the upstream time slot immediately after the arrival of the downlink time slot are replaced with zeros of at least one full cycle.

With reference to the first aspect, in a third possible implementation manner of the first aspect, the performing the zero-padding processing on the vacancy in the feedback data for at least one full cycle includes:

Replacing a third preset number of feedback data in the downlink time slot before the arrival of the uplink time slot on the timing with at least one full cycle of zero, a vacancy of the uplink time slot, and a fourth time when the downlink time slot is just arrived A preset amount of feedback data.

A second aspect of the present invention provides a data accumulation method, including:

Receiving feedback data, the frequency of the feedback data is consistent with the frequency of the calibration data not subjected to up-conversion processing, the phase of the feedback data is consistent with the phase of the calibration data subjected to the up-conversion processing; and the vacancy in the feedback data is performed At least one full-time zero-padding process, and accumulating the feedback data at the same position in each cycle after zero-padding.

With reference to the second aspect, in a first possible implementation manner of the second aspect, the performing a zero-filling process on the vacancy in the feedback data for at least one full cycle includes:

With reference to the second aspect, in a second possible implementation manner of the second aspect, the performing zero-filling processing on the vacancy in the feedback data by using at least one full cycle includes:

The second preset number of feedback data and the vacancy of the uplink time slot when the downlink time slot has just arrived are replaced with zeros of at least one full cycle. With reference to the second aspect, in a third possible implementation manner of the second aspect, the performing the zero-padding processing on the vacancy in the feedback data for at least one full cycle includes:

A third aspect of the present invention provides a radio remote device, including:

a data output unit, configured to continuously issue periodic calibration data from a start time of the downlink time slot; an up-conversion processing unit, configured to perform up-conversion processing on the calibration data output by the data output unit; and merge with the service data , get the combined data;

a radio frequency processing unit, configured to perform radio frequency processing on the combined data that is combined by the data merging unit to obtain radio frequency data, where the phase of the radio frequency data is continuous;

a down conversion processing unit, configured to perform down-conversion processing on the radio frequency data processed by the radio frequency processing unit to obtain feedback data, where the frequency of the feedback data is consistent with the frequency of the calibration data that has not undergone up-conversion processing, The phase of the feedback data is consistent with the phase of the calibration data subjected to up-conversion processing;

And an accumulating unit, configured to perform at least one full-time zero-padding processing on the vacancy in the feedback data obtained by down-converting the down-conversion processing unit, and at the same position in each period after zero-padding The feedback data is accumulated.

In conjunction with the third aspect, in a first possible implementation of the third aspect,

The accumulating unit is configured to replace, by using at least one full cycle of zeros, a first preset number of feedback data and a gap of the uplink time slot in a downlink time slot before an uplink time slot arrives.

In conjunction with the third aspect, in a second possible implementation of the third aspect,

The accumulating unit is configured to replace the second preset number of feedback data and the vacancy of the uplink time slot when the downlink time slot is just arrived with at least one full cycle of zeros.

In conjunction with the third aspect, in a third possible implementation of the third aspect,

The accumulating unit is configured to replace the uplink time slot on the timing with at least one full cycle of zero a third preset number of feedback data in the downlink time slot, a vacancy of the uplink time slot, and a fourth preset number of feedback data when the downlink time slot has just arrived.

The four aspects of the present invention provide an accumulator, including:

a receiving unit, configured to receive feedback data, the frequency of the feedback data is consistent with a frequency of calibration data not subjected to up-conversion processing, and a phase of the feedback data is consistent with a phase of the calibration data subjected to up-conversion processing;

a zero padding unit, configured to perform at least one full cycle of zero padding processing on the vacancies in the feedback data received by the receiving unit;

And an accumulating unit configured to accumulate the feedback data at the same position in each cycle after the zero padding of the zero padding unit.

With reference to the fourth aspect, in a first possible implementation manner of the fourth aspect,

The zero padding unit is configured to replace, by using at least one full cycle of zeros, a first preset number of feedback data and a gap of the uplink time slot in a downlink time slot before an uplink time slot arrives.

With reference to the fourth aspect, in a second possible implementation manner of the fourth aspect,

The zero padding unit is configured to replace the second preset number of feedback data and the vacancy of the uplink time slot when the downlink time slot is just arrived with at least one full cycle of zeros.

With reference to the fourth aspect, in a third possible implementation manner of the fourth aspect,

The zero padding unit is configured to replace, by using at least one full cycle of zeros, a third preset number of feedback data, a vacancy of the uplink time slot, and the downlink in a downlink time slot before an uplink time slot arrives in time series The fourth preset amount of feedback data when the time slot has just arrived.

A fifth aspect of the present invention provides a base station, where the base station includes the radio remote device according to the above technical solution.

A sixth aspect of the present invention provides a data processing system, including: a data output device, an up-conversion processing device, a data combining device, a radio frequency processing device, a down-conversion processing device, and an accumulator.

The data output device is configured to continuously issue periodic calibration data from a start time of the downlink time slot;

The up-conversion processing device is configured to perform up-conversion processing on the calibration data output by the data output device; The data combining device is configured to combine the calibration data after the up-conversion processing device is up-converted with the service data to obtain merged data;

The radio frequency processing device is configured to perform radio frequency processing on the combined data that is combined by the data combining device to obtain radio frequency data, where the phase of the radio frequency data is continuous;

The down conversion processing device is configured to perform frequency conversion processing on the radio frequency data processed by the radio frequency processing device to obtain feedback data, and the frequency of the feedback data is consistent with the frequency of the calibration data not subjected to upconversion processing. The phase of the feedback data is consistent with the phase of the calibration data subjected to up-conversion processing;

The accumulator is configured to perform at least one full-time zero-padding processing on the vacancy in the feedback data obtained by down-converting the down-conversion processing device, and the feedback at the same position in each cycle after zero-padding The data is accumulated.

With reference to the sixth aspect, in a first possible implementation manner of the sixth aspect,

The up-conversion processing device shares a digitally controlled oscillator NCO with the down-conversion processing device to maintain the phase of the feedback data coincident with the phase of the up-converted processed calibration data.

With reference to the sixth aspect, or the first possible implementation manner of the sixth aspect, in the second possible implementation manner of the sixth aspect, the transmitting local oscillator in the radio frequency processing device and the phase locked loop in the receiving local oscillator are both Does not power off and is not reset.

With reference to the sixth aspect, or the first possible implementation manner of the sixth aspect, in a third possible implementation manner of the sixth aspect, the system further includes: a filter, a DC processing device, and a gain adjustment device; The device is configured to filter the feedback data; processing;

The gain adjustment device is configured to perform gain adjustment on the feedback data after the DC processing device is de-DC.

The data processing method provided by the embodiment of the present invention can ensure the continuity of the phase of the coherently accumulated data, thereby obtaining the accumulated gain.

DRAWINGS In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings used in the description of the embodiments will be briefly described below. Obviously, the drawings in the following description are only some embodiments of the present invention. For those skilled in the art, other drawings may be obtained according to these drawings without any creative work.

1 is a schematic diagram of an embodiment of a method for data processing in an embodiment of the present invention;

2 is a schematic diagram of an embodiment of a method for data accumulation in an embodiment of the present invention;

3 is a schematic diagram of an embodiment of a data processing system in an embodiment of the present invention;

4 is a schematic diagram of another embodiment of a data processing system in an embodiment of the present invention;

FIG. 5 is a schematic diagram of another embodiment of a data processing system according to an embodiment of the present invention; FIG.

6 is a schematic diagram of another embodiment of a data processing system in an embodiment of the present invention;

7 is a schematic diagram of another embodiment of a data processing system in an embodiment of the present invention;

FIG. 8 is a schematic diagram of an embodiment of a radio remote device according to an embodiment of the present invention; FIG.

FIG. 9 is a schematic diagram of an embodiment of an accumulator according to an embodiment of the present invention; FIG.

FIG. 10 is a schematic diagram of an embodiment of a radio remote device according to an embodiment of the present invention; FIG.

FIG. 11 is a schematic diagram of an embodiment of an accumulator according to an embodiment of the present invention.

detailed description

Embodiments of the present invention provide a data processing method that can ensure continuity of data phase participating in coherent accumulation, thereby obtaining an accumulated gain. Embodiments of the present invention also provide a method, apparatus, and system for corresponding data accumulation. The details are described below separately.

BRIEF DESCRIPTION OF THE DRAWINGS The technical solutions in the embodiments of the present invention will be described in detail below with reference to the accompanying drawings. All other embodiments obtained by a person skilled in the art based on the embodiments of the present invention without creative efforts are within the scope of the present invention.

The executor of the data processing method in the embodiment of the present invention may be a radio remote device or a device that performs similar functions. In this embodiment, a radio remote unit (RRU) is taken as an example.

Referring to FIG. 1, an embodiment of a data processing method provided by an embodiment of the present invention includes:

101. Continuously issue periodic calibration data from the start time of the downlink time slot. Periodic calibration data can be understood as: There are 257 data points per cycle. After sending a full cycle of data, the data of the next cycle is sent, and each data point in a cycle can be different.

102. Combine the calibration data that has undergone up-conversion processing with the service data to obtain merged data.

An alternative combination is as follows. Since the calibration data in the embodiment of the present invention is in the same time domain as the service data, the combination of the two data actually adds the two data. For example: the business data is 380+425j, the calibration data is 3+2j, then the combined data is 383+427j, that is, the real part of the business data is added to the real part of the calibration data, and the imaginary part of the business data and the calibration data Add the imaginary parts. Other merge processing methods may also be adopted in the embodiments of the present invention.

103. Perform radio frequency processing on the combined data to obtain radio frequency data, where the phase of the radio frequency data is continuous.

The process of radio frequency processing in the embodiment of the present invention mainly includes a process of modulation, demodulation, and power amplification. This part is the same as the prior art and will not be repeated.

Maintaining the phase of the RF data continuously can be achieved by circuit design, for example: The transmit local oscillator in the circuit that maintains the RF processing section and the phase-locked loop in the receive local oscillator are not powered down and are not reset.

Do not power off to keep the power on, and keep power. It is not reset to that the phase-locked loops in the transmitting local oscillator and the receiving local oscillator are not reset during the data processing of the embodiment of the present invention, and the state in which data processing is started is maintained.

104. Perform down-conversion processing on the radio frequency data to obtain feedback data, where a frequency of the feedback data is consistent with a frequency of the calibration data that has not been subjected to up-conversion processing, and a phase of the feedback data and an apparatus subjected to an up-conversion process. The phase of the calibration data is consistent.

In the embodiment of the present invention, continuously issuing periodic calibration data from the start time of the downlink time slot can ensure that the frequency of the feedback data is consistent with the frequency of the calibration data that has not undergone up-conversion processing, and the up-conversion processing and the down-conversion processing share one. A digitally controlled oscillator (NC0) is implemented.

105. Perform zero padding processing on the vacancy in the feedback data for at least one full cycle, and accumulate the feedback data at the same position in each cycle after the zero padding.

Since only the data of the downlink time slot is accumulated, there is no data at the position of the upper phase time slot, and zero can be used. To fill the gap of the uplink time slot, in order to keep the phase continuous, the number of zero padding must be a full cycle, for example: There are 257 data points in one full cycle, then the number of zero padding is an integer multiple of 257.

In the embodiment of the present invention, the periodic calibration data is continuously sent from the start time of the downlink time slot; the calibration data processed by the up-conversion process is combined with the service data to obtain the merged data; and the combined data is subjected to radio frequency processing to obtain Radio frequency data, the phase of the radio frequency data is continuous; the radio frequency data is down-converted to obtain feedback data, and the frequency of the feedback data is consistent with the frequency of the calibration data not subjected to up-conversion processing, and the feedback data a phase that coincides with a phase of the up-converted processed calibration data; performing at least one full-cycle zero-padding process on the vacancies in the feedback data, and said at the same position in each cycle after zero-padding The feedback data is accumulated. Compared with the prior art, the data processing method provided by the embodiment of the present invention can ensure the continuity of the phase of the coherently accumulated data, thereby obtaining the accumulated gain.

Optionally, in an optional embodiment of the data processing method provided by the embodiment of the present invention, the vacancy in the feedback data is supplemented by at least one full cycle. Zero processing, which can include:

In the embodiment of the present invention, since the circuit switch in the RRU is turned off at the uplink time slot, the accumulator in the RRU does not receive data in the uplink time slot, and the accumulator can only receive the feedback data of the downlink time slot. However, the feedback data at the end of the downlink time slot block and the arrival of the uplink time slot block may have a lot of noise, so these data can be discarded and replaced with zero. However, the number of feedback data and the number of slots in the downlink time slot discarded must be an integer multiple of the entire period. In the embodiment of the present invention, one full cycle is 257 data points, and the number of zero padding must be an integer of 257. Times.

Optionally, in another optional embodiment of the data processing method provided by the embodiment of the present invention, the vacancy in the feedback data is at least one full cycle. The zero-padding process can include:

In the embodiment of the present invention, since the circuit switch in the RRU is turned off at the uplink time slot, the uplink is on the uplink. The accumulator in the slot time RRU does not receive data. The accumulator can only receive the feedback data of the downlink slot, but the feedback data when the downlink slot just arrives may have a lot of noise, so the data can be discarded. Zero instead. However, the number of feedback data and the number of slots in the downlink time slot discarded must be an integer multiple of the entire period. In the embodiment of the present invention, a whole period is 257 data points, and the number of zero padding must be an integer of 257. Times.

In the embodiment of the present invention, since the circuit switch in the RRU is turned off at the uplink time slot, the accumulator in the RRU does not receive data in the uplink time slot, and the accumulator can only receive the feedback data of the downlink time slot. However, the feedback data when the downlink time slot just arrives may have a lot of noise, and the feedback data at the beginning of the downlink time slot may also have a lot of noise, so the data can be discarded and replaced with zero. However, the number of feedback data and the number of slots in the downlink time slot discarded must be an integer multiple of the entire period. In the embodiment of the present invention, a whole period is 257 data points, and the number of zero padding must be an integer of 257. Times.

Optionally, in another optional embodiment of the data processing method provided by the embodiment of the present invention, the vacancy in the feedback data is at least one full cycle. The zero-padding process, and the step of accumulating the feedback data at the same position in each cycle after zero-padding, may further include:

Filtering the feedback data;

De-DC processing the filtered feedback data;

Gain adjustment is performed on the feedback data after going to DC.

Referring to FIG. 2, an embodiment of a method for data accumulation according to an embodiment of the present invention includes:

201. Receive feedback data, where a frequency of the feedback data is consistent with a frequency of calibration data that has not undergone up-conversion processing, and a phase of the feedback data and a phase of calibration data subjected to up-conversion processing To.

202. Perform at least one full-time zero-padding process on the vacant bits in the feedback data, and accumulate the feedback data at the same position in each cycle after the zero-padding.

In the embodiment of the present invention, the feedback data is received, the frequency of the feedback data is consistent with the frequency of the calibration data not subjected to the up-conversion processing, and the phase of the feedback data is consistent with the phase of the calibration data subjected to the up-conversion processing; The vacancies in the feedback data are subjected to at least one full-time zero-padding process, and the feedback data at the same position in each cycle after zero-padding is accumulated. Compared with the prior art, the data accumulation method provided by the embodiment of the present invention can ensure the continuity of the phase of the coherently accumulated data, thereby obtaining the accumulated gain.

Optionally, in an optional embodiment of the data processing method provided by the embodiment of the present invention, the vacancy in the feedback data is at least one full cycle. Zero-padding processing, which can include:

In the embodiment of the present invention, since the circuit switch in the RRU is turned off at the uplink time slot, the accumulator in the RRU does not receive data in the uplink time slot, and the accumulator can only receive the feedback data of the downlink time slot. However, the feedback data when the downlink time slot just arrived may have a lot of noise, so these data can Discard, replace with zero. However, the number of feedback data and the number of slots in the downlink time slot discarded must be an integer multiple of the entire period. In the embodiment of the present invention, a whole period is 257 data points, and the number of zero padding must be an integer of 257. Times.

Referring to FIG. 3, an embodiment of a data processing system provided by an embodiment of the present invention includes:

Data output device 110, up-conversion processing device 120, data combining device 130, radio frequency processing device 140, down-conversion processing device 150 and accumulator 160;

The data output device 110 continuously sends periodic calibration data from the start time of the downlink time slot;

The up-conversion processing device 120 performs up-conversion processing on the calibration data output by the data output device 110;

The data combining device 130 combines the calibration data after the up-conversion processing device 120 is up-converted with the service data to obtain merged data;

The radio frequency processing device 140 performs radio frequency processing on the combined data of the data combining device 130 to obtain radio frequency data, and the phase of the radio frequency data is continuous;

In the embodiment of the present invention, the transmitting local oscillator in the radio frequency processing device 140 and the phase lock in the receiving local oscillator are received. The uplink and downlink time slots of the ring are not powered down and are not reset. This ensures the continuity of the analog phase-locked loop (PLL) and voltage controlled oscillator (VCO) signals.

The down-conversion processing device 150 performs down-conversion processing on the radio frequency data processed by the radio frequency processing device to obtain feedback data, and the frequency of the feedback data is consistent with the frequency of the calibration data that has not undergone up-conversion processing, and the feedback The phase of the data is consistent with the phase of the calibration data subjected to up-conversion processing;

The accumulator 160 performs at least one full-time zero-padding process on the vacancy in the feedback data obtained by the down-conversion processing device 150, and the feedback data at the same position in each cycle after zero-padding Perform the accumulation.

Compared with the prior art, the data processing system provided by the embodiment of the present invention can ensure the continuity of the phase of the coherently accumulated data, thereby obtaining the accumulated gain.

Optionally, in another embodiment of the data processing system provided by the embodiment of the present invention, the system may further include: a filter, a DC processing device, and a gain adjustment device; The device is configured to filter the feedback data; processing;

Referring to FIG. 4, an embodiment of a data processing system provided by an embodiment of the present invention includes:

Random access memory (RAM) 1101, digital upconversion device (Digital

Up Converter, DUC) 1201, data combining device 130, RF processing device 140, second down conversion processing device (DDC2) 1501, filter (FI) 1801, DC processing device 1901, gain adjustment device 1902 , accumulator 160; DUC1201 and DDC2 Share an NCO.

The radio frequency processing device is prior art, and includes: digital pre-distortion (Digital Pre-Distorti ON, DPD) processing device, power adjustment device, digital analog converter (DAC), analog-to-digital converter (analog digital) Converter ) ^ First DC processing unit, first down conversion processing unit DDC1.

Before the test starts, the data can be prevented from entering the RF processing unit 140, and the dotted line portion of Fig. 4 is directly entered into the DDC2. Through such repeated test adjustment, the calibration data is matched with the frequency of the feedback data.

Referring to FIG. 5, FIG. 5 is a broken line portion of the RF processing apparatus 140 of FIG. 4. The circuit diagram shown in FIG. 5 is the same as the prior art, and the circuit components and connections thereof are not described in detail. The phase-locked loop (PLL) that only needs to keep the local oscillator Lol and the local oscillator Lo2 is not powered off and is not reset in the uplink and downlink time slots. The receiving local oscillator Lo2 is for receiving and feedback simulation. The mixer is shared.

Referring to Figure 6, the calibration data is rotated counterclockwise, the data flows out from the arrow, and the rotation start time is triggered by the DL_Begin enable signal. Once triggered, the data ring will not stop after the calibration device, and there are 257 cycles per cycle. data point.

After the calibration data sent by the RAM 1601 reaches the DUC 1201, the DUC 1201 performs digital up-conversion processing on the calibration data, and the data combining device 130 combines the service data with the calibration data subjected to the up-conversion processing, outputs the combined data, and the combined data passes through the RF. After a series of processing by the processing device 140, the radio frequency data is output, and the DDC2 digitally down-converts the radio frequency data to obtain feedback data.

Since the DUC and the DDC 2 share an NCO, it is ensured that the phase of the feedback data coincides with the phase of the calibration data subjected to the up-conversion processing. After the DC processing of the stream processing device 1901 and the gain adjustment processing of the gain adjustment device 1902, the accumulator 160 is input, and the accumulator 160 accumulates the feedback data at the same position in each cycle, at any one of any one of the cycles. When there is no feedback data, when accumulating, 0 is accumulated at the position where the feedback data is not present.

In the case of data accumulation, for the lack of data due to the switch off in the RF processing device, the integrity of the cycle can be ensured by zero padding, thereby maintaining phase continuity. Referring to Figure 7, the A area is the downlink block effective accumulation area, and the number of accumulated periods of each effective accumulation area = 1900. The total accumulated data = 1900 * 257 = 488300;

(B+C) The area is the invalid accumulation area, that is, the zero-filling area, the number of zero-filling cycles = ceil((6400 * 144 - 1900 * 257) I 257) = 1686, the total number of accumulated 0 data = 1686 * 257 = 433302 Each downstream block itself is fragmentary mod ((6400 * 144 - 1900 * 257), 257) = 255 data;

The number of 0s to be filled in at the beginning of the next downlink block is 433302 - (6400 * 144 - 1900 * 257) = 2, and the number of 0s to be filled in at the beginning of the next downlink block is 4, ..., 128th The number of 0s in the next downlink block is 256;

After the 128th next downlink block is accumulated, the number of cycles to be filled with 0 is 1685, and the number of 0s of the next 129 next downlink block needs to be 0, and the start of the 130th next downlink block The number of 0s to be filled is 3, ..., the number of 0s in the beginning of the next 256th downstream block needs to be 0, and the number of 0st in the beginning of the next 257th next block is 0. The number of 0s required to fill the beginning of the next 258th downstream block is 2;

The logic performs the above zero-filling operation, which can be realized by using a counter. For example, when DL_Bebin comes, the counter continues to fill 0 if it is not full 257 until it reaches 257.

Referring to FIG. 8, an embodiment of the remote radio remote device 30 according to the embodiment of the present invention includes: a data output unit 301, configured to continuously send periodic calibration data from a start time of a downlink time slot;

The up-conversion processing unit 302 is configured to perform up-conversion processing on the calibration data output by the data output unit 301; the quasi-data is combined with the service data to obtain merged data;

The radio frequency processing unit 304 is configured to perform radio frequency processing on the combined data that is combined by the data combining unit 303, to obtain radio frequency data, where the phase of the radio frequency data is continuous;

The down-conversion processing unit 305 is configured to perform frequency conversion processing on the radio frequency data processed by the radio frequency processing unit 304 to obtain feedback data, where the frequency of the feedback data is consistent with the frequency of the calibration data that has not undergone up-conversion processing. The phase of the feedback data is consistent with the phase of the calibration data subjected to up-conversion processing; The accumulating unit 306 is configured to perform at least one full-time zero-padding processing on the vacancy in the feedback data obtained by the down-conversion processing unit 305 after the down-conversion processing, and at the same position in each period after the zero-padding The feedback data is accumulated.

In the embodiment of the present invention, the data output unit 301 continuously issues periodic calibration data from the start time of the downlink time slot; the up-conversion processing unit 302 performs up-conversion processing on the calibration data output by the data output unit 301; The unit 303 combines the calibration data and the service data that are up-converted by the up-conversion processing unit 302 to obtain the merged data. The radio frequency processing unit 304 performs the radio frequency processing on the merged data that is combined by the data combining unit 303. Radio frequency data, the phase of the radio frequency data is continuous; the down conversion processing unit 305 performs down-conversion processing on the radio frequency data processed by the radio frequency processing unit 304 to obtain feedback data, and the frequency of the feedback data is not subjected to up-conversion processing. The frequency of the calibration data is consistent, the phase of the feedback data is consistent with the phase of the calibration data subjected to up-conversion processing; and the feedback data obtained by the accumulating unit 306 after down-converting the down-conversion processing unit 305 The vacancy in the middle is filled with at least one full cycle , And at the same position in each said cycle after the zero-padded data accumulated feedback. Compared with the prior art, the radio remote device provided by the embodiment of the present invention can ensure the continuity of the phase of the coherently accumulated data, thereby obtaining the accumulated gain.

Optionally, in another embodiment of the radio remote device according to the embodiment of the present invention,

The accumulating unit 306 is configured to replace, by using at least one full cycle of zeros, a first preset number of feedback data and a gap of the uplink time slot in a downlink time slot before the arrival of the uplink time slot.

The accumulating unit 306 is configured to replace, by using at least one full cycle of zeros, the second preset number of feedback data and the vacancy of the uplink time slot when the downlink time slot is just arrived.

The accumulating unit 306 is configured to replace, by using at least one full cycle of zeros, a third preset number of feedback data in the downlink time slot before the arrival of the uplink time slot on the sequence, the vacancy of the uplink time slot, and the lower The fourth preset amount of feedback data when the line slot has just arrived.

Referring to FIG. 9, an embodiment of an accumulator 160 according to an embodiment of the present invention includes:

The obtaining unit 1601 is configured to receive feedback data, the frequency of the feedback data is consistent with the frequency of the calibration data that has not undergone up-conversion processing, and the phase of the feedback data is consistent with the phase of the calibration data subjected to the up-conversion processing;

The zero padding unit 1602 is configured to perform at least one full-time zero padding process on the vacancies in the feedback data received by the acquiring unit 1601; and the feedback data is accumulated.

In the embodiment of the present invention, the acquiring unit 1601 receives the feedback data, the frequency of the feedback data is consistent with the frequency of the calibration data that has not undergone up-conversion processing, and the phase of the feedback data is consistent with the phase of the calibration data subjected to the up-conversion processing; The zero padding unit 1602 performs at least one full-time zero padding process on the vacancies in the feedback data received by the acquiring unit 1601; the accumulating unit 1603 adds the same position in each cycle after zero-padding the padding unit 1602 The feedback data at the point is accumulated. Compared with the prior art, the accumulator provided by the embodiment of the present invention can ensure the continuity of the phase of the coherently accumulated data, thereby obtaining the accumulated gain.

In another embodiment of the accumulator provided by the embodiment of the present invention, based on the embodiment corresponding to FIG. 9 above,

The zero padding unit 1602 is configured to replace the first preset number of feedback data and the vacancy of the uplink time slot in the downlink time slot before the arrival of the uplink time slot with at least one full cycle of zero.

The zero padding unit 1602 is configured to replace, by using at least one full cycle of zeros, the second preset number of feedback data and the vacancy of the uplink time slot when the downlink time slot is just arrived.

The zero padding unit 1602 is configured to replace, by using at least one full cycle of zeros, a third preset number of feedback data in the downlink time slot before the arrival of the uplink time slot in the sequence, the vacancy of the uplink time slot, and the Under The fourth preset amount of feedback data when the line slot has just arrived.

The embodiment of the invention further provides a computer readable storage medium, wherein the medium stores a program, and the program includes some or all of the steps of the data processing method.

The embodiment of the invention further provides a computer readable storage medium, wherein the medium stores a program, and the program includes some or all of the steps of the data accumulation method.

FIG. 10 is a schematic structural view of a radio remote device 30 according to an embodiment of the present invention. The remote radio device 30 can include an input device 310, an output device 320, a processor 330, and a memory 340.

Memory 340 can include read only memory and random access memory and provides instructions and data to processor 330. A portion of memory 340 may also include non-volatile random access memory (NVRAM).

Memory 340 stores the following elements, executable modules or data structures, or a subset thereof, or their extended set:

Operation instructions: Includes various operation instructions for implementing various operations.

Operating System: Includes a variety of system programs for implementing basic services and handling hardware-based tasks.

In the embodiment of the present invention, the processor 330 performs the following operations by calling an operation instruction stored in the memory 340 (the operation instruction can be stored in the operating system):

Periodically, the calibration data is continuously sent out from the start time of the downlink time slot by the output device 320; the calibration data processed by the up-conversion process is combined with the service data to obtain combined data; and the combined data is subjected to radio frequency processing to obtain a radio frequency. Data, the phase of the radio frequency data is continuous; the radio frequency data is down-converted to obtain feedback data, and the frequency of the feedback data is consistent with the frequency of the calibration data that has not undergone up-conversion processing, and the feedback data is The phase is consistent with the phase of the up-converted calibration data; the vacancy in the feedback data is subjected to at least one full-time zero-padding process, and the feedback at the same position in each cycle after zero-padding The data is accumulated.

In the embodiment of the present invention, the radio remote device can ensure the continuity of the phase of the coherently accumulated data, thereby obtaining the accumulated gain.

The processor 330 controls the operation of the remote radio device 30, which may also be referred to as a CPU (Central Processing Unit). The memory 340 can include a read only memory and The memory is randomly accessed and instructions and data are provided to processor 330. A portion of the memory 340 may also include non-volatile random access memory (NVRAM). In a specific application, the components of the RF remote device 30 are coupled together by a bus system 350. The bus system 350 may include a power bus, a control bus, a status signal bus, and the like in addition to the data bus. However, for clarity of description, various buses are labeled as bus system 350 in the figure.

The method disclosed in the foregoing embodiments of the present invention may be applied to the processor 330 or implemented by the processor 330. Processor 330 may be an integrated circuit chip with signal processing capabilities. The instruction in the form of implementation is completed. The processor 330 described above may be a general purpose processor, a digital signal processor (DSP), an application specific integrated circuit (ASIC), an off-the-shelf programmable gate array (FPGA) or other programmable logic device, discrete gate or transistor logic device, discrete hardware. Component. The methods, steps, and logic blocks disclosed in the embodiments of the present invention may be implemented or carried out. The general purpose processor may be a microprocessor or the processor may be any conventional processor or the like. The steps of the method disclosed in the embodiments of the present invention may be directly implemented as a hardware decoding processor, or may be performed by a combination of hardware and software modules in a decoding processor. The software modules can be located in a conventional storage medium such as random access memory, flash memory, read only memory, programmable read only memory or electrically erasable programmable memory, registers, and the like. The storage medium is located in the memory 340, and the processor 330 reads the information in the memory 340 and combines the hardware to perform the steps of the above method.

Optionally, the processor 330 may replace the first preset number of feedback data and the vacancy of the uplink time slot in the downlink time slot before the arrival of the uplink time slot by using at least one full cycle of zero.

Optionally, the processor 330 may replace, by using at least one full cycle of zeros, a second preset number of feedback data and a gap of the uplink time slot when the downlink time slot is just arrived.

Optionally, the processor 330 may replace, by using at least one full cycle of zeros, a third preset number of feedback data, a vacancy of the uplink time slot, and the downlink in the downlink time slot before the arrival of the uplink time slot on the sequence. The fourth preset amount of feedback data when the time slot has just arrived.

FIG. 11 is a schematic structural view of an accumulator 160 according to an embodiment of the present invention. Accumulator 160 can include input device 1610, output device 1620, processor 1630, and memory 1640.

The memory 1640 can include read only memory and random access memory and is provided to the processor 1630 Instructions and data. A portion of memory 1640 may also include non-volatile random access memory (NVRAM).

Memory 1640 stores the following elements, executable modules or data structures, or a subset thereof, or their extended set:

In the embodiment of the present invention, the processor 1630 performs the following operations by calling an operation instruction stored in the memory 1640 (the operation instruction can be stored in the operating system):

The feedback data is received by the input device 1610, the frequency of the feedback data is consistent with the frequency of the calibration data not subjected to up-conversion processing, and the phase of the feedback data is consistent with the phase of the up-converted calibration data; The vacancy in the field performs at least one full-time zero-padding process, and accumulates the feedback data at the same position in each cycle after zero-padding.

The accumulator provided by the embodiment of the present invention can ensure the continuity of the phase of the coherently accumulated data, thereby obtaining the accumulated gain.

The processor 1630 controls the operation of the accumulator 160, which may also be referred to as a CPU (Central Processing Unit). Memory 1640 can include read only memory and random access memory and provides instructions and data to processor 1630. A portion of memory 1640 may also include non-volatile random access memory (NVRAM). In a specific application, the components of the RF remote device 30 are coupled together by a bus system 1650. The bus system 1650 may include a power bus, a control bus, a status signal bus, and the like in addition to the data bus. However, for clarity of description, various buses are labeled as bus system 1650 in the figure.

The method disclosed in the foregoing embodiments of the present invention may be applied to the processor 1630 or implemented by the processor 1630. Processor 1630 may be an integrated circuit chip with signal processing capabilities. The instructions in the form of the actual software are completed. The processor 1630 described above may be a general purpose processor, a digital signal processor (DSP), an application specific integrated circuit (ASIC), an off-the-shelf programmable gate array (FPGA) or other programmable logic device, discrete gate or transistor logic device, discrete hardware. Component. Can be realized or executed The methods, steps, and logical block diagrams disclosed in the embodiments of the present invention are provided. The general purpose processor may be a microprocessor or the processor or any conventional processor or the like. The steps of the method disclosed in the embodiments of the present invention may be directly implemented by the hardware decoding processor, or may be performed by a combination of hardware and software modules in the decoding processor. The software module can be located in a conventional storage medium such as random access memory, flash memory, read only memory, programmable read only memory or electrically erasable programmable memory, registers, and the like. The storage medium is located in the memory 1640, and the processor 1630 reads the information in the memory 1640 and combines the hardware to perform the steps of the above method.

Optionally, the processor 1630 may replace the first preset number of feedback data and the gap of the uplink time slot in the downlink time slot before the arrival of the uplink time slot by using at least one full cycle of zeros.

Optionally, the processor 1630 may replace the second preset number of feedback data and the gap of the uplink time slot when the downlink time slot is just arrived by at least one full cycle of zeros.

Optionally, the processor 1630 may specifically replace, by using at least one full cycle of zeros, a third preset number of feedback data, a vacancy of the uplink time slot, and the downlink in the downlink time slot before the arrival of the uplink time slot on the sequence. The fourth preset amount of feedback data when the time slot has just arrived.

The method for data processing, the method and device for data accumulation provided by the embodiments of the present invention are described above, and the description of the above embodiments is only for helping to understand the method and core ideas of the present invention. Meanwhile, for the general technology in the field In the following, the description of the present invention should not be construed as limiting the scope of the present invention.

Claims

Rights request

1. A data processing method, characterized by including:

From the beginning of the downlink time slot, periodic calibration data is continuously sent;

Merge the calibration data and business data that have undergone up-conversion processing to obtain merged data; Perform radio frequency processing on the merged data to obtain radio frequency data, the phase of the radio frequency data is continuous; Perform down-conversion processing on the radio frequency data , obtain feedback data, the frequency of the feedback data is consistent with the frequency of the calibration data that has not been up-converted, and the phase of the feedback data is consistent with the phase of the calibration data that has been up-converted;

The empty bits in the feedback data are zero-padded for at least one full cycle, and the feedback data at the same position in each cycle after zero-padding is accumulated.

2. The method according to claim 1, characterized in that: performing at least one full period of zero-filling processing on the vacancies in the feedback data includes:

Replace the first preset number of feedback data in the downlink time slot before the arrival of the uplink time slot and the vacancies in the uplink time slot with at least one full cycle of zeros.

3. The method according to claim 1, characterized in that: performing at least one full cycle of zero-filling processing on the vacancies in the feedback data includes:

Use at least one full cycle of zeros to replace the second preset number of feedback data and the vacancies in the uplink time slot when the downlink time slot first arrives.

4. The method according to claim 1, characterized in that: performing at least one full cycle of zero-filling processing on the vacancies in the feedback data includes:

Use at least one full cycle of zeros to replace the third preset number of feedback data in the downlink time slot before the arrival of the uplink time slot, the vacancies in the uplink time slot, and the fourth time when the downlink time slot just arrives. A preset amount of feedback data.

5. A data accumulation method, characterized by including:

Receive feedback data, the frequency of the feedback data is consistent with the frequency of the calibration data that has not been up-converted, and the phase of the feedback data is consistent with the phase of the calibration data that has been up-converted;

6. The method according to claim 5, characterized in that: performing at least one full period of zero-filling processing on the vacancies in the feedback data includes:

7. The method according to claim 5, characterized in that: performing at least one full period of zero-filling processing on the vacancies in the feedback data includes:

8. The method according to claim 5, characterized in that: performing at least one full period of zero-filling processing on the vacancies in the feedback data includes:

Replace the third preset number of feedback data in the downlink time slot before the arrival of the uplink time slot, the vacancies of the uplink time slot and the fourth time when the downlink time slot has just arrived with at least one full cycle of zeros. A preset amount of feedback data.

9. A radio frequency remote device, characterized by including:

The data output unit is used to continuously send out periodic calibration data from the start time of the downlink time slot; the up-conversion processing unit is used to perform up-conversion processing on the calibration data output by the data output unit; and merge it with the business data , get the merged data;

A radio frequency processing unit is used to perform radio frequency processing on the merged data merged by the data merging unit to obtain radio frequency data, and the phase of the radio frequency data is continuous;

A down-conversion processing unit is configured to perform down-conversion processing on the radio frequency data processed by the radio frequency processing unit to obtain feedback data. The frequency of the feedback data is consistent with the frequency of the calibration data that has not been subjected to up-conversion processing, so The phase of the feedback data is consistent with the phase of the calibration data that has undergone upconversion processing;

An accumulation unit is configured to perform zero-filling processing for at least one full cycle on the vacancies in the feedback data obtained after down-conversion processing by the down-conversion processing unit, and to perform zero-filling processing on all the vacancies at the same position in each cycle after zero-filling. The above feedback data is accumulated.

10. The radio frequency remote device according to claim 9, characterized in that,

The accumulation unit is configured to replace the first preset number of feedback data in the downlink time slot before the arrival of the uplink time slot and the vacancies in the uplink time slot with at least one full cycle of zeros.

11. The radio frequency remote device according to claim 9, characterized in that,

The accumulation unit is used to replace the second preset number of feedback data and the vacancies in the uplink time slot when the downlink time slot first arrives with at least one full cycle of zeros.

12. The radio frequency remote device according to claim 9, characterized in that,

The accumulation unit is configured to replace the third preset number of feedback data in the downlink time slot before the arrival of the uplink time slot, the vacancies of the uplink time slot and the downlink time slot with at least one full cycle of zeros. The fourth preset number of feedback data when the gap first arrives.

13. An accumulator, characterized in that it includes:

A receiving unit, configured to receive feedback data, the frequency of the feedback data is consistent with the frequency of the calibration data that has not been up-converted, and the phase of the feedback data is consistent with the phase of the calibration data that has been up-converted;

A zero-filling unit, configured to perform at least one full cycle of zero-filling processing on the empty bits in the feedback data received by the receiving unit;

An accumulation unit is used to accumulate the feedback data at the same position in each cycle after the zero-filling unit adds zero.

14. The accumulator according to claim 13, characterized in that,

The zero-filling unit is used to replace the first preset number of feedback data in the downlink time slot before the arrival of the uplink time slot and the vacancies in the uplink time slot with at least one full period of zeros.

15. The accumulator according to claim 13, characterized in that,

The zero-filling unit is used to replace the second preset number of feedback data and the vacancies in the uplink time slot when the downlink time slot just arrives with at least one full cycle of zeros.

16. The accumulator according to claim 13, characterized in that,

The zero-filling unit is configured to replace the third preset number of feedback data in the downlink time slot before the arrival of the uplink time slot, the vacancies of the uplink time slot, and the downlink time slot with at least one full cycle of zeros. The fourth preset number of feedback data when the time slot first arrives.

17. A base station, characterized by comprising the radio frequency remote device according to any one of claims 9 to 12.

18. A data processing system, characterized in that it includes: a data output device, an up-conversion processing device, a data merging device, a radio frequency processing device, a down-conversion processing device, and an accumulator,

The data output device is used to continuously send periodic calibration data from the beginning of the downlink time slot;

The up-conversion processing device is used to perform up-conversion processing on the calibration data output by the data output device;

The data merging device is used to merge the calibration data and business data after upconversion processing by the upconversion processing device to obtain merged data;

The radio frequency processing device is used to perform radio frequency processing on the merged data merged by the data merging device to obtain radio frequency data, and the phase of the radio frequency data is continuous;

The down-conversion processing device is used to perform down-conversion processing on the radio frequency data processed by the radio frequency processing device to obtain feedback data. The frequency of the feedback data is consistent with the frequency of the calibration data that has not undergone up-conversion processing. The phase of the feedback data is consistent with the phase of the calibration data that has been up-converted;

The accumulator is used to perform zero padding processing for at least one full cycle on the empty bits in the feedback data obtained after downconversion processing by the downconversion processing device, and to pad the feedback data at the same position in each cycle after zero padding. The data is accumulated.

19. The data processing system according to claim 18, characterized in that,

The up-conversion processing device and the down-conversion processing device share a digitally controlled oscillator NCO to keep the phase of the feedback data consistent with the phase of the calibration data that has been up-converted.

20. The data processing system according to claim 18 or 19, characterized in that the phase-locked loops in the transmitting local oscillator and the receiving local oscillator in the radio frequency processing device are not powered off and are not reset.

21. The data processing system according to claim 18 or 19, characterized in that the system further includes: a filter, a DC processing device and a gain adjustment device;

The filter is used to filter the feedback data; The DC processing device is used to remove DC processing on the feedback data filtered by the filter;

The gain adjustment device is used to perform gain adjustment on the feedback data after the DC processing device has removed the DC.