WO2014205238A1 - Novel dielectric nano-structure for light trapping in solar cells - Google Patents
Novel dielectric nano-structure for light trapping in solar cells Download PDFInfo
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- WO2014205238A1 WO2014205238A1 PCT/US2014/043214 US2014043214W WO2014205238A1 WO 2014205238 A1 WO2014205238 A1 WO 2014205238A1 US 2014043214 W US2014043214 W US 2014043214W WO 2014205238 A1 WO2014205238 A1 WO 2014205238A1
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F77/00—Constructional details of devices covered by this subclass
- H10F77/30—Coatings
- H10F77/306—Coatings for devices having potential barriers
- H10F77/311—Coatings for devices having potential barriers for photovoltaic cells
- H10F77/315—Coatings for devices having potential barriers for photovoltaic cells the coatings being antireflective or having enhancing optical properties
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F77/00—Constructional details of devices covered by this subclass
- H10F77/70—Surface textures, e.g. pyramid structures
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
Definitions
- This invention relates to solar cells.
- Nano-structuring of solar cells has been considered for improving various aspects of solar cell performance, such as reducing reflection loss.
- US 2009/0261353 is an example where silicon nanostructures are coated with silicon oxide or silicon nitride.
- WO 2013/171286 is an example where a solar cell includes cone-shaped
- This work relates to a dielectric (e.g., S1 3 N 4 ) anti- reflection (AR) coating that is nano-structured (e.g., nano-pyramids ) .
- a dielectric e.g., S1 3 N 4
- AR anti- reflection
- nano-structured e.g., nano-pyramids
- the light absorption in the solar cell can be significantly enhanced, and the absorbing layer thickness needed in the solar cell can be significantly reduced.
- a planar interface between the window layer and the solar cell advantageously avoids nano-structuring in the active parts of the solar cell, thereby improving electrical performance.
- the reflection loss at this interface can end up having a negligible effect on device performance.
- the nano-structured dielectric window layer of the present work provides light trapping over a greater spectral range and also desirably reduces the effect of angle of incidence on solar cell reflection/absorption.
- FIG . 1 shows an exemplary embodiment of the inve
- FIG. 2 shows an exemplary solar cell layer structure suitable for use in embodiments of the invention.
- FIG. 3 is a scanning electron microscope (SEM) image of a fabricated device.
- FIGs . 4A-G show an exemplary fabrication sequence.
- FIG. 5 shows simulated absorption in a 200 nm thick GaAs layer with and without a nano-structured silicon nitride window layer.
- FIG. 6 shows measured normal incidence reflection from a solar cell with and without a nano-structured silicon nitride window layer.
- FIG. 7 shows measured reflection vs. incident angle from a solar cell with and without a nano-structured silicon nitride window layer.
- FIG. 8 shows measured current-voltage curves from various solar cells.
- FIG. 9 shows measured external quantum efficiency from the solar cells of FIG. 8.
- FIG. 1 shows an exemplary embodiment of the invention.
- semiconductor structure 102 includes an active region where charge carriers can be generated by absorption of light.
- a silicon nitride layer 106 is disposed on the semiconductor structure 102.
- the interface between semiconductor structure 102 and silicon nitride layer 106 is substantially planar.
- the silicon nitride layer 106 has nano-scale features at a surface of the silicon nitride layer facing away from the semiconductor structure, as shown.
- nano-scale features are defined as having height and lateral dimensions of 2 microns or less, and preferably between about 0.5 microns to about 1.5 microns.
- an optional top contact 104 is shown.
- silicon nitride is particularly suitable as a material for the window layer because 1) it is a material that is compatible with a wide variety of semiconductor processing, 2) it is sufficiently transparent for wavelengths in the solar spectrum, and 3) it has a desirable trade-off of index vs. absorption. As shown in Table 1 below, reflection tends to decrease as the index of the window layer increases for indices near 2.0. However, the band gap of silicon nitride (index 2.0) is about 5.3 eV, while higher index materials (e.g., T1O 2 index 2.3, ZnS index 2.4) have much lower band gaps (e.g., T1O 2 band gap 3.6 eV, ZnS band gap 3.2 eV) . Thus increasing the index to values higher than 2.0 with technologically reasonable materials will undesirably increase optical loss in the window layer due to absorption.
- Table 1 Reflection vs. window layer index (simulations of spectrum averaged reflection based on AM 1.5G standard solar spectrum) .
- the nano-scale features are pyramids, truncated pyramids, cones and/or truncated cones.
- Pyramids have facets on their lateral surfaces, while cones have smoothly curved lateral surfaces. Both pyramids and cones can have the top come to a point or can be truncated structures with a flat top surface.
- features preferably have an aspect ratio in a range from about 1 to about 2.
- aspect ratio is defined as the ratio of feature height to feature width at the widest point (which is typically at the base of the feature) .
- the total thickness of silicon nitride layer 106 is preferably in a range from about 0.5 microns to about 1.5 microns. Here total thickness is defined as the distance between the 102-106 interface and the tops of the nano- scale features. In some cases, it is preferred for layer 106 to have a two part structure, where a first part 108 of layer 106 includes the nano-scale features and a second part 110 of layer 106 is uniform. Second part 110 is sandwiched between first part 108 and semiconductor
- first part 108 is
- FIG . 2 shows an exemplary solar cell layer structure suitable for use in embodiments of the invention as semiconductor structure 102 in FIG . 1 .
- 202 is a p-type silicon substrate (doping 1 ⁇ 10 15 cm -3 )
- 204 is a p-type silicon layer (thickness 1.7 ⁇ , doping 3 ⁇ 10 18 cm -3 )
- 206 is an intrinsic silicon layer (thickness 0.9 ⁇ )
- 208 is an n-type silicon layer (thickness 0.3 ⁇ , doping 1 x 10 19 cm “3 ) .
- the active region of semiconductor structure 102 can include silicon and/or compound semiconductors.
- the active region thickness is preferably in a range from about 100 nm to about 3 microns. In cases where the active region is silicon, the active region thickness is
- FIG. 3 is a scanning electron microscope (SEM) image of a fabricated device. Here it is apparent that nano- scale structures in silicon nitride have successfully been fabricated .
- FIGs . 4A-G show an exemplary fabrication sequence.
- a method of making solar cells according to this work includes:
- Forming the nano-scale features can include:
- layer 106 can act as a passivation layer for semiconductor structure 102 to reduce surface/interface recombination of charge carriers .
- FIG. 4A shows silicon nitride 106 disposed on
- FIG. 4B shows the result of depositing masking particles 402 on silicon nitride 106.
- these masking particles can be silicon oxide nano-spheres .
- FIG. 4C shows the result of etching with an etch that preferentially etches silicon nitride 106 relative to the masking particles 402.
- this etch can be a CF 4 plasma etch.
- FIG. 4D shows the result of removing the masking particles 402. If this step is performed with an etch, any etch that preferentially etches masking particles 402 relative to silicon nitride can be employed.
- FIG. 4E shows the result of deposition and patterning of photoresist 404.
- FIG. 4F shows the result of etching silicon nitride in areas left exposed by the patterning of FIG. 4E. Any etch that preferentially etches silicon nitride relative to silicon and relative to photoresist 404 can be employed for this step.
- buffered oxide etch (BOE) can be employed.
- FIG. 4G shows a final structure obtained by removal of photoresist 404 and deposition of metal contact 104.
- FIG. 5 shows simulated absorption in a 200 nm thick
- FIG. 6 shows measured normal incidence reflection from a solar cell with and without a nano-structured silicon nitride window layer.
- the nano-structured window layer leads to less than 5% reflection in the visible part and near-infrared part of the spectrum.
- FIG. 7 shows measured reflection vs. incident angle from a solar cell with and without a nano-structured silicon nitride window layer.
- FIG. 8 shows measured current-voltage curves from various solar cells.
- SL ARC is an abbreviation of single-layer anti-reflection coating.
- V oc open-circuit voltage
- J sc short-circuit current
- FF fill factor
- Eff. efficiency
- Table 2 Solar cell performance for various window layer configurations .
- FIG . 9 shows measured external quantum efficiency
- EQE from the solar cells of FIG . 8 .
- the EQE is enhanced by over 30% by the nano- structured window layer.
- the EQE enhancement decreases to about 15%, which is attributed to reduced carrier collection efficiency in this part of the spectrum in the experimental devices.
- the single-layer anti-reflection coating is seen to have an undesirable wavelength-dependence in its effect on efficiency.
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- Photovoltaic Devices (AREA)
Abstract
This work relates to a dielectric (e.g., S13N4) anti- reflection (AR) coating that is nano-structured (e.g., nano-pyramids ). By including such nano-structures as part of a window layer in a solar cell, the light absorption in the solar cell can be significantly enhanced, and the absorbing layer thickness needed in the solar cell can be significantly reduced. Furthermore, a planar interface between the window layer and the solar cell advantageously avoids nano-structuring in the active parts of the solar cell, thereby improving electrical performance.
Description
Novel Dielectric Structure for Light Trapping in
Solar Cells by
Yangsen Kang, Dong Liang, Yusi Chen, Yijie Huo, and
James S. Harris, Jr.
FIELD OF THE INVENTION
This invention relates to solar cells.
BACKGROUND
Nano-structuring of solar cells has been considered for improving various aspects of solar cell performance, such as reducing reflection loss. US 2009/0261353 is an example where silicon nanostructures are coated with silicon oxide or silicon nitride. WO 2013/171286 is an example where a solar cell includes cone-shaped
nanostructures .
However, conventional nano-structured solar cells tend to experience a trade off where improved optical
performance (e.g., reduced reflection) is obtained, but electrical performance is undesirably degraded (e.g., nanostructured solar cell active regions can have excess surface recombination) . Accordingly, it would be an advance in the art to avoid making a performance compromise along these lines.
SUMMARY
This work relates to a dielectric (e.g., S13N4) anti- reflection (AR) coating that is nano-structured (e.g., nano-pyramids ) . By including such nano-structures as part of a window layer in a solar cell, the light absorption in the solar cell can be significantly enhanced, and the absorbing layer thickness needed in the solar cell can be significantly reduced. Furthermore, a planar interface between the window layer and the solar cell advantageously avoids nano-structuring in the active parts of the solar cell, thereby improving electrical performance.
Surprisingly, the reflection loss at this interface can end up having a negligible effect on device performance.
High open circuit voltage and high fill factor as well as high short circuit current can be obtained in such nanostructured solar cells. Therefore, the efficiency of solar cells can be significantly improved. In addition, reduction of absorbing material thickness can reduce the solar cell cost. This approach is broadly applicable, e.g., to anti- reflection and light trapping for most kinds of solar cells, such as silicon, III-V, CIGS (copper indium gallium selenide) , CdTe solar cells etc.
Compared with traditional anti-reflective coatings, the nano-structured dielectric window layer of the present work provides light trapping over a greater spectral range and also desirably reduces the effect of angle of incidence on solar cell reflection/absorption.
BRIEF DESCRIPTION OF THE DRAWINGS
FIG . 1 shows an exemplary embodiment of the inve
FIG. 2 shows an exemplary solar cell layer structure suitable for use in embodiments of the invention.
FIG. 3 is a scanning electron microscope (SEM) image of a fabricated device.
FIGs . 4A-G show an exemplary fabrication sequence.
FIG. 5 shows simulated absorption in a 200 nm thick GaAs layer with and without a nano-structured silicon nitride window layer.
FIG. 6 shows measured normal incidence reflection from a solar cell with and without a nano-structured silicon nitride window layer.
FIG. 7 shows measured reflection vs. incident angle from a solar cell with and without a nano-structured silicon nitride window layer. FIG. 8 shows measured current-voltage curves from various solar cells.
FIG. 9 shows measured external quantum efficiency from the solar cells of FIG. 8.
DETAILED DESCRIPTION
FIG. 1 shows an exemplary embodiment of the invention. In this solar cell, semiconductor structure 102 includes an active region where charge carriers can be generated by absorption of light. A silicon nitride layer 106 is disposed on the semiconductor structure 102. The interface between semiconductor structure 102 and silicon nitride layer 106 is substantially planar. The silicon nitride layer 106 has nano-scale features at a surface of the silicon nitride layer facing away from the semiconductor structure, as shown. Here nano-scale features are defined
as having height and lateral dimensions of 2 microns or less, and preferably between about 0.5 microns to about 1.5 microns. On FIG . 1 , an optional top contact 104 is shown.
We have found that silicon nitride is particularly suitable as a material for the window layer because 1) it is a material that is compatible with a wide variety of semiconductor processing, 2) it is sufficiently transparent for wavelengths in the solar spectrum, and 3) it has a desirable trade-off of index vs. absorption. As shown in Table 1 below, reflection tends to decrease as the index of the window layer increases for indices near 2.0. However, the band gap of silicon nitride (index 2.0) is about 5.3 eV, while higher index materials (e.g., T1O2 index 2.3, ZnS index 2.4) have much lower band gaps (e.g., T1O2 band gap 3.6 eV, ZnS band gap 3.2 eV) . Thus increasing the index to values higher than 2.0 with technologically reasonable materials will undesirably increase optical loss in the window layer due to absorption.
Table 1: Reflection vs. window layer index (simulations of spectrum averaged reflection based on AM 1.5G standard solar spectrum) .
Preferably the nano-scale features are pyramids, truncated pyramids, cones and/or truncated cones. Pyramids have facets on their lateral surfaces, while cones have smoothly curved lateral surfaces. Both pyramids and cones
can have the top come to a point or can be truncated structures with a flat top surface. The nano-scale
features preferably have an aspect ratio in a range from about 1 to about 2. Here the aspect ratio is defined as the ratio of feature height to feature width at the widest point (which is typically at the base of the feature) .
Practice of the invention does not depend critically on the lateral arrangement of the nano-scale features. For example, suitable arrangements for these features include, but are not limited to: square lattices and hexagonal lattices .
The total thickness of silicon nitride layer 106 is preferably in a range from about 0.5 microns to about 1.5 microns. Here total thickness is defined as the distance between the 102-106 interface and the tops of the nano- scale features. In some cases, it is preferred for layer 106 to have a two part structure, where a first part 108 of layer 106 includes the nano-scale features and a second part 110 of layer 106 is uniform. Second part 110 is sandwiched between first part 108 and semiconductor
structure 102. The thickness of first part 108 is
preferably in a range from about 0.5 microns to about 1.5 microns. The thickness of second part 110 is preferably in a range from about 50 nm to about 200 nm. Practice of the invention does not depend critically on details of semiconductor structure 102. Any kind of solar cell can benefit from a nano-structured dielectric window layer as described here, including but not limited to: silicon solar cells, compound semiconductor solar cells, single junction solar cells, and multi-j unction solar cells. FIG . 2 shows an exemplary solar cell layer structure suitable for use in embodiments of the invention as semiconductor structure 102 in FIG . 1 . In this example,
202 is a p-type silicon substrate (doping 1 χ 1015 cm-3) , 204 is a p-type silicon layer (thickness 1.7 μιτι, doping 3 χ 1018 cm-3), 206 is an intrinsic silicon layer (thickness 0.9 μιη) , and 208 is an n-type silicon layer (thickness 0.3 μιτι, doping 1 x 1019 cm"3) .
The active region of semiconductor structure 102 can include silicon and/or compound semiconductors. In cases where the active region includes a compound semiconductor, the active region thickness is preferably in a range from about 100 nm to about 3 microns. In cases where the active region is silicon, the active region thickness is
preferably in a range from about 1 micron to about 100 microns .
FIG. 3 is a scanning electron microscope (SEM) image of a fabricated device. Here it is apparent that nano- scale structures in silicon nitride have successfully been fabricated .
FIGs . 4A-G show an exemplary fabrication sequence.
This sequence is provided as an illustrative example, and any other approach for providing nano-structured window layers as described above can also be employed. In general terms, a method of making solar cells according to this work includes:
1) providing a semiconductor structure including an active region where charge carriers can be generated by absorption of light;
2) depositing a silicon nitride layer on the
semiconductor structure, where an interface between the semiconductor structure and the silicon nitride layer is substantially planar; and
3) forming nano-scale features at a surface of the silicon nitride layer facing away from the semiconductor structure .
Forming the nano-scale features can include:
4) depositing masking particles on the silicon nitride layer; and
5) etching the silicon nitride layer with an etch that preferentially etches silicon nitride relative to the masking particles to form the nano-scale features. This kind of fabrication sequence can advantageously be used to provide a nearly ideal interface between
semiconductor structure 102 and silicon nitride layer 106 in terms of electrical properties. In other words, layer 106 can act as a passivation layer for semiconductor structure 102 to reduce surface/interface recombination of charge carriers .
FIG. 4A shows silicon nitride 106 disposed on
semiconductor structure 102. FIG. 4B shows the result of depositing masking particles 402 on silicon nitride 106. For example, these masking particles can be silicon oxide nano-spheres . FIG. 4C shows the result of etching with an etch that preferentially etches silicon nitride 106 relative to the masking particles 402. For example, this etch can be a CF4 plasma etch. FIG. 4D shows the result of removing the masking particles 402. If this step is performed with an etch, any etch that preferentially etches masking particles 402 relative to silicon nitride can be employed. FIG. 4E shows the result of deposition and patterning of photoresist 404. FIG. 4F shows the result of etching silicon nitride in areas left exposed by the patterning of FIG. 4E. Any etch that preferentially etches silicon nitride relative to silicon and relative to
photoresist 404 can be employed for this step. For
example, buffered oxide etch (BOE) can be employed.
FIG. 4G shows a final structure obtained by removal of photoresist 404 and deposition of metal contact 104. FIG. 5 shows simulated absorption in a 200 nm thick
GaAs layer with and without a nano-structured silicon nitride window layer. These results show strong light trapping due to the nano-structured window layer (i.e., an 88% absorption enhancement relative to the control
structure.) This is attributed to coupling of incident light to a propagating mode in the 200 nm GaAs layer by scattering from the nano-structures of the silicon nitride window layer. Such enhanced absorption enables the use of thinner solar cell active regions. FIG. 6 shows measured normal incidence reflection from a solar cell with and without a nano-structured silicon nitride window layer. Here we see that the nano-structured window layer leads to less than 5% reflection in the visible part and near-infrared part of the spectrum. FIG. 7 shows measured reflection vs. incident angle from a solar cell with and without a nano-structured silicon nitride window layer. Here reflection is
spectrally averaged using the AM 1.5G standard solar spectrum. Broad-band anti-reflection is seen even for large angles of incidence. The reflection is less than 10% for incidence angles of 60 degrees of less.
FIG. 8 shows measured current-voltage curves from various solar cells. Here "SL ARC" is an abbreviation of single-layer anti-reflection coating. Results from these curves for open-circuit voltage (Voc) , short-circuit current ( Jsc) , fill factor (FF) and efficiency (Eff.) are given in Table 2 below. Here we see that the nano-structured window
layer enhances Jsc by 32% and enhances the efficiency by 43% relative to a structure having no window layer.
Table 2: Solar cell performance for various window layer configurations .
FIG . 9 shows measured external quantum efficiency
(EQE) from the solar cells of FIG . 8 . In the visible light region, the EQE is enhanced by over 30% by the nano- structured window layer. In the near-infrared region, the EQE enhancement decreases to about 15%, which is attributed to reduced carrier collection efficiency in this part of the spectrum in the experimental devices. The single-layer anti-reflection coating is seen to have an undesirable wavelength-dependence in its effect on efficiency.
Claims
1. A solar cell comprising: a semiconductor structure including an active region where charge carriers can be generated by absorption of light ;
a silicon nitride layer disposed on the semiconductor structure ;
wherein an interface between the semiconductor structure and the silicon nitride layer is substantially planar; and wherein the silicon nitride layer has nano-scale features at a surface of the silicon nitride layer facing away from the semiconductor structure.
2. The solar cell of claim 1, wherein the nano-scale features comprise features selected from the group
consisting of: pyramids, truncated pyramids, cones and truncated cones.
3. The solar cell of claim 1, wherein the nano-scale features have an aspect ratio defined as a ratio of feature height to feature width, and wherein the aspect ratio is in a range from about 1 to about 2.
4. The solar cell of claim 1, wherein the active region comprises one or more materials selected from the group consisting of: silicon and compound semiconductors.
5. The solar cell of claim 1, wherein the active region comprises a compound semiconductor and wherein a thickness of the active region is in a range from about 100 nm to about 3 microns.
6. The solar cell of claim 1, wherein the active region comprises silicon and wherein a thickness of the active region is in a range from about 1 micron to about 100 microns .
7. The solar cell of claim 1, wherein a thickness of the silicon nitride layer is in a range from about 0.5 microns to about 1.5 microns.
8. The solar cell of claim 1, wherein a first part of the silicon nitride layer includes the nano-scale features and a second part of the silicon nitride layer is uniform and is sandwiched between the semiconductor structure and the first part of the silicon nitride layer.
9. The solar cell of claim 7, wherein a thickness of the first part of the silicon nitride layer is in a range from about 0.5 microns to about 1.5 microns.
10. The solar cell of claim 7, wherein a thickness of the second part of the silicon nitride layer is in a range from about 50 nm to about 200 nm.
11. A method of making a solar cell, the method comprising:
providing a semiconductor structure including an active region where charge carriers can be generated by absorption of light; depositing a silicon nitride layer on the
semiconductor structure, wherein an interface between the semiconductor structure and the silicon nitride layer is substantially planar; and forming nano-scale features at a surface of the silicon nitride layer facing away from the semiconductor structure .
12. The method of claim 11, wherein the forming nano-scale features comprises:
depositing masking particles on the silicon nitride layer; and etching the silicon nitride layer with an etch that preferentially etches silicon nitride relative to the masking particles to form the nano-scale features.
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| US201361836866P | 2013-06-19 | 2013-06-19 | |
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| CN109581559A (en) * | 2019-01-29 | 2019-04-05 | 香港中文大学(深圳) | A kind of double grating nanostructure and preparation method thereof of quadrangle bipyramid array composition |
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| US11287551B2 (en) | 2016-09-05 | 2022-03-29 | Agency For Science, Technology And Research | Method of forming nano-patterns on a substrate |
| CN109581559A (en) * | 2019-01-29 | 2019-04-05 | 香港中文大学(深圳) | A kind of double grating nanostructure and preparation method thereof of quadrangle bipyramid array composition |
| CN109581559B (en) * | 2019-01-29 | 2021-02-02 | 香港中文大学(深圳) | Double grating nanostructure composed of quadrangular bipyramid array and preparation method thereof |
| WO2025027236A1 (en) * | 2023-08-01 | 2025-02-06 | Teknologian Tutkimuskeskus Vtt Oy | An antireflection coating and method for manufacturing such |
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