WO2014139519A3 - Metal ceramic substrate and method for producing a metal ceramic substrate - Google Patents

Metal ceramic substrate and method for producing a metal ceramic substrate Download PDF

Info

Publication number
WO2014139519A3
WO2014139519A3 PCT/DE2014/100089 DE2014100089W WO2014139519A3 WO 2014139519 A3 WO2014139519 A3 WO 2014139519A3 DE 2014100089 W DE2014100089 W DE 2014100089W WO 2014139519 A3 WO2014139519 A3 WO 2014139519A3
Authority
WO
WIPO (PCT)
Prior art keywords
ceramic substrate
metal ceramic
surface section
producing
connecting surface
Prior art date
Application number
PCT/DE2014/100089
Other languages
German (de)
French (fr)
Other versions
WO2014139519A2 (en
Inventor
Christoph WEHE
Xinhe Tang
Andreas Meyer
Original Assignee
Rogers Germany Gmbh
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rogers Germany Gmbh filed Critical Rogers Germany Gmbh
Publication of WO2014139519A2 publication Critical patent/WO2014139519A2/en
Publication of WO2014139519A3 publication Critical patent/WO2014139519A3/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
    • H01L23/3735—Laminates or multilayers, e.g. direct bond copper ceramic substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/111—Pads for surface mounting, e.g. lay-out

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Chemical & Material Sciences (AREA)
  • Ceramic Engineering (AREA)
  • Materials Engineering (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Insulated Metal Substrates For Printed Circuits (AREA)
  • Laminated Bodies (AREA)
  • Structure Of Printed Boards (AREA)

Abstract

The invention relates to a metal ceramic substrate and to a corresponding method for producing same. The metal ceramic substrate has at least one ceramic layer (2) which is provided with at least one metalization (3) on at least one surface side (2.1). The metallization is structured in order to form at least one connecting surface (5) for connecting at least one semiconductor component, in particular a power semiconductor component (7). In a particularly advantageous manner, the at least one connecting surface (5) has a central connecting surface section (5.1) and an insulating surface section (5.2) surrounding the central connecting surface section, and an insulating layer (6) made of a dielectric filling material is applied onto at least some regions of the insulating surface section (5.2).
PCT/DE2014/100089 2013-03-14 2014-03-14 Metal ceramic substrate and method for producing a metal ceramic substrate WO2014139519A2 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE102013102637.0A DE102013102637B4 (en) 2013-03-14 2013-03-14 Metal-ceramic substrate and method for producing such a metal-ceramic substrate and arrangement of such metal-ceramic substrates
DE102013102637.0 2013-03-14

Publications (2)

Publication Number Publication Date
WO2014139519A2 WO2014139519A2 (en) 2014-09-18
WO2014139519A3 true WO2014139519A3 (en) 2015-01-15

Family

ID=50679804

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/DE2014/100089 WO2014139519A2 (en) 2013-03-14 2014-03-14 Metal ceramic substrate and method for producing a metal ceramic substrate

Country Status (2)

Country Link
DE (1) DE102013102637B4 (en)
WO (1) WO2014139519A2 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10002821B1 (en) 2017-09-29 2018-06-19 Infineon Technologies Ag Semiconductor chip package comprising semiconductor chip and leadframe disposed between two substrates
DE102020115990B3 (en) 2020-06-17 2021-10-07 Infineon Technologies Ag METHOD OF MANUFACTURING A SUBSTRATE

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0827198A2 (en) * 1996-08-27 1998-03-04 Dowa Mining Co., Ltd. Metal ceramic substrates for semiconductors of high reliability
US20040245616A1 (en) * 2003-06-06 2004-12-09 Kloster Grant M. Stacked device underfill and a method of fabrication
US20070015340A1 (en) * 2002-12-28 2007-01-18 Kobrinsky Mauro J Method and structure for interfacing electronic devices
US20070267739A1 (en) * 2006-05-17 2007-11-22 Ryoichi Kajiwara Power Semiconductor Module
US20100201002A1 (en) * 2007-07-17 2010-08-12 Mitsubishi Electric Corporation Semiconductor device and process for producing same
DE102010024520A1 (en) * 2010-06-21 2011-12-22 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Method for increasing thermal mechanical resistance of ceramic substrate for mounting electrical components, involves covering edges of metallization layer by applying electrical isolation fill material between edges and substrate
WO2012035680A1 (en) * 2010-09-14 2012-03-22 株式会社日立製作所 Power module and manufacturing method for same
US20120199381A1 (en) * 2011-02-08 2012-08-09 Samsung Electro-Mechanics Co., Ltd. Printed circuit board

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2213115C3 (en) 1972-03-17 1975-12-04 Siemens Ag, 1000 Berlin Und 8000 Muenchen Process for the high-strength joining of ceramics made of carbides, including diamonds, borides, nitrides or suicides, with metal by the dry soldering process
US3766634A (en) 1972-04-20 1973-10-23 Gen Electric Method of direct bonding metals to non-metallic substrates
US3744120A (en) 1972-04-20 1973-07-10 Gen Electric Direct bonding of metals with a metal-gas eutectic
JPH0810710B2 (en) 1984-02-24 1996-01-31 株式会社東芝 Method for manufacturing good thermal conductive substrate
JP4372669B2 (en) * 2004-11-25 2009-11-25 株式会社トクヤマ Device mounting substrate manufacturing method
DE102007034491A1 (en) 2007-07-24 2009-02-05 Siemens Ag Module with electronic component between two substrates, in particular DCB ceramic substrates, its production and contacting

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0827198A2 (en) * 1996-08-27 1998-03-04 Dowa Mining Co., Ltd. Metal ceramic substrates for semiconductors of high reliability
US20070015340A1 (en) * 2002-12-28 2007-01-18 Kobrinsky Mauro J Method and structure for interfacing electronic devices
US20040245616A1 (en) * 2003-06-06 2004-12-09 Kloster Grant M. Stacked device underfill and a method of fabrication
US20070267739A1 (en) * 2006-05-17 2007-11-22 Ryoichi Kajiwara Power Semiconductor Module
US20100201002A1 (en) * 2007-07-17 2010-08-12 Mitsubishi Electric Corporation Semiconductor device and process for producing same
DE102010024520A1 (en) * 2010-06-21 2011-12-22 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Method for increasing thermal mechanical resistance of ceramic substrate for mounting electrical components, involves covering edges of metallization layer by applying electrical isolation fill material between edges and substrate
WO2012035680A1 (en) * 2010-09-14 2012-03-22 株式会社日立製作所 Power module and manufacturing method for same
US20120199381A1 (en) * 2011-02-08 2012-08-09 Samsung Electro-Mechanics Co., Ltd. Printed circuit board

Also Published As

Publication number Publication date
DE102013102637A1 (en) 2014-09-18
DE102013102637B4 (en) 2017-08-31
WO2014139519A2 (en) 2014-09-18

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