WO2014115005A3 - Vector generate mask instruction - Google Patents
Vector generate mask instruction Download PDFInfo
- Publication number
- WO2014115005A3 WO2014115005A3 PCT/IB2013/060815 IB2013060815W WO2014115005A3 WO 2014115005 A3 WO2014115005 A3 WO 2014115005A3 IB 2013060815 W IB2013060815 W IB 2013060815W WO 2014115005 A3 WO2014115005 A3 WO 2014115005A3
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- instruction
- vector generate
- generate mask
- mask instruction
- mask
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
- G06F9/30036—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/76—Architectures of general purpose stored program computers
- G06F15/80—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
- G06F15/8053—Vector processors
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
- G06F9/3001—Arithmetic instructions
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
- G06F9/30018—Bit or string instructions
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
- G06F9/30021—Compare instructions, e.g. Greater-Than, Equal-To, MINMAX
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
- G06F9/30032—Movement instructions, e.g. MOVE, SHIFT, ROTATE, SHUFFLE
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/3004—Arrangements for executing specific machine instructions to perform operations on memory
- G06F9/30047—Prefetch instructions; cache control instructions
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30098—Register arrangements
Abstract
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201380071241.9A CN104937538B (en) | 2013-01-23 | 2013-12-11 | Vector generates mask instruction |
DE112013005466.3T DE112013005466T5 (en) | 2013-01-23 | 2013-12-11 | Statement "Vector generate mask" |
GB1513183.2A GB2524440B (en) | 2013-01-23 | 2013-12-11 | Vector generate mask instruction |
JP2015553182A JP6380955B2 (en) | 2013-01-23 | 2013-12-11 | Computer program, computer system and method for processing VECTOR GENERATE MASK instructions |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US13/748,538 US9778932B2 (en) | 2013-01-23 | 2013-01-23 | Vector generate mask instruction |
US13/748,538 | 2013-01-23 |
Publications (2)
Publication Number | Publication Date |
---|---|
WO2014115005A2 WO2014115005A2 (en) | 2014-07-31 |
WO2014115005A3 true WO2014115005A3 (en) | 2014-12-24 |
Family
ID=51208688
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/IB2013/060815 WO2014115005A2 (en) | 2013-01-23 | 2013-12-11 | Vector generate mask instruction |
Country Status (6)
Country | Link |
---|---|
US (2) | US9778932B2 (en) |
JP (1) | JP6380955B2 (en) |
CN (1) | CN104937538B (en) |
DE (1) | DE112013005466T5 (en) |
GB (1) | GB2524440B (en) |
WO (1) | WO2014115005A2 (en) |
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US10866807B2 (en) | 2011-12-22 | 2020-12-15 | Intel Corporation | Processors, methods, systems, and instructions to generate sequences of integers in numerical order that differ by a constant stride |
US10223111B2 (en) | 2011-12-22 | 2019-03-05 | Intel Corporation | Processors, methods, systems, and instructions to generate sequences of integers in which integers in consecutive positions differ by a constant integer stride and where a smallest integer is offset from zero by an integer offset |
US9778932B2 (en) | 2013-01-23 | 2017-10-03 | International Business Machines Corporation | Vector generate mask instruction |
US9823924B2 (en) | 2013-01-23 | 2017-11-21 | International Business Machines Corporation | Vector element rotate and insert under mask instruction |
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US9804840B2 (en) | 2013-01-23 | 2017-10-31 | International Business Machines Corporation | Vector Galois Field Multiply Sum and Accumulate instruction |
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US11544214B2 (en) | 2015-02-02 | 2023-01-03 | Optimum Semiconductor Technologies, Inc. | Monolithic vector processor configured to operate on variable length vectors using a vector length register |
US11149195B2 (en) * | 2016-11-17 | 2021-10-19 | Current Lighting Solutions, Llc | Coated red line emitting phosphors |
US20200264879A1 (en) * | 2019-02-20 | 2020-08-20 | Nanjing Iluvatar CoreX Technology Co., Ltd. (DBA "Iluvatar CoreX Inc. Nanjing") | Enhanced scalar vector dual pipeline architecture with cross execution |
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US9778932B2 (en) | 2017-10-03 |
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US9740482B2 (en) | 2017-08-22 |
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DE112013005466T5 (en) | 2015-08-13 |
CN104937538B (en) | 2018-09-14 |
JP6380955B2 (en) | 2018-08-29 |
GB201513183D0 (en) | 2015-09-09 |
JP2016509717A (en) | 2016-03-31 |
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