WO2014101869A1 - Capacitance detecting circuit - Google Patents

Capacitance detecting circuit Download PDF

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Publication number
WO2014101869A1
WO2014101869A1 PCT/CN2013/090888 CN2013090888W WO2014101869A1 WO 2014101869 A1 WO2014101869 A1 WO 2014101869A1 CN 2013090888 W CN2013090888 W CN 2013090888W WO 2014101869 A1 WO2014101869 A1 WO 2014101869A1
Authority
WO
WIPO (PCT)
Prior art keywords
switch
terminal
detecting circuit
capacitance detecting
transferring capacitor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/CN2013/090888
Other languages
French (fr)
Inventor
Shengsheng CHEN
Jie Zhang
Yun Yang
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
BYD Co Ltd
Shenzhen BYD Auto R&D Co Ltd
Original Assignee
BYD Co Ltd
Shenzhen BYD Auto R&D Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by BYD Co Ltd, Shenzhen BYD Auto R&D Co Ltd filed Critical BYD Co Ltd
Priority to US14/653,497 priority Critical patent/US9612684B2/en
Publication of WO2014101869A1 publication Critical patent/WO2014101869A1/en
Anticipated expiration legal-status Critical
Priority to US15/436,981 priority patent/US9846514B2/en
Ceased legal-status Critical Current

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Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/0416Control or interface arrangements specially adapted for digitisers
    • G06F3/04166Details of scanning methods, e.g. sampling time, grouping of sub areas or time sharing with display driving
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R27/00Arrangements for measuring resistance, reactance, impedance, or electric characteristics derived therefrom
    • G01R27/02Measuring real or complex resistance, reactance, impedance, or other two-pole characteristics derived therefrom, e.g. time constant
    • G01R27/26Measuring inductance or capacitance; Measuring quality factor, e.g. by using the resonance method; Measuring loss factor; Measuring dielectric constants ; Measuring impedance or related variables
    • G01R27/2605Measuring capacitance
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/0416Control or interface arrangements specially adapted for digitisers
    • G06F3/04164Connections between sensors and controllers, e.g. routing lines between electrodes and connection pads
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/0416Control or interface arrangements specially adapted for digitisers
    • G06F3/0418Control or interface arrangements specially adapted for digitisers for error correction or compensation, e.g. based on parallax, calibration or alignment
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/044Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/047Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means using sets of wires, e.g. crossed wires
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/003Details of a display terminal, the details relating to the control arrangement of the display terminal and to the interfaces thereto
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00Aspects of the constitution of display devices
    • G09G2300/04Structural and physical details of display devices
    • G09G2300/0421Structural details of the set of electrodes
    • G09G2300/0426Layout of electrodes and connections

Definitions

  • Exemplary embodiments of the present disclosure relate generally to a circuit design field, and more particularly to a capacitance detecting circuit.
  • a touch screen with advantages of easy and convenient operation and humanization is widely used in various kinds of electronic products like a mobile phone, a PDA (personal digital assistant), a GPS (global position system), a PMP (MP3, MP4, etc.) and a tablet personal computer.
  • PDA personal digital assistant
  • GPS global position system
  • PMP MP3, MP4, etc.
  • an induction unit in the touch screen is judged whether to be touched or not by detecting a self-capacitance thereof, so it becomes more important to accurately detect the self-capacitance generated by the induction unit in the touch screen when the induction unit is touched.
  • a conventional method for detecting a capacitance has a disadvantage of low detection accuracy.
  • an error occurs because of an existence of a mutual-capacitance, thus decreasing the detection accuracy, and therefore it is difficult to correctly judge whether the induction unit is touched or not.
  • the capacitance detecting circuit when detecting the capacitance generated by touching the induction unit, an influence of a mutual-capacitance may be eliminated, thus improving a detection accuracy, thereby the induction unit can be judged correctly whether to be touched or not.
  • Fig. 3 is a schematic circuit diagram of the capacitance detecting circuit according to an example of the present disclosure
  • Fig. 4 is a wave chart of switch controlling signals of the capacitance detecting circuit according to an embodiment of the present disclosure
  • a capacitance detecting circuit As shown in Fig. 1, according to an embodiment of the present disclosure, a capacitance detecting circuit is provided.
  • the capacitance detecting circuit comprises N induction units (1, 2, 3... N), a transferring capacitor Cmod, a charging module 101, a controller 102 and a discharging module 100.
  • the transferring capacitor Cmod is configured to transfer its charges to a self-capacitor of a scanned induction unit among the N induction units (1, 2, 3... N).
  • a first terminal of the transferring capacitor is connected with first terminals of the N induction units respectively, a second terminal of the transferring capacitor is grounded, and second terminals of the N induction units are commonly grounded.
  • a capacitance thereof may be increased.
  • the charging module 101 is configured to charge the transferring capacitor Cmod.
  • a first terminal of the charging module 101 is connected with the first terminal of the transferring capacitor Cmod, and a second terminal of the charging module 101 is connected with a first power supply VD.
  • the charging module 101 comprises a first switch SW1 and a current source I connected in series.
  • the discharging module 100 is configured to discharge the transferring capacitor Cmod and comprises a first resistor Rl and a second switch SW2.
  • a first terminal of the discharging module 100 is connected with the first terminal of the charging module 101 and the first terminal of the transferring capacitor Cmod respectively, and a second terminal of the discharging module 100 is grounded.
  • the controller 102 controls the first switch SW1 to switch on so as to make the charging module 101 charge the transferring capacitor Cmod.
  • the controller 102 controls the second switch SW2 to switch on when the voltage of the transferring capacitor Cmod is larger than the preset threshold voltage Vth.
  • the controller 102 controls the second switch SW2 to switch off when the voltage of the transferring capacitor Cmod is smaller than the preset threshold voltage Vth.
  • the voltage of the transferring capacitor Cmod is pulled down when the charges of the transferring capacitor Cmod are transferred to a scanned induction unit.
  • the capacitance detecting circuit further comprises N selecting assemblies ( 1, 2, 3...N), in which each selecting assembly corresponds to one induction unit and is connected between the one induction unit and the transferring capacitor Cmod.
  • Each selecting assembly controls to connect or disconnect a corresponding induction unit with the transferring capacitor Cmod.
  • the each selecting assembly comprises a third switch SW3 and a fourth switch SW4.
  • the third switch SW3 is connected between the corresponding induction unit and the transferring capacitor Cmod.
  • a first terminal of the fourth switch SW4 is connected with the corresponding induction unit and a second terminal of the fourth switch SW4 is grounded.
  • the third switch SW3 and the fourth switch SW4 are switched on alternately.
  • the each selecting assembly comprises a fifth switch SW5, a first terminal of the fifth switch SW5 is connected with the corresponding induction unit, a second terminal of the fifth switch SW5 is connected with a second power supply VTH, and a voltage of the second power supply VTH is the preset threshold voltage Vth.
  • the voltage of the second power supply VTH may be other values.
  • the capacitance detecting circuit further comprises a pre-charging module 201 configured to pre-charge the transferring capacitor Cmod.
  • a first terminal of the pre-charging module 201 is connected with the first terminal of the transferring capacitor Cmod, and a second terminal of the pre-charging module 201 is connected with the first power supply VD.
  • the pre-charging module 201 comprises a sixth switch SW6 and a second resistor R2 connected in series. That is to say, the pre-charging module 201 pre-charges the transferring capacitor Cmod until the voltage of the transferring capacitor Cmod closely reaches the preset threshold Vth before charging the transferring capacitor Cmod.
  • the capacitance detecting circuit further comprises a pre-discharging module 202 configured to pre-discharge the transferring capacitor Cmod before the pre-charging module pre-charges the transferring capacitor.
  • a first terminal of the pre-discharging module 202 is connected with the first terminal of the transferring capacitor Cmod, and a second terminal of the pre-discharging module 202 is grounded.
  • the pre-discharging module 202 comprises a seventh switch SW7 and the pre-discharging module 202 pre-discharges the transferring capacitor Cmod by grounding a first terminal of the seventh switch SW7.
  • pre-charging and pre-discharging the transferring capacitor Cmod is to ensure that states of the transferring capacitor Cmod are same for each detection, thus increasing the detection accuracy.
  • the controller comprises: a comparator CMP, a trigger DFF, a counter 206, a detector 203 and a first selector 204.
  • a first input terminal of the comparator CMP is applied with the preset threshold voltage Vth and a second input terminal of the comparator CMP is connected with the first terminal of the transferring capacitor Cmod.
  • An input terminal of the trigger DFF is connected with an output terminal of the comparator CMP for generating a triggering signal according to a comparison result from the comparator CMP.
  • the trigger DFF further comprises a clock signal CNT_CLK input.
  • An input terminal of the counter 206 is connected with an output terminal of the trigger DFF for counting according to the triggering signal.
  • the first selector 204 is an AND gate, a first input terminal of the AND gate is connected with the output terminal of the trigger DFF, and a second input terminal of the AND gate is applied with a switch enable signal SWITCH EN.
  • the switch enable signal SWITCH EN is low to control the second switch SW2 of the discharging module 100 to switch off.
  • the switch enable signal SWITCH EN is high, and a signal from an output terminal of the AND gate controls the second switch SW2 of the discharging module 100 to switch on or switch off.
  • the switch enable signal SWITCH EN returns to be low after the detection is completed.
  • the second selector 205 is a NOR gate, a first input terminal of the NOR gate is connected with the output terminal of the comparator CMP, and a second input terminal of the NOR gate is applied with a pre-charging signal PRE_CHRG.
  • a capacitance detection process can be described as follows.
  • the trigger DFF controls the second switch SW2 to switch on according to the result output from the comparator CMP, so that the transferring capacitor Cmod is discharged via the first resistance Rl.
  • a reference voltage of the comparator CMP i.e., the preset threshold voltage Vth
  • the trigger DFF controls the second switch SW2 to switch on according to the result output from the comparator CMP, so that the transferring capacitor Cmod is discharged via the first resistance Rl.
  • the voltage of the transferring capacitor Cmod is smaller than the preset threshold voltage Vth, an output of the comparator CMP is turned over and the trigger DFF controls the second switch SW2 to switch off according to the output result from the comparator CMP.
  • the charges of the transferring capacitor Cmod are transferred to a capacitor Cx of the induction unit via the third switch SW3.
  • the voltage of the transferring capacitor Cmod is pulled down to be smaller than the preset threshold voltage Vth, which enables the output of the comparator CMP to be turned over so as to switch off the second switch SW2.
  • the transferring capacitor Cmod is charged via the current source I until the voltage thereof is larger than the preset threshold voltage Vth, which enables the output of the comparator CMP to be turned over to switch on the second switch SW2.
  • the third switch SW3 and the fourth switch SW4 are controlled by a two-phase non-overlapped clock signal (that is, when the third switch SW3 is controlled to switch on, the fourth switch SW4 is controlled to switch off; and when the third switch SW3 is controlled to switch off, the fourth switch SW4 is controlled to switch on), the charges on the capacitor Cx transferred from the transferring capacitor Cmod are discharged to the ground by the fourth switch SW4.
  • the fifth switch is a synchronous switch. When the induction unit is being scanned, the fifth switch SW5 is kept off.
  • the capacitance of the capacitor Cx, the duty ratio of a rectangular wave output from the trigger DFF and the count value of the counter 206 when the induction unit is touched are different from those when the induction unit is not touched.
  • a wave chart of switch controlling signals under a no n- fullscreen synchronous mode is shown in Fig. 4, where a high level means that the switch is controlled to switch on, and a low level means that the switch is controlled to switch off.
  • a high level means that the switch is controlled to switch on
  • a low level means that the switch is controlled to switch off.
  • a wave chart of the switch controlling signals under a fullscreen synchronous mode is shown in Fig. 5, where the high level means that the switch is controlled to switch on, and the low level means that the switch is controlled to switch off.
  • the fifth switch SW5 of an M th selecting assembly is controlled to switch off by the controller 102
  • the third switch SW3 and the fourth switch SW4 of the ⁇ ⁇ selecting assembly are controlled to switch on alternately by the controller 102
  • the third switch SW3 of other selecting assemblies except the M th selecting assembly is controlled to switch off by the controller 102
  • the fourth switch SW4 and the fifth switch SW5 of other selecting assemblies except the ⁇ ⁇ selecting assembly are controlled to switch on alternately by the controller 102.
  • the fifth switch SW5 of a currently scanned induction unit is controlled to switch off, while the fifth switches SW5 and the third switches SW3 of other synchronous but non-scanned induction units have a same on-off state, that is, the third switch SW3 and the fourth switch SW4 of the scanned induction unit are switched on alternatively, and the fourth switches SW4 and the fifth switches SW5 of other non-scanned induction units are switched on alternatively.
  • the charges of the transferring capacitor Cmod is transferred to the capacitor (self-capacitor) Cx of the M th induction unit via the third switch SW3 of the M th selecting assembly.
  • the capacitors Cx of the synchronous but non-scanned induction units are charged with a specified voltage via the corresponding fifth switches SW5.
  • the specified voltage value is equal to the preset threshold voltage Vth.
  • the capacitance Cx of the current scanned induction unit and that of the synchronous but no n- scanned induction units are charged with the preset threshold voltage Vth, and are also discharged to ground via the corresponding fourth switch SW4, so as to eliminate an influence of a mutual capacitance, thus improving the detection accuracy.
  • the capacitance detecting circuit when detecting the capacitance generated by touching the induction unit, an influence of a mutual-capacitance may be eliminated, thus improving a detection accuracy, thereby the induction unit can be judged correctly whether to be touched or not.
  • each function cell of the embodiments of the present disclosure may be integrated in a processing module, or these cells may be separate physical entities, or two or more cells are integrated in a processing module.
  • the integrated module may be realized in a form of hardware or in a form of software function modules. When the integrated module is realized in a form of software function module and is sold or used as a standalone product, the integrated module may be stored in a computer readable storage medium.
  • the storage medium mentioned above may be read-only memories, magnetic disks or CD, etc.

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Human Computer Interaction (AREA)
  • Computer Hardware Design (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Measurement Of Resistance Or Impedance (AREA)
  • Electronic Switches (AREA)

Abstract

A capacitance detecting circuit is provided, comprising: N induction units; a transferring capacitor configured to transfer charges to a capacitor of a scanned induction unit, and a second terminal of the transferring capacitor is grounded; a charging module (101) configured to charge the transferring capacitor, and a second terminal of the charging module (101) is connected with a first power supply; a discharging module (100) configured to discharge the transferring capacitor and comprising a first resistor and a second switch, a second terminal of the discharging module (100) is grounded; a controller connected with the charging module (101), the transferring capacitor and the discharging module respectively, and configured to control the second switch to switch on when a voltage of the transferring capacitor is larger than a preset threshold voltage, to update a count value and to detect a touch on the N induction units according to the count value.

Description

CAPACITANCE DETECTING CIRCUIT
CROSS-REFERENCE TO RELATED APPLICATION
This application claims priority to, and benefits of Chinese Patent Application Serial No. 201210585884.2, filed with the State Intellectual Property Office of P. R. C. on December 30, 2012, the entire content of which is incorporated herein by reference.
FIELD
Exemplary embodiments of the present disclosure relate generally to a circuit design field, and more particularly to a capacitance detecting circuit.
BACKGROUND
Presently, a touch screen with advantages of easy and convenient operation and humanization is widely used in various kinds of electronic products like a mobile phone, a PDA (personal digital assistant), a GPS (global position system), a PMP (MP3, MP4, etc.) and a tablet personal computer.
Conventionally, an induction unit in the touch screen is judged whether to be touched or not by detecting a self-capacitance thereof, so it becomes more important to accurately detect the self-capacitance generated by the induction unit in the touch screen when the induction unit is touched.
However, a conventional method for detecting a capacitance has a disadvantage of low detection accuracy. When detecting the capacitance generated by touching the induction unit, an error occurs because of an existence of a mutual-capacitance, thus decreasing the detection accuracy, and therefore it is difficult to correctly judge whether the induction unit is touched or not.
SUMMARY
Embodiments of the present disclosure seek to solve at least one of the problems existing in the related art to at least some extent.
According to embodiments of the present disclosure, a capacitance detecting circuit is provided. The capacitance detecting circuit comprises: N induction units, where N is an integer larger than or equal to 1 ; a transferring capacitor configured to transfer charges to a capacitor of a scanned induction unit among the N induction units, wherein a first terminal of the transferring capacitor is connected with the N induction units respectively, and a second terminal of the transferring capacitor is grounded; a charging module configured to charge the transferring capacitor, wherein a first terminal of the charging module is connected with the first terminal of the transferring capacitor, and a second terminal of the charging module is connected with a first power supply; a discharging module configured to discharge the transferring capacitor and comprising a first resistor and a second switch, wherein a first terminal of the discharging module is connected with the first terminal of the charging module and the first terminal of the transferring capacitor respectively, a second terminal of the discharging module is grounded; a controller connected with the charging module, the transferring capacitor and the discharging module respectively, and configured to control the second switch to switch on when a voltage of the transferring capacitor is larger than a preset threshold voltage, to update a count value and to detect a touch on the N induction units according to the count value.
With the capacitance detecting circuit, when detecting the capacitance generated by touching the induction unit, an influence of a mutual-capacitance may be eliminated, thus improving a detection accuracy, thereby the induction unit can be judged correctly whether to be touched or not.
Additional aspects and advantages of embodiments of present disclosure will be given in part in the following descriptions, become apparent in part from the following descriptions, or be learned from the practice of the embodiments of the present disclosure.
BRIEF DESCRIPTION OF THE DRAWINGS
These and other aspects and advantages of embodiments of the present disclosure will become apparent and more readily appreciated from the following descriptions made with reference to the drawings, in which:
Fig. 1 is a schematic diagram of a capacitance detecting circuit according to an embodiment of the present disclosure;
Fig. 2 is a schematic circuit diagram of the capacitance detecting circuit according to an embodiment of the present disclosure;
Fig. 3 is a schematic circuit diagram of the capacitance detecting circuit according to an example of the present disclosure;
Fig. 4 is a wave chart of switch controlling signals of the capacitance detecting circuit according to an embodiment of the present disclosure;
Fig. 5 is a wave chart of switch controlling signals of the capacitance detecting circuit according to another embodiment of the present disclosure.
DETAILED DESCRIPTION
Reference will be made in detail to embodiments of the present disclosure. The embodiments described herein with reference to drawings are explanatory, illustrative, and used to generally understand the present disclosure. The embodiments shall not be construed to limit the present disclosure. The same or similar elements and the elements having same or similar functions are denoted by like reference numerals throughout the descriptions.
In the description, terms concerning attachments, coupling and the like, such as "connected" and "interconnected", refer to a relationship in which structures are secured or attached to one another through mechanical or electrical connection, or directly or indirectly through intervening structures, unless expressly described otherwise.
In addition, terms such as "first" and "second" are used herein for purposes of description and are not intended to indicate or imply relative importance or significance.
As shown in Fig. 1, according to an embodiment of the present disclosure, a capacitance detecting circuit is provided. The capacitance detecting circuit comprises N induction units (1, 2, 3... N), a transferring capacitor Cmod, a charging module 101, a controller 102 and a discharging module 100.
When each induction unit is touched, a capacitance thereof is changed. N is an integer larger than or equal to 1. In one embodiment, the capacitance detecting circuit may detect a plurality of induction units simultaneously.
As shown in Fig. 1, the transferring capacitor Cmod is configured to transfer its charges to a self-capacitor of a scanned induction unit among the N induction units (1, 2, 3... N). A first terminal of the transferring capacitor is connected with first terminals of the N induction units respectively, a second terminal of the transferring capacitor is grounded, and second terminals of the N induction units are commonly grounded. In general, when the induction unit is touched, a capacitance thereof may be increased. For example, when it is scanned that induction units 1, 2, 3 among the N induction units are touched, a self-capacitance of each of the scanned induction units 1, 2, 3 is changed (for example increased), and the transferring capacitor Cmod transfers its charges to the self-capacitor of each of the scanned induction units 1, 2, 3 respectively, so as to pull down a voltage of the transferring capacitor Cmod.
The charging module 101 is configured to charge the transferring capacitor Cmod. A first terminal of the charging module 101 is connected with the first terminal of the transferring capacitor Cmod, and a second terminal of the charging module 101 is connected with a first power supply VD. The charging module 101 comprises a first switch SW1 and a current source I connected in series.
The discharging module 100 is configured to discharge the transferring capacitor Cmod and comprises a first resistor Rl and a second switch SW2. A first terminal of the discharging module 100 is connected with the first terminal of the charging module 101 and the first terminal of the transferring capacitor Cmod respectively, and a second terminal of the discharging module 100 is grounded.
A controller 102 is connected with the charging module 101, the transferring capacitor Cmod and the discharging module 100 respectively. The controller 102 is configured to control the second switch SW2 to switch off when a voltage of the transferring capacitor Cmod is larger than a preset threshold voltage Vth, to update a count value and to detect a touch on the N induction units according to the count value. That is to say, the controller 102 controls the second switch SW2 to switch on when the voltage of the transferring capacitor Cmod is larger than the preset threshold voltage Vth; controls the second switch SW2 to switch off when the voltage of the transferring capacitor Cmod is smaller than the preset threshold voltage Vth; and updates a count value according to the touch on the induction unit so as to detect the touch on the N induction units.
Specifically, firstly, the controller 102 controls the first switch SW1 to switch on so as to make the charging module 101 charge the transferring capacitor Cmod. The controller 102 controls the second switch SW2 to switch on when the voltage of the transferring capacitor Cmod is larger than the preset threshold voltage Vth. The controller 102 controls the second switch SW2 to switch off when the voltage of the transferring capacitor Cmod is smaller than the preset threshold voltage Vth. The voltage of the transferring capacitor Cmod is pulled down when the charges of the transferring capacitor Cmod are transferred to a scanned induction unit. The larger the capacitance of the scanned induction unit is, the lower the voltage of the transferring capacitor Cmod is, so that the smaller the count value of a counter is, that is to say, the count value of the touched induction unit is smaller than that of a non-touched induction unit, thus detecting the touch on the N induction units according to the count value.
In one embodiment of the present disclosure, as shown in Fig. 1, the capacitance detecting circuit further comprises N selecting assemblies ( 1, 2, 3...N), in which each selecting assembly corresponds to one induction unit and is connected between the one induction unit and the transferring capacitor Cmod. Each selecting assembly controls to connect or disconnect a corresponding induction unit with the transferring capacitor Cmod.
In one embodiment of the present disclosure, the each selecting assembly comprises a third switch SW3 and a fourth switch SW4. The third switch SW3 is connected between the corresponding induction unit and the transferring capacitor Cmod. A first terminal of the fourth switch SW4 is connected with the corresponding induction unit and a second terminal of the fourth switch SW4 is grounded. The third switch SW3 and the fourth switch SW4 are switched on alternately.
Moreover, as shown in Fig. 2, the each selecting assembly comprises a fifth switch SW5, a first terminal of the fifth switch SW5 is connected with the corresponding induction unit, a second terminal of the fifth switch SW5 is connected with a second power supply VTH, and a voltage of the second power supply VTH is the preset threshold voltage Vth. Of course, in another embodiment of the present disclosure, the voltage of the second power supply VTH may be other values.
Further, in one embodiment of the present disclosure, as shown in Fig. 2, the capacitance detecting circuit further comprises a pre-charging module 201 configured to pre-charge the transferring capacitor Cmod. A first terminal of the pre-charging module 201 is connected with the first terminal of the transferring capacitor Cmod, and a second terminal of the pre-charging module 201 is connected with the first power supply VD. The pre-charging module 201 comprises a sixth switch SW6 and a second resistor R2 connected in series. That is to say, the pre-charging module 201 pre-charges the transferring capacitor Cmod until the voltage of the transferring capacitor Cmod closely reaches the preset threshold Vth before charging the transferring capacitor Cmod.
Also as shown in Fig. 2, the capacitance detecting circuit further comprises a pre-discharging module 202 configured to pre-discharge the transferring capacitor Cmod before the pre-charging module pre-charges the transferring capacitor. A first terminal of the pre-discharging module 202 is connected with the first terminal of the transferring capacitor Cmod, and a second terminal of the pre-discharging module 202 is grounded. The pre-discharging module 202 comprises a seventh switch SW7 and the pre-discharging module 202 pre-discharges the transferring capacitor Cmod by grounding a first terminal of the seventh switch SW7. In the embodiment, pre-charging and pre-discharging the transferring capacitor Cmod is to ensure that states of the transferring capacitor Cmod are same for each detection, thus increasing the detection accuracy.
In one embodiment of the present disclosure, as shown in Fig. 2, the controller comprises: a comparator CMP, a trigger DFF, a counter 206, a detector 203 and a first selector 204. A first input terminal of the comparator CMP is applied with the preset threshold voltage Vth and a second input terminal of the comparator CMP is connected with the first terminal of the transferring capacitor Cmod. An input terminal of the trigger DFF is connected with an output terminal of the comparator CMP for generating a triggering signal according to a comparison result from the comparator CMP. The trigger DFF further comprises a clock signal CNT_CLK input. An input terminal of the counter 206 is connected with an output terminal of the trigger DFF for counting according to the triggering signal. The detector 203 is connected with the counter 206 and configured to detect the touch on the N induction units according to the count value of the counter 206. An input terminal of the first selector 204 is connected with the output terminal of the trigger DFF for generating a first control signal according to the triggering signal. The first control signal is configured to control the discharging module 100 to discharge to the transferring capacitor Cmod.
In addition, the controller 102 further comprises a second selector 205. An input terminal of the second selector 205 is connected with the output terminal of the comparator CMP for generating a second control signal according to the comparison result. The second control signal is configured to control the pre-charging module 201 to pre-charge the transferring capacitor Cmod.
Specifically, as shown in Fig. 2, the first selector 204 is an AND gate, a first input terminal of the AND gate is connected with the output terminal of the trigger DFF, and a second input terminal of the AND gate is applied with a switch enable signal SWITCH EN. During the pre-charging and pre-discharging, the switch enable signal SWITCH EN is low to control the second switch SW2 of the discharging module 100 to switch off. During the detection after the pre-charging, the switch enable signal SWITCH EN is high, and a signal from an output terminal of the AND gate controls the second switch SW2 of the discharging module 100 to switch on or switch off. The switch enable signal SWITCH EN returns to be low after the detection is completed. The second selector 205 is a NOR gate, a first input terminal of the NOR gate is connected with the output terminal of the comparator CMP, and a second input terminal of the NOR gate is applied with a pre-charging signal PRE_CHRG.
In an example, when there is only one induction unit in the capacitance detecting circuit, as shown in Fig. 3, a capacitance detection process can be described as follows.
Firstly, the seventh switch SW7 is switched on to pre-discharge the transferring capacitor Cmod; secondly, the seventh switch SW7 is switched off and the sixth switch SW6 is switched on, so that the first power supply VD pre-charges the transferring capacitor Cmod by the second resistance R2 until the voltage of the transferring capacitor Cmod closely reaches the preset threshold voltage Vth. The first switch SW1 keeps off during the pre-discharging and the pre-charging. The sixth switch SW6 and the seventh switch SW7 are switched off after the pre-charging is completed. At this time, the first switch SW1 is controlled to switch on so that the first power supply VD pre-charges the transferring capacitor Cmod via a current source I. When the voltage of the transferring capacitor Cmod is larger than a reference voltage of the comparator CMP (i.e., the preset threshold voltage Vth), the trigger DFF controls the second switch SW2 to switch on according to the result output from the comparator CMP, so that the transferring capacitor Cmod is discharged via the first resistance Rl. When the voltage of the transferring capacitor Cmod is smaller than the preset threshold voltage Vth, an output of the comparator CMP is turned over and the trigger DFF controls the second switch SW2 to switch off according to the output result from the comparator CMP. During a charge transferring process of the transferring capacitor Cmod, the charges of the transferring capacitor Cmod are transferred to a capacitor Cx of the induction unit via the third switch SW3. When the third switch SW3 is switched off, the voltage of the transferring capacitor Cmod is pulled down to be smaller than the preset threshold voltage Vth, which enables the output of the comparator CMP to be turned over so as to switch off the second switch SW2. At this time, the transferring capacitor Cmod is charged via the current source I until the voltage thereof is larger than the preset threshold voltage Vth, which enables the output of the comparator CMP to be turned over to switch on the second switch SW2. The third switch SW3 and the fourth switch SW4 are controlled by a two-phase non-overlapped clock signal (that is, when the third switch SW3 is controlled to switch on, the fourth switch SW4 is controlled to switch off; and when the third switch SW3 is controlled to switch off, the fourth switch SW4 is controlled to switch on), the charges on the capacitor Cx transferred from the transferring capacitor Cmod are discharged to the ground by the fourth switch SW4. The fifth switch is a synchronous switch. When the induction unit is being scanned, the fifth switch SW5 is kept off.
The capacitance of the capacitor Cx, the duty ratio of a rectangular wave output from the trigger DFF and the count value of the counter 206 when the induction unit is touched are different from those when the induction unit is not touched. When the detection is finished, the above-mentioned processes are repeated.
Therefore, the detector 203 may judge whether the induction unit is touched according to the count value of the counter. For example, it is assumed that, when the induction unit is not touched, the count value of the counter is 1000; and when the induction unit is touched, the count value of the counter is 500. Thus it may judge whether the induction unit is touched or not according to the count value of the counter.
In one embodiment of the present disclosure, a wave chart of switch controlling signals under a no n- fullscreen synchronous mode is shown in Fig. 4, where a high level means that the switch is controlled to switch on, and a low level means that the switch is controlled to switch off. When an ΜΛ induction unit is scanned the fifth switch SW5 of an ΜΛ selecting assembly is controlled to switch off by the controller 102, the third switch SW3 and the fourth switch SW4 of the ΜΛ selecting assembly are controlled to switch on alternately by the controller 102, and the third switch SW3, the fourth switch SW4 and the fifth switch SW5 of other selecting assemblies except the ΜΛ selecting assembly are controlled to switch off by the controller 102.
In another embodiment of the present disclosure, a wave chart of the switch controlling signals under a fullscreen synchronous mode is shown in Fig. 5, where the high level means that the switch is controlled to switch on, and the low level means that the switch is controlled to switch off. When an ΜΛ induction-unit is scanned, the fifth switch SW5 of an Mth selecting assembly is controlled to switch off by the controller 102, the third switch SW3 and the fourth switch SW4 of the ΜΛ selecting assembly are controlled to switch on alternately by the controller 102, the third switch SW3 of other selecting assemblies except the Mth selecting assembly is controlled to switch off by the controller 102, and the fourth switch SW4 and the fifth switch SW5 of other selecting assemblies except the ΜΛ selecting assembly are controlled to switch on alternately by the controller 102. That is to say, when the ΜΛ induction unit is scanned under the fullscreen synchronous mode, the fifth switch SW5 of a currently scanned induction unit is controlled to switch off, while the fifth switches SW5 and the third switches SW3 of other synchronous but non-scanned induction units have a same on-off state, that is, the third switch SW3 and the fourth switch SW4 of the scanned induction unit are switched on alternatively, and the fourth switches SW4 and the fifth switches SW5 of other non-scanned induction units are switched on alternatively. In this way, when the currently scanned induction unit (i.e., the ΜΛ induction unit) is touched, the charges of the transferring capacitor Cmod is transferred to the capacitor (self-capacitor) Cx of the Mth induction unit via the third switch SW3 of the Mth selecting assembly. The capacitors Cx of the synchronous but non-scanned induction units are charged with a specified voltage via the corresponding fifth switches SW5. In the embodiment of the present disclosure, the specified voltage value is equal to the preset threshold voltage Vth. Therefore, the capacitance Cx of the current scanned induction unit and that of the synchronous but no n- scanned induction units are charged with the preset threshold voltage Vth, and are also discharged to ground via the corresponding fourth switch SW4, so as to eliminate an influence of a mutual capacitance, thus improving the detection accuracy.
With the capacitance detecting circuit, when detecting the capacitance generated by touching the induction unit, an influence of a mutual-capacitance may be eliminated, thus improving a detection accuracy, thereby the induction unit can be judged correctly whether to be touched or not.
In addition, each function cell of the embodiments of the present disclosure may be integrated in a processing module, or these cells may be separate physical entities, or two or more cells are integrated in a processing module. The integrated module may be realized in a form of hardware or in a form of software function modules. When the integrated module is realized in a form of software function module and is sold or used as a standalone product, the integrated module may be stored in a computer readable storage medium.
The storage medium mentioned above may be read-only memories, magnetic disks or CD, etc.
Although explanatory embodiments have been shown and described, it would be appreciated by those skilled in the art that the above embodiments cannot be construed to limit the present disclosure, and changes, alternatives, and modifications can be made in the embodiments without departing from spirit, principles and scope of the present disclosure.

Claims

WHAT IS CLAIMED IS:
1. A capacitance detecting circuit, comprising:
N induction units, where N is an integer larger than or equal to 1;
a transferring capacitor configured to transfer charges to a capacitor of a scanned induction unit among the N induction units, wherein a first terminal of the transferring capacitor is connected with the N induction units respectively, and a second terminal of the transferring capacitor is grounded;
a charging module configured to charge the transferring capacitor, wherein a first terminal of the charging module is connected with the first terminal of the transferring capacitor, and a second terminal of the charging module is connected with a first power supply;
a discharging module configured to discharge the transferring capacitor and comprising a first resistor and a second switch, wherein a first terminal of the discharging module is connected with the first terminal of the charging module and the first terminal of the transferring capacitor respectively, a second terminal of the discharging module is grounded;
a controller connected with the charging module, the transferring capacitor and the discharging module respectively, and configured to control the second switch to switch on when a voltage of the transferring capacitor is larger than a preset threshold voltage, and to update a count value and to detect a touch on the N induction units according to the count value.
2. The capacitance detecting circuit of claim 1, wherein the charging module comprises a first switch and a current source connected in series.
3. The capacitance detecting circuit of claim 1 or 2, further comprising:
N selecting assemblies, wherein each selecting assembly corresponds to one induction unit and is connected between the one induction unit and the transferring capacitor.
4. The capacitance detecting circuit of claim 3, wherein the each selecting assembly comprises: a third switch connected between the one induction unit and the transferring capacitor, and a fourth switch with a first terminal connected with the one induction unit and a second terminal grounded,
in which the third switch and the fourth switch are switched on alternately.
5. The capacitance detecting circuit of claim 3 or 4, wherein the each selecting assembly comprises a fifth switch, a first terminal of the fifth switch is connected with the one induction unit, a second terminal of the fifth switch is connected with a second power supply, and a voltage of the second power supply is the preset threshold voltage.
6. The capacitance detecting circuit of any of claims 1-5, further comprising:
a pre-charging module configured to pre-diarge the transferring capacitor, wherein a first terminal of the pre-charging module is connected with the first terminal of the transferring capacitor, and a second terminal of the pre-charging module is connected with the first power supply.
7. The capacitance detecting circuit of claim 6, wherein the pre-charging module comprises a sixth switch and a second resistor connected in series.
8. The capacitance detecting circuit of any of claims 1-7, further comprising:
a pre-discharging module configured to pre-discharge the transferring capacitor before the pre-charging module pre-charges the transferring capacitor, wherein a first terminal of the pre-discharging module is connected with the first terminal of the transferring capacitor, and a second terminal of the pre-discharging module is grounded.
9. The capacitance detecting circuit of claim 8, wherein the pre-discharging module comprises a seventh switch.
10. The capacitance detecting circuit of any of claims 1-9, wherein the controller comprises: a comparator with a first input terminal applied with the preset threshold voltage and a second input terminal connected with the first terminal of the transferring capacitor;
a trigger with an input terminal connected with an output terminal of the comparator, and configured to generate a triggering signal according to a comparison result from the comparator; a counter with an input terminal connected with an output terminal of the trigger , and configured to count according to the triggering signal;
a detector connected with the counter and configured to detect the touch on the N induction units according to the count value of the counter; and
a first selector with an input terminal connected with the output terminal of the trigger, and configured to generate a first control signal according to the triggering signal, in which the first control signal is configured to control the discharging module.
11. The capacitance detecting circuit of claim 10, wherein the controller further comprises: a second selector with an input terminal connected with the output terminal of the comparator, and configured to generate a second control signal according to the comparison result, in which the second control signal is configured to control the pre-charging module.
12. The capacitance detecting circuit of claim 10, wherein the first selector is an AND gate, a first input terminal of the AND gate is connected with the output terminal of the trigger, and a second input terminal of the AND gate is applied with a switch enable signal.
13. The capacitance detecting circuit of claim 11, wherein the second selector is a NOR gate, a first input terminal of the NOR gate is connected with the output terminal of the comparator, and a second input terminal of the NOR gate is applied with a pre-charging signal.
14. The capacitance detecting circuit of any of claims 3-13, wherein when an Mth induction unit is scanned under a non-fullscreen synchronous mode, the fifth switch of an ΜΛ selecting assembly is controlled to switch off by the controller, the third switch and the fourth switch of the ΜΛ selecting assembly are controlled to switch on alternately by the controller, and the third switches, the fourth switches and the fifth switches of other selecting assemblies except the ΜΛ selecting assembly are controlled to switch off by the controller.
15. The capacitance detecting circuit of any of claims 3-13, wherein when an Mth induction-unit is scanned under a fullscreen synchronous mode, the fifth switch of an ΜΛ selecting assembly is controlled to switch off by the controller, the third switch and the fourth switch of the ΜΛ selecting assembly are controlled to switch on alternately by the controller, the third switches of other selecting assemblies except the ΜΛ selecting assembly are controlled to switch off by the controller, and the fourth switches and the fifth switches of other selecting assemblies except the ΜΛ selecting assembly are controlled to switch on alternately by the controller.
16. The capacitance detecting circuit of any of claims 1-15, wherein a currently scanned induction unit is judged to be touched when the count value is smaller than a first count threshold and larger than a second count threshold.
PCT/CN2013/090888 2012-12-30 2013-12-30 Capacitance detecting circuit Ceased WO2014101869A1 (en)

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CN106055183B (en) 2019-11-08
US20170160323A1 (en) 2017-06-08
CN103902114A (en) 2014-07-02
CN106055183A (en) 2016-10-26
US9612684B2 (en) 2017-04-04
US9846514B2 (en) 2017-12-19
US20150317033A1 (en) 2015-11-05

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