WO2014089731A1 - Semiconductor wafer polishing method - Google Patents

Semiconductor wafer polishing method Download PDF

Info

Publication number
WO2014089731A1
WO2014089731A1 PCT/CN2012/086257 CN2012086257W WO2014089731A1 WO 2014089731 A1 WO2014089731 A1 WO 2014089731A1 CN 2012086257 W CN2012086257 W CN 2012086257W WO 2014089731 A1 WO2014089731 A1 WO 2014089731A1
Authority
WO
WIPO (PCT)
Prior art keywords
wafer
speed
point
actual
rotation speed
Prior art date
Application number
PCT/CN2012/086257
Other languages
French (fr)
Inventor
Jian Wang
Yinuo JIN
Hui Wang
Original Assignee
Acm Research (Shanghai) Inc.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Acm Research (Shanghai) Inc. filed Critical Acm Research (Shanghai) Inc.
Priority to CN201280077584.1A priority Critical patent/CN104838480B/en
Priority to PCT/CN2012/086257 priority patent/WO2014089731A1/en
Publication of WO2014089731A1 publication Critical patent/WO2014089731A1/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321After treatment
    • H01L21/32115Planarisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/10Measuring as part of the manufacturing process
    • H01L22/12Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/20Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps

Definitions

  • the present invention generally relates to the field of fabricating a semiconductor device, and more particularly relates to a semiconductor wafer polishing method.
  • interconnection structures are formed in the semiconductor device for electrically connecting transistor terminals associated with a wafer which is used for manufacturing or fabricating the semiconductor device.
  • the wafer may need undergoing, for example, masking, etching, and deposition processes.
  • multiple masking and etching steps can be performed to form recessed areas in a dielectric layer on the wafer.
  • the recessed areas serve as trenches and vias and the like for forming the interconnection structures.
  • the deposition process may then be performed to deposit a metal layer over the wafer.
  • the metal layer is deposited both in the recessed areas and also on non-recessed areas of the wafer.
  • the metal layer on the non-recessed areas of the wafer needs to be removed.
  • CMP chemical mechanical polishing
  • the CMP method includes steps of: providing a rotatable table, a polishing pad disposed on the rotatable table, a wafer carrier head for gripping the wafer and a slurry feeder providing slurry between the wafer and the polishing pad; applying a downward press force on the wafer carrier head to press the wafer against the polishing pad and enforce the wafer to rotate relatively to the polishing pad. Then, the wafer is polished.
  • the CMP method has been no longer capable of fitting for fabricating the semiconductor device with smaller feature size. Because the Cu and the low-k dielectic or the ultra low-k dielectric have very weak mechanical stress, the downward press force acted on the wafer carrier head in the CMP process will damage the Cu and the low-k dielectic or the ultra low-k dielectric.
  • Another method for removing the metal layer on the non-recessed areas of the wafer is electrochemical polishing which utilizes the chemical reaction between electrolyte and the metal layer to remove the metal layer.
  • electrochemical polishing utilizes the chemical reaction between electrolyte and the metal layer to remove the metal layer.
  • the metal layer can be removed without mechanical stress, solving the Cu and the low-k dielectic or the ultra low-k dielectric integration issue. Because the feature size of the semiconductor device becomes smaller and smaller, the polishing uniformity of the electrochemical polishing needs to be enhanced constantly.
  • an object of the present invention is to provide a semiconductor wafer polishing method capable of improving the polishing uniformity.
  • the method includes the steps of: setting a pre-set X-speed for every point on the wafer; setting a pre-set rotation speed for every point on the wafer; obtaining specific actual rotation speeds for every point on the wafer to form a rotation speed table; comparing the actual rotation speed and the pre-set rotation speed of every point on the wafer to obtain a rotation ratio between the actual rotation speed and the pre-set rotation speed; calculating an actual X-speed of every point on the wafer based on the rotation ratio and the pre-set X-speed of the point; and when a specific point on the wafer is right above a nozzle ejecting charged electrolyte onto the wafer, applying a pre-set power to the wafer and the nozzle and driving the wafer to rotate at the actual rotation speed for the specific point and move at the actual X-speed for the specific point.
  • FIG. 1 is a schematic view showing an exemplary apparatus for polishing a semiconductor wafer
  • FIG. 2 shows a relationship between the radius of the semiconductor wafer and the pre-set X-speed of the semiconductor wafer
  • FIG. 3 shows a relationship between the radius of the semiconductor wafer and the pre-set rotation speed of the semiconductor wafer
  • FIG. 4 shows a relationship between the actual rotation speed of the semiconductor wafer and the removal thickness
  • FIG. 5 shows a one-to-one relationship between the point on the semiconductor wafer and the removal thickness of the semiconductor wafer
  • FIG. 6 shows a one-to-one relationship between the actual rotation speed of the semiconductor wafer and the point on the semiconductor wafer.
  • FIG. 7 is a flow chart of a semiconductor wafer polishing method according to the present invention. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT
  • FIG. 1 showing an exemplary apparatus for polishing a semiconductor wafer
  • a semiconductor wafer polishing method according to the present invention can be carried out by the apparatus. Before introducing the semiconductor wafer polishing method, the apparatus will be described briefly.
  • the apparatus includes a wafer chuck 10 for holding and positioning a semiconductor wafer which will be called wafer 20 for short hereinafter.
  • a nozzle 30 is disposed below the wafer chuck 10 for ejecting electrolyte 40 onto the wafer 20.
  • a power supply 50 is provided to supply power to the wafer 20 and the nozzle 30.
  • the anode of the power supply 50 is electrically connected to the wafer 20
  • the cathode of the power supply 50 is electrically connected to the nozzle 30 for charging the electrolyte 40.
  • a driving device such as a motor 60 is installed on the wafer chuck 10 for driving the wafer chuck 10 to rotate on its own axis or move horizontally along the X axis direction.
  • the motor 60 can be controlled by a motion controller.
  • the semiconductor wafer polishing method of the present invention will be introduced by using the apparatus.
  • the current or the voltage supplied by the power supply 50 is constant, the removal thickness and uniformity of the electropolishing is relative to the motion speed of the wafer 20, especially the rotation speed and the X axis direction motion speed.
  • step 100 set a pre-set X-speed for every point on the wafer 20.
  • the motion speed of which the motor 60 drives the wafer chuck 10 holding and positioning the wafer 20 to move horizontally along the X axis direction is called X-speed.
  • All the points on the wafer 20 can be corresponding to the same pre-set X-speed so that the points on the same radius of the wafer 20 have the same X-speed. It should be recognized that all the points on the wafer 20 can be corresponding to a different pre-set X-speed.
  • step 200 set a pre-set rotation speed for every point on the wafer 20.
  • the motion speed of which the motor 60 drives the wafer chuck 10 holding and positioning the wafer 20 to rotate on its own axis is called rotation speed. All the points on the wafer 20 can be corresponding to the same pre-set rotation speed or a different pre-set rotation speed.
  • step 300 obtain specific actual rotation speeds for every point on the wafer 20 to form a rotation speed table before polishing.
  • the rotation speed table shows every point on the wafer 20 is corresponding to a specific actual rotation speed, as shown in FIG. 6.
  • a method for forming the rotation speed table includes the following steps.
  • the thickness meter measures the removal thickness of about 49 points to 625 points distributed on the global wafer 20.
  • the X is the circle serial number.
  • the measured result is sent to a host computer.
  • the host computer Based on an interpolation mechanism, the host computer computes the corresponding removal thickness of all points on the entire wafer 20 (about 10000 points or more). The distribution of all points can be obtained by a linear interpolation method. Every point on the wafer 20 is corresponding to a specific removal thickness of the metal layer which needs to be removed.
  • step 400 compare the actual rotation speed and the pre-set rotation speed of every point on the wafer 20 to obtain a rotation ratio between them.
  • step 500 calculate the average rotation ratio of each radius of the wafer 20.
  • step 600 calculate the actual X-speed of every point on the wafer 20.
  • the points on the same radius of the wafer 20 have the same actual X-speed.
  • step 700 when a specific point on the wafer 20 is right above the nozzle 30, apply a pre-set power to the wafer 20 and the nozzle 30 and drive the wafer 20 to rotate at the actual rotation speed for the specific point and move at the actual X-speed for the specific point.
  • the pre-set power is constant, and in particular, the pre-set power is constant current or constant voltage.

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)

Abstract

The present invention provides a semiconductor wafer polishing method capable of improving the polishing uniformity. The method includes the steps of: setting a pre-set X-speed for every point on the wafer; setting a pre-set rotation speed for every point on the wafer; obtaining specific actual rotation speeds for every point on the wafer to form a rotation speed table; comparing the actual rotation speed and the pre-set rotation speed of every point on the wafer to obtain a rotation ratio between the actual rotation speed and the pre-set rotation speed; calculating an actual X-speed of every point on the wafer based on the rotation ratio and the pre-set X-speed of the point; and when a specific point on the wafer is right above a nozzle ejecting charged electrolyte onto the wafer, applying a pre-set power to the wafer and the nozzle and driving the wafer to rotate at the actual rotation speed for the specific point and move at the actual X-speed for the specific point.

Description

SEMICONDUCTOR WAFER POLISHING METHOD
BACKGROUND OF THE INVENTION
1. Field of the Invention
[0001] The present invention generally relates to the field of fabricating a semiconductor device, and more particularly relates to a semiconductor wafer polishing method.
2. The Related Art
[0002] With the feature size of a semiconductor device becoming smaller constantly, interconnection structures are formed in the semiconductor device for electrically connecting transistor terminals associated with a wafer which is used for manufacturing or fabricating the semiconductor device.
[0003] For forming the interconnection structures, the wafer may need undergoing, for example, masking, etching, and deposition processes. In particular, multiple masking and etching steps can be performed to form recessed areas in a dielectric layer on the wafer. The recessed areas serve as trenches and vias and the like for forming the interconnection structures. The deposition process may then be performed to deposit a metal layer over the wafer. The metal layer is deposited both in the recessed areas and also on non-recessed areas of the wafer. To isolate the interconnection structures, the metal layer on the non-recessed areas of the wafer needs to be removed.
[0004] To remove the metal layer deposited on the non-recessed areas of the wafer, a common method is chemical mechanical polishing (CMP). The CMP method includes steps of: providing a rotatable table, a polishing pad disposed on the rotatable table, a wafer carrier head for gripping the wafer and a slurry feeder providing slurry between the wafer and the polishing pad; applying a downward press force on the wafer carrier head to press the wafer against the polishing pad and enforce the wafer to rotate relatively to the polishing pad. Then, the wafer is polished. But, as Cu and low-k dielectic or ultra low-k dielectric are applied more and more widely in the semiconductor device, the CMP method has been no longer capable of fitting for fabricating the semiconductor device with smaller feature size. Because the Cu and the low-k dielectic or the ultra low-k dielectric have very weak mechanical stress, the downward press force acted on the wafer carrier head in the CMP process will damage the Cu and the low-k dielectic or the ultra low-k dielectric.
[0005] Another method for removing the metal layer on the non-recessed areas of the wafer is electrochemical polishing which utilizes the chemical reaction between electrolyte and the metal layer to remove the metal layer. In the polishing process, only the electrolyte contacts with the metal layer, so the metal layer can be removed without mechanical stress, solving the Cu and the low-k dielectic or the ultra low-k dielectric integration issue. Because the feature size of the semiconductor device becomes smaller and smaller, the polishing uniformity of the electrochemical polishing needs to be enhanced constantly.
SUMMARY OF THE INVENTION [0006] Accordingly, an object of the present invention is to provide a semiconductor wafer polishing method capable of improving the polishing uniformity. The method includes the steps of: setting a pre-set X-speed for every point on the wafer; setting a pre-set rotation speed for every point on the wafer; obtaining specific actual rotation speeds for every point on the wafer to form a rotation speed table; comparing the actual rotation speed and the pre-set rotation speed of every point on the wafer to obtain a rotation ratio between the actual rotation speed and the pre-set rotation speed; calculating an actual X-speed of every point on the wafer based on the rotation ratio and the pre-set X-speed of the point; and when a specific point on the wafer is right above a nozzle ejecting charged electrolyte onto the wafer, applying a pre-set power to the wafer and the nozzle and driving the wafer to rotate at the actual rotation speed for the specific point and move at the actual X-speed for the specific point.
[0007] As described above, during the electropolishing process, when the polishing power is constant, the rotation speed and the X-speed of the wafer are slower, the removal thickness of a metal layer on the wafer is more, or vice versa, the rotation speed and the X-speed of the wafer are faster, the removal thickness of the metal layer on the wafer is less. Because the rotation speed and the X-speed of every point on the wafer can be controlled accurately while polishing the wafer in the present invention, the polishing uniformity is greatly improved. BRIEF DESCRIPTION OF THE DRAWINGS
[0008] The present invention will be apparent to those skilled in the art by reading the following description of a preferred embodiment thereof, with reference to the attached drawings, in which:
[0009] FIG. 1 is a schematic view showing an exemplary apparatus for polishing a semiconductor wafer;
[0010] FIG. 2 shows a relationship between the radius of the semiconductor wafer and the pre-set X-speed of the semiconductor wafer;
[0011] FIG. 3 shows a relationship between the radius of the semiconductor wafer and the pre-set rotation speed of the semiconductor wafer;
[0012] FIG. 4 shows a relationship between the actual rotation speed of the semiconductor wafer and the removal thickness;
[0013] FIG. 5 shows a one-to-one relationship between the point on the semiconductor wafer and the removal thickness of the semiconductor wafer;
[0014] FIG. 6 shows a one-to-one relationship between the actual rotation speed of the semiconductor wafer and the point on the semiconductor wafer; and
[0015] FIG. 7 is a flow chart of a semiconductor wafer polishing method according to the present invention. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT
[0016] Referring to FIG. 1 showing an exemplary apparatus for polishing a semiconductor wafer, a semiconductor wafer polishing method according to the present invention can be carried out by the apparatus. Before introducing the semiconductor wafer polishing method, the apparatus will be described briefly.
[0017] As shown in FIG. 1, the apparatus includes a wafer chuck 10 for holding and positioning a semiconductor wafer which will be called wafer 20 for short hereinafter. A nozzle 30 is disposed below the wafer chuck 10 for ejecting electrolyte 40 onto the wafer 20. A power supply 50 is provided to supply power to the wafer 20 and the nozzle 30. In particular, the anode of the power supply 50 is electrically connected to the wafer 20, and the cathode of the power supply 50 is electrically connected to the nozzle 30 for charging the electrolyte 40. A driving device such as a motor 60 is installed on the wafer chuck 10 for driving the wafer chuck 10 to rotate on its own axis or move horizontally along the X axis direction. The motor 60 can be controlled by a motion controller.
[0018] Referring to FIG. 2 to FIG. 7, the semiconductor wafer polishing method of the present invention will be introduced by using the apparatus. As known to all, during the electropolishing process, if the current or the voltage supplied by the power supply 50 is constant, the removal thickness and uniformity of the electropolishing is relative to the motion speed of the wafer 20, especially the rotation speed and the X axis direction motion speed.
[0019] Firstly, in step 100, set a pre-set X-speed for every point on the wafer 20. The motion speed of which the motor 60 drives the wafer chuck 10 holding and positioning the wafer 20 to move horizontally along the X axis direction is called X-speed. All the points on the wafer 20 can be corresponding to the same pre-set X-speed so that the points on the same radius of the wafer 20 have the same X-speed. It should be recognized that all the points on the wafer 20 can be corresponding to a different pre-set X-speed.
[0020] In step 200, set a pre-set rotation speed for every point on the wafer 20. The motion speed of which the motor 60 drives the wafer chuck 10 holding and positioning the wafer 20 to rotate on its own axis is called rotation speed. All the points on the wafer 20 can be corresponding to the same pre-set rotation speed or a different pre-set rotation speed.
[0021] In step 300, obtain specific actual rotation speeds for every point on the wafer 20 to form a rotation speed table before polishing. The rotation speed table shows every point on the wafer 20 is corresponding to a specific actual rotation speed, as shown in FIG. 6. A method for forming the rotation speed table includes the following steps.
[0022] Firstly, obtain a linear function model of the removal thickness and the actual rotation speed through lots of optimal experiments, as shown in FIG. 4. Based on the linear function model, the one-to-one corresponding relationship between the removal thickness and the actual rotation speed is obtained.
[0023] Next, measure the removal thickness of a metal layer on the wafer 20 by using such as a thickness meter. Generally, the thickness meter measures the removal thickness of about 49 points to 625 points distributed on the global wafer 20. Particularly, the distribution of the points on the global wafer 20 can be described as following: the number of points on each circle=8X total measure points=∑ 8X+1
[0024] In the above computational formulas, the X is the circle serial number.
[0025] Then the measured result is sent to a host computer. Based on an interpolation mechanism, the host computer computes the corresponding removal thickness of all points on the entire wafer 20 (about 10000 points or more). The distribution of all points can be obtained by a linear interpolation method. Every point on the wafer 20 is corresponding to a specific removal thickness of the metal layer which needs to be removed.
[0026] Finally, store the linear function model of the removal thickness and the actual rotation speed in the host computer, and then the host computer converts the removal thickness of every point on the wafer 20 into a corresponding actual rotation speed, so every point on the wafer 20 is corresponding to a special actual rotation speed. The rotation speed table is obtained.
[0027] After forming the rotation speed table, in step 400, compare the actual rotation speed and the pre-set rotation speed of every point on the wafer 20 to obtain a rotation ratio between them. The computational formulas of the rotation ratio of every point is described as follow: rotation ratio= actual rotation speed / pre-set rotation speed
[0028] In step 500, calculate the average rotation ratio of each radius of the wafer 20. The computational formulas of the average rotation ratio of each radius is described as follow: average rotation ratio=∑ (rotation ratio of every point on the same radius) / the number of points on the same radius
[0029] In step 600, calculate the actual X-speed of every point on the wafer 20. The computational formulas of the actual X-speed of every point is described as follow: actual X-speed= pre-set X-speed * rotation ratio
[0030] For facilitating control, preferably, the points on the same radius of the wafer 20 have the same actual X-speed. Correspondingly, the computational formulas of the actual X-speed of each radius is described as follow: actual X-speed= pre-set X-speed * average rotation ratio
[0031] In step 700, when a specific point on the wafer 20 is right above the nozzle 30, apply a pre-set power to the wafer 20 and the nozzle 30 and drive the wafer 20 to rotate at the actual rotation speed for the specific point and move at the actual X-speed for the specific point. The pre-set power is constant, and in particular, the pre-set power is constant current or constant voltage.
[0032] As described above, during the electropolishing process, when the polishing power is constant, the rotation speed and the X-speed of the wafer 20 are slower, the removal thickness of the metal layer on the wafer 20 is more, or vice versa, the rotation speed and the X-speed of the wafer are faster, the removal thickness of the metal layer on the wafer is less. Because the rotation speed and the X-speed of every point on the wafer 20 can be controlled accurately while polishing the wafer 20, the polishing uniformity is greatly improved. [0033] The foregoing description of the present invention has been presented for purposes of illustration and description. It is not intended to be exhaustive or to limit the invention to the precise form disclosed, and obviously many modifications and variations are possible in light of the above teaching. Such modifications and variations that may be apparent to those skilled in the art are intended to be included within the scope of this invention as defined by the accompanying claims.

Claims

WHAT IS CLAIMED IS
1. A semiconductor wafer polishing method, comprising:
setting a pre-set X-speed for every point on the wafer;
setting a pre-set rotation speed for every point on the wafer;
obtaining specific actual rotation speeds for every point on the wafer to form a rotation speed table;
comparing the actual rotation speed and the pre-set rotation speed of every point on the wafer to obtain a rotation ratio between the actual rotation speed and the pre-set rotation speed;
calculating an actual X-speed of every point on the wafer based on the rotation ratio and the pre-set X-speed of the point; and
when a specific point on the wafer is right above a nozzle ejecting charged electrolyte onto the wafer, applying a pre-set power to the wafer and the nozzle and driving the wafer to rotate at the actual rotation speed for the specific point and move at the actual X-speed for the specific point.
2. The method as claimed in claim 1, wherein the step of obtaining specific actual rotation speeds for every point on the wafer to form a rotation speed table further comprises steps of:
obtaining a linear function model of a removal thickness and the actual rotation speed;
measuring the removal thickness of a number of points on the wafer and then computing the removal thickness of all points on the wafer based on the measured removal thickness; and
converting the removal thickness of every point on the wafer into a corresponding actual rotation speed according to the linear function model.
3. The method as claimed in claim 2, wherein the step of computing the removal thickness of all points on the wafer based on the measured removal thickness is performed by using an interpolation mechanism.
4. The method as claimed in claim 1, wherein the computational formulas of obtaining the rotation ratio of every point is described as:
rotation ratio= actual rotation speed / pre-set rotation speed
5. The method as claimed in claim 4, wherein the computational formulas of the actual X-speed of every point is described as:
actual X-speed= pre-set X-speed * rotation ratio
6. The method as claimed in claim 1, wherein the step of obtaining a rotation ratio further includes obtaining an average rotation ratio of each radius of the wafer.
7. The method as claimed in claim 6, wherein the computational formulas of the average rotation ratio of each radius is described as:
average rotation ratio=∑ (rotation ratio of every point on the same radius) / the number of points on the same radius
8. The method as claimed in claim 7, wherein the points on the same radius of the wafer have the same actual X-speed, the computational formulas of the actual X-speed of each radius is described as:
actual X-speed= pre-set X-speed * average rotation ratio
9. The method as claimed in claim 1, wherein the pre-set power is constant.
0. The method as claimed in claim 9, wherein the pre-set power is constant current or constant voltage.
PCT/CN2012/086257 2012-12-10 2012-12-10 Semiconductor wafer polishing method WO2014089731A1 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
CN201280077584.1A CN104838480B (en) 2012-12-10 2012-12-10 Polishing wafer method
PCT/CN2012/086257 WO2014089731A1 (en) 2012-12-10 2012-12-10 Semiconductor wafer polishing method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/CN2012/086257 WO2014089731A1 (en) 2012-12-10 2012-12-10 Semiconductor wafer polishing method

Publications (1)

Publication Number Publication Date
WO2014089731A1 true WO2014089731A1 (en) 2014-06-19

Family

ID=50933657

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2012/086257 WO2014089731A1 (en) 2012-12-10 2012-12-10 Semiconductor wafer polishing method

Country Status (2)

Country Link
CN (1) CN104838480B (en)
WO (1) WO2014089731A1 (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2017070924A1 (en) * 2015-10-30 2017-05-04 Acm Research (Shanghai) Inc. Method for electrochemical polish in constant voltage mode
CN105483815B (en) * 2015-12-18 2018-02-23 上海集成电路研发中心有限公司 A kind of electrochemical polish apparatus and the electrochemical polishing method using the device
CN107433517B (en) * 2016-05-25 2021-02-12 盛美半导体设备(上海)股份有限公司 Wafer polishing method

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004259871A (en) * 2003-02-25 2004-09-16 Komatsu Electronic Metals Co Ltd Method and device for scratch analyzing of wafer
CN101168241A (en) * 2005-10-28 2008-04-30 应用材料股份有限公司 Voltage mode current control
US20100252774A1 (en) * 2009-04-02 2010-10-07 Jsr Corporation Chemical mechanical polishing aqueous dispersion, method of preparing the same, chemical mechanical polishing aqueous dispersion preparation kit, and chemical mechanical polishing method

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100413037C (en) * 2001-06-21 2008-08-20 微米技术有限公司 Methods and apparatus for electrical, mechanical and/or chemical removal of conductive material from a microelectronic substrate
TWI274393B (en) * 2002-04-08 2007-02-21 Acm Res Inc Electropolishing and/or electroplating apparatus and methods
CN101492833A (en) * 2008-01-23 2009-07-29 陈宁英 Production process for electric slurry polishing
CN101368287B (en) * 2008-09-12 2010-08-04 西北有色金属研究院 Multi-working procedure combined ultra-fine molybdenum filament continuous processing method and equipment

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004259871A (en) * 2003-02-25 2004-09-16 Komatsu Electronic Metals Co Ltd Method and device for scratch analyzing of wafer
CN101168241A (en) * 2005-10-28 2008-04-30 应用材料股份有限公司 Voltage mode current control
US20100252774A1 (en) * 2009-04-02 2010-10-07 Jsr Corporation Chemical mechanical polishing aqueous dispersion, method of preparing the same, chemical mechanical polishing aqueous dispersion preparation kit, and chemical mechanical polishing method

Also Published As

Publication number Publication date
CN104838480A (en) 2015-08-12
CN104838480B (en) 2018-03-02

Similar Documents

Publication Publication Date Title
KR100780257B1 (en) Polishing method, polishing apparatus, plating method, and plating apparatus
US8268135B2 (en) Method and apparatus for electrochemical planarization of a workpiece
US6797623B2 (en) Methods of producing and polishing semiconductor device and polishing apparatus
US9511475B2 (en) Polishing device for removing polishing byproducts
US20070187258A1 (en) Method for electrochemically polishing a conductive material on a substrate
WO2014089731A1 (en) Semiconductor wafer polishing method
US9865476B2 (en) Method and apparatus for pulse electrochemical polishing
US20070158201A1 (en) Electrochemical processing with dynamic process control
JP2001326204A (en) Method of manufacturing semiconductor device and method of polishing semiconductor device
US20230390887A1 (en) Face-up wafer electrochemical planarization apparatus
TWI695092B (en) Method of electrochemical polishing in constant pressure mode
CN104440513A (en) Silicon wafer machining device and method
US7576007B2 (en) Method for electrochemically mechanically polishing a conductive material on a substrate
JP2003311538A (en) Polishing method, polishing apparatus and method for producing semiconductor device
TWI501307B (en) Pulse electrochemical polishing method and device
CN104143525A (en) Method for flattening through-silicon-via back-surface metal
CN116079580A (en) Electrochemical mechanical polishing device
KR20040008772A (en) Polishing apparatus of semiconductor device and planarization method using the same

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 12889991

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 12889991

Country of ref document: EP

Kind code of ref document: A1