WO2014058256A1 - Cellule solaire et son procédé de fabrication - Google Patents

Cellule solaire et son procédé de fabrication Download PDF

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WO2014058256A1
WO2014058256A1 PCT/KR2013/009077 KR2013009077W WO2014058256A1 WO 2014058256 A1 WO2014058256 A1 WO 2014058256A1 KR 2013009077 W KR2013009077 W KR 2013009077W WO 2014058256 A1 WO2014058256 A1 WO 2014058256A1
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buffer layer
layer
light absorbing
solar cell
deposited
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PCT/KR2013/009077
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English (en)
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Jong Seon Jeong
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Lg Innotek Co., Ltd.
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers
    • H01L31/072—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN heterojunction type
    • H01L31/0749—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN heterojunction type including a AIBIIICVI compound, e.g. CdS/CulnSe2 [CIS] heterojunction solar cells
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/0248—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
    • H01L31/0256—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by the material
    • H01L31/0264—Inorganic materials
    • H01L31/032—Inorganic materials including, apart from doping materials or other impurities, only compounds not provided for in groups H01L31/0272 - H01L31/0312
    • H01L31/0322—Inorganic materials including, apart from doping materials or other impurities, only compounds not provided for in groups H01L31/0272 - H01L31/0312 comprising only AIBIIICVI chalcopyrite compounds, e.g. Cu In Se2, Cu Ga Se2, Cu In Ga Se2
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/042—PV modules or arrays of single PV cells
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/042—PV modules or arrays of single PV cells
    • H01L31/0445—PV modules or arrays of single PV cells including thin film solar cells, e.g. single thin film a-Si, CIS or CdTe solar cells
    • H01L31/046—PV modules composed of a plurality of thin film solar cells deposited on the same substrate
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/541—CuInSe2 material PV cells

Definitions

  • the embodiment relates to a solar cell and a method of fabricating the same.
  • a method of fabricating a solar cell for solar light power generation is as follows. First, after preparing a substrate, a back electrode layer is formed on the substrate and patterned by a laser, thereby forming a plurality of back electrodes.
  • a light absorbing layer, a buffer layer, and a high resistance buffer layer are sequentially formed on the back electrodes.
  • Various schemes such as a scheme of forming a Cu(In,Ga)Se2 (CIGS) based-light absorbing layer by simultaneously or separately evaporating Cu, In, Ga, and Se and a scheme of performing a selenization process after a metallic precursor film has been formed, have been extensively used in order to form the light absorbing layer.
  • the energy band gap of the light absorbing layer is in the range of about 1eV to 1.8eV.
  • a buffer layer including cadmium sulfide (CdS) is formed on the light absorbing layer through a sputtering process.
  • the energy bandgap of the buffer layer may be in the range of about 2.2eV to 2.4eV.
  • a high resistance buffer layer including zinc oxide (ZnO) is formed on the buffer layer through the sputtering process.
  • the energy bandgap of the high resistance buffer layer is in the range of about 3.1eV to about 3.3eV.
  • a groove pattern may be formed in the light absorbing layer, the buffer layer, and the high resistance buffer layer.
  • a transparent conductive material is laminated on the high resistance buffer layer, and is filled in the groove pattern. Therefore, a transparent electrode layer is formed on the high resistance buffer layer, and connection wires are formed in the groove pattern.
  • a material constituting the transparent electrode layer and the connection wireless may include aluminum doped zinc oxide (AZO).
  • the energy bandgap of the transparent electrode layer may be in the range of about 3.1eV to about 3.3eV.
  • the groove pattern is formed in the transparent electrode layer, so that a plurality of solar cells may be formed.
  • the transparent electrodes and the high resistance buffers correspond to the cells, respectively.
  • the transparent electrodes and the high resistance buffers may be provided in the form of a stripe or a matrix.
  • the transparent electrodes and the back electrodes are misaligned from each other, so that the transparent electrodes are electrically connected to the back electrodes through the connection wires. Accordingly, the solar cells may be electrically connected to each other in series.
  • the embodiment provides a solar cell capable of representing improved photoelectric conversion efficiency.
  • a method of fabricating a solar cell including: forming a back electrode layer on a support substrate; forming a light absorbing layer, which is formed on a top surface thereof with a plurality of pin holes, on the back electrode layer; and forming a buffer layer on the light absorbing layer, wherein the forming of the buffer layer includes: depositing a first buffer layer on the top surface of the light absorbing layer and an inner surface of the pin hole; and depositing a second buffer layer on a top surface of the first buffer layer and an inner side of the pin hole.
  • a solar cell including: a support substrate; a back electrode layer on the support substrate; a light absorbing layer on the back electrode layer, the light absorbing layer being formed on a top surface thereof with a plurality of pin holes; and a buffer layer on the light absorbing layer, wherein the buffer layer includes: a first buffer layer deposited on a top surface of the light absorbing layer and an inner surface of the pin hole; and a second buffer layer deposited on a top surface of the first buffer layer and an inner side of the pin hole.
  • a second buffer layer is deposited on the first buffer layer.
  • the first buffer layer may be completely deposited on inner surfaces of pin holes which are formed on the light absorbing layer. Accordingly, a phenomenon in which a shunt path occurs due to the pin holes without achieving homojunction can be prevented when the pn junction is performed.
  • the buffer layer is deposited using a sputtering CBD method.
  • a short-circuit that is, a shunt path may be generated after deposition of the front electrode layer, so that the overall efficiency of the solar cell may be reduced.
  • a second buffer layer having a desired thickness is deposited on the first buffer layer by the sputtering process or a CBD process. Accordingly, the buffer layer may be completely deposited on an inner surface of the pin hole formed in the light absorbing layer, so the shunt path may be prevented from being generated.
  • a process time due to an atomic deposition process may be prevented from being increased by suitably setting thicknesses of the first buffer layer and the second buffer layer.
  • the solar cell according to the embodiment may improve the overall efficiency of the solar cell.
  • FIG. 1 is a plan view showing a solar cell according to the embodiment.
  • FIG. 2 is a sectional view showing one section of a solar cell according to the embodiment.
  • FIG. 3 is a sectional view showing a section of a light absorbing layer according to the embodiment.
  • FIGS. 4 and 5 are sectional views showing a section where a buffer layer is deposited on the light absorbing layer according to the embodiment.
  • FIG. 6 is a flowchart showing a method of fabricating a solar cell according to the embodiment.
  • FIGS. 7 to 13 are sectional views showing a method of fabricating a solar cell according to the embodiment.
  • the size or the thickness of the layer (film), the region, the pattern or the structure may be modified exaggerated for the purpose of explanation and clarity.
  • the size may not utterly reflect the actual size.
  • FIG. 1 is a plan view showing a solar cell according to the embodiment.
  • FIG. 2 is a sectional view showing one section of a solar cell according to the embodiment.
  • the solar cell according to the embodiment includes a support substrate 100, a back electrode layer 200, a light absorbing layer 300, a buffer layer 400, and a front electrode layer 500.
  • the support substrate 100 has a plate shape, and supports the back electrode layer 200, the light absorbing layer 300, the buffer layer 400, and the front electrode layer 500.
  • the support substrate 100 may include an insulator.
  • the support substrate 100 may be a glass substrate, a plastic substrate, or a metal substrate. Meanwhile, the support substrate 100 may include soda lime glass.
  • the support substrate 100 may be transparent, flexible or rigid. Alternatively, the support substrate 100 may include a ceramic substrate including alumina, stainless steel, or polymer having a flexible property. The support substrate 100 may be transparent.
  • the support substrate 100 may be rigid or flexible.
  • the back electrode layer 200 is provided on the support substrate 100.
  • the back electrode layer 200 is a conductive layer, the back electrode layer 200 may include one of molybdenum (Mo), gold (Au), aluminum (Al), chrome (Cr), tungsten (W), and copper (Cu).
  • Mo molybdenum
  • Au gold
  • Al aluminum
  • Cr chrome
  • W tungsten
  • Cu copper
  • Mo makes the lower difference in the thermal expansion coefficient from the support substrate 100 when comparing with the other elements, so that the Mo represents a superior adhesive property, thereby preventing the above de-lamination phenomenon.
  • the back electrode layer 200 may include at least two layers.
  • the layers may include the same metal or different metals.
  • the back electrode layer 200 is formed therein with first through holes TH1.
  • the first through holes TH1 are open regions to expose the top surface of the support substrate 100. When viewed in a plan view, the first through holes TH1 may have the shape extending in one direction.
  • Each of the second through holes TH2 may have the width in the range of about 80 ⁇ m to about 200 ⁇ m.
  • the back electrode layer 200 is divided into a plurality of back electrodes by the first through holes TH1.
  • the back electrodes are defined by the first through holes TH1.
  • the back electrodes are spaced apart from each other by the first through holes TH1.
  • the back electrodes are arranged in the shape of a stripe.
  • the back electrodes may be arranged in the shape of a matrix.
  • the first through holes TH1 may be provided in the shape of a lattice.
  • the light absorbing layer 300 is disposed on the back electrode layer 200. Further, the first through holes TH1 are filled with the material included in the light absorbing layer 300.
  • the light absorbing layer 300 includes group I-III-VI compounds.
  • the light absorbing layer 300 may include the Cu (In,Ga)Se 2 (CIGS) crystal structure, the Cu(In)Se 2 crystal structure, or the Cu(Ga)Se 2 crystal structure.
  • the light absorbing layer 300 may have an energy bandgap in the range of 1 eV to 1.8 eV.
  • Pin holes having irregular width and depth may be formed on a surface of the light absorbing layer 300. That is, as shown in FIG. 3, pin holes 310, that is, pores may be formed on a surface of the light absorbing layer 300 during deposition and heat treatment for the light absorbing layer 300 on the back electrode layer 200.
  • the buffer layer 400 is disposed on the light absorbing layer 300.
  • the first buffer layer 410 is formed on the light absorbing layer 300
  • a second buffer layer 420 is formed on the first buffer layer 410.
  • the first buffer layer 410 may be deposited on a top surface of the light absorbing layer 300 and an inner surface of the pin hole 310 formed on a surface of the light absorbing layer 300. That is, as shown in FIG. 4, the first buffer layer 410 may be deposited on an inner side 311 of the pin hole 310 and a bottom surface of the pin hole 310. Accordingly, an inner surface of the pin hole 310 formed on the surface of the light absorbing layer 310 may be fully covered with the first buffer layer 410.
  • the first buffer layer 410 may be formed by an atomic layer deposition process.
  • the first buffer layer 410 may have the thickness of about 5 nm to about 10 nm by taking a process time of the atomic layer deposition process.
  • the second buffer layer 420 may be formed on a top surface of the first buffer layer 410 and an inner side of the pin hole 310.
  • the second buffer layer 420 may be formed on a top surface of the first buffer layer 410 and an inner side 311 of an inner surface of the pin hole 310 deposited by the first buffer layer 410.
  • the second buffer layer 420 may be formed by a sputtering process or a Chemical bath deposition (CBD) process. Further, the second buffer layer 420 may have in the range of a thickness of 10 nm to 15 nm.
  • first buffer layer 410 is integrally formed with the second buffer layer 420.
  • the first buffer layer 400 including the first buffer layer 410 and the second buffer layer 420 may have about 20 nm.
  • the first buffer layer 410 and the second buffer layer 420 include CdS, ZnS, In X S Y or In X Se Y Zn(O, OH).
  • the first buffer layer 410 and the second buffer layer 420 may have the energy bandgap in the range of about 2.2 eV to about 2.4 eV.
  • a high resistance buffer layer may be further provided on the buffer layer 400.
  • the high resistance buffer layer includes zinc oxide (i-ZnO) which is not doped with impurities.
  • the energy bandgap of the high resistance buffer layer may be in the range of about 3.1 eV to about 3.3 eV. Alternatively, the high resistance buffer layer may be omitted.
  • the buffer layer 400 may be formed therein with second through holes TH2.
  • the second through holes TH2 are open regions to expose the top surface of the support substrate 100 and the top surface of the back electrode layer 200. When viewed in a plan view, the second through holes TH2 may have the shape extending in one direction. Each of the second through holes TH2 may have the width in the range of about 80 ⁇ m to about 200 ⁇ m, but the embodiment is not limited thereto.
  • a plurality of buffer layers are defined in the buffer layer 400 by the second through holes TH2.
  • the buffer layer 400 is divided into the buffer layers by the second through holes TH2.
  • the front electrode layer 500 is provided on the buffer layer 400.
  • the front electrode layer 500 is transparent and includes a conductive layer.
  • the front electrode layer 500 has resistance higher than that of the back electrode layer 500.
  • the front electrode layer 500 includes oxide.
  • a material constituting the front electrode layer 500 may include Al doped zinc oxide (AZO), indium zinc oxide (IZO), or indium tin oxide (ITO).
  • the front electrode layer 500 may have the characteristics of an N type semiconductor. In this case, the front electrode layer 500 forms an N type semiconductor together with the buffer layer 400 to make a PN junction with the light absorbing layer 300 serving as a P type semiconductor layer.
  • the front electrode layer 500 may have the thickness of about 100 nm or about 500 nm.
  • the front electrode layer 500 may have the thickness in the range of about 500 nm to about 1.5 ⁇ m.
  • the front electrode layer 500 includes Al doped ZnO, the Al may be doped with the content of about 2.5 wt% to about 3.5 wt%.
  • the buffer layer 400 and the front electrode layer 500 are formed therein with third through holes TH3.
  • the third through holes TH3 may be formed through a portion or an entire portion of the buffer layer 400, the high resistance buffer layer, and the front electrode layer 500. In other words, the third through holes TH3 may expose the top surface of the back electrode layer 200.
  • the third through holes TH3 are formed adjacent to the second through holes TH2.
  • the third through holes TH3 are provided beside the second through holes TH2.
  • the third through holes TH3 are provided in parallel to the second through holes TH2.
  • the third through holes TH3 may have the shape extending in the first direction.
  • the third through holes TH3 are formed through the front electrode layer 500.
  • the third through holes TH3 may be formed through the light absorbing layer 300, the buffer layer 400, and/or a portion or an entire portion of the high resistance buffer layer.
  • the front electrode layer 500 is divided into a plurality of front electrodes by the third through holes TH3.
  • the front electrodes are defined by the third through holes TH3.
  • Each front electrode has a shape corresponding to the shape of each back electrode.
  • the front electrodes are arranged in the shape of a stripe.
  • the front electrodes may be arranged in the shape of a matrix.
  • a plurality of solar cells C1, C2, ..., and Cn are defined by the third through holes TH3.
  • the solar cells C1, C2, ..., and Cn are defined by the second and third through holes TH2 and TH3.
  • the solar cell apparatus according to the embodiment is divided into the solar cells C1, C2, ..., and Cn by the second and third through holes TH2 and TH3.
  • the solar cells C1, C2, ..., and Cn are connected to each other in a second direction crossing the first direction. In other words, current may flow through the solar cells C1, C2, ..., and Cn in the second direction.
  • a solar cell panel 10 includes the support substrate 100 and the solar cells C1, C2, ..., and Cn.
  • the solar cells C1, C2, ..., and Cn are provided on the support substrate 100, and spaced apart from each other.
  • the solar cells C1, C2, ..., and Cn are connected to each other in series by connection parts 600.
  • connection parts 600 are provided inside the second through holes TH2.
  • the connection parts extend downward from the front electrode layer 500, so that the connection parts are connected to the back electrode layer 200.
  • connection parts 600 extend from the front electrode of the first cell C1 so that the connection parts are connected to the back electrode of the second cell C2.
  • connection parts 600 connect adjacent cells to each other.
  • connection parts connect front and back electrodes, which constitute adjacent cells, to each other.
  • connection parts 600 are integrally formed with the front electrode layer 500.
  • a material constituting the connection parts is the same as a material constituting the front electrode layer 500.
  • a second buffer layer is deposited on the first buffer layer.
  • the first buffer layer may be completely deposited on inner surfaces of pin holes which are formed on the light absorbing layer. Accordingly, a phenomenon in which a shunt path occurs due to the pin holes without achieving homojunction can be prevented when the pn junction is performed.
  • the buffer layer is deposited using a sputtering CBD method.
  • a short-circuit that is, a shunt path may be generated after deposition of the front electrode layer, so that the overall efficiency of the solar cell may be reduced.
  • a second buffer layer having a desired thickness is deposited on the first buffer layer by the sputtering process or a CBD process. Accordingly, the buffer layer may be completely deposited on an inner surface of the pin hole formed in the light absorbing layer, so the shunt path may be prevented from being generated.
  • the solar cell according to the embodiment may improve the overall efficiency of the solar cell.
  • FIG. 6 is a flowchart showing a method of fabricating a solar cell according to the embodiment
  • FIGS. 7 to 13 are sectional views showing a method of fabricating a solar cell according to the embodiment.
  • a method of fabricating a solar cell includes forming a back electrode layer on a support substrate (ST10); forming a first buffer layer on the light absorbing layer (ST20); forming a buffer layer on the light absorbing layer (ST30); and forming a second buffer layer on the first buffer layer (ST40).
  • the back electrode layer 200 is formed on the support substrate 100.
  • the back electrode layer 200 may be formed through a physical vapor deposition (PVD) or a plating scheme.
  • First through holes TH1 are formed by patterning the back electrode layer 200. Accordingly, a plurality of back electrodes are formed on the support substrate 100.
  • the back electrode layer 200 is patterned by a laser.
  • the first through holes TH1 are exposed to a top surface of the support substrate 100, and may have a width in the range of about 80 ⁇ m to about 200 ⁇ m, but the embodiment is not limited thereto.
  • An additional layer such as a diffusion barrier layer may be interposed between the support substrate 100 and the back electrode layer 200.
  • the first through holes TH1 exposes a top surface of the additional layer.
  • the light absorbing layer 300 is formed on the back electrode layer 200.
  • the light absorbing layer 300 may be formed through a sputtering process or evaporation.
  • Cu, In, Ga and Se are simultaneously or independently evaporated to form the CIGS-based light absorbing layer 300, or the light absorbing layer 300 can be formed through the selenization process after forming a metal precursor layer.
  • the metal precursor layer is formed on the back electrode layer 200 by performing the sputtering process using a Cu target, an In target, and a Ga target.
  • the selenization process is performed to form the CIGS-based light absorbing layer 300.
  • the sputtering process using the Cu target, the In target, and the Ga target and the selenization process can be simultaneously performed.
  • a sputtering process and a selenization process may be performed to form a CIS or CIG-based light absorbing layer 300 using only the Cu target and the In target or only the Cu target and the Ga target.
  • the first buffer layer 410 and the second buffer layer 420 are formed.
  • a first buffer layer 410 is formed on the light absorbing layer 300 using the atomic layer deposition method. As illustrated in FIGS. 3 and 5, a plurality of pin holes 310 may be formed in the light absorbing layer 300, and the first buffer layer 410 may be deposited to cover a top surface of the light absorbing layer 300 and an inner surface of the pin hole 310.
  • the atomic layer deposition process is a nano thin film deposition technology using a property of a single atomic layer having a chemical adhesion function.
  • a hyperfine layer-by-layer deposition can be achieved at a thickness of an atomic layer by alternately performing absorption and substitution of molecules on a surface of a wafer, an oxide and a metal thin film may be laminated as thin as possible, and a film may be formed at a temperature (500 °C or less) less than that of a CVD to deposit particles formed by a chemical reaction of gas on the surface of the wafer.
  • the first buffer layer 410 may be fully deposited on an inner side 311 and a bottom surface of the pin hole.
  • the first buffer layer 410 may be deposited to have a thickness in the range of about 5 nm to about 10 nm.
  • the thickness range is a thickness range determined capable of depositing an inner surface of the pin hole by taking a process time of the atomic layer depositing process.
  • the second buffer layer 420 is deposited by a sputtering process and a CBD process.
  • the second buffer layer may be deposited on a top surface deposited on a top surface of the light absorbing layer 300 and a partial inner surface of a pin hole 310 of the light absorbing layer 300 deposited by the first buffer layer 410.
  • the second buffer layer 420 may be deposited by a sputtering process or a CBD process.
  • the second buffer layer may be deposited with a thickness in the range of about 10 nm to about 15 nm. Further, the buffer layer 420 including the first buffer layer 410 and the second buffer layer 420 may be deposited with a thickness of about 20 nm.
  • first buffer layer 410 may be integrally formed with the second buffer layer.
  • FIG. 10 is an enlarged view where the first buffer layer 410 and the second buffer layer 420 are deposited on the light absorbing layer 300. That is, after an inside of the pin hole 310 is deposited by the first buffer layer 410, a next buffer layer deposition process may be completed by depositing the second buffer layer 420. That is, when the buffer layer is formed by the sputtering process or the CBD process, since a micro bubble is generated inside the pin hole, it is difficult to deposit the buffer layer to the extent of a bottom surface of the pin hole. That is, the inside of the pin hole having the micro size may not be fully deposited with the buffer layer.
  • the buffer layer is deposited using a sputtering CBD method.
  • a short-circuit that is, a shunt path may be generated after deposition of the front electrode layer, so that the overall efficiency of the solar cell may be reduced.
  • a second buffer layer having a desired thickness is deposited on the first buffer layer by the sputtering process or a CBD process. Accordingly, the buffer layer may be completely deposited on an inner surface of the pin hole formed in the light absorbing layer, so the shunt path may be prevented from being generated. A process time may be prevented from being increased by suitably setting the thicknesses of the first buffer layer and the second buffer layer.
  • second through holes TH2 are formed by partially removing the light absorbing layer 300 and the buffer layer 400.
  • the second through holes TH2 may be formed by using a mechanical device such as a tip or a laser device.
  • the light absorbing layer 300 and the buffer layer 400 may be patterned by a tip having a width of about 40 ⁇ m to about 180 ⁇ m.
  • the second through holes TH2 may be formed by a laser having a wavelength of about 200 nm to about 600 nm.
  • the second through holes TH2 may have the width of about 100 ⁇ m to about 200 ⁇ m.
  • the second through holes TH2 exposes a portion of the top surface of the back electrode layer 200.
  • the front electrode layer may be formed on the buffer layer 400.
  • the front electrode layer 800 may be deposited through an RF sputtering scheme using a ZnO target, a reactive sputtering scheme using a Zn target, or an MOCVD scheme.
  • the third through holes TH3 are formed by partially removing the light absorbing layer 300, the buffer layer 400, and the front electrode layer 500. Therefore, the front electrode layer 500 is patterned to define a plurality of front electrodes and first to third cells C1 to C3.
  • Each third through holes TH3 have the width of about 80 ⁇ m to about 200 ⁇ m.
  • any reference in this specification to “one embodiment,” “an embodiment,” “example embodiment,” etc. means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment of the invention.
  • the appearances of such phrases in various places in the specification are not necessarily all referring to the same embodiment.

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  • Photovoltaic Devices (AREA)

Abstract

La présente invention concerne un procédé de fabrication de cellule solaire, lequel procédé comprend les étapes consistant à : former une couche d'électrode arrière sur un substrat de support ; former une couche d'absorption de lumière, qui comporte sur sa surface supérieure une pluralité de trous de broche, sur la couche d'électrode arrière ; et former une couche tampon sur la couche d'absorption de lumière, la formation de la couche tampon faisant appel au dépôt d'une première couche tampon sur la surface supérieure de la couche d'absorption de lumière et sur une surface interne du trou de broche, et au dépôt d'une seconde couche tampon sur une surface supérieure de la première couche tampon et sur un côté intérieur du trou de broche.
PCT/KR2013/009077 2012-10-11 2013-10-11 Cellule solaire et son procédé de fabrication WO2014058256A1 (fr)

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KR10-2012-0113208 2012-10-11
KR1020120113208A KR20140047257A (ko) 2012-10-11 2012-10-11 태양전지 및 이의 제조 방법

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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5981868A (en) * 1996-10-25 1999-11-09 Showa Shell Sekiyu K.K. Thin-film solar cell comprising thin-film light absorbing layer of chalcopyrite multi-element compound semiconductor
KR20080009346A (ko) * 2006-07-24 2008-01-29 주식회사 엘지화학 태양전지 버퍼층의 제조방법
WO2010151340A1 (fr) * 2009-06-26 2010-12-29 Sol Array Llc Fabrication de module solaire à couche mince
US20110081744A1 (en) * 2009-10-06 2011-04-07 Fujifilm Corporation Buffer layer and manufacturing method thereof, reaction solution, photoelectric conversion device, and solar cell
WO2012054476A2 (fr) * 2010-10-19 2012-04-26 Miasole Sel de soufre contenant des cibles cig, leurs procédés de fabrication et d'utilisation

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5981868A (en) * 1996-10-25 1999-11-09 Showa Shell Sekiyu K.K. Thin-film solar cell comprising thin-film light absorbing layer of chalcopyrite multi-element compound semiconductor
KR20080009346A (ko) * 2006-07-24 2008-01-29 주식회사 엘지화학 태양전지 버퍼층의 제조방법
WO2010151340A1 (fr) * 2009-06-26 2010-12-29 Sol Array Llc Fabrication de module solaire à couche mince
US20110081744A1 (en) * 2009-10-06 2011-04-07 Fujifilm Corporation Buffer layer and manufacturing method thereof, reaction solution, photoelectric conversion device, and solar cell
WO2012054476A2 (fr) * 2010-10-19 2012-04-26 Miasole Sel de soufre contenant des cibles cig, leurs procédés de fabrication et d'utilisation

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