WO2014049965A1

WO2014049965A1 - Circuit module using mounting board

Info

Publication number: WO2014049965A1
Application number: PCT/JP2013/005100
Authority: WO
Inventors: 敦史加藤; 中村　岳史; 俊道成瀬
Original assignee: 三洋電機株式会社
Priority date: 2012-09-27
Filing date: 2013-08-29
Publication date: 2014-04-03

Abstract

A semiconductor package (1) is mounted on a mounting board (2). However, increases in the performance and capacity of a built-in semiconductor chip (5), and progress in miniaturization of the semiconductor package led to heat from the semiconductor package itself intensifying, resulting in a problem of temperature increases. The present invention is a circuit module (3) having: a semiconductor package (1) that is formed in hexahedron shape, and has externally-connected electrodes on the back surface; and a mounting board (2) to which the semiconductor package (1) is electrically connected and mounted. Furthermore, the circuit module (3) is provided with a side resin (20) that is in contact with the sides of the semiconductor package (1), is disposed at the periphery of the semiconductor package (1) from the sides, and is filled with a filler, enabling heat from the semiconductor package (1) to be dissipated externally with a simple potting structure.

Description

Circuit module using mounting board

The present invention relates to a circuit module using a mounting board.

[Recent global environmental problems require reduction of power and various countermeasures have been taken.

Among them, in air conditioners, washing machines, refrigerators, etc., higher power efficiency is considered, and power semiconductor elements used in this power supply circuit are required to have a more excellent heat dissipation structure. In this case, a heat radiating fin is attached, which is more complicated, thicker and larger in size.

On the other hand, recently, there are many electronic portable devices around us, and it is now in an era where various information can be obtained with a mobile phone taken out of a pocket. Moreover, the thickness has been extremely reduced from the size of about one business card to about two.

There are many factors that have realized this reduction in size and weight, but the first is that semiconductor devices such as ICs have become highly functional.

For example, FIG. 5 illustrates the structure. FIG. 5A shows a circuit module 3 in which a general semiconductor package 1 is mounted on a mounting substrate 2.

This semiconductor package 1 is a surface mount type flat package, and a semiconductor chip 5 is provided on a substrate 4, and an electrode of the substrate 4 and an electrode of the semiconductor chip are electrically connected. The surface of the substrate 4 is sealed with an insulating resin 6 including the semiconductor chip 5. Further, the semiconductor package 1 is provided on the mounting substrate 2.

A back electrode 7 is provided on the back side of the substrate 4 and is electrically connected to the conductive pattern of the mounting substrate 2 via solder. In consideration of solder reliability, an underfill 8 is provided between the substrate 4 and the mounting substrate 2. For example, between the substrate 4 and the mounting substrate 2 is about 30 μm, and in order to permeate the gap, a resin with low viscosity is used for the underfill.

JP 2008-22016

FIG. 5B is a plan view of the circuit module 3 described above. As described at the beginning of the sentence, the semiconductor chip 5 has a high function and a large current to be handled. In addition, the size of semiconductor packages is becoming smaller.

In an extreme case, for example, the semiconductor package 1A that has a plane size of 2 cm × 2 cm and consumes Q watts of power will increase the function of the semiconductor chip in the following year, and the power of 1 cm × 1 cm will be 2 × Q watts of power. The semiconductor chip 1B is required.

However, since the sealing resin 6 is an insulating material, it has a high thermal resistance, and the substrate 4 itself is made of the same material, so that the thermal resistance is high. Therefore, the semiconductor package 1B that has become smaller is required to take measures against heat dissipation.

For example, in face-down type power modules, a metal plate is attached as an electrode on the back of the chip, a thermal via is provided under the island, and heat dissipation measures are taken.

All the packages described so far have the light, thin, small and high power flow described above, and this semiconductor package requires measures to prevent heat from flowing to the outside and prevent the semiconductor chip from becoming hot as a cheap measure. It has been.

The present invention is a circuit module including a semiconductor package having a hexahedron and having an external connection electrode on the back surface, and a mounting substrate on which the semiconductor package is electrically connected and is in contact with a side surface of the semiconductor package. The problem is solved by providing a side resin provided around the semiconductor package from the side surface and filled with a filler, and radiating the heat of the semiconductor package to the outside through the mounting substrate with a simple potting structure. is there.

囲む By enclosing the semiconductor package with a resin containing filler, the heat of the semiconductor package accumulates in this resin and is transmitted to the mounting board side at the same time. The expansion of the heat radiation path is effective in the contact area, and the heat storage capacity of the transferred heat is effective in the volume of the resin. In particular, since the resin is in contact with the side surface of the semiconductor package and further in contact with the mounting substrate, heat can be transferred from the semiconductor package to the mounting substrate side.

It is a figure of the circuit module using the mounting board | substrate which is embodiment of this invention. It is a figure of the circuit module using the mounting board | substrate which is embodiment of this invention. It is a figure of the circuit module using the mounting board | substrate which is embodiment of this invention. It is a figure of the circuit module using the mounting board | substrate which is embodiment of this invention. It is a figure of the circuit module using the conventional mounting board | substrate. It is a figure of the circuit module which is embodiment of this invention. It is a figure of the circuit module which is embodiment of this invention.

The present invention is characterized by the resin 20 in the circuit module 3 and is characterized in that the heat of the semiconductor package 1 is dissipated by the insulating resin 20. Preferably, the semiconductor package 1 is not disposed on the back surface of the semiconductor package (the back surface of the semiconductor package 1 facing the mounting substrate 2), and the side surface of the semiconductor package 1 and the resin 20 are in contact with each other, thereby taking in the heat of the semiconductor package 1. At the same time, the coating-type insulating resin 20 is provided so as to contact the surface of the mounting substrate 2 and transmit heat to the mounting substrate 2 side. Hereinafter, this resin is referred to as a side resin 20. As shown in FIG. 1, the side resin 20 is mixed with a material having excellent thermal conductivity, for example, a filler made of metal, metal oxide, metal alloy, or oxide of this alloy. In particular, in consideration of a short circuit of an electrode or a wiring, an insulating material such as a metal oxide or an oxide of an alloy is preferable. Moreover, the filling rate is as high as 80% or more and 95% or less, and its viscosity is large.

Here, in order to distinguish the underfill 8 from the side resin 20, the underfill 8 will be described below.

The underfill 8 described with reference to FIG. 5 generally has a filling rate of about 70 to 80% in terms of MAX. Depending on the choice of resin and solvent, before curing, there is a capillary tube in the gap between the mounting substrate 2 and the semiconductor package 1. This is a low-viscosity resin that smoothly enters the entire back surface of the semiconductor package 1 due to the phenomenon. The purpose of this underfill is, for example, by setting the thermal expansion coefficient α (about 40 ppm) of the epoxy resin, which is an underfill material, to the same level as that of the substrate 4 or α between the mounting substrate 2 and the substrate 4. It is to improve the reliability of the connection part. This is characterized in that when the mounting substrate 2 and the semiconductor package 1 are connected by solder, stress applied to the solder can be relieved. For example, due to the difference in thermal expansion coefficient, the displacement force between them is reduced between them. In particular, the filler particle size is small because it penetrates into narrow gaps without voids. However, if the filler particle size is small, the surface area of the entire filler is widened, and the resin is coated here, so that the ratio of the presence of the resin relative to the heat conduction path increases and the thermal resistance is reduced. I can't expect much. As shown in FIG. 5, the underfill 8 may slightly cover the side surface of the semiconductor package 1, particularly the lower side surface. However, the underfill 8 is substantially integrated with the same material in the entire gap between the back surface of the semiconductor package 1 and the mounting substrate 2. Therefore, it can be clearly distinguished from the side resin 8.

As you can see, underfill and side resin are used in different ways.

Furthermore, in the conventional package, heat radiation is taken into consideration, and for example, heat radiation parts such as heat radiation fins and metal plates are attached. When this heat dissipation component is adopted, the overall structure becomes complicated, because the structure of the package itself is changed to make it easier to attach the heat dissipation component, and the heat of the semiconductor package is efficiently released to the outside. It took time and was troublesome to wear, resulting in problems such as cost. However, the side resin 20 only needs to be applied to the mounting substrate 2 corresponding to the region extending from the side surface of the semiconductor package 1 to the outside thereof, so that the countermeasure can be easily taken and the cost can be reduced.

Moreover, if a semiconductor package with a heat radiating fin is used in a mobile phone, it becomes difficult to make the mobile phone thinner, and this is not a solution for mobile devices. The heat of the semiconductor package 1 must be released to the outside while keeping the module thin. In this respect, the side resin 20 can be said to be a very meaningful measure because it can be dissipated while maintaining its thinness.

Now, the present invention will be specifically described. FIG. 1A is a diagram in which the semiconductor package 1 is provided on the mounting substrate 2 and the side resin 20 is provided.

First, the semiconductor package 1 is not particularly limited, but a surface mount type package is preferable in consideration of structural points such as a contact area on a side surface and inconvenience due to jumping out of a lead. Here, it is made by the MAP method (Matrix Array Packaging method), and can be manufactured by a lead frame type, a substrate type, and further a half-etching type. As the semiconductor chip 5, a face-up type or a face-down type is adopted. Briefly, when the semiconductor chip 1 is mounted in each of a plurality of mounting areas arranged in a matrix and is collectively molded, the dicing machine performs a full cut from the sealing resin to the substrate 4. Therefore, the semiconductor package 1 is a hexahedron having four side surfaces disposed between the upper surface, the rear surface, and the upper and lower surfaces, and the external connection electrodes are disposed on the rear surface.

The semiconductor package 1 formed by MAP will be described.

First, in the case of the substrate type, a large-sized substrate in which the conductive patterns of the units are arranged vertically and horizontally is prepared, and the semiconductor chip 5 is provided thereon. As the substrate 4, a printed circuit board made of resin or a ceramic substrate is adopted, and the surface of the substrate 4 has a first conductive pattern 21 for each unit. The first conductive pattern 21 is mainly composed of bonding pads, islands, and wiring. If the first conductive pattern 21 is a multilayer substrate, a conductive pattern is provided in each layer as necessary. In addition, a through hole or the like is provided in order to realize electrical connection from the front to the back. A second conductive pattern 22 is provided on the back surface of the substrate 4 and includes, for example, external connection electrodes and rewiring for rearranging the external connection electrodes as necessary. Although the substrate 4 is illustrated in a two-layer structure, the number of layers may be four layers, six layers,. In this substrate, the core layer is made of an insulating material. However, recently, heat dissipation is taken into consideration, and a core metal substrate in which a metal foil, for example, a Cu foil is embedded in the core layer can also be used.

Here, the semiconductor chip 5 is electrically connected to the island, but an insulating layer formed on the outermost surface, for example, a solder resist PSR, may be provided, and may be directly fixed thereon with an adhesive. Then, the electrode of the semiconductor chip 5 and the bonding pad 21 of the substrate 4 are electrically connected. For example, if the face is up, a thin metal wire is used. If the face is down, the electrode of the semiconductor chip and the bonding pad are connected by solder balls or bumps. Further, the surface of the substrate 4 is sealed with a sealing resin 6 so as to cover a large number of these semiconductor chips 5 arranged vertically and horizontally. Each unit is fully cut by a dicing apparatus, and a hexahedral semiconductor package 1 is produced.

Note that one or more layers of the substrate 4 in FIG. 1 are laminated on both surfaces of a core layer made of an insulating resin while a conductive pattern is insulated. Both the upper side and the lower side are provided with the first layer conductive pattern on the core layer, and when the second insulating layer is subsequently coated, the second layer conductive pattern is further provided. Are repeated to form two layers, four layers, six layers, eight layers, and so on. That is, the substrate is an even layer.

However, recently, there is a substrate in which the core layer is omitted. That is, from the bottom, the first insulating layer, the first conductive pattern, the second insulating layer, the second conductive pattern, and the insulating layer and the conductive pattern are repeatedly stacked. The first insulating layer and the uppermost insulating layer on the back surface are called as coreless substrates because the electrodes are exposed and the core layer is generally omitted. Since there is no core layer, the thickness of the substrate can be reduced accordingly.

The lead frame type uses an island and electrodes (leads) located around it as a unit, and prepares a lead frame prepared by arranging them vertically and horizontally. Since the lead frame has many openings, a sheet is pasted on the back surface of the lead frame to make it look like a substrate, and then the elements are mounted and electrically connected. Thereafter, the units arranged vertically and horizontally are collectively sealed with a sealing resin. Then, the sheet is peeled off, and the lead frame exposed from the back surface of the sealing resin is processed by etching or grinding to separate it into islands and leads constituting the lead frame, and then full cut by the same method as MAP.

As a result, the hexahedral package in which islands and leads are exposed from the sealing resin on the back surface can be obtained.

In the half-etching type, the copper foil is formed by half-etching, unit patterns such as electrodes are formed vertically and horizontally, and the copper foil remaining on the back surface is used as the role of the sheet. Similarly, the elements are mounted, electrically connected, and collectively sealed, and then the copper foil remaining on the back surface is etched back, and other than the electrodes are removed and electrically separated. The hexahedron is formed by full cutting.

Both packages have a hexahedron consisting of four sides connecting the periphery of the upper surface and the back surface and the upper surface and the back surface in order to make a full cut with a dicing machine. In these hexahedral packages, the thickness of the semiconductor and the thickness of the substrate have been reduced, and the package can be made thinner. For example, BGA and the like have this structure and are frequently used in mobile phones, portable computers, digital cameras, and the like. Recently, it is called SIP (System in Package), and a three-dimensional type in which many chips are stacked and a plain type in which chips are arranged in a plane are adopted, and a large-capacity memory and a large-scale circuit are used. An embedded system IC is realized.

On the other hand, the mounting substrate 2 on which the semiconductor package 1 is mounted is incorporated into a set of, for example, a portable device, and is generally a printed substrate having a pattern of one or more layers. This printed circuit board is mounted including passive elements such as a chip capacitor and a chip resistor, and an electronic circuit in the set is realized.

The feature of the present invention resides in that a side resin 20 is provided on the side surface of the semiconductor package 1 as shown in FIG. The resin material is an epoxy resin, acrylic, silicone, urethane or the like, and a filler is mixed therein. Moreover, the filling rate is set to about 80% or more and about 95%, and in the state before curing, the viscosity is set to be larger than that from underfill. For example, when the interval between the mounting substrate 2 and the substrate 4 is X, the filler size is such that the average length (crushed filler) or diameter (granular filler) is about X or larger than X. The side resin 20 is prevented from entering between the mounting board 2 and the board 4 by being mixed. Further, in order to obtain the above-described filling rate, the gaps between the large fillers are also filled with small size fillers.

In particular, when the gap X is set to a value selected between 30 μm and 50 μm, for example, the maximum particle size (φ≈X μm × (1.1 to 1.3) )) Selected. By doing so, a filler of a large size cannot enter the gap X, and the side resin 20 hardly enters the gap after all.

Explain the extent of this intrusion. When the package 1 is a BGA, the external electrodes (back surface electrodes) are arranged in a grid pattern in the vertical and horizontal directions, or are arranged in a ring shape in multiple layers. In this case, it is assumed that it is not intruding that the outermost external connection electrode and the side resin 20 come into contact with each other when the back surface is viewed in a plan view. This is the same for packages other than BGA. Moreover, it is practically impossible to select only a specific filler as a filler, and generally shows a Maxwell distribution. Therefore, since a small filler is also mixed, in some cases, the possibility of slightly entering the gap cannot be denied.

On the other hand, the underfill penetrates to the back of the package corresponding to the center of the substrate 4 in plan view. Eventually, the underfill and side resin that permeate the entire back surface of the semiconductor package 1 are clearly distinguished.

When a filler of a large size, such as a side resin, is mixed into the underfill, the viscosity increases and fluidity deteriorates, penetration is difficult, or after curing, the electrode 22 and the mounting substrate 2 are caused by thermal expansion. This large size may cause a breakdown of the withstand voltage due to the separation of the electrode on the side or between the external connection electrode 22 adjacent to the filler and the electrode on the side of the mounting board. Hiring is difficult.

The side resin 20 containing filler has a large filler mixing rate and a large particle size, so that the thermal conductivity is larger than that of the underfill. Further, as shown in FIG. 1B, since it is applied around the semiconductor package 1 with its width Z3 and height h, it is applied in a large volume and its heat capacity increases. Therefore, the heat generated in the semiconductor package 1 is transferred to the side resin as shown by the thick arrows, is stored, and is radiated to the mounting substrate 2 in parallel.

1 (B) and 1 (C) illustrate how to apply the side resin 20, and an area struck by fine points is a portion where the side resin 20 is provided. (B) is a case where the entire circumference is covered, and FIG. 1 (C) is an example in which an open portion is provided at the center of each side and the side resin 20 is covered including four corners.

For example, the height (thickness) of the side surface of the package is Z1, and the height (thickness) where the side resin 20 is applied is Z2. Because it is potting, it is only necessary to be able to paint the whole area in the height direction of the side of the package, but it is not so easy.
Therefore, Z2≈ (Z1 + X) × (about 0.8 to 1.0)
It seems to be appropriate to apply within a certain range. For example, if the thickness of the package is 0.3 mm to 1 mm, it can be calculated automatically.

At that time, the width Z3 of the side resin 20 applied in a ring shape should be large, preferably
Z3 ≧ Z2
Is good. By doing so, the path through which heat is transferred from the side surface of the semiconductor package 1 to the mounting substrate 2 side via the side resin 20 is increased, and there is an advantage that the heat dissipation effect is further increased. In particular, the angle between the inclined surface of the side resin and the mounting substrate may be about 45 degrees to 30 degrees, and Z3 may be enlarged.

FIG. 1C shows the side resin 20 provided with an opening 23. In FIG. 1 (B), the area surrounded by the side resin 20 has no underfill, and when it becomes a space, gas accumulates in the space, so that gas escape is made. The number and position of the opening parts 23 are not particularly limited.

In addition, when an underfill having a lower filler content than the side resin is provided inside, the underfill may be hardened first, and the trapped gas escapes in the gap of the underfill.

Furthermore, the back surface of the semiconductor package 1 is rectangular, and its four corners are portions where stress is concentrated. This is because stress is inevitably concentrated at the corners due to the difference in the thermal expansion coefficient α between the semiconductor package 1 and the mounting substrate 2, and the solder balls near the corners are liable to crack. However, since the side resin 20 covers the side surfaces constituting the corners of the back surface of the semiconductor package 1, the stress can be counteracted.

Further, in order to increase the contact area of the side surface, as shown in FIG. 1 (D), when the inclined surface is formed outwardly from the upper surface of the package 1, the area of the side surface is enlarged and the effect is large. It is. Referring to FIG. 1 (E), reference numeral 24 denotes a large-sized substrate having element arrangement regions arranged in a matrix and is collectively sealed and separated by a dicer as indicated by reference numeral 25. Can be easily manufactured.

Although the side resin 20 has a fluidity even though the viscosity is high, the side resin 20 always flows, and the filler and the side surface of the package 1 may be in contact with each other, or there may be some gaps. . Therefore, the curved surface may be pressed using a flat pressing jig before the side resin 20 is cured. If it does so, an inside filler will contact | abut to a side surface and heat resistance can be reduced. In FIG. 1A, the surface of the side resin 20 is a curved surface, but since this pressing jig is used, at least a part of the inclined surface is a flat inclined surface.

Subsequently, a structure obtained by further improving the structure of FIG. 1 will be described with reference to FIG. The difference is the heat dissipating metal 30 provided on the mounting substrate 2 side.

As in FIG. 1, a third conductive pattern (connection electrode) 31 made of copper foil is formed on the mounting substrate 2 for electrical connection with a circuit element to be mounted. Therefore, at the time of pattern formation (for example, during etching), the heat dissipating metal 30 can be simultaneously formed in a ring shape outside the arrangement region of the semiconductor package 1. Since the back surface of the heat radiating metal 30 is firmly fixed to the surface of the mounting substrate 2, the heat conduction to the mounting substrate 2 side can be further improved.

In FIG. 2B, a slight gap is provided from the outer periphery of the arrangement region, and the heat dissipating metal 30 is provided around the outer periphery. Unlike FIG. 1, a heat radiating metal 30 made of a metal material having excellent thermal conductivity is provided between the lower side of the side resin 20 and the mounting substrate 2. To the substrate 2 side). The width of this metal is formed with almost the same width throughout, and its value is
Z4 ≧ Z2
Is preferred. However, since it is a metal, it is narrow and effective. As described above, Z4 is efficient up to a width where the angle between the inclined surface of the side resin and the mounting substrate is about 45 degrees at the maximum. This point will be described later again with reference to FIG.

Since the printed circuit board generally has a Cu pattern, the material of the heat radiating metal 30 is preferably the same material of Cu. Furthermore, in general, pads that require electrical connection are coated with Au, Ag, Pd, or the like on their surfaces, so that the heat-dissipating metal may be plated with these. In particular, recently, Ni and Au are plated from the lower layer.

These metal surfaces are also important in terms of filler contact. For example, Ni and Pd have a higher hardness than Au, and in a sense, it is somewhat difficult for a filler to bite in from the surface. In other words, the structure is close to point contact even if contact is made. However, if the outermost surface of the heat-dissipating metal is covered with a metal softer than Ni or Pd, such as Au, Ag, or Al, Sn or Zn, or is made Cu as it is, the filler is slightly different from Ni or Pd. You can bite inside. If it does so, the part which digs in will be in surface contact, and heat conduction will also improve. This structure can be realized by pressing the side resin with a pressing jig as described above in order to bite the filler in the side resin 20. Since the filling rate of the filler is high, the filler on the mounting substrate 2 side can be pushed in by pressing with a pressing jig.

Furthermore, the heat dissipation metal 30 has the effect of a seal ring incorporated into the semiconductor IC and traps moisture and harmful gas, so that the connection reliability between the semiconductor package 1 and the mounting substrate 2 can be maintained.

Also, the heat dissipation metal has four rounded corners. This is because the side resin 20 becomes hard when cured, stress is applied to the corners of the heat dissipation metal, and peeling from the mounting substrate 2 or peeling from the side resin 20 may occur.

FIG. 2 (C) is similar to FIG. 1 (C), in which a heat radiating metal 30 is provided on each of the four side resins 20. In addition, since both FIG. (B) and (C) are arrange | positioned in the vicinity of a terminal, it may be better to be grounded to GND. In particular, in the case of GND grounding, the GND pattern on the mounting board side may be rearranged and connected to the heat radiating metal 30 as shown in the figure. Further, since the GND terminal 32 is also provided on the third conductive pattern 31 side corresponding to the GND terminal of the semiconductor package 1, that is, inside the arrangement region, it may be formed integrally with this terminal via wiring. .

For example, even if a surge is applied to the heat dissipating metal 30 during assembly work, it can be dropped to the surge or GND.

FIG. 3 employs screwing (clamping means).

3A, a heat radiating plate 42 is provided on the back side or the front side of the mounting substrate 2, and the heat radiating plate 42 is attached to the mounting substrate 2 with screws 40 and nuts 41. As shown in the figure, since the entire head of the screw is covered with the side resin 20, heat is released to the mounting substrate 2 and the outside through the side resin 20, the screw, and the heat dissipation metal 42.

FIG. 3B illustrates the case where the electrodes 43A and 43B are provided on the front and back of the mounting substrate 2. FIG. The electrode 43A, the mounting substrate 2, the electrode 43B, and the heat sink 42 are fixed with screws 40 and nuts 41 from above. In addition, a heat sink may be arrange | positioned in the front side of a mounting board | substrate both (A) and (B). Further, if the thickness is not thinner than the thickness of the semiconductor package 1, it is meaningless as a thin module, but it may be thicker according to the user's request.

Subsequently, FIG. 3C will be described. This is a thermal via disposed between the electrodes 43A and 43B. Further, the electrodes 43A and 43B are ring-shaped metal having a specified width as described above, or use pads, and in a plan view, the electrodes 43A and 43B are circles, ellipses, or rectangles having a predetermined size. However, if an enlarged area extending from the pad to the open space is formed using the open space on the front and back sides, this becomes a substitute for the heat radiating fin, and the heat radiating effect can be improved. This will be described in detail later with reference to FIG.

Note that these three examples may be combined.

As described above, the semiconductor chip has been described face up, but may be face down.

FIG. 4A shows a structure in which the chip 5 of the semiconductor package is face-down, and the back surface of the semiconductor chip 5 faces upward. Therefore, the chip back surface may be exposed from the sealing resin 6, and the side resin 20 may be extended to the side surface of the semiconductor package 1 and the chip back surface 5 on the top surface of the package. The side resin 20 may be in contact with at least a part of the back surface of the chip, but preferably the entire surface of the package 1 is preferable. In this case, the side resin 20 is eventually covered over the entire semiconductor package. Since the side resin is piled up on the front side, it is a little thicker, but it is negligible when compared with the radiating fin. Moreover, if the side resin 20 coated on the front side of the package 1 is pressed with the above-described pressing jig, the surface thereof is flattened, and attachment is easy.

FIG. 4B shows the structure shown in FIG. 4A with the radiation fins 40 attached. In this structure, a heat radiating fin is provided on the side resin 20, and the bottom is radiated by the side resin.

Subsequently, application of the planar pattern of the heat radiating metal 30 will be described with reference to FIG. The one-dot chain line is the semiconductor chip 5, the rectangle indicated by the dotted line is the semiconductor package 1, and the hatched portion is the heat dissipation metal 30. Further, since an electronic circuit is configured on the mounting substrate 2 side, various elements such as an active element A or a passive element CR including wiring W, a pad P, other ICs and Trs, and the like are provided. Depending on the size of the mounting substrate and the mounting density of the circuit elements thereon, an empty space may be provided. In that case, the heat radiation effect can be further enhanced by providing the heat radiation expansion metal 30A integrally with the heat radiation metal 30 in this empty space.

For example, the outer shape of the heat dissipating metal 30 has a certain width Z4 and is formed in a ring shape, but the outer shape is substantially rectangular. Therefore, if there is an empty space more than the width of Z4, it may be expanded. For example, if there is a space having a width Z4 or more in the outer shape of the heat radiating metal 30, particularly the outer portion perpendicular to the four sides, the heat radiating expansion metal 30A may be formed in that portion.

In FIG. 6, in the outer shape of the heat dissipating metal, since there is a free space of Z4 or more on the lower long side and the short right side here, two heat dissipating expansion metals 30A and 30B are provided (one set). Is also good). Note that a heat radiation electrode may be provided on the back side of the mounting substrate 2 corresponding to the heat radiation expansion metal so that heat can be released to the back side through the through hole TH indicated by a cross.

Note that the through hole may be formed in a wide area like TH1 or finely provided like TH2.

Subsequently, the position of the heat dissipation metal 30 will be described with reference to FIG.

The upper right corner of the semiconductor package 1 is a point P, a dotted line is drawn from the point P toward the substrate 4, and the angle between the dotted line and the substrate surface is defined as α.

In FIG. 7, the side resin 20 is a curved line portion, which indicates that it is quite viscous.

However, considering the viscosity of the side resin and the mixing ratio of the filler, the tip of the side resin 20 that gets wet is from α1 of 45 degrees to α2 of 30 degrees.

Originally, the heat radiating metal 30 should be completely included in the side resin 20. However, considering the low thermal resistance of the side resin 20, at least the tip of the heat dissipation metal is positioned between the point immediately below point P and the point T1 (or point T2). In this case, it is possible to immediately transmit to the heat dissipating metal and to transmit heat to the mounting substrate 2 side.

In FIG. 7, the substrate 4 is a core metal substrate in which a copper foil is sandwiched between core layers. This is a substrate whose core layer is different from an insulating resin and has excellent heat conduction. With this core metal substrate, heat conduction can be further improved by thermally coupling the heat dissipation metal 30 to the copper foil of the core layer.

Specifically, if the contact hole is formed and the contact hole and the heat dissipation metal are formed by plating, the heat dissipation metal 30 can be directly coupled to the core layer.

As described above, it is possible to transfer the heat of the semiconductor package to the mounting substrate side by applying a simple method, for example, a potting method, and applying a side resin around the semiconductor package. Although not all, the mounting substrate side is rough in terms of space, and a space for providing the side resin can be secured, so that the structure is very simple and advantageous in terms of cost.

1: Semiconductor package 2: Mounting substrate 3: Circuit module 4: Package-side substrate 5: Semiconductor chip 6: Sealing resin 20: Side resin 21: First conductive pattern 22: Second conductive pattern 30: Heat dissipation metal

Claims

A semiconductor package comprising a top surface, a back surface facing the top surface, a hexahedron having four side surfaces disposed between the top surface and the back surface, and having an external connection electrode on the back surface;
In a circuit module having a connection electrode on the surface corresponding to the external connection electrode of the semiconductor package, the semiconductor package being provided on the connection electrode, and an electrically connected mounting substrate.
A circuit module comprising: a side resin which is in contact with a side surface of the semiconductor package and which is provided on the mounting substrate corresponding to the periphery of the semiconductor package from the side surface and which is filled with a filler.
2. The circuit module according to claim 1, wherein the filler of the side resin has a large and small filler, and the large filler has a size that cannot enter between the back surface of the semiconductor package and the mounting substrate.
The circuit module according to claim 2, wherein the content of the side resin filler is about 80% to 95%.
3. The circuit module according to claim 2, wherein a contact area between the side resin and the mounting substrate is larger than a contact area between the side resin and a side surface of the semiconductor package.
2. The circuit module according to claim 1, wherein a heat dissipating metal is provided on the mounting substrate side corresponding to the periphery of the semiconductor package in a contact region between the side resin and the mounting substrate.
The semiconductor chip sealed in the semiconductor package is mounted face down, a back surface is exposed from a sealing resin constituting the semiconductor package, and the side resin is also provided on the back surface. Circuit module.