WO2014034394A1

WO2014034394A1 - Liquid crystal display device and method for driving liquid crystal display device

Info

Publication number: WO2014034394A1
Application number: PCT/JP2013/071331
Authority: WO
Inventors: 耕平田中; 村田　充弘; 章仁陣田; 洋典岩田
Original assignee: シャープ株式会社
Priority date: 2012-08-27
Filing date: 2013-08-07
Publication date: 2014-03-06
Also published as: JP2015200680A

Abstract

Provided is a liquid crystal display device which performs a driving method capable of suppressing flicker. The liquid crystal display device comprises: a first substrate including a plurality of pixels arranged in a matrix; first and second electrodes formed for each pixel; a common electrode; a second substrate arranged opposite the first substrate; an opposite electrode formed on the second substrate; a liquid crystal layer including liquid crystal molecules having positive dielectric anisotropy; and a driving unit that controls at least one potential of the first electrode, the second electrode, the common electrode, and the opposite electrode. The driving unit sequentially writes the potentials of the first and second electrodes for the plurality of pixels while inverting the high and low relationship between the potential of the common electrode and the potential of the opposite electrode for each inversion period. The length of a scanning period (Tgs) for writing the potentials of the first and second electrodes one by one for the plurality of pixels is half or less of the length of the inversion period.

Description

Liquid crystal display device and driving method of liquid crystal display device

The present invention relates to a liquid crystal display device and a driving method of the liquid crystal display device.

Conventionally, various methods are known as driving methods for liquid crystal display devices.

Japanese Unexamined Patent Application Publication No. 2004-354407 discloses a liquid crystal display device including a first electrode and a second electrode formed on one substrate, and a third electrode formed on the other substrate. In this liquid crystal display device, the potential of the third electrode is changed within one frame period, and the horizontal electric field generated between the first electrode and the second electrode is used in the image display period, and the image non-display period is displayed. In the initial stage, the liquid crystal molecules are driven by a vertical electric field generated between the first electrode and the third electrode. The above-mentioned patent document describes that the fall response time can be particularly shortened by this driving method.

JP 2004-354407 A

The driving method disclosed in the above-mentioned patent document is a driving method by so-called black insertion writing in which an image non-display period is provided within one frame period. Therefore, it is difficult to obtain sufficient brightness. In the liquid crystal display device disclosed in the above-mentioned patent document, black display in a state where liquid crystal molecules are horizontally aligned and black display in a state where liquid crystal molecules are vertically aligned are mixed. For this reason, the black display cannot be compensated, and the contrast is lowered.

By the way, when a DC voltage is applied to the liquid crystal, the electric charge is biased on the electrode surface. Therefore, it is necessary to periodically reverse the direction of the electric field. In a general liquid crystal display device, as a driving method for preventing the bias of electric charge, the opposite AC inversion driving for inverting the polarity of the electrode facing each horizontal period and the polarity of the electrode facing each frame period are reversed. Frame inversion driving and the like are known.

However, when opposed AC inversion driving is applied to large panels and high-definition panels, the driving load increases. On the other hand, in the frame inversion driving, since the polarity of all the pixels is the same in a certain frame, flicker is likely to occur.

In addition, a driving method for suppressing flicker in a liquid crystal display device including three or more types of electrodes as described in the above Japanese Patent Application Laid-Open No. 2004-354407 has not been clarified.

An object of the present invention is to provide a driving method capable of suppressing flicker. Moreover, it is providing the liquid crystal display device which performs the said drive method.

The liquid crystal display device disclosed herein includes a first substrate including a plurality of pixels arranged in a matrix, a first electrode and a second electrode formed for each of the pixels, and a common formed over the plurality of pixels. An electrode, a second substrate disposed opposite to the first substrate, a counter electrode formed on the second substrate, and the dielectric anisotropy sandwiched between the first substrate and the second substrate Includes a liquid crystal layer containing positive liquid crystal molecules, and a drive unit that controls the potential of at least one of the first electrode, the second electrode, the common electrode, and the counter electrode. The driving unit sequentially writes the potentials of the first electrode and the second electrode for the plurality of pixels, and inverts the height relationship between the potential of the common electrode and the potential of the counter electrode for each inversion period. The length of the scanning period for writing the potentials of the first electrode and the second electrode once for each of the plurality of pixels is less than half of the length of the inversion period.

The driving method disclosed herein includes a first substrate including a plurality of pixels arranged in a matrix, a first electrode and a second electrode formed for each pixel, and a common electrode formed over the plurality of pixels. And a second substrate disposed to face the first substrate, a counter electrode formed on the second substrate, the first substrate and the second substrate, and having a dielectric anisotropy A driving method of a liquid crystal display device including a liquid crystal layer including positive liquid crystal molecules, wherein the potentials of the first electrode and the second electrode are sequentially written for the plurality of pixels, and the potential of the common electrode is opposed to the potential of the common electrode The level relationship with the potential of the electrode is inverted every predetermined inversion period. The length of the scanning period for writing the potentials of the first electrode and the second electrode once for each of the plurality of pixels is less than half of the length of the inversion period.

According to the present invention, a driving method capable of suppressing flicker is obtained. Further, a liquid crystal display device that executes the driving method can be obtained.

FIG. 1 is a perspective view schematically showing a part of a liquid crystal display device according to an embodiment of the present invention. FIG. 2 is a plan view showing one pixel extracted from the liquid crystal display device. FIG. 3 is a cross-sectional view taken along line AA in FIG. FIG. 4 is an equivalent circuit diagram of the liquid crystal display device. FIG. 5A is a diagram for explaining a display operation by the liquid crystal display device. FIG. 5B is a diagram for explaining a display operation by the liquid crystal display device. FIG. 6 is a block diagram showing a functional configuration of the liquid crystal display device. FIG. 7 is a timing chart of the driving method according to the first embodiment of the present invention. FIG. 8 is a diagram schematically showing the polarities of the electrodes in each pixel in the present embodiment. FIG. 9 is a diagram schematically showing the polarity of the electrode in each pixel in another example of the present embodiment. FIG. 10 is a diagram schematically showing the polarity of the electrode in each pixel in another example of the present embodiment. FIG. 11 is a timing chart of the driving method according to the second embodiment of the present invention. FIG. 12 is a timing chart of the driving method according to the third embodiment of the present invention. FIG. 13 is a schematic cross-sectional view of a liquid crystal display device according to a modification of the present invention. FIG. 14 is an equivalent circuit diagram of a liquid crystal display device according to a modification of the present invention.

A liquid crystal display device according to an embodiment of the present invention includes a first substrate including a plurality of pixels arranged in a matrix, a first electrode and a second electrode formed for each pixel, and the plurality of pixels. A common electrode formed; a second substrate disposed opposite the first substrate; a counter electrode formed on the second substrate; and the first substrate and the second substrate. A liquid crystal layer including liquid crystal molecules having positive rate anisotropy; and a driving unit that controls a potential of at least one of the first electrode, the second electrode, the common electrode, and the counter electrode. The driving unit sequentially writes the potentials of the first electrode and the second electrode for the plurality of pixels, and inverts the height relationship between the potential of the common electrode and the potential of the counter electrode for each inversion period. The length of the scanning period for writing the potentials of the first electrode and the second electrode once for each of the plurality of pixels is not more than half the length of the inversion period (first configuration).

According to the above configuration, the liquid crystal display device includes the first electrode and the second electrode formed for each pixel. The drive unit controls the potentials of the first electrode and the second electrode to form an electric field between the first electrode and the second electrode. Thereby, the orientation of the liquid crystal molecules in the liquid crystal layer can be controlled for each pixel.

The liquid crystal display device further includes a common electrode and a counter electrode. The driving unit controls the potential of at least one of the common electrode and the counter electrode to form an electric field between the common electrode and the counter electrode. Here, the common electrode is formed on the first substrate, and the counter electrode is formed on the second substrate. On the other hand, both the first electrode and the second electrode are formed on the first substrate. Therefore, the direction of the electric field (hereinafter referred to as the vertical electric field) formed by the common electrode and the counter electrode is a direction intersecting the direction of the electric field (hereinafter referred to as the horizontal electric field) formed by the first electrode and the second electrode. .

According to this configuration, in a pixel having a relatively large lateral electric field, the alignment of liquid crystal molecules is controlled by the lateral electric field. On the other hand, in a pixel having a relatively small horizontal electric field, the alignment of liquid crystal molecules is controlled by the vertical electric field. Thus, in any pixel, the alignment of liquid crystal molecules is controlled by the electric field. Therefore, the response speed can be increased as compared with the case where the orientation is controlled only by the vertical electric field or only the horizontal electric field.

The driving unit inverts the height relationship between the common electrode potential and the counter electrode potential every inversion period. That is, the drive unit inverts the vertical electric field for each inversion period. As a result, it is possible to prevent the liquid crystal layer from being biased.

The potential of the first electrode and the second electrode is affected by the inversion of the longitudinal electric field. For this reason, the alignment of the liquid crystal is disturbed and the luminance is reduced until the potential of the first electrode and the second electrode is written by the driving unit after the vertical electric field is reversed. However, according to the above configuration, the length of the scanning period is half or less of the length of the inversion period. Therefore, it is possible to shorten the period in which the luminance is lowered due to the influence of the inversion of the vertical electric field. Thereby, flicker can be suppressed.

In the first configuration, in each of the pixels, the potential of the first electrode and the potential of the second electrode are preferably opposite to each other (second configuration).

In the first or second configuration, the drive unit preferably reverses the polarities of the potentials of the first electrode and the second electrode every period that is an integral multiple of the length of one frame period (first 3 configuration).

According to the configuration described above, it is possible to prevent the liquid crystal layer from being biased.

In any one of the first to third configurations, the driving unit preferably reverses the polarities of the potentials of the first electrode and the second electrode for each row of the pixels (fourth configuration). .

According to the configuration described above, it is possible to prevent the liquid crystal layer from being biased. Further, flicker can be further suppressed.

In any one of the first to third configurations, it is preferable that the driving unit inverts the polarities of the potentials of the first electrode and the second electrode for each column of pixels (fifth configuration). .

In any one of the first to third configurations, it is preferable that the driving unit inverts the polarities of the potentials of the first electrode and the second electrode for each pixel (sixth configuration).

In any one of the first to sixth configurations, the length of the inversion period may be twice or more the length of one frame period (seventh configuration).

In any one of the first to seventh configurations, the length of the scanning period is shorter than the length of one frame period, and the driving unit has the potentials of the first electrode and the second electrode for the plurality of pixels. May be written once in one frame period (eighth configuration).

According to the above configuration, there is a pause period in which the first electrode and the second electrode are not charged during one frame period. Therefore, power consumption can be reduced.

In any one of the first to seventh configurations, the length of the scanning period is shorter than the length of one frame period, and the potentials of the first electrode and the second electrode are set to one frame period for the plurality of pixels. It may be configured to write twice or more (9th configuration).

According to the above configuration, the orientation of the liquid crystal molecules in the liquid crystal layer can be further stabilized.

In any one of the first to ninth configurations, an overcoat layer formed to cover the counter electrode may be further provided (tenth configuration).

According to the above configuration, the strength of the longitudinal electric field is reduced by the overcoat layer. For this reason, the influence of the transverse electric field becomes relatively large. Thereby, the transmittance can be improved.

In any one of the first to tenth configurations, a gate line formed for each row of pixels, first and second source lines formed for each column of pixels, and formed for each pixel. A first switching element connected to the gate line and the first source line, and opened and closed by a signal supplied to the gate line; and formed for each pixel and connected to the gate line and the second source line. And a second switching element that opens and closes in response to a signal supplied to the gate line, wherein the first electrode is connected to the first switching element, and the second electrode is connected to the second switching element. (Eleventh configuration).

In the eleventh configuration, it is preferable that the first switching element and the second switching element include an oxide semiconductor (a twelfth configuration).

A driving method according to an embodiment of the present invention includes a first substrate including a plurality of pixels arranged in a matrix, a first electrode and a second electrode formed for each pixel, and the plurality of pixels. A common electrode formed; a second substrate disposed opposite the first substrate; a counter electrode formed on the second substrate; and the first substrate and the second substrate. A liquid crystal display device comprising a liquid crystal layer including liquid crystal molecules having positive rate anisotropy, wherein the potentials of the first electrode and the second electrode are sequentially written to the plurality of pixels, and the common electrode The length of the scanning period for inverting the height relationship between the potential of the first electrode and the potential of the counter electrode every predetermined inversion period and writing the potentials of the first electrode and the second electrode once for each of the plurality of pixels Is the inversion period Half the length or less (first aspect of the driving method).

In the first aspect of the driving method, the liquid crystal layer may include liquid crystal molecules having a positive dielectric anisotropy (second aspect of the driving method).

[Embodiment]
Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. In the drawings, the same or corresponding parts are denoted by the same reference numerals and description thereof will not be repeated. In addition, in order to make the explanation easy to understand, in the drawings referred to below, the configuration is shown in a simplified or schematic manner, or some components are omitted. Further, the dimensional ratio between the constituent members shown in each drawing does not necessarily indicate an actual dimensional ratio.

[Liquid Crystal Display]
FIG. 1 is a perspective view schematically showing a part of a liquid crystal display device 1 according to an embodiment of the present invention. The liquid crystal display device 1 includes an array substrate (first substrate) 10, a counter substrate (second substrate) 30, and a liquid crystal layer 20 sandwiched between the array substrate 10 and the counter substrate 30.

The array substrate 10 includes a substrate 11. The substrate 11 has translucency. The substrate 11 is a glass substrate, for example. The substrate 11 may have a passivation film or the like formed on the surface. A polarizing plate 15 is disposed on one surface of the substrate 11. On the other surface of the substrate 11, a common electrode 12, an insulating layer 13, and an array layer 14 are formed in this order.

The common electrode 12 is formed in a uniform surface so as to cover substantially the entire display area of the substrate 11. The common electrode 12 is a translucent conductive film, for example, an ITO (Indium Tin Oxide) or IZO (Indium Zinc Oxide) film. The common electrode 12 is formed by, for example, CVD (Chemical Vapor Deposition) or sputtering.

The insulating layer 13 is formed so as to cover substantially the entire surface of the common electrode 12. The insulating layer 13 has translucency and insulating properties. The insulating layer 13 is, for example, a silicon nitride, silicon oxide, or silicon oxynitride film, and is formed by, for example, CVD. The insulating layer 13 may also be an organic material such as an acrylic resin. In this case, the insulating layer 13 is formed by, for example, a spin coater or a slit coater.

The array layer 14 includes a plurality of pixels Px each having a pixel electrode formed thereon. The array layer 14 further includes wiring (source line 141 and gate line 142) for supplying a signal to the pixel electrode, and a switching element.

The source lines 141 are formed in parallel with each other at a predetermined interval. The gate lines 142 are formed in parallel with each other at a predetermined interval in a direction intersecting the source line 141. The source line 141 and the gate line 142 preferably have high conductivity. The source line 141 and the gate line 142 are, for example, metal films.

Hereinafter, as shown in FIG. 1, the direction in which the gate line 142 extends is referred to as the x direction, and the direction in which the source line 141 extends is referred to as the y direction. Furthermore, the normal direction of the substrate 11 is referred to as the z direction. The pixels Px are arranged in a matrix along the x direction and the y direction. Therefore, a set of a plurality of pixels Px having the same position in the x direction may be referred to as a column of pixels Px. Furthermore, a set of a plurality of pixels Px having the same position in the y direction may be referred to as a row of pixels Px.

FIG. 2 is a plan view showing one pixel Px extracted from the liquid crystal display device 1. Two

source lines

141A and 141B and one gate line 142 pass through one pixel Px. The pixel Px further includes TFTs (Thin Film Transistors) 143A (first switching elements) and 143B (second switching elements) that are switching elements, and electrodes 144A (first electrodes) and 144B (second electrodes) that are pixel electrodes. Is formed.

The TFT 143A is formed in the vicinity of the intersection of the source line 141A and the gate line 142. The source of the TFT 143A is connected to the source line 141A, the gate is connected to the gate line 142, and the drain is connected to the electrode 144A. The TFT 143B is formed near the intersection of the source line 141B and the gate line 142. The source of the TFT 143B is connected to the source line 141B, the gate is connected to the gate line 142, and the drain is connected to the electrode 144B. That is, the

TFTs

143A and 143B share the gate line 142. Compared with the case where gate lines are formed in each of the

TFTs

143A and 143B, wiring can be reduced and the aperture ratio can be increased. Further, the timings at which the TFT 143A and the TFT 144B are operated can be matched.

TFTs

143A and 143B include, for example, amorphous silicon, polysilicon, or an oxide conductor. The

TFTs

143A and 143B preferably include an oxide conductor having a high electron mobility. An oxide conductor having a high electron mobility is, for example, IGZO (Indium Gallium Zinc Oxide).

The

electrodes

144A and 144B have a so-called comb tooth shape. That is, it is composed of a main body portion branched into a plurality of portions and a connection portion for connecting the main body portions. In the example shown in FIG. 2, the electrode 144 </ b> A includes two main body portions that extend in the y direction and are arranged in parallel to each other, and a connection portion that connects the main body portions at one end in the y direction. . Similarly, the electrode 144B includes two main body portions that extend in the y direction and are arranged in parallel to each other, and a connection portion that connects the main body portions at one end in the y direction. This configuration is merely an example, and the

electrodes

144A and 144B can take any shape.

The main body portion of the electrode 144A and the main body portion of the electrode 144B are arranged so as to be alternately arranged. With this configuration, a potential difference can be formed between the electrode 144A and the electrode 144B, and an electric field can be formed in the xy in-plane direction. In the example shown in FIG. 2, the main body portion of the electrode 144A and the main body portion of the electrode 144B are arranged so as to be alternately arranged in the x direction. With this configuration, an electric field can be formed in the x direction.

The

electrodes

144A and 144B are conductive films, for example, metal films such as Al or Cu. The

electrodes

144A and 144B may be transparent conductive films such as ITO or IZO.

1 and 2, the

source lines

141A and 141B, the gate line 142, the

TFTs

143A and 143B, and the

electrodes

144A and 144B are illustrated as being formed on the same layer. However, these may be formed in a plurality of layers via an insulating film or the like. That is, the array layer 14 may include a plurality of films formed at different positions in the z direction. The array layer 14 can be manufactured by a known semiconductor process.

Referring to FIG. 1 again, the explanation will be continued. The counter substrate 30 includes a substrate 31. Similar to the substrate 11, the substrate 31 has translucency. The substrate 31 is a glass substrate, for example. The substrate 31 may have a passivation film or the like formed on the surface. A polarizing plate 33 is disposed on one surface of the substrate 31. A counter electrode 32 is formed on the other surface of the substrate 31.

The counter electrode 32 is formed in a uniform surface so as to cover substantially the entire display area of the substrate 31. The counter electrode 32 is a translucent conductive film, for example, an ITO or IZO film. The counter electrode 32 is formed by, for example, CVD or sputtering.

The liquid crystal display device 1 is manufactured by bonding the array substrate 10 and the counter substrate 30 together with the peripheral edge sealed, and forming the liquid crystal layer 20 therebetween. As shown in FIG. 1, the array substrate 10 and the counter substrate 30 are disposed so that the array layer 14 and the counter electrode 32 face each other. Although not shown in FIG. 1, an alignment film is formed to cover the array layer 14 and the counter electrode 32.

The liquid crystal molecules constituting the liquid crystal layer 20 have birefringence. That is, the refractive index n _e for the light vibrating in parallel with the optical axis, the refractive index n _o for light oscillating perpendicularly to the optical axis are different. In the liquid crystal display device 1, liquid crystal molecules having a positive dielectric anisotropy Δn = n _e −n _o are used. Larger dielectric anisotropy Δn of liquid crystal molecules is preferable.

FIG. 3 is a sectional view taken along line AA in FIG. FIG. 4 is an equivalent circuit diagram of the liquid crystal display device 1. As shown in FIG. 4, the electrode 144A and the electrode 144B are capacitively coupled via the liquid crystal capacitance Clc3. The electrode 144A and the counter electrode 32 are capacitively coupled via a liquid crystal capacitance Clc1, and the electrode 144B and the counter electrode 32 are capacitively coupled via a liquid crystal capacitance Clc2. The electrode 144A and the common electrode 12 are capacitively coupled via the storage capacitor Cs1, and the electrode 144B and the common electrode 12 are capacitively coupled via the storage capacitor Cs2.

As shown in FIG. 4, the signal VsA is supplied to the source line 141A, and the signal VsB is supplied to the source line 141B. A signal Vg is supplied to the gate line 142, a signal Vcom is supplied to the common electrode 12, and a signal Vc is supplied to the counter electrode 32. Details of the signals VsA, VsB, Vg, Vcom, and Vc will be described later.

The outline of the display operation by the liquid crystal display device 1 will be described with reference to FIGS. 5A and 5B.

The liquid crystal molecules 20a of the liquid crystal layer 20 have a positive dielectric anisotropy Δn and are aligned so that the direction of the molecular major axis and the direction of the electric field are parallel. The liquid crystal display device 1 controls the potentials of the

electrodes

144A and 144B, the counter electrode 32, and the common electrode 12, applies an electric field to the liquid crystal layer 20, and controls the alignment direction of the liquid crystal molecules 20a. The liquid crystal display device 1 uses an alignment film for vertical alignment. Thereby, when an electric field is not applied to the liquid crystal layer 20, the liquid crystal molecules 20a are aligned so that the molecular long axis is in the z direction.

Hereinafter, the electric field formed by the

electrodes

144A and 144B is called a transverse electric field, and the electric field formed by the common electrode 12 and the counter electrode 32 is called a vertical electric field.

FIG. 5A schematically shows a state in which only a vertical electric field is formed and no horizontal electric field is formed. In the example shown in FIG. 5A, the potential of the counter electrode 32 is 7.5V, and the potentials of the

electrodes

144A and 144B and the common electrode 12 are 0V.

In FIG. 5A, the liquid crystal molecules 20a are aligned so that the molecular long axis is parallel to the z direction by the action of the vertical electric field and the

alignment films

15 and 33. At this time, the polarization direction of the light passing through the liquid crystal layer 20 hardly changes. The

polarizing plates

15 and 33 are arranged so that the transmission axes are orthogonal to each other. Therefore, the light transmitted through the polarizing plate 15 and the liquid crystal layer 20 is blocked by the polarizing plate 33. Therefore, black display (dark display) is performed in the pixel Px in which no horizontal electric field is formed as shown in FIG. 5A.

FIG. 5B schematically shows a state in which a horizontal electric field is formed in addition to the vertical electric field. In the example shown in FIG. 5B, the potential of the counter electrode 32 is 7.5V, the potential of the electrode 144A is 5.0V, the potential of the electrode 144B is −5.0V, and the potential of the common electrode 12 is 0V. is there.

In FIG. 5B, the liquid crystal molecules 20a are aligned with the molecular long axis inclined in the xy plane from the z direction due to a transverse electric field. At this time, the polarization direction of the light passing through the liquid crystal layer 20 changes depending on the birefringence of the liquid crystal molecules 20a. Thereby, the light transmitted through the polarizing plate 15 and the liquid crystal layer 20 can be transmitted through the polarizing plate 33. Therefore, white display (bright display) is performed in the pixel Px in which the horizontal electric field is formed as shown in FIG. 5B.

Thus, the liquid crystal display device 1 can control the gradation of the pixel Px by the strength of the lateral electric field. In the liquid crystal display device 1, a vertical electric field is formed both when performing black display and when performing white display. The response speed when switching from white display to black display can be improved by the vertical electric field. That is, the vertical electric field can improve the speed at which the liquid crystal molecules 20a tilted in the xy plane are aligned in the z direction.

Further, according to the present embodiment, black display is performed using the vertical alignment of the liquid crystal molecules 20a. That is, unlike the driving method disclosed in Japanese Patent Application Laid-Open No. 2004-354407, black display in a state where the liquid crystal molecules 20a are horizontally aligned and black display in a state where the liquid crystal molecules 20a are vertically aligned do not coexist. Therefore, compensation can be performed for black display, and high contrast can be obtained.

[Driving method]
[First Embodiment]
FIG. 6 is a block diagram showing a functional configuration of the liquid crystal display device 1. The liquid crystal display device 1 further includes a control unit 51 and a drive unit 52. The drive unit 52 includes a source driver 521, a gate driver 522, and a vertical electric field driver 523.

The control unit 51 and the drive unit 52 are mounted on the array substrate 10 or the counter substrate 30 by, for example, a TAB (Tape Automated Bonding) technique or a COG (Chip On Glass) technique. Part or all of the control unit 51 and the drive unit 52 may be disposed at a place other than the array substrate 10 and the counter substrate 30.

The control unit 51 performs predetermined processing on the video signal Vin supplied from the outside and supplies the video signal Vin to the source driver 521, the gate driver 522, and the vertical electric field driver 523.

The source driver 521 generates the signals VsA and VsB based on the signal supplied from the control unit 51. Then, the source driver 521 supplies the signal VsA to the source line 141A and supplies the signal VsB to the source line 141B.

The gate driver 522 generates a signal Vg based on the signal supplied from the control unit 51 and supplies the signal Vg to the gate line 142. Here, the number of gate lines 142 is j (j is a natural number), and the signal Vg supplied to the gate line 142 in the k-th row (1 ≦ k ≦ j) is represented as a signal Vg_k.

The vertical electric field driver 523 generates signals Vcom and Vc based on the signal supplied from the control unit 51. The vertical electric field driver 523 supplies the signal Vcom to the common electrode 12 and supplies the signal Vc to the counter electrode 32. Instead of the vertical electric field driver 523, a circuit that generates the signal Vcom and supplies it to the common electrode 12 and a circuit that generates the signal Vc and supplies it to the counter electrode 32 may be provided separately.

Further, the vertical electric field driver 523 may be configured to generate only one of the signals Vcom and Vc and supply a signal only to either the common electrode 12 or the counter electrode 32. In this case, the other of the common electrode 12 and the counter electrode 32 can be set to a constant potential. Hereinafter, an example in which the vertical electric field is controlled by changing the potential of the counter electrode 32 while keeping the potential of the common electrode 12 constant will be described.

FIG. 7 is a timing chart of the driving method according to the first embodiment of the present invention. In FIG. 7, Vc is a signal waveform of the signal Vc supplied from the driving unit 52 to the counter electrode 32 and is a potential of the counter electrode 32. VsA and VsB in FIG. 7 are signal waveforms of signals VsA and VsB supplied from the

source lines

141A and 141B to a certain pixel Px. In FIG. 7, Vg_1 is a signal waveform of the signal Vg_1 supplied to the gate line 142 in the first row, and Va and Vb below it are the

electrodes

144A and 144B connected to the gate line 142 in the first row. Potential. In FIG. 7, Vg_j is a signal waveform of the signal Vg_j supplied to the gate line 142 in the j-th row, and Va and Vb below it are the

electrodes

144A and 144B connected to the gate line 142 in the j-th row. Potential. Note that in FIG. 7, the potential Va of the electrode 144 </ b> A is indicated by a two-dot chain line, and the potential Vb of the electrode 144 </ b> B is indicated by a thick solid line for easy understanding of the drawing. The same applies to FIGS. 11 and 12 described later.

As shown in FIG. 7, in the present embodiment, the drive unit 52 changes the potential Vc of the counter electrode 32 every period four times as long as one frame period (Tf). More specifically, the drive unit 52 changes the potential Vc so that the direction of the vertical electric field is reversed every period of 4Tf. That is, the drive unit 52 reverses the level relationship between the potential of the common electrode 12 and the potential of the counter electrode 32 for each period of 4Tf length. In this embodiment, since the potential Vcom of the common electrode 12 is constant, the drive unit 52 reverses the polarity of the potential Vc of the counter electrode 32 with the value of the potential Vcom as a reference value for each period of 4Tf length. Yes.

Here, in order to reduce the influence of flicker accompanying polarity inversion, the absolute value of the potential difference between the common electrode 12 and the counter electrode 32 is preferably constant. That is, it is preferable that the values of Vc_H and Vc_L, or Vcom are adjusted so that Vc_H−Vcom = Vcom−Vc_L when the high level potential of the counter electrode 32 is Vc_H and the low level potential is Vc_L.

The signals Vg1 to Vg_j become high level one by one in a time division manner. That is, in a certain period, the signal Vg_1 is at a high level, and the signals Vg_2 to Vg_j are at a low level. Then, in synchronization with the signal Vg_1 becoming low level, the signal Vg_2 becomes high level. While the signal Vg_2 is at a high level, the signal Vg_1 and the signals Vg_3 to Vg_j are at a low level. In this way, one of the signals Vg_1 to Vg_j sequentially becomes a high level, and the other signals become a low level.

As schematically shown as Scan in FIG. 7, the driving unit 52 sets the signals Vg_1 to Vg_j to the high level once during the scanning period Tgs. Accordingly, the driving unit 52 writes the potentials of the

electrodes

144A and 144B once for all the pixels Px of the liquid crystal display device 1 during the scanning period Tgs. In the present embodiment, the length of the scanning period Tgs is approximately equal to the length of one frame period Tf. That is, in the present embodiment, the drive unit 52 writes the potentials of the

electrodes

144A and 144B once for all the pixels Px of the liquid crystal display device 1 in one frame period Tf.

The operation at this time will be described with reference to FIG. When the signal Vg_k (1 ≦ k ≦ j) becomes a high level, the

TFTs

143A and 143B connected to the gate line 142 in the k-th row are turned on. Thus, the signal VsA is supplied from the source line 141A to the electrode 144A, and the signal VsB is supplied from the source line 141B to the electrode 144B. Accordingly, the potential VsA is written to the electrode 144A, and the potential VsB is written to the electrode 144B. The potentials of the electrode 144A and the electrode 144B are maintained substantially constant by the liquid crystal capacitors Clc1, Clc2, and Clc3 and the storage capacitors Cs1 and Cs2 even after the signal Vg_k becomes low level and the

TFTs

143A and 143B are turned off.

Note that the signals VsA and VsB may be supplied to each column in a time-sharing manner (dot sequential driving) or simultaneously (line sequential driving).

The electrode 144A and the electrode 144B are capacitively coupled to the counter electrode 32 through the liquid crystal capacitors Clc1 and Clc2. Therefore, when the potential of the counter electrode 32 changes, the potentials of the

electrodes

144A and 144B are also affected. Therefore, as shown in FIG. 7, in the period from when the potential Vc of the counter electrode 32 changes until the potential is written again to the

electrodes

144A and 144B (periods A1 and A2 in FIG. 7), the liquid crystal The orientation of the film is disturbed and the luminance is lowered. Further, the pixel Px on the start side (Vg_1) of the scanning period Tgs has a short luminance reduction period (see the period A1 in FIG. 7), whereas the pixel Px on the end side (Vg_j) of the scanning period Tgs has a luminance reduction period. Is long (see period A2 in FIG. 7). For this reason, the luminance changes depending on the position in the liquid crystal display device 1, and a luminance gradient occurs.

According to the driving method according to the present embodiment, the length of the scanning period Tgs is Tf, and the length of the inversion period for inverting the vertical electric field is 4Tf. That is, the length of the scanning period Tgs is a quarter of the length of the inversion period. Therefore, the luminance reduction period (periods A1 and A2) can be relatively shortened. Thereby, flicker can be suppressed.

In this embodiment, the inversion period is 4 Tf. However, the length of the inversion period may be n times the one frame period Tf (n is an integer of 2 or more). The inversion period may be longer as long as the liquid crystal layer 20 does not cause a charge bias and can maintain reliability. The longer the inversion period is, the shorter the luminance reduction period is, and the influence of the luminance reduction period can be reduced. For example, the inversion period may be 60 times (60 Tf) of one frame period. A preferable length of the frame inversion period is 60 times or more the length of one frame period Tf. The upper limit of the inversion period length is preferably 3600 times the length of one frame period Tf. Here, 60 frames are displayed per second.

In this embodiment, the signals VsA and VsB have opposite polarities. Further, in the present embodiment, the polarities of the signals VsA and VsB are inverted in synchronization with the timing when one of the signals Vg_1 to Vg_j becomes high level. That is, in this embodiment, the direction of the horizontal electric field is reversed every horizontal period. In the present embodiment, the polarities of the signals VsA and VsB are inverted every frame period Tf. That is, in the present embodiment, the direction of the horizontal electric field is reversed every frame period Tf.

FIG. 8 is a diagram schematically showing the polarities of the potential Va of the electrode 144A and the potential Vb of the electrode 144B in each pixel Px in the present embodiment. “+/−” in FIG. 8 indicates that the potential Va is positive and the potential Vb is negative. “− / +” Indicates that the potential Va is negative and the potential Vb is positive. The same applies to FIGS. 9 and 10 described later.

In the present embodiment, so-called 1H line inversion driving and frame inversion driving are performed for the lateral electric field. Thereby, it is possible to avoid that all the pixels Px have the same polarity in a certain frame. Therefore, flicker can be further suppressed.

In this embodiment, 1H line inversion driving is performed to invert the horizontal electric field for each row of the pixels Px. However, as shown in FIG. 9, column inversion driving may be performed to invert the horizontal electric field for each column of the pixels Px. Further, as shown in FIG. 10, dot inversion driving for inverting the horizontal electric field for each pixel may be performed. Further, in FIGS. 8 to 10, the polarity of the horizontal electric field is inverted every frame, but a driving method may be used in which the polarity is inverted every plural frames.

In the driving method according to the present embodiment, it is mainly the lateral electric field that determines the luminance of the pixel Px. Therefore, the luminance change due to the potential fluctuation of the vertical electric field is small as compared with the driving method using only the vertical electric field. Therefore, even if polarity inversion is performed in units of frames for the vertical electric field, flicker is unlikely to occur. In other words, flicker is unlikely to occur in the vertical electric field without performing line inversion driving or column inversion driving. As a result, the driving load can be reduced.

As described above, according to the driving method of the present embodiment, the vertical electric field and the horizontal electric field can be inverted while maintaining the display quality.

The

electrodes

144A and 144B are connected to the

TFTs

143A and 143B. Therefore, the potentials of the

electrodes

144A and 144B vary due to the change in the gate voltage caused by turning on and off the

TFTs

143A and 143B. Specifically, the potentials of the

electrodes

144A and 144B vary by about ΔV = (Vgh−Vgl) · Cgd / Cpix. Here, Vgh is a gate voltage when the TFT 143A (143B) is ON, and Vgl is a gate voltage when the TFT 143A (143B) is OFF. Cgd is the capacitance between the gate and drain of the TFT 143A (143B), and Cpix is the load capacitance of the

electrodes

144A and 144B. It is preferable to apply a voltage that allows for this potential fluctuation ΔV to the

electrodes

144A and 144B.

It is preferable that the potential Va of the electrode 144A and the potential Vb of the electrode 144B have opposite polarities in each of the pixels Px as in the present embodiment. At this time, the potential Va and the potential Vb are preferably symmetric with respect to the potential Vcom of the common electrode 12. In other words, the absolute value of the potential difference between the electrode 144A and the common electrode 12 and the absolute value of the potential difference between the electrode 144B and the common electrode 12 are preferably equal. As a result, the electric field can be symmetric. In this case, the absolute value of the potential difference between the electrode 144A and the common electrode 12 and the absolute value of the potential difference between the electrode 144B and the common electrode 12 can be made equal at the effective potential including the potential fluctuation ΔV. preferable.

[Second Embodiment]
FIG. 11 is a timing chart of the driving method according to the second embodiment of the present invention.

Also in the present embodiment, as in the first embodiment, the driving unit 52 inverts the vertical electric field every period four times as long as one frame period Tf. Also in this embodiment, since the potential Vcom of the common electrode 12 is constant, the driving unit 52 inverts the polarity of the potential Vc of the counter electrode 32 with the value of the potential Vcom as a reference value for each period of 4Tf length. ing.

In the present embodiment, the length of the scanning period Tgs is half the length of one frame period Tf. That is, the driving unit 52 performs so-called double speed driving in which the signals Vg_1 to Vg_j are set to the high level once every half of the period of one frame period Tf.

Also in the present embodiment, a luminance reduction period (periods A3 and A4) accompanying the inversion of the vertical electric field occurs. However, the luminance reduction period can be shortened by performing the double speed driving. Further, by performing the double speed driving, the length of the luminance decrease period (period A3 in FIG. 11) in the pixel Px on the start side (Vg_1) of the scanning period Tgs and the pixel on the end side (Vg_j) of the scanning period Tgs. The difference from the length of the luminance decrease period (period A4 in FIG. 11) at Px can be reduced. That is, the luminance gradient can be reduced.

In the present embodiment, the

electrodes

144A and 144B are not charged until the next frame period Tf starts after the scanning is completed. During this time, the signals VsA and VsB are set to constant values (for example, the same potential as the common electrode 12). Thereby, charging / discharging to the

source lines

141A and 141B can be stopped, and the power consumption of the liquid crystal display device 1 can be reduced.

In this embodiment, double speed driving is performed. However, the electrode 144A and the electrode 144B may be driven at higher speed as long as charging is possible. The higher the driving speed, the shorter the length of the luminance reduction period. Note that in order to perform high-speed driving, the

TFTs

143A and 143B preferably use an oxide semiconductor with high electron mobility as a channel.

In this embodiment, the inversion period is 4 Tf. However, the length of the inversion period may be at least twice as long as the scanning period Tgs. Therefore, when performing m-times speed driving (m> 1 real number) in which one scan is performed in a period of 1 / m of the length of one frame period Tf, the length of the inversion period is n times (one frame period Tf) n can be an integer of 1 or more. However, the relationship of n × m ≧ 2 is satisfied. More preferably, the length of the inversion period is 60 times or more of one frame period Tf. Here, 60 frames are displayed per second.

Also in this embodiment, the inversion period may be longer as long as the reliability can be maintained. For example, the inversion period may be 60 times (60 Tf) of one frame period.

Also in this embodiment, the driving method of the horizontal electric field can use 1H line inversion driving, column inversion driving, dot inversion driving, and a combination of these and frame inversion driving.

[Third Embodiment]
FIG. 12 is a timing chart of the driving method according to the third embodiment of the present invention.

Also in the present embodiment, as in the first embodiment, the driving unit 52 inverts the vertical electric field every period four times as long as one frame period (Tf). Also in this embodiment, since the potential Vcom of the common electrode 12 is constant, the driving unit 52 inverts the polarity of the potential Vc of the counter electrode 32 with the value of the potential Vcom as a reference value for each period of 4Tf length. ing.

Also in the present embodiment, the driving unit 52 performs so-called double speed driving in which the signals Vg_1 to Vg_j are set to the high level once every half of the period of one frame period Tf. In the second embodiment, the

electrodes

144A and 144B are not charged during the period from the end of scanning until the start of the next frame period Tf. On the other hand, in this embodiment, after the first scan is completed, the same data is charged again with the same polarity. Thereby, the alignment of the liquid crystal layer 20 can be further stabilized.

Also in the present embodiment, a luminance reduction period (periods A5 and A6) accompanying the inversion of the vertical electric field occurs. Similar to the second embodiment, the luminance reduction period can be shortened by performing the double speed driving. Further, by performing the double speed driving, the length of the luminance decrease period (period A5 in FIG. 12) in the pixel Px on the start side (Vg_1) of the scanning period Tgs and the pixel on the end side (Vg_j) of the scanning period Tgs. The difference from the length of the luminance decrease period (period A5 in FIG. 12) at Px can be reduced. That is, the luminance gradient can be reduced.

Also in this embodiment, the electrode 144A and the electrode 144B may be driven at a higher speed as long as the electrode 144A and the electrode 144B can be charged. The higher the driving speed, the shorter the length of the luminance reduction period. Note that in order to perform high-speed driving, the

TFTs

In this embodiment, the inversion period is 4 Tf. However, the length of the inversion period may be at least twice as long as the scanning period Tgs. Therefore, when continuous writing is performed by m-times speed driving (m is an integer of 2 or more), the inversion period can be n times the frame period Tf (n is an integer of 1 or more). More preferably, the length of the inversion period is 60 times or more of one frame period Tf. Here, 60 frames are displayed per second.

[Modification Example 1 of Configuration of Liquid Crystal Display Device]
The driving methods according to the first to third embodiments of the present invention can be suitably used for the liquid crystal display device 2 described below in addition to the liquid crystal display device 1. FIG. 13 is a schematic cross-sectional view of a liquid crystal display device 2 according to a modification of the present invention. FIG. 14 is an equivalent circuit diagram of the liquid crystal display device 2.

The liquid crystal display device 2 includes a counter substrate 40 instead of the counter substrate 30 of the liquid crystal display device 1. The counter substrate 40 further includes an overcoat layer 41 in addition to the configuration of the counter substrate 30.

The overcoat layer 41 is formed so as to cover the counter electrode 32. The overcoat layer 41 has translucency and insulation. The overcoat layer 41 is, for example, a silicon nitride, silicon oxide, or silicon oxynitride film, and is formed by, for example, CVD. The overcoat layer 41 may also be an organic material such as an acrylic resin. In this case, the overcoat layer 41 is formed by, for example, a spin coater or a slit coater.

As shown in FIG. 14, the electrode 144A and the counter electrode 32 are capacitively coupled via the liquid crystal capacitor Clc1 and the capacitor Coc1 of the overcoat layer 41. The electrode 144B and the counter electrode 32 are capacitively coupled via the liquid crystal capacitor Clc2 and the capacitor Coc2 of the overcoat layer 41.

According to the configuration of the liquid crystal display device 2, the strength of the vertical electric field is reduced by the overcoat layer 41. By reducing the strength of the vertical electric field, the influence of the horizontal electric field is relatively increased, and the liquid crystal molecules are easily aligned in the x direction. Thereby, the transmittance at the time of white display can be improved.

The relative dielectric constant of the overcoat layer 41 is preferably larger than 1. If the overcoat layer 41 is too thick, the response speed of the liquid crystal molecules decreases. Therefore, the thickness of the overcoat layer 41 is preferably greater than 0 μm and less than 4 μm. Further, the cell gap (the thickness of the liquid crystal layer 20) at this time is preferably greater than 2 μm and 7 μm or less.

Flicker can also be suppressed for the liquid crystal display device 2 by executing the driving method according to any one of the first to third embodiments of the present invention.

[Other Embodiments]
As mentioned above, although embodiment about this invention was described, this invention is not limited only to each above-mentioned embodiment, A various change is possible within the scope of the invention. Moreover, each embodiment can be implemented in combination as appropriate.

The present invention can be used industrially as a liquid crystal display device and a driving method thereof.

1, 2 Liquid crystal display device 10 Array substrate 11 Substrate 12 Common electrode 13 Insulating layer 14

Array layers

141A, 141B Source line 142

Gate lines

143A, 143B TFT
144A, 144B Electrode 15 Polarizing plate 20

Liquid crystal layer

30, 40 Counter substrate 31 Substrate 32 Counter electrode 33 Polarizing plate 41 Overcoat layer

Claims

A first substrate including a plurality of pixels arranged in a matrix;
A first electrode and a second electrode formed for each pixel;
A common electrode formed over the plurality of pixels;
A second substrate disposed opposite the first substrate;
A counter electrode formed on the second substrate;
A liquid crystal layer including liquid crystal molecules sandwiched between the first substrate and the second substrate and having positive dielectric anisotropy;
A drive unit that controls the potential of at least one of the first electrode, the second electrode, and the common electrode and the counter electrode;
The driving unit sequentially writes the potentials of the first electrode and the second electrode for the plurality of pixels, and inverts the height relationship between the potential of the common electrode and the potential of the counter electrode for each inversion period,
The liquid crystal display device, wherein a length of a scanning period for writing the potentials of the first electrode and the second electrode once for each of the plurality of pixels is equal to or less than half the length of the inversion period.
2. The liquid crystal display device according to claim 1, wherein in each of the pixels, the potential of the first electrode and the potential of the second electrode have opposite polarities.
3. The liquid crystal display device according to claim 1, wherein the driving unit inverts the polarities of the potentials of the first electrode and the second electrode every period that is an integral multiple of the length of one frame period.
4. The liquid crystal display device according to claim 1, wherein the driving unit inverts the polarities of the potentials of the first electrode and the second electrode for each row of the pixels.
4. The liquid crystal display device according to claim 1, wherein the driving unit inverts the polarities of the potentials of the first electrode and the second electrode for each column of the pixels.
4. The liquid crystal display device according to claim 1, wherein the driving unit inverts the polarities of the potentials of the first electrode and the second electrode for each pixel.
The liquid crystal display device according to any one of claims 1 to 6, wherein the length of the inversion period is at least twice the length of one frame period.
The length of the scanning period is shorter than the length of one frame period,
The liquid crystal display device according to any one of claims 1 to 6, wherein the driving unit writes the potentials of the first electrode and the second electrode once in one frame period for the plurality of pixels.
The length of the scanning period is shorter than the length of one frame period,
7. The liquid crystal display device according to claim 1, wherein the potentials of the first electrode and the second electrode are written twice or more in one frame period for the plurality of pixels.
The liquid crystal display device according to any one of claims 1 to 9, further comprising an overcoat layer formed to cover the counter electrode.
A gate line formed for each row of pixels;
First and second source lines formed for each column of pixels;
A first switching element formed for each pixel, connected to the gate line and the first source line, and opened and closed by a signal supplied to the gate line;
A second switching element formed for each pixel, connected to the gate line and the second source line, and opened and closed by a signal supplied to the gate line;
The first electrode is connected to the first switching element;
The liquid crystal display device according to any one of claims 1 to 10, wherein the second electrode is connected to the second switching element.
The liquid crystal display device according to claim 11, wherein the first switching element and the second switching element include an oxide semiconductor.
A first substrate including a plurality of pixels arranged in a matrix;
A first electrode and a second electrode formed for each pixel;
A common electrode formed over the plurality of pixels;
A second substrate disposed opposite the first substrate;
A counter electrode formed on the second substrate;
A driving method of a liquid crystal display device comprising a liquid crystal layer sandwiched between the first substrate and the second substrate and including liquid crystal molecules having positive dielectric anisotropy,
The potentials of the first electrode and the second electrode are sequentially written for the plurality of pixels, and the height relationship between the potential of the common electrode and the potential of the counter electrode is inverted every predetermined inversion period,
The driving method, wherein a length of a scanning period for writing the potentials of the first electrode and the second electrode once for each of the plurality of pixels is not more than half of the length of the inversion period.
The driving method according to claim 13, wherein the liquid crystal layer includes liquid crystal molecules having positive dielectric anisotropy.