WO2013188991A1 - 发光二极管封装及其所使用的散热模块 - Google Patents

发光二极管封装及其所使用的散热模块 Download PDF

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Publication number
WO2013188991A1
WO2013188991A1 PCT/CN2012/000849 CN2012000849W WO2013188991A1 WO 2013188991 A1 WO2013188991 A1 WO 2013188991A1 CN 2012000849 W CN2012000849 W CN 2012000849W WO 2013188991 A1 WO2013188991 A1 WO 2013188991A1
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Prior art keywords
heat dissipation
dissipation module
insulating layer
substrate
carrier substrate
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PCT/CN2012/000849
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English (en)
French (fr)
Inventor
宋大仑
赖东昇
Original Assignee
璩泽明
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Application filed by 璩泽明 filed Critical 璩泽明
Priority to PCT/CN2012/000849 priority Critical patent/WO2013188991A1/zh
Publication of WO2013188991A1 publication Critical patent/WO2013188991A1/zh

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/367—Cooling facilitated by shape of device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/367—Cooling facilitated by shape of device
    • H01L23/3677—Wire-like or pin-like cooling fins or heat sinks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/64—Heat extraction or cooling elements
    • H01L33/641—Heat extraction or cooling elements characterized by the materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls

Definitions

  • the invention relates to an LED package and a heat dissipation module thereof, in particular to a line house, an insulation layer and a carrier substrate, which are selected from the group consisting of an aluminum substrate, a magnesium substrate and an aluminum magnesium. a substrate of the alloy substrate and the titanium alloy substrate to form a heat dissipation module, wherein the insulation layer is subjected to an oxidation method or a nitridation method on a surface of the carrier substrate to directly generate a carrier substrate on the surface A corresponding insulating layer formed by oxidation or nitridation of the surface metal material, for an LED die to be electrically connected to the heat dissipation module in a flip chip manner or a wire manner to complete an LED package to achieve good electrical properties. Insulation withstand voltage and heat dissipation. Background
  • an LED die can be selected in a flip chip or a wire bond according to the process requirements, but is not limited, and is electrically connected to a heat dissipation substrate to complete an LED package (LED package).
  • the LED package is further connected to a surface of a heat sink of a light-emitting device to form an LED light-emitting device;
  • the existing heat-dissipating substrate is composed of a circuit layer (copper layer), An insulating layer and a substrate (such as an aluminum substrate or a ceramic substrate) are sequentially formed by pressing, wherein the circuit layer is provided with an appropriate pattern in conjunction with the layout of the LED die to arrange and provide the LED dies Positive and negative power supplies required for illumination.
  • the LED die emits light, heat is generated, and the heat is generally radiated to the outside through the heat sink and the heat sink of the connected light emitting device, so as to avoid excessive heat energy to affect the LED package. Or the efficiency and longevity of the LED lighting device.
  • the conventional heat sink substrate is formed by sequentially pressing a circuit layer (copper layer), an insulating layer and an aluminum substrate, so that thermal energy is generated through the circuit layer (copper layer) and The insulating layer is then conducted to the substrate; however, the insulating layer used in the existing heat dissipating substrate is mostly composed of a heat conductive film, and the thermal conductive film has a poor thermal conductivity and a thick thickness, thereby reducing the use of the existing heat dissipating substrate. Efficiency, unable to meet the needs of current use.
  • the problem that has been long existed is how to make the heat-dissipating substrate achieve good heat dissipation in the case that the circuit layer does not short-circuit. .
  • Each of the LED dies is electrically connected to two separate and electrically insulated connection points on a circuit layer by using two different electrode contacts; the circuit layer is preset on an aluminum substrate; the circuit layer is An insulating connecting layer is usually disposed between the surfaces of the aluminum substrate so that the circuit layer can be fixedly connected to the surface of the aluminum substrate and is not easily peeled off; the completed LED package is further connected by various connections such as soldering or Tightly fitting but not limited to be fixed on the surface of a heat sink of an LED lighting device; however, in the above conventional LED package, the insulating connecting layer is generally formed by using a heat dissipating patch or a thermal grease.
  • the thermal conductivity is low (about 4 W/mk) and the thickness is thick (about 60 micrometers ( ⁇ )), so that the heat conduction function is not good, and the heat energy generated by the LED die during illumination cannot be efficiently transmitted to the The aluminum substrate and/or the heat sink of the LED lighting device dissipate heat outward.
  • the invention provides an LED package and a heat dissipation module used in the field of limited development of the technology, so that the LED package and/or the light-emitting device can achieve good heat dissipation effect and avoid short circuit. Troubled. Summary of the invention
  • the main purpose of the present invention is to provide an LED package and a heat dissipation module thereof.
  • the heat dissipation module includes a circuit layer, an insulation layer and a carrier substrate, wherein the carrier substrate is selected from the group consisting of an aluminum substrate and a magnesium substrate.
  • the LED package can achieve good electrical insulation withstand voltage effect and good heat dissipation effect.
  • a preferred embodiment of the heat dissipation module of the present invention comprises a carrier substrate, an insulating layer and a circuit layer, wherein the carrier substrate is selected from the group consisting of an aluminum substrate, a magnesium substrate, an aluminum-magnesium alloy substrate, and a titanium alloy substrate.
  • the substrate is formed by a substrate; wherein the insulating layer is formed on a surface of the carrier substrate by forming an oxidation method or a nitridation method on a surface of the carrier substrate to directly generate a surface on the surface
  • the insulating layer formed by the oxidation or nitridation reaction of the metal material on the surface of the carrier substrate is selected from the group consisting of alumina, magnesia, titania, aluminum nitride, magnesium nitride, and nitride.
  • the insulating layer is disposed under the circuit layer and has electrical insulation withstand voltage and heat conduction function; wherein the circuit layer is formed on the surface of the insulation layer, including at least two separate And the insulating electrical connection point is electrically connected to the bonding pads of the different electrodes provided by the at least one LED die, so that the at least one LED die can be electrically connected and Placed on the heat dissipating module; wherein when the at least one light emitting LED die and to generate thermal energy to the thermal energy is conducted to the outside through the carrier substrate to the heat insulating layer.
  • the heat dissipation module wherein the insulating layer is a method selected from the group consisting of a micro-arc plasma oxidation method, an atmospheric plasma oxidation method, and a vacuum plasma oxidation method for correspondingly on a surface of the carrier substrate An insulating layer of one material selected from the group consisting of alumina, magnesia, and titania is formed.
  • the heat dissipation module wherein the insulating layer is a method in a group selected from the group consisting of a micro-plasma nitriding method, an atmospheric plasma nitriding method, and a vacuum plasma nitriding method,
  • the insulating layer is formed on the surface by a material selected from the group consisting of aluminum nitride, magnesium nitride, and titanium nitride.
  • the heat dissipation module wherein the circuit layer is formed on a surface of the insulation layer by a process selected from the group consisting of a printed circuit board (PCB) line process, a screen printing process, and a semiconductor process.
  • PCB printed circuit board
  • the thickness of the insulating layer is set in advance according to the degree of electrical insulation withstand voltage desired by the insulating layer.
  • the thickness of the insulating layer is set to be 1 to 50 micrometers ( ⁇ m) so that the electrical insulation withstand voltage reaches 300 volts (V) or more.
  • the manner in which the at least one LED die is electrically connected to the heat dissipation module includes a flip chip method and a wire bond mode.
  • a preferred embodiment of the light emitting diode (LED) package of the present invention comprises: at least one LED die, each pad having at least two different electrodes; and a heat dissipation module, which is utilized
  • the heat dissipation module comprises a carrier substrate, an insulating layer and a circuit layer, wherein the at least one LED die is electrically connected to the heat dissipation module to form an LED package; wherein the at least one When the LED die emits light and generates thermal energy, the thermal energy of the heat dissipation module is transmitted to the carrier substrate of the heat dissipation module and radiated outward.
  • the light-emitting diode (LED) package is further provided with at least one thermal via on the carrier substrate of the heat dissipation module, wherein the heat dissipation via hole is provided with at least a uniform through hole on the carrier substrate, and The through hole is filled with a heat conductive material, and the upper end of the heat dissipation via is connected to the insulating layer.
  • the light emitting diode (LED) package wherein a heat dissipation module is further provided with a metal back layer on the other surface of the insulating layer, so that the heat dissipation module is adhered by the metal back layer
  • the metal backing layer comprises a heat dissipating patch and a heat dissipating paste.
  • the light emitting diode (LED) package wherein the heat dissipation module is closely attached to a surface of a heat sink.
  • the light emitting diode (LED) package wherein the carrier substrate of the heat dissipation module is replaced by a surface of a heat sink.
  • the beneficial effects of the present invention are as follows:
  • the heat dissipation function of the heat dissipation module of the present invention is superior to the existing heat dissipation substrate, and the thickness is also thin, which is sufficient for the current use.
  • the insulating layer of the present invention applies an oxidation method or a nitridation method to a surface of the carrier substrate to directly form a corresponding insulation formed on the surface by the oxidation or nitridation reaction of the metal material on the surface of the carrier substrate.
  • the layer can be electrically connected to the heat dissipation module by a flip chip or a wire to complete an LED package, thereby achieving good electrical insulation withstand voltage and heat dissipation.
  • Figure 1 is a cross-sectional view showing the structure of a heat dissipating module, a Flip Chip LED package, and a surface of a heat sink of the present invention.
  • FIG. 2 is a cross-sectional view showing the structure of a heat dissipating module, a wire bond LED package, and an embodiment of a heat sink surface of the present invention.
  • FIG. 3 is a cross-sectional view showing the structure of a heat dissipating module, a Flip Chip LED package, and another embodiment of a heat sink surface of the present invention.
  • FIG. 4 is a heat dissipation module of the present invention, and a wire bond LED package and application thereof A schematic cross-sectional view of another embodiment of a heat sink surface.
  • 10-heat dissipation module 11-bearing substrate; 110-surface; 111-heat dissipation vial; 112-surface; 12-insulation layer; 13-circuit layer; 130-surface; 131a, 131b-electrical connection point; Grain; 30, 40-LED package; 50-heat sink; 51-surface; 60-metal bond layer; 70-heat dissipation module; 80, 90-LED package.
  • the heat dissipating module 10 of the present invention mainly comprises a carrier substrate 11, an insulating layer 12 and a circuit layer 13 for a flip chip to be flip-chip as shown in FIG. 1 or a wire bond.
  • the method is electrically connected to the heat dissipation module 10 to form an LED package, such as the flip chip LED package 30 shown in FIG. 1 or the wire LED package 40 as shown in FIG. 2, so that the LED is When the packages 30, 40 and further combined with a heat sink 50 are used, good heat dissipation can be achieved and short circuits can be avoided.
  • the carrier substrate 11 is made of a substrate selected from the group consisting of an aluminum substrate, a magnesium substrate, an aluminum-magnesium alloy substrate, and a titanium alloy substrate.
  • the insulating layer 12 is formed on a surface of the carrier substrate 11; the insulating layer 12 is formed by performing an oxidation method or a nitriding method on a surface 110 of the carrier substrate 11 for directly generating on the surface 110.
  • It is composed of one selected from the group consisting of alumina, magnesia, titania, aluminum nitride, magnesium nitride, and titanium nitride, that is, when the carrier substrate 11 is an aluminum substrate, a gasification is generated.
  • the insulating layer 12 is located under the circuit layer 13 as shown in Figs. 1 and 2, and has electrical insulation withstand voltage and heat conduction. When the circuit layer 13 generates thermal energy, the thermal energy can be re-conducted through the insulating layer 12 to other places such as the carrier substrate 11 disposed under the insulating layer 12.
  • the insulating layer 12 can be selected from micro-arc plasma oxidation (MAPO, Micro-Arc Plasma).
  • Oxidation method method of atmospheric plasma oxidation method, vacuum plasma oxidation method
  • An insulating layer 12 made of one material selected from the group consisting of alumina, magnesia, and titanium oxide is formed on the surface 110 of the carrier substrate 11.
  • the insulating layer 12 can be formed on the surface 110 of the carrier substrate 11 by a method selected from the group consisting of a micro-arc plasma nitriding method, an atmospheric plasma nitriding method, and a vacuum plasma nitriding method.
  • An insulating layer 12 made of a wide variety of materials selected from the group consisting of aluminum nitride, magnesium nitride, and titanium nitride.
  • the thickness of the insulating layer 12 is set in advance in accordance with the degree to which the insulating layer 12 is intended to achieve electrical insulation withstand voltage.
  • the thickness of the insulating layer 12 is set to 1 to 50 micrometers ( ⁇ ) so that the electrical insulation withstand voltage of the insulating layer 12 can reach 300 volts (V) or more.
  • the circuit layer 13 is formed on the other surface 130 of the insulating layer 12 with respect to the carrier substrate 11; the circuit layer 13 is formed in a manner such as a printed circuit board (PCB) circuit process, or screen printing. A process, or a semiconductor process, is formed on the surface of the insulating layer.
  • the circuit layer 13 includes at least two separate and insulated electrical connection points 131a, 131b for electrically connecting the pads of the different electrodes provided by the at least one LED die 20 so that the at least one LED die 20 can Electrically connected and disposed on the heat dissipation module 10.
  • the circuit layout of the circuit layer 13 is not limited, and may be designed differently depending on the needs of the LED package 30, 40 or the heat sink 50 of the LED lighting device for multiple LED dies.
  • an LED die 20 is illustrated in Figures 1 and 2 as an example, but is not intended to limit the invention.
  • the heat conduction function of the insulating layer 12 is conducted to conduct the thermal energy to the carrier substrate 11 and dissipate heat outward.
  • the carrier substrate 11 of the heat dissipation module 10 is further provided with at least one thermal via 111 , and the thermal via 111 is formed on the carrier substrate 11 .
  • the thermal via 111 is formed on the carrier substrate 11 .
  • the setting of 111 can relatively improve the heat dissipation effect of the heat dissipation module 10.
  • the number and position of the heat dissipation via 111 shown in FIG. 1-2 are not limited. As shown in FIG. 1 , two heat dissipation vias 111 are provided for the LED die 20 , but are not limited, and as shown in FIG. 2 . For one LED die 20, three heat dissipation vias 111 are provided, but are not limited. However, it is preferable to set the position to be correspondingly connected to the main thermal energy generation between the circuit layer 13 and the LED die 20 electrically connected, as shown in FIG. 1 (Flip Chip) connection position (131a) , 131b), or the bottom of the wire bond 20 of the wire bond as shown in FIG.
  • FIG. 1 Flip Chip
  • the part is the main thermal energy generating area of the flip-chip or the wire-type package.
  • the heat dissipation effect is relatively enhanced.
  • a metal back layer 60 may be further disposed on the other surface 112 of the carrier substrate 11 of the heat dissipation module 10 relative to the insulating layer 12 to enable the heat dissipation module 10 .
  • the metal backing layer 60 is attached to the surface 51 of a heat sink 50 provided by a light-emitting device (not shown), wherein the metal back layer 60 comprises a heat-dissipating patch or a heat-dissipating paste.
  • the metal backing layer 60 is not necessary, because the heat dissipating module 10 can also be closely attached to a light-emitting device (not shown) by a locking method.
  • the surface 51 of the heat sink 50 that is, the surface 112 of the carrier substrate 11 of the heat dissipation module 10 can be closely adhered to the surface 51 of the heat sink 50, so that the heat dissipation effect can be achieved.
  • the heat energy is re-conducted from the carrier substrate 11 of the heat dissipation module 10 to the heat sink 50 and radiated outward.
  • the heat dissipation module 10 or the assembled LED packages 30, 40 and the heat sink 50 of an LED lighting device can be assembled in a plurality of different manners, and the heat sink is used.
  • the structure of 50 also has a variety of different structural forms, so the heat sink 50 structure shown in Figures 1 and 2 is not intended to limit the invention.
  • the heat dissipation module 70 of the present embodiment is substantially the same as the heat dissipation module 10 shown in FIGS. 1 and 2, and mainly includes a carrier substrate 11, an insulating layer 12, and a circuit layer 13 for allowing an LED die 20 to be flipped ( Flip Chip) is as shown in FIG. 3 or a wire bond mode, as shown in FIG. 4, electrically connected to the heat dissipation module 70 to form an LED package, such as the flip chip LED package 80 shown in FIG.
  • the wire-type LED package 90 shown in FIG. 4 enables the LED packages 80, 90 to be further combined with a heat sink 50 to achieve good heat dissipation and avoid short circuit.
  • the carrier substrate 11 of the heat dissipation module 70 of the embodiment further uses the heat sink (
  • the surface 51 of the heat sink 50 is replaced, that is, the insulating layer 12 of the present embodiment is formed directly on the surface 51 of the heat sink 50; since the heat sink 50 or its surface 51 is Generally, it is made of aluminum material, but is not limited, and is the same or similar to the material used for the carrier substrate 11 of the heat dissipation module 10 shown in FIG. 1-2. Therefore, the formation method of the insulating layer 12 of the present embodiment is the same as that of FIG. -2 shows a process in which the insulating layer 12 of the heat dissipation module 10 is formed on a surface 110 of the carrier substrate 11.
  • the heat dissipation module 10 of the present invention is compared with the existing heat dissipation module (heat dissipation substrate).
  • the heat dissipation substrate is formed by sequentially pressing a circuit layer (copper layer), an insulation layer and an aluminum substrate, and the existing insulation layer is mostly composed of a heat conductive film; however, the formation of the insulation layer 12 of the present invention is A surface 110 of the carrier substrate 11 is subjected to an oxidation method or a nitriding method for directly forming a corresponding material on the surface 110 by a oxidation reaction or a nitridation reaction of a metal material on the surface of the carrier substrate 11.
  • the present embodiment such as the heat dissipation module 70 shown in FIG. 3-4, the LED package 80, 90 and the heat sink 50 combined with the heat sink module 10,
  • the present embodiment can at least reduce the carrier substrate 11 of the heat dissipation module 10 shown in FIG.
  • the connection procedure of the metal backing layer 60 shown in FIG. 1-2 or the carrier substrate 11 and the heat sink 50 in FIG. 1-2 is also relatively reduced, which is advantageous for reducing material cost or operation. cost.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Led Device Packages (AREA)

Abstract

提供了一种发光二极管封装及其所使用的散热模块。该散热模块（10）包含：一承载基板（11），其是以选自铝基板、镁基板、铝镁合金基板、钛合金基板的族群中一种基板所构成；一绝缘层（12），其是对承载基板（10）的一表面施行氧化方法或氮化方法以直接在表面上生成由承载基板（10）的表面的金属材料经氧化或氮化反应所构成的绝缘层（12）；及一线路层（13），其是形成于绝缘层（12）的表面上；其中当至少一LED晶粒（20）发光并产生热时，通过绝缘层（12）将热能传导至承载基板（11）以向外散热。

Description

发光二极管封装及其所使用的散热模块 技术领域
本发明是有关一种发光二极管封装（ LED package )及其所使用的散热模块， 尤指一种利用一线路屋、 一绝缘层及一承载基板且其是选自铝基板、 镁基板、 铝镁合金基板、 钛合金基板的族群中一种基板以构成一散热模块， 其中该绝缘 层是对该承载基板的一表面施行氧化方法或氮化方法以直接在该表面上生成一 由该承载基板的表面的金属材料经氧化或氮化反应所构成的对应绝缘层， 供一 LED 晶粒能以覆晶方式或导线方式电性连接在该散热模块上以完成一 LED 封 装， 以达成良好的电性绝缘耐压及散热功效。 背景扶术
一般而言， 一 LED晶粒可随工艺需要而选择以覆晶方式（Flip Chip ) 或导 线方式（ Wire bond )但不限制， 以电性连接在一散热基板上以完成一 LED封装 ( LED package ) , 该 LED封装再连接固设在一发光装置的散热器 （heat sink ) 的表面上， 以组成一 LED发光装置； 通常而言， 现有的散热基板是由一线路层 (铜层） 、 一绝缘层及一基板（如铝基板或陶瓷基板）依序压合形成， 其中该线 路层是配合 LED晶粒的布局而设具有适当的图案 （ pattern ) 用以安排并提供该 些 LED晶粒发光所须的正负极电源。 当 LED晶粒在发光时会产生热能， 该热能 一般是通过该散热载板及所连接的发光装置的散热器 （heat sink ) 以向外散热， 以避免热能存积过多以致影响该 LED封装或 LED发光装置的使用效率及寿命。
以现有的散热基板而言， 现有的散热基板是由一线路层 （铜层） 、 一绝缘 层及一铝基板依序压合形成， 因此产生的热能是通过线路层 （铜层） 及绝缘层 之后才传导至基板； 然而， 现有散热基板所使用的绝缘层大部分是以导热胶片 构成， 该导热胶片的导热系数较差， 且厚度较厚， 致相对降低现有散热基板的 使用效率， 无法满足目前使用上的需求。 因此在 LED封装或所使用的散热载板 或 LED发光装置等相关颌域中， 长久以来一直都存在的问题就是如何在线路层 不会发生短路的状况下而又能使散热基板达到良好散热功效。
再以现有的覆晶式（ Flip Chip )或导线式（ Wire bond ) LED封装为例说明， 其中每一 LED晶粒是利用二不同的电极接点以电性连接在一线路层上的二分开 且电性绝缘的连接点上； 该线路层是预设在一铝基板上； 该线路层与该铝基板 的表面之间通常设有一绝缘连接层以使该线路层能绝缘地连接地固设在该铝基 板的表面上且不易剥离； 完成后的 LED封装再由各种连接方式如焊接或紧密贴 合但不限制以固设在一 LED发光装置的散热器 （heat sink ) 的表面上； 然而， 在上述传统的 LED封装中， 该绝缘连接层一般是利用散热贴片或散热膏构成， 其导热系数较低（约 4 W/m-k ) , 且厚度较厚 （约 60微米（ μιη ) ) ， 以致热传 导功能不佳， 无法将该 LED晶粒在发光时所产生的热能有效地传导至该铝基板 及 /或 LED发光装置的散热器 （heat sink ) 上以向外散热。
有关 LED封装及其所使用的散热基板， 或覆晶式 LED元件 （ flip-chip light emitting diode )或覆晶式 LED封装或适用于覆晶式 LED的反射结构等技术领域 中， 目前已存在多种先前技术，如 TW573330、 TW M350824, CN201010231866.5 (公布号 CN101924175A )、US6,914，268、US8,049,230、US7,985,979、US7,939,832、 US7,713,353 、 US7,642,121 、 US7，462，861 、 US7,393,411 、 US7,335,519 、 US7,294,866 、 US7,087,526 、 US5,557,115 、 US6,514,782 、 US6,497,944 、 US6，791，119; US2002 /0163302、 US2004/0113156 等。 然而， 上述先前技术并 未提出有效的解决方案， 以克服线路层不会发生短路且能达到良好散热功效的 问题。
由上可知，上述先前技术的结构尚难以符合实际使用时的要求，因此在 LED 封装或散热基板的相关颌域中， 仍存在进一步改进的需要性。 本发明乃是在此 技术发展空间有限的领域中， 提出一种 LED封装及其所使用的散热模块， 以使 该 LED 封装及 /戎该发光装置能达成良好的散热功效， 并可避免造成短路的困 扰。 发明内容
本发明主要目的是在于提供一种 LED封装及其所使用的散热模块， 该散热 模块是包含一线路层、 一绝缘层及一承载基板， 其中该承载基板是以选自铝基 板、 镁基板、 铝镁合金基板、 钛合金基板的族群中一种基板所构成， 其中该绝 缘层是对该承载基板的一表面施行氧化方法或氮化方法以直接在该表面上生成 一由该承载基板的表面的金属材料经氧化或氮化反应所构成的对应绝缘屋； 由 此当至少一 LED晶粒以覆晶方式或导线方式电性连接在该散热模块上以完成一 LED封装时，该 LED封装即能达成良好的电性绝缘耐压效果及良好的散热功效。 为达成上述目的， 本发明的散热模块的一优选实施例包含一承载基板、 一 绝缘层及一线路层， 其中该承载基板是以选自铝基板、 镁基板、 铝镁合金基板、 钛合金基板的族群中一种基板所构成； 其中该绝缘层是形成在该承载基板的一 表面上， 其形成方式是对该承载基板的一表面施行氧化方法或氮化方法以直接 在该表面上生成一由该承载基板的表面的金属材料经氧化反应或氮化反应而对 应构成的绝缘层， 使该绝缘层是以选自氧化铝、 氧化镁、 氧化钛、 氮化铝、 氮 化镁、 氮化钛的族群中一种所构成， 又该绝缘层是设于该线路层的下面并具有 电性绝缘耐压及热传导功能； 其中该线路层是形成于该绝缘层的表面上， 包含 至少二分开且绝缘的电性连接点供与该至少一 LED晶粒所设的不同电极的焊垫 能对应电性连接， 以使该至少一 LED晶粒能电性连接并设置在该散热模块上； 其中当该至少一 LED晶粒发光并产生热能时， 通过该绝缘层以将该热能传导至 该承载基板以向外散热。
所述的散热模块， 其中所述的绝缘层是利用选自微弧电浆氧化方法、 大气 电浆氧化方法、 真空电浆氧化方法的族群中一种方法用以在该承载基板的表面 上对应形成一选自氧化铝、 氧化镁、 氧化钛的族群中一种材质的绝缘层。
所述的散热模块， 其中所述的绝缘层是利用选自微孤电浆氮化方法、 大气 电浆氮化方法、 真空电浆氮化方法的族群中一种方法用以在该承载基板的表面 上对应形成一选自氮化铝、 氮化镁、 氮化钛的族群中一种材质的该绝缘层。
所述的散热模块， 其中所述的线路层是利用选自印刷线路板（PCB )线路工 艺、 网版印刷工艺、 半导体工艺的族群中一种工艺以形成在该绝缘层的表面上。
所述的散热模块， 其中所述的绝缘层的厚度是依据该绝缘层所欲达成电性 绝缘耐压的程度而预先设定。
所述的散热模块， 其中所述的绝缘层的厚度是设定为 1 〜50微米 （μιη ) , 以使电性绝缘耐压的程度达到 300伏特 （V ) 或以上。
所述的散热模块， 其中所述的至少一 LED晶粒电性连接在该散热模块上的 方式包含覆晶 （Flip Chip ) 方式及导线 （Wire bond ) 方式。
为达成上述目的， 本发明的发光二极管 （LED )封装的一优选实施例包含： 至少一 LED晶粒， 各晶粒上设有至少二不同电极的焊垫； 及一散热模块， 其是 利用所述的散热模块所构成， 包含一承载基板、 一绝缘层及一线路层， 供该至 少一 LED 晶粒电性连接在该散热模块上以形成一 LED封装； 其中当该至少一 LED 晶粒发光并产生热能时， 通过该散热模块的绝缘层以将该热能传导至该散 热模块的承载基板并向外散热。
所述的发光二极管 （LED )封装， 其中所述的散热模块的承载基板上进一 步设有至少一散热导孔（thermal via ) , 该散热导孔是在该承载基板上设置至少 一贯穿孔， 并在该贯穿孔内填满热导材所构成， 又该散热导孔的上端是与该绝 缘层连接。
所述的发光二极管 （LED )封装， 其中所述的散热模块的承载基板的相对 于该绝缘层的另一表面上更设置一金属接着层， 以使该散热模块由该金属接着 层以贴合于一散热器（heat sink )的表面上， 其中所述的金属接着层是包含散热 贴片、 散热膏。
所述的发光二极管 （LED ) 封装， 其中所述的散热模块是紧密贴合于一散 热器 ( heat sink ) 的表面上。
所述的发光二极管 （LED ) 封装， 其中所述的散热模块的承载基板是以一 散热器 （heat sink ) 的表面所取代。
本发明的有益效果在于： 本发明的散热模块的散热功能优于现有的散热基 板， 且厚度也较薄， 足以满足目前使用上的需求。
并且本发明的该绝缘层是对该承载基板的一表面施行氧化方法或氮化方法 以直接在该表面上生成一由该承载基板的表面的金属材料经氧化或氮化反应所 构成的对应绝缘层， 供一 LED晶粒能以覆晶方式或导线方式电性连接在该散热 模块上以完成一 LED封装， 进而达成良好的电性绝缘耐压及散热功效。
为使本发明更加明确详实， 将本发明的结构及技术特征， 配合下列图示详 述如后： 附图说明
图 1是本发明的散热模块、 所组成的覆晶式 （Flip Chip ) LED封装及应用 于一散热器 （heat sink )表面的一实施例的结构剖面示意图。
图 2是本发明的散热模块、 所组成的导线式 （Wire bond ) LED封装及应用 于一散热器 （heat sink )表面的一实施例的结构剖面示意图。
图 3是本发明的散热模块、 所组成的覆晶式 （Flip Chip ) LED封装及应用 于一散热器 （heat sink ) 表面的另一实施例的结构剖面示意图。
图 4是本发明的散热模块、 所组成的导线式 （Wire bond ) LED封装及应用 于一散热器 （heat sink )表面的另一实施例的结构剖面示意图。
附图标记说明：
10-散热模块； 11-承载基板； 110-表面； 111-散热导孔； 112-表面； 12-绝 缘层； 13-线路层; 130-表面; 131a, 131b-电性连接点; 20-LED晶粒; 30、 40- LED封装； 50-散热器 （heat sink ) ； 51-表面； 60-金属接着层； 70-散热模块； 80、 90-LED封装。 具体实施方式
参考图 1-2所示， 其分别是本发明的散热模块、 所组成的 LED封装及应用 于一散热器（heat sink )表面的两个实施例的结构剖面示意图。 本发明的散热模 块 10主要是包含一承载基板 11、 一绝缘层 12及一线路层 13 , 供一 LED晶粒 20能以覆晶（Flip Chip )方式如图 1所示或导线（Wire bond )方式如图 2所示， 电性连接在该散热模块 10上以形成一 LED封装如图 1所示的覆晶式 LED封装 30或如图 2所示的导线式 LED封装 40， 以使该 LED封装 30、 40及进一步与一 散热器（heat sink ) 50结合应用时， 能达成良好的散热功效， 并避免造成短路的 困扰。
该承载基板 11是以选自铝基板、 镁基板、 铝镁合金基板、 钛合金基板的族 群中一种基板所构成。
该绝缘层 12是形成在该承载基板 11的一表面上； 该绝缘层 12的形成方法 是对该承载基板 11的一表面 110施行氧化方法或氮化方法， 供可在该表面 110 上直接生成一由该承载基板 11的表面的金属材料， 即铝基板或镁基板或铝镁基 板的基板材料， 经氧化反应或氮化反应而构成的具有对应材质的绝缘层 12, 也 就是该绝缘层 12是以选自氧化铝、 氧化镁、 氧化钛、 氮化铝、 氮化镁、 氮化钛 的族群中一种所构成， 也就是当该承载基板 11为铝基板时， 即生成一以氣化铝 或氮化铝构成的绝缘层 12; 当该承载基板 11为镁基板时， 即生成一以氧化镁或 氮化镁构成的绝缘层 12; 当该承载基板 11为钛基板时， 即生成一以氧化钛或氮 化钛构成的绝缘层 12。 该绝缘层 12是位于该线路层 13的下面如图 1、 2所示， 并具有电性绝缘耐压及热传导功能。 当该线路层 13产生热能时， 该热能即能通 过该绝缘层 12再传导至其他地方如设在该绝缘层 12下面的承载基板 11。
此外， 该绝缘层 12可利用选自微弧电浆氧化 （MAPO, Micro-Arc Plasma
Oxidation ) 方法、 大气电浆氧化方法、 真空电浆氧化方法的族群中一种方法用 以在该承载基板 11的表面 110上形成一选自氧化铝、 氧化镁、 氧化钛的族群中 一种材质所构成的绝缘层 12。
此外， 该绝缘层 12可利用选自微弧电浆氮化方法、 大气电浆氮化方法、 真 空电浆氮化方法的族群中一种方法用以在该承载基板 11的表面 110上形成一选 自氮化铝、 氮化镁、 氮化钛的族群中一种材廣所构成的绝缘层 12。
以实际的应用而言， 该绝缘层 12的厚度是依据该绝缘层 12所欲达成电性 绝缘耐压的程度而预先设定。在本实施例中，该绝缘层 12的厚度是设定为 1 ~50 微米（μηι ) , 以使该绝缘层 12的电性绝缘耐压程度能达到 300伏特（V )或以 上。
该线路层 13是形成于该绝缘层 12的相对于该承载基板 11的另一表面 130 上； 该线路层 13的形成方式不限制， 如利用印刷线路板（PCB ) 线路工艺， 或 网版印刷工艺， 或半导体工艺， 以形成在该绝缘层的表面上。 该线路层 13包含 至少二分开且绝缘的电性连接点 131a、 131b供与该至少一 LED晶粒 20所设的 不同电极的焊垫能对应电性连接， 以使该至少一 LED 晶粒 20能电性连接并设 置在该散热模块 10上。 该线路层 13的线路布局 （ circuit layout ) 并不限制， 可 随 LED封装 30、 40或 LED发光装置的散热器 （heat sink ) 50的需要而作出不 同的布局设计， 以供多个 LED晶粒 20电性连接， 在图 1、 2中以一 LED晶粒 20为例说明但非用以限制本发明。 当该至少一 LED晶粒 20发光并在该线路层 13上产生热能时，即可通过该绝缘层 12的热传导功能以将该热能传导至该承载 基板 11并向外散热。
再参考图 1、 2所示的实施例， 其中该散热模块 10的承载基板 11上进一步 可设置有至少一散热导孔 （thermal via ) 111 , 该散热导孔 111的形成是在该承 载基板 11上设置至少一贯穿其上、 下表面的贯穿孔 111， 并在该贯穿孔内填满 热导材所构成， 其中该散热导孔 111的上端是与该绝缘层 12连接； 通过该散热 导孔 111的设置， 可相对增进该散热模块 10的散热效果。
该散热导孔 111如图 1-2所示的设置数目及位置并不限制，如图 1所示针对 ― LED晶粒 20设有两个散热导孔 111但不限制， 而如图 2所示针对一 LED晶 粒 20则设有三个散热导孔 111但不限制。 但设置位置以能对应连接至接近该线 路层 13与 LED晶粒 20电性连接之间的主要的热能产生处为最佳， 如图 1所示 覆晶式（Flip Chip )的连接位置（ 131a、 131b ) ,或如图 2所示导线式（ Wire bond ) 的 LED晶粒 20的底部， 因为该些连接位置（ 131a、 131b )或 LED晶粒 20的底 部即为覆晶式或导线式封装的主要的热能产生处， 当该些散热导孔 111 设置在 接近热能产生处时， 相对可增进散热作用。
再参考图 1、 2所示的实施例， 其中该散热模块 10的承载基板 11的相对于 该绝缘层 12的另一表面 112上， 进一步可设置一金属接着层 60， 以使该散热模 块 10由该金属接着层 60以贴合于一发光装置（图未示）所设的散热器（heat sink ) 50的表面 51上， 其中该金属接着层 60是包含散热贴片或散热膏。
此外， 以图 1、 2所示的实施例而言， 该金属接着层 60并非必要结构， 因 为该散热模块 10亦可以通过锁固方式以紧密贴合于一发光装置 （图未示）所设 的散热器 （heat sink ) 50的表面 51上， 也就是使该散热模块 10的承载基板 11 的表面 112能与该散热器 （heat sink ) 50的表面 51紧密贴合， 如此即能达成散 热效果， 用以将该热能由该散热模块 10的承载基板 11再传导至该散热器（heat sink ) 50并向外散热。 由于该散热模块 10或所组成的 LED封装 30、 40， 其与 一 LED发光装置的散热器 （heat sink ) 50之间， 可利用多种不同的方式进行组 装， 且该散热器（heat sink ) 50的结构型态亦有多种不同的结构型态， 因此图 1、 2所示的散热器 （heat sink ) 50结构并非用来限制本发明。
参考图 3-4所示， 其分别是本发明的散热模块 70、 所组成的 LED封装 80、 90及应用于一散热器（ heat sink ) 50表面的另外两个实施例的结构剖面示意图。 本实施例的散热模块 70与图 1、 2所示的散热模块 10大致相同， 主要也包含一 承载基板 11、一绝缘层 12及一线路层 13，供一 LED晶粒 20能以覆晶（ Flip Chip ) 方式如图 3所示或导线 （ Wire bond ) 方式如图 4所示， 电性连接在该散热模块 70上以形成一 LED封装如图 3所示的覆晶式 LED封装 80或如图 4所示的导线 式 LED封装 90, 以使该 LED封装 80、 90能进一步与一散热器 （ heat sink ) 50 结合应用， 以达成良好的散热功效， 并避免造成短路的困扰。
而本实施例的散热模块 70如图 3-4所示与图 1-2所示散热模块 10之间的主 要不同点在于： 本实施例的散热模块 70的承载基板 11进一步以该散热器（heat sink ) 50的表面 51所取代， 也就是本实施例的绝缘层 12是直接形成在该散热 器（heat sink ) 50的表面 51上； 由于该散热器（ heat sink ) 50或其表面 51—般 是以铝材制成但不限制， 其相同或类似于图 1-2所示散热模块 10的承载基板 11 所使用的材料， 因此本实施例的绝缘层 12的形成方法是相同于图 1-2所示散热 模块 10的绝缘层 12形成在该承载基板 11的一表面 110上的工艺。
此外， 本发明的散热模块 10与现有的散热模块（散热基板）相较， 现有的 散热基板是由一线路层 （铜层） 、 一绝缘层及一铝基板依序压合形成， 且现有 的绝缘层大部分是以导热胶片构成； 但本发明的绝缘层 12的形成是对该承载基 板 11的一表面 110施行氧化方法或氮化方法， 供可在该表面 110上直接生成一 由该承载基板 11的表面的金属材料经氧化反应或氮化反应而构成的具有对应材 质的绝缘层 12, 如以氧化铝、 氧化镁、 氧化钛、 氮化铝、 氮化镁、 氮化钛构成。 因此， 本发明的散热模块 10的散热功能优于现有的散热基板， 且厚度也较薄， 足以满足目前使用上的需求。
此外， 本实施例如图 3-4所示的散热模块 70、 所组成的 LED封装 80、 90 及与一散热器 （heat sink ) 50的结合应用， 与图 1-2所示的散热模块 10、 所组 成的 LED封装 30、 40及与一散热器（heat sink ) 50的结合应用相较， 本实施例 如图 3-4所示至少可减少图 1-2所示散热模块 10的承载基板 11 , 也相对可减少 图 1-2中所示该金属接着层 60或图 1-2中该承载基板 11与散热器 （heat sink ) 50之间紧密贴合的连接程序， 有利于降低材料成本或作业成本。
以上所示仅为本发明的优选实施例， 对本发明而言仅是说明性的， 而非限 制性的。 在本专业技术领域具通常知识人员理解， 在本发明权利要求所限定的 精神和范围内可对其进行许多改变， 修改， 甚至等效的变更， 但都将落入本发 明的保护范围内。

Claims

权 利 要 求
1、 一种发光二极管封装所使用的散热模块， 其特征在于， 适用于发光二极 管封装，供至少一 LED晶粒电性连接在该散热模块上以形成一 LED封装， 该散 热模块包含一承载基板、 一绝缘层及一线路层， 其中：
该承载基板是以选自铝基板、 镁基板、 铝镁合金基板、 钛合金基板的族群 中一种基板所构成；
该绝缘层是形成在该承载基板的一表面上， 其是对该承载基板的该表面施 行氧化方法或氮化方法以直接在该表面上生成一由该承载基板的表面的金属材 料经氧化反应或氮化反应而对应构成的绝缘层， 其中该绝缘层是以选自氧化铝、 氧化镁、 氧化钛、 氮化铝、 氮化镁、 氮化钛的族群中一种材料所构成；
该线路层是形成在该绝缘层的表面上， 包含至少二分开且绝缘的电性连接 点供与该至少一 LED晶粒所设的不同电极的焊垫对应电性连接 , 以使该至少一 LED晶粒能电性连接并设置在该散热模块上；
其中当该至少一 LED晶粒发光并产生热能时， 通过该绝缘层以将该热能传 导至该承载基板以向外散热。
2、根据权利要求 1所述的发光二极管封装所使用的散热模块，其特征在于， 该绝缘层是利用选自微弧电浆氧化方法、 大气电浆氧化方法、 真空电浆氡化方 法的族群中一种方法用以在该承载基板的表面上对应形成该绝缘层。
3、根据权利要求 1所述的发光二极管封装所使用的散热模块，其特征在于， 该绝缘层是利用选自微弧电浆氮化方法、 大气电浆氮化方法、 真空电浆氮化方 法的族群中一种方法用以在该承载基板的表面上对应形成该绝缘层。
4、根据权利要求 1所述的发光二极管封装所使用的散热模块，其特征在于， 该该线路层是利用选自印刷线路板线路工艺、 网版印刷工艺、 半导体工艺的族 群中一种工艺以形成在该绝缘层的表面上。
5、根据权利要求 1所述的发光二极管封装所使用的散热模块，其特征在于， 该绝缘层的厚度是依据该绝缘层所欲达成电性绝缘耐压的程度而预先设定。
6、根据权利要求 5所述的发光二极管封装所使用的散热模块，其特征在于， 该绝缘层的厚度是设定为 1 ~50微米，以使电性绝缘耐压的程度达到 300伏特或 以上。
7、根据权利要求 1所述的发光二极管封装所使用的散热模块，其特征在于， 该至少一 LED晶粒电性连接在该散热模块上的方式包含覆晶方式及导线方式。
8、 一种发光二极管封装， 其特征在于， 包含：
至少一 LED晶粒， 各晶粒上设有至少二不同电极的焊垫； 及
一散热模块， 其是利用权利要求 1 至 7中任一项所述的散热模块所构成， 包含一承载基板、 一绝缘层及一线路层， 供该至少一 LED晶粒电性连接在该散 热模块上以形成一 LED封装；
其中当该至少一 LED晶粒发光并产生热能时， 通过该散热模块的绝缘层以 将该热能传导至该散热模块的承载基板并向外散热。
9、 根据权利要求 8所述的 LED封装， 其特征在于， 该散热模块的承载基 板上进一步设有至少一散热导孔， 该散热导孔是由该承栽基板上所设的贯穿孔 且该贯穿孔内填满热导材所构成， 其中该散热导孔的上端是与该绝缘层连接。
10、 根据权利要求 8所述的 LED封装， 其特征在于， 该散热模块的承载基 板的相对于该绝缘层的另一表面上更设置一金属接着层， 以使该散热模块通过 该金属接着层以贴合于一散热器的表面上。
11、 根据权利要求 10所述的 LED封装， 其特征在于， 该金属接着层是包 含散热贴片、 散热膏。
12、 根据权利要求 8所述的 LED封装， 其特征在于， 该散热模块是紧密贴 合于一散热器的表面上。
13、 根据权利要求 8所述的 LED封装， 其特征在于， 该散热模块的承载基 板是以一散热器的表面所取代。
PCT/CN2012/000849 2012-06-19 2012-06-19 发光二极管封装及其所使用的散热模块 WO2013188991A1 (zh)

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Publication number Priority date Publication date Assignee Title
CN1484210A (zh) * 2002-09-20 2004-03-24 新知科技股份有限公司 具有高散热性的发光二极管显示模组及其基板
JP2008227304A (ja) * 2007-03-14 2008-09-25 Gei Tai 電子素子熱伝導の方法
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Publication number Priority date Publication date Assignee Title
CN1484210A (zh) * 2002-09-20 2004-03-24 新知科技股份有限公司 具有高散热性的发光二极管显示模组及其基板
JP2008227304A (ja) * 2007-03-14 2008-09-25 Gei Tai 電子素子熱伝導の方法
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