WO2013173537A1 - Réglage alterné de niveaux de puissance pour le canal de données et le canal de commande - Google Patents

Réglage alterné de niveaux de puissance pour le canal de données et le canal de commande Download PDF

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Publication number
WO2013173537A1
WO2013173537A1 PCT/US2013/041269 US2013041269W WO2013173537A1 WO 2013173537 A1 WO2013173537 A1 WO 2013173537A1 US 2013041269 W US2013041269 W US 2013041269W WO 2013173537 A1 WO2013173537 A1 WO 2013173537A1
Authority
WO
WIPO (PCT)
Prior art keywords
channel
output signal
desired output
signal level
control channel
Prior art date
Application number
PCT/US2013/041269
Other languages
English (en)
Inventor
Otto Ville STEUDLE
Harri Matti Johannes VALIO
Ladislav Kusnyer
Original Assignee
Nokia Corporation
Nokia, Inc.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nokia Corporation, Nokia, Inc. filed Critical Nokia Corporation
Publication of WO2013173537A1 publication Critical patent/WO2013173537A1/fr

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Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04WWIRELESS COMMUNICATION NETWORKS
    • H04W52/00Power management, e.g. TPC [Transmission Power Control], power saving or power classes
    • H04W52/04TPC
    • H04W52/30TPC using constraints in the total amount of available transmission power
    • H04W52/32TPC of broadcast or control channels
    • H04W52/325Power control of control or pilot channels
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04WWIRELESS COMMUNICATION NETWORKS
    • H04W52/00Power management, e.g. TPC [Transmission Power Control], power saving or power classes
    • H04W52/04TPC
    • H04W52/06TPC algorithms
    • H04W52/14Separate analysis of uplink or downlink
    • H04W52/146Uplink power control
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04WWIRELESS COMMUNICATION NETWORKS
    • H04W52/00Power management, e.g. TPC [Transmission Power Control], power saving or power classes
    • H04W52/04TPC
    • H04W52/54Signalisation aspects of the TPC commands, e.g. frame structure
    • H04W52/60Signalisation aspects of the TPC commands, e.g. frame structure using different transmission rates for TPC commands

Definitions

  • Embodiments of the invention relate to power control in cellular networks and/or wireless communication systems, such as Wideband Code Division Multiple Access (WCDMA), the Universal Mobile Telecommunications System (UMTS) Terrestrial Radio Access Network (UTRAN) and Long Term Evolution (LTE) Evolved UTRAN (E-UTRAN), Global System for Mobile Communications (GSM), or any other wireless communications system.
  • WCDMA Wideband Code Division Multiple Access
  • UMTS Universal Mobile Telecommunications System
  • UTRAN Universal Mobile Telecommunications System
  • LTE Long Term Evolution
  • E-UTRAN Long Term Evolution
  • GSM Global System for Mobile Communications
  • power control in wireless systems refers to the process of controlling the transmitted power so as to achieve the required communications performance without transmitting more power than needed to achieve that required performance. Therefore, many wireless standards include power control methods and signals to allow for efficient use of radio resources. Typically, such systems' transceivers are also specified to use separate I and Q branches, which are combined to form complex symbols.
  • the transmission power adjustment is done for the combined signal, containing both data and control channels (both the I and Q branch).
  • the I branch refers to the real part (or in-phase part) of a complex number or signal
  • the Q branch refers to the imaginary part (or quadrature part) of a complex number or signal.
  • United States Patent No. 7,502,406 is an example of a solution that uses simultaneous power adjustment of both the data and control channels.
  • One embodiment includes a method for power adjustment.
  • the method may include performing power adjustment, by a user equipment in a communications system, for one of a data channel or a control channel in a given slot.
  • the method may also include calculating a desired output signal level and channel levels for the user equipment.
  • the apparatus includes at least one processor and at least one memory comprising computer program code.
  • the at least one memory and the computer program code are configured, with the at least one processor, to cause the apparatus at least to perform power adjustment for one of a data channel or a control channel in a given in a communications system, and calculate a desired output signal level and channel levels for the apparatus.
  • Another embodiment is directed to an apparatus including means for performing power adjustment, for example in a user equipment in a communications system, for one of a data channel or a control channel in a given slot.
  • the apparatus may also include means for calculating a desired output signal level and channel levels for the user equipment.
  • Another embodiment is directed to a computer program, embodied on a computer readable medium, wherein the computer program is configured to control a processor to perform a process.
  • the process includes performing power adjustment, for example in a user equipment in a communications system, for one of a data channel or a control channel in a given slot.
  • the process may also include calculating a desired output signal level and channel levels for the user equipment.
  • Fig. 1 illustrates a frame structure for a data channel and control channel
  • FIG. 2 illustrates an example of a system
  • FIG. 3 illustrates another example of a system
  • FIG. 4 illustrates an example of a system according to one embodiment
  • FIG. 5 illustrates an example of another system according to an embodiment
  • Fig. 6 illustrates an example of an alternating power level adjustment method according to one embodiment
  • FIG. 7 illustrates an example of an alternating power level adjustment method according to another embodiment
  • FIG. 8 illustrates an apparatus according to one embodiment
  • Fig. 9 illustrates a flow diagram of a method according to one embodiment.
  • Fig. 1 illustrates an example of a frame structure for uplink dedicated physical data channel (DPDCH)/dedicated physical control channel (DPCCH).
  • DPDCH uplink dedicated physical data channel
  • DPCCH dedicated physical control channel
  • Fig. 1 illustrates an example of how the DPDCH 100 and the DPCCH 1 10 are transmitted in parallel, i.e., in the same slot 1 15.
  • 3GPP TS 25.214 section 5.1.2.1 describes how the transmission power is adjusted: "Subsequently the uplink transmit power control procedure simultaneously controls the power of a DPCCH and its corresponding DPDCHs (if present)." Thus, according to prior art solutions, the power adjustment is done at the same time to both the data (DPDCH) and the control channel (DPCCH).
  • Embodiments of the invention propose not to adjust the transmission power for both data and control channel at the same time, but to alternate the adjustments.
  • either the data channel power or the control channel power would be adjusted according to the desired output power.
  • the desired output power value may be based on the power control loop and may include filtering, estimation/prediction or adjustment/compensation elements, based on an algebraic formula, table or a combination thereof.
  • the power adjustment is not performed for both the data and control channels of Fig. 1 at the same time, but for one or the other of the channels.
  • the power adjustment for the data channel and control channel, respectively is performed in different arbitrary slots.
  • the power adjustment for the data channel and control channel, respectively is performed in alternating slots, for instance in strictly alternating slots.
  • the desired output signal level and channel levels are then determined or calculated.
  • the desired power and channel levels may be set by using, for example, existing "beta factor" level multipliers, or by using some new multipliers for the specific purpose.
  • Fig. 2 illustrates an example of spreading for uplink DPCCH/DPDCHs and depicts how the DPDCH and DPCCH (I and Q branches) are combined to form a complex symbol (I+jQ).
  • Fig. 2 further illustrates the beta factor multipliers d, ⁇
  • the beta factor multipliers ⁇ , ⁇ were only used for static or quasi-static adjustments.
  • the beta factor multipliers pd, ⁇ may be used for dynamic closed loop power control, as mentioned above.
  • Fig. 3 illustrates an example of spreading for uplink dedicated channels and depicts how the combined complex symbol stream (I+jQ) is scrambled. In the example of Fig. 3, the combined complex symbol stream (I+jQ) is scrambled by multiplying it by with the complex sequence S(dpch,n).
  • the power adjustment is not performed for both channels of Fig. 1 at the same time, but always performed for one channel or the other.
  • the power adjustment for the data channel and control channel, respectively is performed in different arbitrary slots.
  • the power adjustment for the data channel and control channel, respectively is performed in alternating slots.
  • the desired output signal level and channel levels are then determined or calculated.
  • the desired power and channel levels may be set by using, for example, the beta factor level multipliers discussed above, or by using some new multipliers for the specific purpose.
  • relative adjustment capability in the range of one or two steps of the final output level adjustment may be sufficient.
  • final adjustment to the desired output level may be performed by a second stage for the combined level.
  • Fig. 4 illustrates an example of how the I and Q branches are combined to form a complex symbol and illustrates a possible location for a final output level adjustment 400, according to one embodiment.
  • Fig. 5 illustrates an example placement of additional data channel power level adjustment units 500 and control channel level adjustment units 510 (level multipliers), according to an embodiment of the invention. As illustrated in Fig. 5, in this example, the data channel power level adjustment units 500 and control channel level adjustment units 510 may be placed in the next stage after the beta factor multipliers d 550, ⁇ 560.
  • the example system of Fig. 5 can also include a final output level adjustment unit 400.
  • the adjustments of the data channel power or control channel power may be performed either strictly alternating (always first one, then the other) or with arbitrary selection of the channel to adjust.
  • Fig. 6 illustrates an example of an alternating power level adjustment method in which power of the data channel (DPDCH) and control channel (DPCCH) are controlled by strictly alternating between them.
  • DPDCH data channel
  • DPCCH control channel
  • Fig. 7 illustrates one example of alternating power level adjustment in which power of the data channel (DPDCH) and control channel (DPCCH) are controlled by allowing an arbitrary selection of which one of the channels to adjust in a given slot.
  • DPDCH data channel
  • DPCCH control channel
  • the calculating, generating or storing the power level adjustments there are multiple options available according to embodiments of the invention.
  • the calculating, generating or storing the power level adjustments may be based on tabulated values, may contain an algorithmic generator, or a mixed approach.
  • the adjustments may depend on whether an "up" or "down" command was received in the previous downlink slot, on the history of received commands in earlier slots, on the signaled power control mode and step size, and/or on the radio conditions.
  • an estimation or prediction algorithm/mechanism can be used.
  • Fig. 8 illustrates an apparatus 10 configured for power control according to an embodiment.
  • apparatus 10 may be a mobile device such as user equipment (UE). It should be noted that Fig. 8 does not necessarily illustrate all components of apparatus 10. Only those components necessary for understanding embodiments of the invention are illustrated, but one of ordinary skill in the art would understand that apparatus 10 may include additional components that are not illustrated.
  • UE user equipment
  • Apparatus 10 includes a processor 22 for processing information and executing instructions or operations.
  • Processor 22 may be any type of general or specific purpose processor. While a single processor 22 is shown in Fig. 8, multiple processors may be utilized according to other embodiments. In fact, processor 22 may include one or more of general- purpose computers, special purpose computers, microprocessors, digital signal processors ("DSPs”), field-programmable gate arrays ("FPGAs”), application-specific integrated circuits ("ASICs”), and processors based on a multi-core processor architecture, as examples.
  • Apparatus 10 further includes a memory 14, coupled to processor 22, for storing information and instructions that may be executed by processor 22.
  • Memory 14 may be one or more memories and of any type suitable to the local application environment, and may be implemented using any suitable volatile or nonvolatile data storage technology such as a semiconductor-based memory device, a magnetic memory device and system, an optical memory device and system, fixed memory, and removable memory.
  • memory 14 can be comprised of any combination of random access memory (“RAM”), read only memory (“ROM”), static storage such as a magnetic or optical disk, or any other type of non-transitory machine or computer readable media.
  • RAM random access memory
  • ROM read only memory
  • static storage such as a magnetic or optical disk, or any other type of non-transitory machine or computer readable media.
  • the instructions stored in memory 14 may include program instructions or computer program code that, when executed by processor 22, enable the apparatus 10 to perform tasks as described herein.
  • Apparatus 10 may also include one or more antennas (not shown) for transmitting and receiving signals and/or data to and from apparatus 10.
  • Apparatus 10 may further include a transceiver 28 that modulates information on to a carrier waveform for transmission by the antenna(s) and demodulates information received via the antenna(s) for further processing by other elements of apparatus 10.
  • transceiver 28 may be capable of transmitting and receiving signals or data directly.
  • Processor 22 may perform functions associated with the operation of apparatus 10 including, without limitation, precoding of antenna gain/phase parameters, encoding and decoding of individual bits forming a communication message, formatting of information, and overall control of the apparatus 10, including processes related to management of communication resources.
  • memory 14 stores software modules that provide functionality when executed by processor 22.
  • the modules may include an operating system 15 that provides operating system functionality for apparatus 10.
  • the memory may also store one or more functional modules 18, such as an application or program, to provide additional functionality for apparatus 10.
  • the components of apparatus 10 may be implemented in hardware, or as any suitable combination of hardware and software.
  • apparatus 10 may be the UE mentioned above.
  • Apparatus 10 may be controlled by memory 14 and processor 22 to perform power control for transceiver 28 according to embodiments of the invention.
  • apparatus 10 may be controlled by memory 14 and processor 22 to perform power adjustment for one of the data channel or the control channel in a given slot, and to calculate a desired output signal level and channel levels for the apparatus 10.
  • the power adjustment for the data channel or the control channel may be performed in different arbitrary slots. In other embodiments, the power adjustment for the data channel or the control channel may be performed in alternating slots.
  • apparatus 10 may be further controlled by memory 14 and processor 22 to calculate relative adjustments to the desired output signal level and the channel levels using beta factor level multipliers and/or using specific-purpose multipliers. Further, in some embodiments, the relative adjustments may be calculated by adjusting in a range of one or two steps of the final output level.
  • apparatus 10 may be further controlled by memory 14 and processor 22 to perform final adjustments to the desired output signal level in a second stage for the combined level.
  • apparatus 10 may be further controlled by memory 14 and processor 22 to calculate the desired output signal level and the channel levels for the apparatus 10 by calculating based on at least one of tabulated values or an algorithmic generator.
  • apparatus 10 may be controlled by memory 14 and processor 22 to calculate the desired output signal level and the channel levels for the apparatus by calculating based on whether an up or down command was received in a previous downlink slot, based on a history of received commands in earlier slots, based on a signaled power control mode and step size, or based on radio conditions.
  • apparatus 10 may be controlled by memory 14 and processor 22 to calculate the desired output signal level and the channel levels for the apparatus by calculating using an estimation or prediction mechanism.
  • Fig. 9 illustrates a flow diagram of method for performing power control in a communications system, according to one embodiment.
  • the method includes, at 900, performing power adjustment, for example by a UE, for one of a data channel or a control channel in a given slot.
  • the power adjustment may be performed for one of the data channel or the control channel in different arbitrary slots or in alternating slots.
  • the method may then include, at 910, calculating a desired output signal level and channel levels for the user equipment.
  • the method may further include, at 920, calculating relative adjustments to the desired output signal level and the channel levels using beta factor level multipliers and/or specific-purpose multipliers.
  • the method can also include, at 930, performing final adjustments to the desired output signal level by a second stage for the combined level.
  • the functionality of any of the methods described herein, such as the method of Fig. 9, may be implemented by software and/or computer program code stored in memory or other computer readable or tangible media, and executed by a processor.
  • the functionality may be performed by hardware, for example through the use of an application specific integrated circuit (ASIC), a programmable gate array (PGA), a field programmable gate array (FPGA), or any other combination of hardware and software.
  • ASIC application specific integrated circuit
  • PGA programmable gate array
  • FPGA field programmable gate array
  • Embodiments of the invention provide an advantage of allowing the setting of the output power with a finer granularity than previously and, therefore, reducing radio interference.
  • One embodiment includes a method for power control in a communications system.
  • the method includes performing power adjustment, for example by a user equipment, for one of a data channel or a control channel in a given slot.
  • the method further includes calculating a desired output signal level and channel levels for the user equipment.
  • the apparatus includes at least one processor and at least one memory including computer program code.
  • the at least one memory and the computer program code are configured, with the at least one processor, to cause the apparatus at least to perform power adjustment for one of a data channel or a control channel in a given slot, and calculate a desired output signal level and channel levels for the apparatus.
  • Another embodiment is directed to a computer program embodied on a computer readable medium.
  • the compute program is configured to control a processor to perform a process.
  • the process includes performing power adjustment, for example by a user equipment, for one of a data channel or a control channel in a given slot.
  • the process further includes calculating a desired output signal level and channel levels for the user equipment.

Abstract

L'invention concerne un appareil et un procédé de commande de puissance dans un système de communications. Le procédé comprend la réalisation d'un réglage de puissance, par un équipement utilisateur, pour un canal de données ou un canal de commande dans une tranche donnée. Le procédé comprend en outre le calcul d'un niveau de signal de sortie souhaité et de niveaux de canal pour l'équipement utilisateur.
PCT/US2013/041269 2012-05-16 2013-05-16 Réglage alterné de niveaux de puissance pour le canal de données et le canal de commande WO2013173537A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US201261647709P 2012-05-16 2012-05-16
US61/647,709 2012-05-16

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WO2013173537A1 true WO2013173537A1 (fr) 2013-11-21

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PCT/US2013/041269 WO2013173537A1 (fr) 2012-05-16 2013-05-16 Réglage alterné de niveaux de puissance pour le canal de données et le canal de commande

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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2000062456A1 (fr) * 1999-04-12 2000-10-19 Samsung Electronics Co., Ltd. Dispositif et procede de transmission intermittente dans un systeme de telecommunication a amrc
WO2001050635A1 (fr) * 1999-12-29 2001-07-12 Airnet Communications Corporation Systeme de reglage de puissance de retour dans une station-relais radio
US7502406B2 (en) 1995-06-30 2009-03-10 Interdigital Technology Corporation Automatic power control system for a code division multiple access (CDMA) communications system

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7502406B2 (en) 1995-06-30 2009-03-10 Interdigital Technology Corporation Automatic power control system for a code division multiple access (CDMA) communications system
WO2000062456A1 (fr) * 1999-04-12 2000-10-19 Samsung Electronics Co., Ltd. Dispositif et procede de transmission intermittente dans un systeme de telecommunication a amrc
WO2001050635A1 (fr) * 1999-12-29 2001-07-12 Airnet Communications Corporation Systeme de reglage de puissance de retour dans une station-relais radio

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