WO2013166779A1

WO2013166779A1 - Data transmission method and device

Info

Publication number: WO2013166779A1
Application number: PCT/CN2012/078757
Authority: WO
Inventors: 郝鹏; 杨丽宁; 黄灿; 高贞
Original assignee: 中兴通讯股份有限公司
Priority date: 2012-07-17
Filing date: 2012-07-17
Publication date: 2013-11-14
Also published as: CN104541571A; CN104541571B; EP2876971A1; US20150180626A1; EP2876971B1; EP2876971A4; US9520971B2

Abstract

Disclosed are a data transmission method and device, the method comprising: receiving IQ data from an uplink; according to the mapping in the CPRI basic frame of the IQ data, utilizing a storage unit to sequence the IQ data; combining a control word with the sequenced IQ data to form CPRI data, and transmitting the CPRI data. The present invention utilizes a storage unit to sequence the IQ data, extracts the sequenced data for a CPRI framing operation, and has simple hardware processing, and low realization complexity. The system upgrade, and changes and upgrade of the transmission bandwidth of multiple modes (single mode or mixed mode) only occur on the software layer without affecting the realization of the hardware, thus having good flexibility.

Description

TECHNICAL FIELD The present invention relates to the field of communications, and in particular to a data transmission method and apparatus. Background Art In a 3rd generation mobile communication system, a distributed base station has replaced a conventional macro base station. The distributed base station is characterized by baseband and radio frequency separation, and is extended by fiber or cable, while the baseband and radio unit of the conventional base station are integrated. The baseband unit (BBU) of the distributed base station forms a shared baseband pool, and the baseband and radio frequency are connected by long-distance transmission means, such as fiber and cable, and then the radio unit (RRU) is placed. Wherever needed, the distributed base station separates the two separate parts and develops them independently.

The BBU and the RRU are connected by optical fibers, and the interface between them has formed a standard interface. Currently, the mainstream interface standard has a common public radio interface (The Common Public Radio Interface, CPRI for short), and an interface between the RRU and the BBU ( Interface between the RRU and the BBU, referred to as IR). The CPRI interface is widely used to support Global System for Mobile Communication (GSM), Universal Mobile Telecommunications System (UMTS), and Code Division Multiple Access (Code Division Multiple Access). Single-mode, mixed-mode transmission of multiple formats such as CDMA) and Long-Term Evolution (LTE).

The CPRI protocol carries three types of data: orthogonal IQ data, control words, and signaling, where the transmission format of control words and signaling is relatively fixed, while IQ data transmission is very flexible. The CPRI protocol only stipulates that the transmission of IQ data can satisfy the rate of a basic frame transmitted by CPRI (3.84 Mbps). Therefore, different systems have different IQ placement methods in the CPRI frame format, and various mixed modes are mixed. The format of the IQ placement in the CPRI frame format is also different, which brings about the difference in the implementation of the IQ data group deframing. Regarding the group deframing of the above IQ data, most of the current implementations seek a relatively suitable IQ data placement format in a basic frame of CPRI transmission, and then perform data framing and deframing according to the characteristics of the placement format. The processing and processing are all implemented in hardware. However, the above solution achieves a high degree of hardware complexity, and at the same time, with the development of the CPRI protocol and the upgrade of the system, its flexibility is limited. When the transmission bandwidth of different standards (single mode or mixed mode) changes, It will directly affect the IQ data placement format in a basic frame of CPRI transmission, which will lead to the implementation of hardware. Therefore, how to better adapt to the development of protocols and systems, adapt to various possible IQ data placement formats has become a key technology, and is also a major issue to improve product vitality and market competitiveness. SUMMARY OF THE INVENTION The present invention provides a data transmission method and apparatus, to at least solve the problem that the group deframing hardware of IQ data is complicated to implement and has poor flexibility. According to an aspect of the present invention, a data transmitting method is provided, including: receiving IQ data from an uplink; and arranging IQ data by using a storage unit according to mapping of IQ data in a CPRI basic frame; The sequenced IQ data is combined to form CPRI data, and the CPRI data is transmitted. Preferably, according to the mapping of the IQ data in the CPRI basic frame, arranging the IQ data by using the storage unit comprises: sampling the IQ data; according to the mapping of the IQ data in the CPRI basic frame, sampling one clock cycle of IQ Each bit in the data is separately extracted; each bit is stored separately to a different memory unit; the hardware is instructed to read all bits of the same carrier from different memory cells in one clock cycle to compose carrier data. Preferably, the indication hardware reads all the bits of the same carrier from different memory units in one clock cycle. The carrier data comprises: indicating, by the register, that the hardware reads all the bits of the same carrier from different storage units in one clock cycle. Compose the carrier data. Preferably, the storage unit is a random accessor RAM. According to another aspect of the present invention, a data transmitting apparatus is provided, comprising: a receiving module configured to receive IQ data from an uplink; and an arranging module configured to map according to mapping of IQ data in a CPRI basic frame The storage unit arranges the IQ data; the merge module is configured to combine the control word and the arranged IQ data to form the CPRI data; and the sending module is configured to send the CPRI data. According to an aspect of the present invention, a data transmitting method is provided, comprising: receiving CPRI data, separating a control word in the CPRI data from the IQ data; constructing the same information as mapping the IQ data in the CPRI basic frame, using The storage unit arranges the IQ data; sends the arranged IQ data. Preferably, constructing the same information as the mapping of the IQ data in the CPRI basic frame comprises: constructing the same information as the mapping of the IQ data in the CPRI basic frame according to the current system and the bit width. Preferably, arranging the IQ data by using the storage unit comprises: sampling the IQ data; instructing the hardware to extract each bit of the sampled IQ data of one clock cycle separately; respectively writing each bit to a different storage Unit; reads all bits of the same carrier from different memory cells in one clock cycle, and groups all bits into carrier data. Preferably, reading all the bits of the same carrier from different memory cells comprises: indicating, by the register, that the hardware reads all bits of the same carrier from different memory cells in one clock cycle. Preferably, the storage unit is a RAM. According to another aspect of the present invention, a data transmitting apparatus is provided, comprising: a receiving module configured to receive CPRI data; a separating module configured to separate a control word in the CPRI data from the IQ data; constructing a module, configured to construct The same information as the mapping of the IQ data in the CPRI basic frame; the arranging module, configured to arrange the IQ data by using the storage unit; and the sending module, configured to send the arranged IQ data. Through the invention, the IQ data is arranged by using the storage unit, and the CPRI framing operation of the arranged data is extracted, the hardware processing is simple, the implementation complexity is small, the system is upgraded, and the transmission bandwidth of multiple standards (single mode or mixed mode) is adopted. Changes and upgrades will only change at the software level, without affecting hardware implementation, and have great flexibility. BRIEF DESCRIPTION OF THE DRAWINGS The accompanying drawings, which are set to illustrate,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, 1 is a flow chart 1 of a data transmitting method according to an embodiment of the present invention; FIG. 2 is a block diagram showing a structure of a data transmitting apparatus according to an embodiment of the present invention; FIG. 3 is a data transmitting according to an embodiment of the present invention. FIG. 4 is a block diagram showing the structure of a data transmitting apparatus according to an embodiment of the present invention; FIG. 5 is a flow chart of a downlink deframing according to a preferred embodiment of the present invention; FIG. 6 is a schematic diagram of a downlink deframing according to a preferred embodiment of the present invention; Schematic diagram of the flow of the downlink framing. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS It should be noted that the embodiments in the present application and the features in the embodiments may be combined with each other without conflict. The invention will be described in detail below with reference to the drawings in conjunction with the embodiments. Currently, various standards exist in wireless products. Due to differences in system, bandwidth, and optical port rate, IQ data is placed in different formats in CPRI frames. In order to adapt to the above differences, the versatility, flexibility, and design complexity of CPRI's IQ data set deframing are proposed. Embodiments of the present invention provide a data sending method, which is applied to a framing process of IQ data. FIG. 1 is a first flowchart of a data transmitting method according to an embodiment of the present invention. As shown in FIG. 1, the following steps S102 to S106 are included. Step S102, receiving IQ data from the uplink. Step S104, the IQ data is arranged by using the storage unit according to the mapping of the IQ data in the CPRI basic frame. In step S106, the control word is combined with the arranged IQ data to form CPRI data, and the CPRI data is transmitted. In the related art, the group deframing hardware implementation of IQ data is more complicated and less flexible. In the embodiment of the present invention, the IQ data is arranged by using the storage unit, and the aligned CPRI framing operation is extracted, the hardware processing is simple, the implementation complexity is small, the system is upgraded, and the transmission of multiple formats (single mode or mixed mode) is performed. Bandwidth changes and upgrades will only change at the software level, without affecting hardware implementation, and have great flexibility. Step S104 includes: sampling IQ data; extracting each bit of the sampled IQ data in one clock cycle according to the mapping of the IQ data in the CPRI basic frame; respectively storing each bit to a different storage Unit; instructs the hardware to read all bits of the same carrier from different memory units in one clock cycle to compose carrier data. It is guaranteed that all the bits of the same carrier are read out in one clock cycle, so that carrier data can be formed for transmission. Preferably, the indication hardware reads all the bits of the same carrier from different memory units in one clock cycle. The carrier data comprises: indicating, by the register, that the hardware reads all the bits of the same carrier from different storage units in one clock cycle. Compose the carrier data. Preferably, the storage unit may be a random access memory (RAM). Corresponding to the above data transmission method (frame), the embodiment of the present invention further provides a data transmitting apparatus, and FIG. 2 is a block diagram of a structure of a data transmitting apparatus according to an embodiment of the present invention. As shown in FIG. 2, the receiving module is included. 22. Arrange module 24, merge module 26, and transmit module 28. The structure is described in detail below. The receiving module 22 is configured to receive orthogonal IQ data from the uplink; the arranging module 24 is connected to the receiving module 22, and is configured to arrange the IQ data by using the storage unit according to the mapping of the IQ data in the CPRI basic frame; The merging module 26 is coupled to the arranging module 24, configured to combine the control words with the aligned IQ data to form CPRI data; the transmitting module 28, coupled to the merging module 26, is configured to transmit CPRI data. The arranging module 24 includes: a sampling unit configured to sample the IQ data; an extracting unit connected to the sampling unit, configured to map each of the IQ data of one clock cycle sampled according to the mapping of the IQ data in the CPRI basic frame. The bits are respectively extracted; the storage unit is connected to the extraction unit, and is set to store each bit to a different storage unit respectively; the indication unit is connected to the storage unit, and is set to instruct the hardware to be from different storage units in one clock cycle All bits in the same carrier are read to form carrier data. Preferably, the indication unit indicates, by the register, that the hardware reads all the bits of the same carrier from different memory units in one clock cycle to compose carrier data. Preferably, the above storage unit may be a RAM. The invention also provides a data transmission method, which is applied to the deframing process of IQ data. FIG. 3 is a second flowchart of a data sending method according to an embodiment of the present invention. As shown in FIG. 3, the following steps S302 to S306 are included. Step S302, receiving CPRI data, separating the control word in the CPRI data from the IQ data. Step S304, constructing the same information as the mapping of the IQ data in the CPRI basic frame, and arranging the IQ data by using the storage unit. Step S306, sending the arranged IQ data. In the related art, the group deframing hardware implementation of IQ data is more complicated and less flexible. In the embodiment of the present invention, the IQ data is arranged by using the storage unit, and the arranged IQ data is sent, the hardware processing is simple, the implementation complexity is small, the system is upgraded, and the transmission bandwidth of the multiple formats (single mode or mixed mode) is changed. And upgrades, only changes at the software level, without affecting the hardware implementation, with great flexibility. Preferably, constructing the same information as the mapping of the IQ data in the CPRI basic frame comprises: constructing the same information as the mapping of the IQ data in the CPRI basic frame according to the current system and the bit width. Step S304 includes: sampling the IQ data; instructing the hardware to extract each bit of the sampled one clock cycle IQ data separately; writing each bit to a different memory unit separately; from a different clock cycle All bits of the same carrier are read out in the storage unit, and all bits are grouped into carrier data. Preferably, reading all the bits of the same carrier from different memory cells comprises: indicating, by the register, that the hardware reads all bits of the same carrier from different memory cells in one clock cycle. Preferably, the above storage unit may be a RAM. Corresponding to the above data transmission method (de-frame), the embodiment of the present invention further provides a data transmitting apparatus, and FIG. 4 is a block diagram 2 of a data transmitting apparatus according to an embodiment of the present invention. As shown in FIG. 4, the receiving module is included. 42. Separation module 44, construction module 46, alignment module 48, and transmission module 49. The structure is described in detail below. The receiving module 42 is configured to receive CPRI data; the separating module 44 is connected to the receiving module 42 and configured to separate the control word in the CPRI data from the IQ data; the constructing module 46 is connected to the separating module 44, configured to construct and IQ data. The same information is mapped in the CPRI basic frame; the arranging module 48 is connected to the construction module 46, and is arranged to arrange the IQ data by using the storage unit; the sending module 49 is connected to the arranging module 48, and is configured to send the arranged IQ data. . Preferably, the construction module 46 constructs the same information as the mapping of the IQ data in the CPRI basic frame according to the current system and the bit width. The arranging module 48 includes: a sampling unit configured to sample IQ data; an indication unit connected to the sampling unit, configured to instruct the hardware to extract each bit of the IQ data of one clock cycle sampled separately; Connected to the indication unit, set to write each bit to a different memory unit; the read unit, connected to the write unit, set to read all of the same carrier from different memory cells in one clock cycle A bit, a constituent unit, connected to the reading unit, is set to compose all bits into carrier data. Preferably, reading all the bits of the same carrier from different memory cells comprises: indicating, by the register, that the hardware reads all bits of the same carrier from different memory cells in one clock cycle. Preferably, the above storage unit may be a RAM. In summary, in the embodiment of the present invention, the software needs to obtain a table of IQ data placement in a CPRI frame format of various standards (including mixed mode), bit width, and optical port rate in advance, and bits for the same carrier (deframe) ) and the bits (frames) that need to be output in the same clock cycle can only be stored in different RAMs, but not in different addresses of a certain RAM. The above embodiments enable the CPRI interface to carry IQ data for transmission without being restricted by the standard and IQ data placement. The above embodiment provides a solution for deframing a CPRI group based on hardware and software cooperation, and is a solution for software-dominated CPRI group de-frameing, and the minimum granularity is single bit. According to different formats, bandwidths and optical port rates in the CPRI frame format, the software stores each bit in IQ in the storage unit through the configuration register. Similarly, the software configuration register is used to extract different values from the storage unit. The bits form a set of IQs for deframe output or CPRI framing operations. In order to make the technical solutions and implementation methods of the present invention clearer, the implementation process will be described in detail below in conjunction with the preferred embodiments. Based on the foregoing description, the embodiment of the present invention implements the de-frameping of the IQ data group of the CPRI based on the cooperation of the software and the hardware, and is mainly divided into two processes: a downlink de-frame process and an uplink framing process. The following description is respectively described in conjunction with the preferred embodiments.

(1) The downlink de-frame process downlink de-frame process, that is, the process of parsing the required IQ data from the received frame format data from the CPRI on the optical fiber. The processing flow is shown in Figure 5. Step 1: Separate the control word from the IQ data based on the CPRI rate information configured by the software. Step 2: The software constructs a table with the same position of the IQ data in the CPRI frame format according to the current system and the bit width, and knows the carrier information of each bit (bit) of the IQ data; the software informs the hardware according to the table Each bit of the sampled IQ data of one clock cycle is extracted separately. Step 3: Store each bit of the extracted different carriers into a different RAM (memory unit) or a unit of RAM. It should be noted that there is a key limitation when storing. Different bits of the same carrier can only be stored in different RAMs, but cannot be stored in different addresses of a certain RAM. This is to ensure that all bits of the same carrier can be guaranteed. Read out in one clock cycle. The fourth step: Since the information stored by the hardware is informed by the software, the software completely knows the relevant information stored in each bit of the IQ data, so that the software can inform the hardware to read out the same carrier from the address of different RAM through the register. Bits, which are stitched together into a valid carrier data output. The deframe processing process ends. In the above processing flow, the software controls the hardware to write each bit in the IQ data into a prescribed RAM unit through a table in which the IQ data is placed in the CPRI frame format, and reads out from the RAM unit according to the requirements of the software configuration. The software needs to obtain the format information of the IQ data placement in the CPRI frame format, which is affected by the optical port rate, the standard, and the system transmission bandwidth. However, in a fixed application scenario, the above factors are determined. Therefore, before the system is powered on or powered on, the format information of the IQ data placement in the CPRI frame format can be known through the signaling transmission software. In addition, since the transmission is based on the basic frame format of the CPRI, the information obtained by the software is the format of the IQ data in a basic frame, and the size of a basic frame is determined by the optical port rate, so it is required here. Meet the maximum speed of the optical port supported by the system. For the hardware part, the core components are multiple single-bit wide RAMs and associated memory control circuitry. The data amount of the single-bit wide RAM requires at least one data amount of the CPRI basic frame to be stored. Therefore, the number of single-bit width RAM is the number of bits of the data sampled once, and the depth of the single-bit width RAM is The number of sampling points included in a basic frame at a certain rate is equivalent to a mapping of the IQ data placement format in the software on the hardware. Therefore, the resources of the single-bit wide RAM depend on the maximum rate of optical ports supported by the system. It should be noted that the multi-bit width RAM can also implement the above solution, as long as all the bits of the same carrier are read in one clock cycle, but the multi-bit width RAM is applied to the above process, which is complicated to implement.

(2) Uplink framing process The uplink framing process is the reverse process of the downlink demapping process. Receive IQ data from the uplink, according to

The frame format of CPRI performs IQ data arrangement, and finally the process of combining the control words and IQ data is completed according to the current optical port rate. The processing flow is shown in Figure 6. The first step: each bit of the IQ data of each clock cycle of the uplink input is the same carrier, and the software will sample each bit of the IQ data of one clock cycle according to the IQ placement position in the CPRI frame format. Extract them separately. Step 2: Store each bit of the extracted different carriers into a different RAM or a unit of RAM. It should be noted that a key limitation in storage is that different bits of the same AxC (antenna carrier) belonging to the CPRI can only be stored in different RAMs and cannot be stored in different addresses of a certain RAM. Through the stored control, the mapping of the uplink input IQ data to a CPRI basic frame is completed. The third step: Since the information stored by the hardware is informed by the software, the software completely knows the relevant information stored in each bit of IQ, so that the software can inform the hardware to read out a clock cycle from the address of different RAM through the register. The bits are spliced into a valid CPRI AxC data output. Step 4: Combine the control word with the IQ data according to the CPRI rate information configured by the software to form a frame format output of the CPRI. The framing process ends. In the above framing process, the key information comes from the software configuration, and the core technology is consistent with the deframe processing. For software, the software controls the hardware to write each bit of the IQ data to a specified RAM unit through a table of IQ data placement in the CPRI frame format, and reads it out from the RAM unit as required by the software configuration. For the hardware part, the core components are multiple single-bit wide RAMs and associated memory control circuitry. The number of RAMs with a single bit width is consistent with the description of the RAM depth in the deframe processing. It should be noted that the steps shown in the flowchart of the accompanying drawings may be performed in a computer system such as a set of computer executable instructions, and, although the logical order is shown in the flowchart, in some cases, The steps shown or described may be performed in an order different than that herein. In summary, according to the above embodiments of the present invention, a data transmitting method and apparatus are provided. After the maximum rate of CPRI is determined, there is no limit to the placement of IQ in the CPRI frame format, which has good versatility; this scheme has simple hardware processing and small implementation complexity; system upgrade, multiple modes (single mode or mixed) Mode change and upgrade of the transmission bandwidth will only change at the software level, without affecting the hardware implementation, and has great flexibility. Obviously, those skilled in the art should understand that the above modules or steps of the present invention can be implemented by a general-purpose computing device, which can be concentrated on a single computing device or distributed over a network composed of multiple computing devices. Alternatively, they may be implemented by program code executable by the computing device, such that they may be stored in the storage device by the computing device, or they may be separately fabricated into individual integrated circuit modules, or they may be Multiple modules or steps are made into a single integrated circuit module. Thus, the invention is not limited to any specific combination of hardware and software. The above is only the preferred embodiment of the present invention, and is not intended to limit the present invention, and various modifications and changes can be made to the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and scope of the present invention are intended to be included within the scope of the present invention.

Claims

Claim

A data transmission method, comprising:

Receiving orthogonal IQ data from the uplink;

And arranging the IQ data by using a storage unit according to the mapping of the IQ data in a basic radio interface CPRI basic frame;

The control word is combined with the aligned IQ data to form CPRI data, and the CPRI data is transmitted.

2. The method according to claim 1, wherein arranging the IQ data by using a storage unit according to the mapping of the IQ data in a CPRI basic frame comprises:

Sampling the IQ data;

Extracting, according to the mapping of the IQ data in the CPRI basic frame, each bit in the IQ data of one clock cycle sampled separately;

Each of the bits is stored to a different storage unit;

The hardware is instructed to read all bits of the same carrier from the different memory cells in one clock cycle to compose carrier data.

3. The method according to claim 1, wherein the indicating that the hardware reads all the bits of the same carrier from the different storage units in one clock cycle comprises carrier data comprising:

The hardware is instructed by the register to read all bits of the same carrier from the different memory cells in one clock cycle to compose carrier data.

The method according to any one of claims 1 to 3, wherein the storage unit is a random accessor

5. A data transmitting device, comprising:

a receiving module, configured to receive orthogonal IQ data from the uplink;

Arranging a module, configured to arrange the IQ data by using a storage unit according to mapping of the IQ data in a common radio interface CPRI basic frame;

The merging module is configured to combine the control word and the arranged IQ data to form CPRI data; and the sending module is configured to send the CPRI data.

6. A method of data transmission, comprising:

Receiving a public radio interface CPRI data, separating a control word in the CPRI data from orthogonal IQ data;

Constructing the same information as the mapping of the IQ data in the CPRI basic frame, and arranging the IQ data by using a storage unit;

Send the aligned IQ data.

7. The method according to claim 6, wherein constructing the same information as the mapping of the IQ data in the CPRI basic frame comprises: constructing a mapping with the IQ data in a CPRI basic frame according to a current system and a bit width. The same information.

8. The method of claim 6, wherein arranging the IQ data using a storage unit comprises:

Sampling the IQ data;

Instructing the hardware to extract each bit of the IQ data of one clock cycle sampled separately; respectively writing each bit into a different storage unit;

All bits of the same carrier are read from the different memory cells in one clock cycle, and all of the bits are grouped into carrier data.

9. The method of claim 8, wherein reading all bits of the same carrier from the different storage units comprises:

The hardware is instructed by the register to read all bits of the same carrier from the different memory cells in one clock cycle.

The method according to any one of claims 6 to 9, wherein the storage unit is a RAM.

11. A data transmitting device, comprising:

a receiving module, configured to receive a public radio interface CPRI data;

a separation module configured to separate a control word in the CPRI data from orthogonal IQ data; a construction module configured to construct the same information as the mapping of the IQ data in a CPRI basic frame; an arrangement module configured to utilize storage The unit arranges the IQ data;

The sending module is set to send the arranged IQ data.