WO2013104154A1

WO2013104154A1 - Software downloading method and terminal

Info

Publication number: WO2013104154A1
Application number: PCT/CN2012/073838
Authority: WO
Inventors: 孙科军
Original assignee: 中兴通讯股份有限公司
Priority date: 2012-01-10
Filing date: 2012-04-11
Publication date: 2013-07-18
Also published as: CN102609325B; CN102609325A

Abstract

Disclosed is a software downloading method, comprising: making a flash memory undetectable by a master control chip or making the master control chip detect a failure of the flash memory when software downloading of a terminal fails or downloaded software cannot work normally; restarting the terminal, and opening an emergency downloading port when the master control chip cannot detect the flash memory or detects a failure of the flash memory; enabling the master control chip to detect a state of the flash memory normally and identify the flash memory, and continuing downloading software by using the emergency downloading port. Also disclosed is a terminal. By means of the present invention, software downloading can be quickly repaired after the software downloading fails, thereby ensuring smooth software downloading, improving software downloading efficiency, and facilitating the operation.

Description

Software download method and terminal

The present invention relates to software download technology, and in particular, to a software download method and a terminal. Background technique

With the continuous promotion of the communication industry, mobile terminal products have been widely used. Moreover, due to the rapid development of communication technology, users have higher and higher requirements for product functions, which requires continuous upgrade of the software of the product. When the software version finds a bug, it is generally solved by the software upgrade method. When the R&D personnel performs the version test verification, the version is debugged and verified by the software upgrade method. As the product increases, the software upgrade frequency also increases accordingly. During the upgrade process, if there is a power failure, a file corruption occurs during normal use, or there is a problem with the software version to be verified, etc., the terminal side software upgrade fails or fails to operate normally, so the terminal cannot If you work normally, you will not be able to upgrade and download. Therefore, the current stability requirements for upgrades and the ability to repair after upgrade failures are higher.

In the prior art, the terminal is generally upgraded by using a downloading tool on the personal computer (PC) side. After the upgrade fails, the PC side cannot perform direct repair. Although the software repair of the terminal can be completed through the JTAG method, the JTAG method is adopted. Special tools are required. These tools are expensive and can only be provided during research and development, or at a few after-sales service points. Therefore, there are few fixes for user upgrade failures. Moreover, in the version downloading process, due to a misoperation or a problem in the version itself, the download fails, and the download cannot be continued. At this time, only tools such as TRACE can be used for erasing and re-downloading, and the downloading efficiency is low and resources are caused. waste.

In addition, some terminal platforms currently have integrated NAND memory (FLASH). The controller, the main control chip will run a ROM code solidified in the chip at startup to detect and load the code in the NAND FLASH. If a problem is found in the process, the code in the ROM will enter the emergency download mode, providing a Emergency port available for download. Figure 1 is a schematic diagram of a process after a normal terminal is powered on. As shown in Figure 1, the process includes:

After booting up, the master chip jumps to the internal ROM and executes. The internal ROM is initialized accordingly. After the initialization is completed, the main control chip detects the NAND FLASH through the NAND FLASH controller, including whether the NAND FLASH exists and the effective detection and whether the boot loader (BOOTLOADER) exists and is effective. Detection

When the test passes, the master chip loads the BOOTLOADER code in the NAND FLASH into the memory, and runs the BOOTLOADER code loaded into the memory. The BOOT LOADER will eventually load the on-chip operating system and give control to the on-chip operating system. At this point, the entire terminal completes the boot process, and finally the operating system starts the upper application and provides the corresponding functions.

When the detection fails (such as: no NAND FLASH, no BOOTLOADER in NAND FLASH, or BOOTLOADER format is incorrect), the main control chip will jump to the emergency mode for processing. At this time, if connected to the PC, an emergency download port will appear. You can continue to download the code by using the specific PC side software.

It can be seen that when NAND FLASH exists and its BOOTLOADER format is correct, then NAND FLASH and BOOTLOADER will be able to pass the internal ROM detection, but if BOOTLOADER is just the format (code eigenvalue) is correct, the content is not correct, or BOOTLOADER is normal, the version of the operating system in NAND FLASH is incomplete or incorrect. In the end, the entire system can be detected by the internal ROM, but in fact the software on the board side does not work properly. In this case, the terminal side software will perform the normal startup process, but it will not work normally, and it will not be able to download and download the version under the normal process. In other words, when the ROM code detected in the chip is detected, it is generally only verified whether there is a code in the NAND FLASH, or only the feature value of the code is verified to be legal, and the entire code cannot be verified. Complete or there are errors and logic problems in the code. When the download fails or the version itself has problems, the data and code existing in the NAND FLASH may be incomplete or may have errors, but the feature value of the code is generally legal, so that the ROM code in the chip is cured when it is detected. It is very likely that it will pass the test and then run the NAND FLASH incomplete code. As a result, the terminal side software still cannot run normally, and it will not be able to continue downloading and downloading. Summary of the invention

In view of this, the main purpose of the present invention is to provide a software download method and a terminal, which can quickly perform repair after a software download failure, ensure smooth software downloading, improve software download efficiency, and are easy to operate.

To achieve the above objective, the technical solution of the embodiment of the present invention is implemented as follows:

A software download method, including:

When the software download on the terminal side fails or the downloaded software fails to work normally, the main control chip cannot detect the flash memory, or the main control chip detects that the flash memory is invalid.

After the terminal is restarted, the main control chip does not detect the flash memory or detects that the flash memory is invalid, and then opens the emergency download port;

The master chip can normally detect the flash state and recognize the flash memory, and then continue the software download using the emergency download port.

The master chip detects that the flash memory is invalid: the master chip detects that the state of the flash memory is busy during the set time.

The main control chip does not detect the flash memory, or causes the main control chip to detect the flash failure: by clicking the preset button, the main control chip does not detect the flash memory, or causes the main control chip to detect the flash memory failure.

The preset key controls a normally-on switch to be set on the EBI2_BUSY0_N pin of the flash memory, or a normally-closed switch that controls a connection between a power pin of the flash memory and the actual power source, or a CE_N pin that is controlled in the flash memory. a normally closed switch set on the connection line, or a normally closed switch that is set on a connection line of the RE_N pin of the flash memory, Alternatively, control the normally closed switch set on the connection line of the CLK pin of the flash memory, or control the normally open switch of the RST pin and ground connected to the flash memory.

A terminal includes a detection control unit, a main control chip, and a flash memory; wherein

The detection control unit is configured to prevent the main control chip from detecting the flash memory when the software download failure of the terminal side fails or the downloaded software fails to work normally, or cause the main control chip to detect that the flash memory is invalid; the main control chip is set to When the terminal is started, the flash memory is detected, and when the flash memory is not detected or the flash memory is detected, the emergency download port is turned on; after the flash memory status is normally detected and the flash memory is recognized, the software download is continued by using the emergency download port;

The flash memory is configured to store downloaded software data.

The detection control unit causes the main control chip to detect the flash memory, or causes the main control chip to detect the flash failure as: the preset control button prevents the main control chip from detecting the flash memory, or causes the main control chip to detect the flash failure.

The detecting control unit prevents the main control chip from detecting the flash memory through the preset key, or causes the main control chip to detect that the flash memory is invalid:

The preset key controls a normally-on switch to be set on the EBI2_BUSY0_N pin of the flash memory, or a normally-closed switch that controls a connection between a power pin of the flash memory and the actual power source, or a CE_N pin that is controlled in the flash memory. a normally closed switch provided on the connection line, or a normally closed switch that is set on a connection line of the RE_N pin of the flash memory, or a normally closed switch that is set on a connection line of the CLK pin of the flash memory, or Controls the normally open switch of the RST pin and ground connected to the flash memory.

The software downloading method and the terminal according to the embodiment of the present invention, when the terminal side software download fails or the downloaded software fails to work normally, the main control chip does not detect the flash memory, or causes the main control chip to detect the flash memory failure; after the terminal restarts, The master chip does not detect the flash memory or detects a flash failure. The emergency download port is enabled; the main control chip can normally detect the flash status and recognize the flash memory, and then the software download is continued by using the emergency download port. Through the embodiment of the present invention, after the software download fails, the repair can be quickly performed, the software download is ensured smoothly, the software downloading efficiency is improved, and the operation is simple. DRAWINGS

FIG. 1 is a schematic flowchart of a conventional terminal after a normal startup;

2 is a schematic flowchart of a software downloading method according to an embodiment of the present invention;

3 is a specific flowchart of an embodiment of a method according to the present invention;

4 is a schematic diagram of a hardware design principle according to an embodiment of the present invention;

FIG. 5 is a schematic diagram of another hardware design principle for implementing the present invention; FIG.

6 is a schematic diagram of still another hardware design principle for implementing the present invention;

7 is a schematic diagram of still another hardware design principle for implementing the present invention;

8 is a schematic diagram of still another hardware design principle for implementing the present invention;

9 is a schematic diagram of still another hardware design principle for implementing the present invention; detailed description

In order to solve the problem described in the background art, the present invention considers that a specific scenario is generated by hardware design. When the software download fails or the downloaded software cannot work normally, when the ROM code that is solidified in the main control chip is detected, it is considered The flash memory is invalid, or the flash memory is not detected. In this way, the flash memory will not be able to pass the detection of the code in the ROM, thereby causing the terminal to enter the emergency download mode, providing an emergency port for downloading, to continue the software download, thus, neither Re-download using tools like TRACE, and you don't need to fix it by JTAG.

The following is an example of NAND FLASH. However, the present invention is not limited to the case where NAND FLASH is stored, and can be applied to other flash memories for storage.

2 is a schematic flowchart of a software downloading method according to an embodiment of the present invention, as shown in FIG. 2, Methods include:

Step 201: The software download on the terminal side fails or the downloaded software does not work normally.

Step 202: The main control chip does not detect the NAND FLASH, or causes the main control chip to detect that the NAND FLASH is invalid.

Here, the causing the main control chip to detect the NAND FLASH, or causing the main control chip to detect the NAND FLASH failure may be: by pressing the preset button, the main control chip cannot detect the NAND FLASH, or the main control chip detects NAND FLASH is invalid.

Step 203: The terminal restarts, the main control chip does not detect the NAND FLASH or detects that the NAND FLASH is invalid, and then the emergency download port is enabled.

Here, if the master chip detects that the state of the NAND FLASH is busy during the set time, the NAND FLASH is considered to be invalid.

Step 204: Enable the master chip to normally detect the NAND FLASH state and identify the NAND FLASH.

Here, enabling the master chip to detect the NAND FLASH state and identify the NAND FLASH can be: Release the preset button so that the master chip can normally detect the NAND FLASH state and recognize the NAND FLASH _0.

Step 205: Continue the software download by using the emergency download port.

A specific flow chart of an embodiment of the method of the present invention is shown in FIG.

In order to realize the functions described above, hardware of the above functions can be constructed using low-cost electronic components. The purpose is to prevent the NAND FLASH from being detected in the ROM code of the chip or to detect that the NAND FLASH is invalid by simple control (such as clicking the button) when the download cannot be continued. The hardware device used will be described below, but is not limited to the following description and the accompanying drawings.

4 is a schematic diagram of a hardware design principle according to an embodiment of the present invention. As shown in FIG. 4, based on the Qualcomm MDM8200A platform, in hardware design, it can be in NAND FLASH. The EBI2_BUSY0_N pin is connected with the ground button Bl-BUTTON (fixed button). This button is a ground-to-ground normally open switch. In the figure, VCC_GENP is the pull-up power supply, and the resistor R is used to provide the pull-up for the EBI2_BUSY0_N of the NAND FLASH. It can be seen that when the NAND FLASH is idle, a high level signal is input to the main control chip for detecting the current state of the NAND FLASH.

When the repair button is not pressed, the EBI2_BUSY0_N pin of the NAND FLASH is normally connected to the master. Therefore, in the normal operation mode, this circuit does not affect the function of the terminal. When the repair button is pressed, the EBI2_BUSY0_N pin of the NAND FLASH is forced to a low level. At this time, the master detects that the NAND FLASH is always not ready and is always busy. Therefore, the master chip is in a certain state. After the time, it will be considered that NAND FLASH has failed, and the performance of the main control chip does not detect NAND FLASH.

It should be noted that, in design, the repair button is generally placed in a relatively hidden place, and it is not easy to be accidentally pressed under normal working conditions, and can only be touched when the upgrade cannot be performed by the normal method.

Based on the structure shown in FIG. 4, the flow of the present invention may be specifically as follows:

1) First press the designed button Bl -BUTTON. At this time, the EBI2_BUSY0_N of the NAND FLASH is forcibly pulled down to the ground. Therefore, regardless of whether the NAND FLASH is busy or not, its output to the master chip is always busy.

2) Then start up again, the main control chip will jump to the internal ROM and execute. After the internal ROM is initialized, the NAND FLASH and its BOOTLOADER are detected. However, since the button Bl-BUTTON is pressed, the state of the NAND FLASH fed back to the main control chip will always be busy before the button is released. When the main control chip detects NAND FLASH, it is found that NAND FLASH is always busy. After a period of time, the detection process will fail. It is considered that NAND FLASH has expired, and thus enters the emergency download process, and an emergency download port will appear.

3) After the emergency download port appears, in order to download the code to NAND FLASH, the button should be released, so that the main control chip can detect the NAND FLASH status and recognize it. NAND FLASH.

4) Finally, open the download software on the PC side, select the corresponding emergency download port, and continue to download and upgrade the version. After the upgrade is successful, restart it and start up according to the normal startup process.

FIG. 5 is a schematic diagram of another hardware design principle for implementing the present invention. As shown in FIG. 5, a normally closed switch is connected in a connection line between a power pin of a NAND FLASH and an actual power source. Generally, a normally closed switch is connected. Therefore, the power supply can normally supply power to the NAND FLASH, and does not affect the function of the NAND FLASH. When it can't be downloaded normally, just press the corresponding button to turn on the normally closed switch and then turn on the power. At this time, the power pin of NAND FLASH is disconnected from the power supply, the main control chip will not find NAND FLASH, or find NAND. FLASH is abnormal. At this time, the ROM code that is solidified in the chip will jump to the emergency download mode. After entering the emergency mode, release the button to make the NAND FLASH power on normally, thus achieving the download in the emergency mode.

6 is a schematic diagram of still another hardware design principle for implementing the present invention. As shown in FIG. 6, a normally closed switch is connected in a connection line of a CE_N pin of a NAND FLASH. In general, a normally closed switch is turned on. Therefore, it does not affect the function of NAND FLASH. Its implementation principle is similar to that of Figure 5. When it cannot be downloaded normally, just press the corresponding button, turn on the normally closed switch, and then start the power-on action, then you can enter the emergency mode to download.

7 is a schematic diagram of still another hardware design principle for implementing the present invention. As shown in FIG. 7, a normally closed switch is connected in a connection line of a RE_N pin of a NAND FLASH. Generally, a normally closed switch is turned on. Therefore, it does not affect the function of NAND FLASH. The implementation principle is similar to that of Figure 5. When the download is not possible, just press the corresponding button, turn on the normally closed switch, and then start the operation, then you can enter the emergency mode to download.

8 is a schematic diagram of still another hardware design principle for implementing the present invention. As shown in FIG. 8, a normally closed switch is connected in a connection line of the CLK pin of the NAND FLASH. Generally, the normally closed switch is turned on. Therefore, it does not affect the function of NAND FLASH. Its implementation principle and Figure 5 Similarly, when it is not possible to download normally, just press the corresponding button, turn on the normally closed switch, and then start the power-on action, then you can enter the emergency mode to download.

FIG. 9 is a schematic diagram of still another hardware design principle for implementing the present invention. As shown in FIG. 9, the RST pin of the NAND FLASH is connected to the ground through a normally open switch. Under normal circumstances, the normally open switch is disconnected, so it does not affect the function of NAND FLASH. When the download is not possible, just press the normally open switch and then turn on the power to enter the emergency mode for download.

The present invention further provides a terminal, which includes a detection control unit, a main control chip, and a flash memory;

The flash memory is configured to store downloaded software data.

It can be seen that the present invention can continue downloading by simply switching the switch or clicking a button after the software upgrade fails by using a low-cost hardware circuit. It does not require TRACE to re-download the version, nor does it need to be fixed by JTAG.

The above description is only the specific embodiments of the present invention and is not intended to limit the scope of the present invention.

Claims

Claim

A software download method, wherein the method comprises:

2. The software downloading method according to claim 1, wherein the master chip detects that the flash memory is invalid: the master chip detects that the state of the flash memory is busy during the set time.

The method according to claim 1 or 2, wherein the master chip does not detect the flash memory, or causes the master chip to detect that the flash memory is invalid: by clicking the preset button, the master chip cannot detect Flash, or cause the master chip to detect a flash failure.

4. The method according to claim 3, wherein the preset key controls a normally-on switch to the ground set on an EBI2_BUSY0_N pin of the flash memory,

Or, a normally-closed switch that controls the connection between the power pin of the flash memory and the actual power supply, or a normally-closed switch that is set on the connection line of the CE_N pin of the flash memory, or that is controlled by the RE_N pin of the flash memory. The normally closed switch set on the connection line, or the normally closed switch set on the connection line of the CLK pin of the flash memory, or the normally open switch of the RST pin and the ground connected to the flash memory.

5. A terminal, wherein the terminal comprises a detection control unit, a main control chip, and a flash memory;

The detection control unit is configured to prevent the main control chip from detecting the flash memory when the software download failure of the terminal side fails or the downloaded software fails to work normally, or cause the main control chip to detect that the flash memory is invalid; the main control chip is set to When the terminal is started, the flash memory is detected and cannot be detected. When the flash memory or the flash memory is detected to be invalid, the emergency download port is turned on; after the flash status is normally detected and the flash memory is recognized, the emergency download port is used to continue the software download;

The flash memory is configured to store downloaded software data.

The terminal according to claim 5, wherein the master chip detects that the flash memory is invalid: the master chip detects that the state of the flash memory is busy during the set time.

The terminal according to claim 5 or 6, wherein the detection control unit causes the main control chip to detect no flash memory, or causes the main control chip to detect that the flash memory is invalid: by the preset key, the main control chip detects no Go to the flash memory, or let the master chip detect the flash failure.

8. The terminal according to claim 7, wherein the detection control unit causes the main control chip to detect the flash memory by using the preset key, or causes the main control chip to detect that the flash memory is invalid: