WO2013097620A1 - Multipath load drive circuit - Google Patents

Abstract

The main object of the present invention is to provide a multipath load drive circuit which can reduce loss and lower costs and can balance the current among a plurality of paths of loads. The multipath load drive circuit includes: a series branch X, a coupling capacitor, an input power source Vin, wherein the connection manner is that the series branch X consists of n rectification filter units in series according to the principle that all the rectification units can be forward-biased simultaneously, the series branch X has a head end, a tail end and (n - 1) series nodes which are referred to as XJ1, XJ2, …, XJ (n - 1) successively, n being a natural number and being greater than or equal to 3, at least (n - 1) coupling capacitors are connected to the nodes XJ1, XJ2, …, XJ (n - 1) respectively, the other end of the coupling capacitor to which the odd nodes are connected are connected to the input power source, and the other end of the coupling capacitor to which the even nodes are connected are connected to a common line of the multipath load drive circuit.

Description

 Multiple load drive circuit  Multiple load drive circuit

 Technical field

The present invention relates to a drive circuit for multiple loads of the same magnitude.

 Background technique

In many applications, it is necessary to drive multiple loads at the same time, and the current of each load is required to be the same. The traditional method is to use a current adjustment unit in each load so that the current of each load is a set value. For the purpose of the same current, for example, in order to enable multiple LEDs to emit light at the same time, in order to achieve the same characteristics of the LEDs, it is required that the operating current of each LED is equal. The prior art requires the use of multiple current adjustment units, and there is a loss. The disadvantages of large and high cost are as shown in Figure 1.

 Summary of the invention

The main object of the present invention is to provide a multi-channel load driving circuit for reducing loss and reducing cost, and to balance the current of multiple loads, and the multi-channel load driving circuit includes: a series branch X, a coupling capacitor, an input power source Vin, and An additional voltage Vf can be included.

The connection mode is: the series branch X is composed of n rectifying and filtering units, which are connected in series according to the principle that all rectifying units can be forward biased at the same time. The series branch X has a head end and a tail end and n-1 series nodes, the series connection The nodes are called XJ1, XJ2, ... XJ(n-1), n is a natural number and is greater than or equal to 3. The principle that all rectifying units can be forward biased at the same time means that positive is applied at the leading and trailing ends of the series branch X. Voltage or negative voltage, there is always a voltage that causes the rectified portion of the series branch X to have a forward voltage.

The coupling capacitor includes two connection modes. Mode 1: At least n-1 only one end of the coupling capacitor is connected to the above nodes XJ1, XJ2, ... XJ(n-1), and the other end of the coupling capacitor connected to the odd node is connected to the input power, even The other end of the coupling capacitor connected to the node is connected to the common line of the multiple load driving circuits; mode 2: at least n-1 only one end of the coupling capacitor is connected to the above-mentioned series node XJ1, XJ2 ... XJ(n-1), even node The other end of the connected coupling capacitor is connected to the input power source, and the other end of the coupling capacitor connected to the odd node is connected to the common line of the multiple load driving circuits.

There are three connection modes at the head end and the tail end of the series branch X. The head end of the series branch X can be connected to the output end of Vin, and can be connected to a common line, and can also be connected with an additional voltage Vf. The end of the series branch X can be connected to the output of Vin, can be connected to the common line, and can also be connected to the additional voltage Vf.

When multiple load drive circuits need to reduce voltage and current surges, buffer components need to be connected to the circuit. The buffer components include magnetic beads, inductors, and RC absorption networks.

In a multi-load drive circuit, the input power Vin can output including DC pulses, AC pulses, which can be used by conventional BOOST, BUCK, BUCK-BOOST, SEPIC, CUK, ZETA circuits can produce partial output of pulse voltage, also can be used by traditional Flyback The Forward, Half-Bridge, Full-Bridge circuit produces a partial output of the pulse voltage.

The additional voltage Vf includes any voltage known, and can also be obtained by Vin rectification filtering, and can be connected to the series branch X. Used in series or in series with the load.

Load: The load includes DC-powered devices such as LEDs, resistors, and rechargeable batteries. Because of the coupling capacitor, the load short circuit does not cause input power. Vin fails, Vin's energy is stored in the coupling capacitor, and the load can be used to adjust the amount of load.

The rectifying and filtering unit comprises two parts: a rectifying unit and a filtering unit, see FIG. 2 The rectifying unit rectifies the input voltage into a fluctuating direct current, and the filtering unit smoothes the fluctuating direct current to a smooth direct current, drives the load to work, and the rectifying unit and the filtering unit are in a series relationship. According to the nature of the series circuit, the rectifying unit and the filtering unit can be interchanged. Position, this property is in the series branch X still exists, the rectifying unit is composed of at least one diode, and the filtering unit is composed of at least one capacitor. The present invention is simplified as shown in Fig. 3, and D1 represents a rectifying unit, C1 Indicates the filtering unit. Due to the coupling capacitance, the short circuit of the filter unit will not cause the input power supply Vin to fail. The energy will be stored in the coupling capacitor, and the number of loads can be adjusted by shorting the filter unit.

 DRAWINGS

 Figure 1 shows a traditional multi-channel load drive circuit.

 Figure 2 is a block diagram of the rectification and filtering unit.

Figure 3 shows the rectification and filtering unit.

Figure 4 shows a series branch X.

FIG. 5 is a schematic diagram of a circuit architecture of a first preferred embodiment of the present invention.

FIG. 6 is a schematic diagram of a circuit architecture of a second preferred embodiment of the present invention.

FIG. 7 is a schematic diagram of a circuit architecture of a third preferred embodiment of the present invention.

FIG. 8 is a schematic diagram of a circuit architecture of a fourth preferred embodiment of the present invention.

FIG. 9 is a schematic diagram of a circuit architecture of a fifth preferred embodiment of the present invention.

FIG. 10 is a schematic diagram of a circuit architecture of a sixth preferred embodiment of the present invention.

FIG. 11 is a schematic diagram of a circuit architecture of a seventh preferred embodiment of the present invention.

FIG. 12 is a schematic diagram of a circuit architecture of an eighth preferred embodiment of the present invention.

The reference numerals are as follows.

C0-1, C0-2, C0-3, C0-4, C0-5 multiple coupling capacitors.

C1-1, C1-2, C1-3, C1-4, C1-5, C1-6, C1-n Multiple filter units.

D1-1, D1-2, D1-3, D1-4, D1-5, D1-6, D1-n Multiple rectifier units.

Vin : Input power.

Vf, Vf1, Vf2, Vf3: additional voltage.

Load , Load1 ...... Loadn : Multiple loads.

 detailed description

Some exemplary embodiments embodying the features and advantages of the present invention are described in detail in the following description. It is to be understood that the invention is not limited by the description of the invention.

Please refer to FIG. 5 , which is a schematic diagram of a circuit architecture according to a first preferred embodiment of the present invention. As shown in FIG. 5 , this embodiment is a six-way load driving circuit, and the circuit includes: an input power source Vin, five coupling capacitors, and a series branch X. The connection mode is: the first end and the tail end of the series branch X are connected to the common line, the series node XJ1 of the series branch X is connected to the coupling capacitor C0-1, the series node XJ2 is connected to the coupling capacitor C0-2, and the series node XJ3 is connected. Coupling capacitor C0-3, series node XJ4 is connected to coupling capacitor C0-4, series node XJ5 is connected to coupling capacitor C0-5, and the other end of coupling coupling capacitors C0-1, C0-3, C0-5 of odd series is connected to input power At the output of Vin, the other ends of the coupling capacitors C0-2 and C0-4 of the even series of series nodes are connected to the common line. According to the above connection relationship, at least one coupling capacitor is connected in series between each rectifying and filtering unit and the input power source Vin. .

The schematic diagram of the circuit architecture of the first preferred embodiment of the present invention shown in FIG. 5 works as follows: when the output voltage of the input power source Vin rises, the current formed by the increased voltage passes through C0-1, D1-2, C1. -2, C0-2, form a stable DC voltage at both ends of C1-2, drive the load Load2 to work, the current formed by this elevated voltage passes through C0-3, D1-4, C1-4, C0-4 at the same time. A smooth DC voltage is formed at both ends of C1-4, and the load Load4 is driven to work. The current formed by the increased voltage is simultaneously returned to the common line through C0-5, D1-6, and C1-6, and formed at both ends of C1-6. The smooth DC voltage drives the load Load6 to work; when the output voltage of the input power supply Vin decreases, the reduced voltage forms a current through D1-1, C1-1, C0-1, forming a smooth DC at both ends of C1-1. The voltage drives the load Load1 to work. The current formed by this reduced voltage simultaneously passes through C0-2, D1-3, C1-3, C0-3, forming a smooth DC voltage across C1-3, driving the load Load3 to work. The reduced voltage forms the current through both C0-4, D1-5, C1-5, C0-5 A smooth DC voltage is formed at both ends of C1-5 to drive the load Load5. It can be seen that the energy of the load is indirectly supplied through the coupling capacitor, and the coupling capacitor charges to a higher voltage when the load current is large. The load current is reduced, and the coupling capacitor charges to a lower voltage when the load current is small, so that the load current becomes larger, thereby balancing the currents of the plurality of loads.

6 is a schematic diagram of a circuit architecture of a second preferred embodiment of the present invention. As shown in FIG. 6, this embodiment is a six-way load driving circuit, and the circuit includes: an input power source Vin, five coupling capacitors, and a series branch X. The connection mode is: the first end and the tail end of the series branch X are connected to the Vin output end, the series node XJ1 of the series branch X is connected to C0-1, the series node XJ2 is connected to C0-2, and the series node XJ3 is connected to C0-3. The series node XJ4 is connected to C0-4, the series node XJ5 is connected to C0-5, the other end of the coupling capacitors C0-1, C0-3, C0-5 of the odd series node is connected to the common line, and the coupling capacitance C0 of the even series node is connected. The other end of -2 and C0-4 is connected to the Vin output. According to the above connection relationship, at least one coupling capacitor is connected in series between each rectifying and filtering unit and the input power source Vin.

The schematic diagram of the circuit architecture diagram of the second preferred embodiment of the present invention shown in FIG. 6 is: when the output voltage of the input power source Vin rises, the current formed by the boosted voltage passes through D1-1, C1-1, C0. -1 , a smooth DC voltage is formed at both ends of C1-1 to drive the load Load1 to work. The current generated by this elevated voltage passes through C0-2, D1-3, C1-3, C0-3 at the same time. A stable DC voltage is formed at both ends to drive the load Load3. The current formed by the increased voltage is simultaneously returned to the common line through C0-4, D1-5, C1-5, C0-5, and formed at both ends of C1-5. The smooth DC voltage drives the load Load5 to work; when the output voltage of the input power Vin decreases, the reduced voltage forms a current through C0-1, D1-2, C1-2, C0-2, at both ends of C1-2. Forming a smooth DC voltage, driving the load Load2 to work, the current formed by the reduced voltage simultaneously passes through C0-3, D1-4, C1-4, C0-4, forming a smooth DC voltage across C1-4, driving the load Load4 works, the current formed by this reduced voltage passes through C0-5, D1-6, C1-6 simultaneously Formed at both ends C1-5 smooth DC voltage for driving a load Load6 work, preferably the same as the first embodiment shown a plurality of current load balancing principle embodiment of FIG.

Please refer to FIG. 7 , which is a schematic diagram of a circuit architecture according to a third preferred embodiment of the present invention. As shown in FIG. 7 , this embodiment is a four-way load driving circuit, and the circuit includes: an input power source Vin, four coupling capacitors, and a series branch circuit. X, the connection mode is: the first end of the series branch X is connected to the Vin output end, the tail end of the series branch X is connected to the common line, the series node XJ1 of the series branch X is connected to C0-1, and the series node XJ2 is connected to C0-2 The series node XJ3 is connected to C0-3, the series node XJ4 is connected to C0-4, the other end of the coupling capacitors C0-1 and C0-3 of the odd series connection is connected to the Vin output terminal, and the coupling capacitance C0-2 of the even series connection node is The other end of C0-4 is connected to the common line. In the series branch X, the filtering unit C1-1 is short-circuited. According to the above connection relationship, at least one coupling capacitor is connected in series between each rectifying and filtering unit and the input power source Vin.

The schematic diagram of the circuit architecture diagram of the third preferred embodiment of the present invention shown in FIG. 7 is: when the output voltage of the input power source Vin is increased, since C1-1 is short-circuited, the voltage of Vin passes through D1-1 to charge C0- 1 , the voltage across C0-1 is approximately equal to Vin, and the current formed by the voltage raised by Vin above simultaneously passes through C0-2, D1-3, C1-3, C0-3, forming a stable DC voltage at both ends of C1-3. The driving load Load3 works, and the current formed by the rising voltage of the above Vin returns to the common line through C0-4, D1-5, and C1-5, and forms a stable DC voltage at both ends of C1-5 to drive the load Load5 to work; When the output voltage of the input power supply Vin is lowered, the voltage stored by C0-1 passes through D1-2, C1-2, C0-2, and a stable DC voltage is formed across C1-2 to drive the load Load2 to work. When the Vin voltage is lowered The formed current passes through C0-3, D1-4, C1-4, C0-4 at the same time, forming a stable DC voltage at both ends of C1-4, driving the load Load4 to work, because the voltage of C0-1 is similar to Vin, so The current of the load is larger than when C1-1 is not short-circuited, and the current of multiple loads is balanced. Processing the first preferred embodiment shown in Figure 5 the same embodiment.

Please refer to FIG. 8 , which is a schematic diagram of a circuit architecture of a fourth preferred embodiment of the present invention. As shown in FIG. 8 , this embodiment is modified from the first embodiment shown in FIG. 5 , and the difference is that the serial branch X is formed. Among the rectifying and filtering units, the rectifying units to which D1-2, D1-4, and D1-6 belong are interchanged with the filtering units of C1-2, C1-4, and C1-6, respectively, and the remaining connection modes are the same as the first embodiment. Similarly, due to the series relationship between the rectifying unit and the filtering unit, the above two unit interchange positions do not change the working principle of this example.

The circuit structure diagram of the fourth preferred embodiment of the present invention shown in FIG. 8 works as follows: when the output voltage of the input power source Vin rises, the current formed by the boosted voltage passes through C0-1, C1-2, and D1. -2, C0-2, form a stable DC voltage at both ends of C1-2, drive the load Load2 to work, the current formed by this elevated voltage passes through C0-3, C1-4, D1-4, C0-4 at the same time. A smooth DC voltage is formed at both ends of C1-4 to drive the load Load4 to work. The current formed by this increased voltage is simultaneously returned to the common line through C0-5, C1-6, and D1-6, forming at both ends of C1-6. The smooth DC voltage drives the load Load6 to work; the rest of the work process is the same as the first embodiment shown in Figure 5. It can be seen that the rectifier units to which D1-2, D1-4, and D1-6 belong are respectively associated with C1-2. The C1-4 and C1-6 filter units are interchanged and the working principle is not changed.

Please refer to FIG. 9 , which is a schematic diagram of a circuit architecture of a fifth preferred embodiment of the present invention. As shown in FIG. 9 , this embodiment is changed from the first embodiment shown in FIG. 5 , and the difference is: the output end of the input power source Vin Connect an inductor Lin in series, the output of the input power Vin is connected to one end of the inductor Lin, the other end of Lin is called the output of Lin, and the other end of the coupling capacitors C0-1, C0-3, C0-5 of the odd series node The output of the inductor Lin is connected, and the remaining connections are the same as in the first embodiment.

The working principle of the circuit architecture diagram of the fifth preferred embodiment of the present invention shown in FIG. 9 is the same as that of the first embodiment shown in FIG. 5, except that the current change rate flowing through Vin is reduced by the limitation of the inductance Lin. Therefore, the high frequency noise and the current stress of the embodiment can be optimized. It can be seen that in any of the multiple load driving circuits of the present invention, the inductance and the magnetic beads can be connected to limit the current change rate of the component to optimize the high. Frequency noise and current stress.

Please refer to FIG. 10 , which is a schematic diagram of a circuit architecture of a sixth preferred embodiment of the present invention. As shown in FIG. 10 , this embodiment is a four-way load driving circuit, and the circuit includes: an input power source Vin, three coupling capacitors, and a series branch circuit. X, the connection mode is: the first end and the tail end of the series branch X are connected to the common line, the series node XJ1 of the series branch X is connected to the coupling capacitor C0-1, the series node XJ2 is connected to the coupling capacitor C0-2, and the series node XJ3 Connect the coupling capacitor C0-3, the other end of the coupling capacitors C0-1 and C0-3 of the odd series connection is connected to the output of the input power supply Vin, and the other end of the coupling capacitor C0-2 of the even series connection is connected to the common line, the load Load4 is connected in series with the current adjustment unit, and the load Load4 is driven by the output voltage of C1-4. According to the above connection relationship, at least one coupling capacitor is connected in series between each rectification and filtering unit and the input power source Vin.

The schematic diagram of the circuit architecture diagram of the sixth preferred embodiment of the present invention shown in FIG. 10 is: when the output voltage of the input power source Vin rises, the current formed by the boosted voltage passes through C0-1, D1-2, C1. -2, C0-2, form a smooth DC voltage at both ends of C1-2, drive the load Load2 to work, the current generated by this elevated voltage passes through C0-3, D1-4, C1-4 at C1-4 A stable DC voltage is formed at both ends, and after the current is adjusted by the current adjustment unit, the load Load4 is driven; when the output voltage of the input power source Vin is decreased, the current formed by the reduced voltage passes through D1-1, C1-1, C0- 1. A stable DC voltage is formed at both ends of C1-1 to drive the load Load1. The current formed by the reduced voltage passes through C0-2, D1-3, C1-3, C0-3 at both ends of C1-3. The principle of forming a smooth DC voltage, driving the load Load3 to operate, and balancing the currents of the plurality of loads is the same as that of the first preferred embodiment shown in FIG.

Please refer to FIG. 11 , which is a schematic diagram of a circuit architecture of a seventh preferred embodiment of the present invention. As shown in FIG. 11 , this embodiment is a six-way load driving circuit, and the circuit includes: an input power source Vin, five coupling capacitors, and a series branch X. The connection mode is: the first end of the series branch X is connected to one end of the additional voltage Vf1, the other end of Vf1 is connected to the common line; the load Load6 is connected in series with one end of the additional voltage Vf3, and the other end of the Vf3 is connected with the end of the series branch X Connect, the end is connected to one end of the additional voltage Vf2, the other end of Vf2 is connected to the common line; the series node XJ1 of the series branch X is connected to the coupling capacitor C0-1, the series node XJ2 is connected to the coupling capacitor C0-2, and the series node XJ3 is connected to the coupling capacitor C0 -3, the series node XJ4 is connected to the coupling capacitor C0-4, the series node XJ5 is connected to the coupling capacitor C0-5, and the other end of the coupling capacitors C0-1, C0-3, C0-5 of the odd series connection is connected to the output of the input power source Vin The other end of the coupling capacitors C0-2 and C0-4 of the even-numbered series node is connected to the common line. It can be known from the above connection relationship that each rectifying and filtering unit is connected with the input power source Vin. At least one coupling capacitor.

The schematic diagram of the circuit architecture diagram of the seventh preferred embodiment of the present invention shown in FIG. 11 is: when the output voltage of the input power source Vin rises, the current formed by the boosted voltage passes through C0-1, D1-2, C1. -2, C0-2, form a stable DC voltage at both ends of C1-2, drive the load Load2 to work, the current formed by this elevated voltage passes through C0-3, D1-4, C1-4, C0-4 at the same time. A smooth DC voltage is formed at both ends of C1-4 to drive the load Load4 to work. The current formed by this increased voltage is simultaneously returned to the common line through C0-5, D1-6, C1-6, and Vf2, in C1-6. The terminal forms a smooth DC voltage containing the Vf2 voltage value, and drives the load Load6 to work together with Vf3. When the output voltage of the input power source Vin decreases, the reduced voltage forms a current together with the voltage of Vf1 through D1-1, C1-1. , C0-1 , forming a smooth DC voltage at both ends of C1-1, driving the load Load1 to work, the current formed by this reduced voltage passes through C0-2, D1-3, C1-3, C0-3 at C1- 3 A stable DC voltage is formed at both ends to drive the load Load3 to work. The current formed by the voltage simultaneously passes through C0-4, D1-5, C1-5, C0-5, forming a smooth DC voltage at both ends of C1-5, driving the load Load5 to work, balancing the current of multiple loads and Figure 5 The first preferred embodiment shown is the same.

12 is a schematic diagram of a circuit architecture of an eighth preferred embodiment of the present invention. As shown in FIG. 12, this embodiment is a six-way load driving circuit, and the circuit is similar to the first embodiment shown in FIG. A series connection branch X is formed by using another known rectification filtering unit. The embodiment includes: an input power source Vin, five coupling capacitors, and a series branch X, and the connection manner is: the head end and the tail of the series branch X The terminals are connected to the common line, the series node XJ1 of the series branch X is connected to the coupling capacitor C0-1, the series node XJ2 is connected to the coupling capacitor C0-2, the series node XJ3 is connected to the coupling capacitor C0-3, and the series node XJ4 is connected to the coupling capacitor C0-4. The series node XJ5 is connected to the coupling capacitor C0-5, and the other end of the coupling capacitors C0-1, C0-3, C0-5 of the odd series connection is connected to the output terminal of the input power source Vin, and the coupling capacitor C0-2 of the even series node is connected. The other end of C0-4 is connected to the common line. According to the above connection relationship, at least one coupling capacitor is connected in series between each rectifying and filtering unit and the input power source Vin.

The schematic diagram of the circuit architecture diagram of the eighth preferred embodiment of the present invention shown in FIG. 12 is: when the output voltage of the input power source Vin rises, the current formed by the boosted voltage passes through C0-1, D1-2, C1. -2, D2-2, C0-2, form a smooth DC voltage at both ends of C1-2, drive load Load2 to work, the current formed by this elevated voltage passes through C0-3, D1-4, C1-4, D2-4 and C0-4 form a stable DC voltage at both ends of C1-4, driving the load Load4 to work. The current generated by this increased voltage passes through C0-5, D1-6, C1-6, D2-6 at the same time. Returning to the common line, a smooth DC voltage is formed at both ends of C1-6 to drive the load Load6 to work; when the output voltage of the input power supply Vin is lowered, the reduced voltage forms a current through D1-1, C1-1, D2- 1, C0-1, form a stable DC voltage at both ends of C1-1, drive the load Load1 to work, the current formed by this reduced voltage passes through C0-2, D1-3, C1-3, D2-3, C0- 3, a stable DC voltage is formed at both ends of C1-3, driving load Load3 works, and the reduced voltage forms electricity At the same time, through C0-4, D1-5, C1-5, D2-5, C0-5, a stable DC voltage is formed at both ends of C1-5, and the load Load5 is driven to work. The rectification and filtering unit of this structure allows adjacent loads. The positive electrode is connected to the positive electrode or the negative electrode is connected to the negative electrode to form a common positive electrode or a common negative electrode. The principle of balancing the current of a plurality of loads is the same as that of the first preferred embodiment shown in FIG.

In summary, the multi-channel load driving circuit of the present invention uses a different driving method than the conventional one. The present invention can drive two, three, four, five, six, and n ways in the same current. load.

It should be understood that the above-described embodiments are merely illustrative of the invention, and are not to be construed as limiting the invention, and that the invention may be variously modified and modified without departing from the spirit and scope of the invention. Without departing from the scope of the appended claims.

Claims (10)

1. The multi-channel load driving circuit comprises: a series branch X and a coupling capacitor, wherein the series branch X is composed of n rectifying and filtering units, which are connected in series according to the principle that all rectifying units can be forward biased at the same time, the series branch X has a head end and a tail end and n-1 series nodes, which are sequentially called XJ1, XJ2 ... XJ(n-1), n is a natural number and is greater than or equal to 3; at least n-1 only one end of the coupling capacitor Connect the above-mentioned series nodes XJ1, XJ2 ... XJ(n-1).
2. The multiple load driving circuit according to claim 1, wherein the other end of the coupling capacitor connected to the odd node is connected to the output end of the input power source Vin, and the other end of the coupling capacitor connected to the even node is connected to the multiple load driving. The common line of the circuit.
3. The multi-path load driving circuit according to claim 1, wherein the other end of the coupling capacitor connected to the even-numbered node is connected to the output end of the input power source Vin, and the other end of the coupling capacitor connected to the odd-numbered node is connected to the multi-path load driving. The common line of the circuit.
4. A multiple load driving circuit according to claim 1, wherein the head end of the series branch X is connected to the output terminal of the input power source Vin.
5. A multiple load drive circuit according to claim 1, wherein the head end of the series branch X is connected to a common line.
6. A multiple load driving circuit according to claim 1, wherein the head end of the series branch X is connected to an additional voltage Vf.
7. A multiple load driving circuit according to claim 1, wherein the tail end of the series branch X is connected to the output terminal of the input power source Vin.
8. The multiple load drive circuit of claim 1 wherein the tail ends of the series branches X are connected to a common line.
9. The multiple load driving circuit according to claim 1, wherein the tail end of the series branch X is connected to the additional voltage Vf.
10. The multiple load driving circuit of claim 1 wherein the components of the multiple load driving circuit are coupled to the buffering element to reduce voltage and current surges. The buffering component comprises a magnetic bead, an inductor, and a RC absorption network.

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