WO2013097182A1 - 无线数字通信系统及其中的数据率误差补偿方法 - Google Patents

无线数字通信系统及其中的数据率误差补偿方法 Download PDF

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WO2013097182A1
WO2013097182A1 PCT/CN2011/085037 CN2011085037W WO2013097182A1 WO 2013097182 A1 WO2013097182 A1 WO 2013097182A1 CN 2011085037 W CN2011085037 W CN 2011085037W WO 2013097182 A1 WO2013097182 A1 WO 2013097182A1
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data rate
module
communication system
receiving end
transmitting end
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PCT/CN2011/085037
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English (en)
French (fr)
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梁锦泉
徐仁德
黄炳原
楚斐韬
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宝添管理有限公司
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Priority to PCT/CN2011/085037 priority Critical patent/WO2013097182A1/zh
Publication of WO2013097182A1 publication Critical patent/WO2013097182A1/zh

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/0001—Systems modifying transmission characteristics according to link quality, e.g. power backoff
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/0262—Arrangements for detecting the data rate of an incoming signal

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  • the present invention relates to wireless communications, and more particularly to a wireless digital communication and a data rate error compensation method therefor.
  • the analog signal When transmitting an analog signal by using a wireless digital communication system, the analog signal is first converted into a digital signal at the transmitting end, and then the digital signal is sequentially subjected to source coding, channel coding, and modulation, and then transmitted to the outside, and the receiving end receives the signal in turn. Demodulation, channel decoding, and source decoding restore the digital signal, which in turn converts the digital signal to an analog signal.
  • high frequency oscillating signals are used.
  • the high frequency oscillating signals at the transmitting and receiving ends should have the same frequency and be synchronized, however there is actually a very small error between the oscillators.
  • a buffer is usually provided.
  • the amount of data at the transmitting end and the receiving end may cause an error, which may cause the buffer to overflow.
  • a wireless digital communication system is also provided.
  • a data rate error compensation method in a wireless digital communication system comprising the steps of: converting an analog signal into a digital signal at a transmitting end, and sequentially performing source coding, channel coding, modulation, and finally transmitting a wireless signal; receiving at a receiving end The wireless signal is sequentially demodulated, channel decoded, and source decoded to obtain a digital signal, and finally the digital signal is converted into an analog signal output; the data rate error of the transmitting end and the receiving end is detected; and the transmitting is adjusted according to the data rate error.
  • the data rate of the terminal or receiver comprising the steps of: converting an analog signal into a digital signal at a transmitting end, and sequentially performing source coding, channel coding, modulation, and finally transmitting a wireless signal; receiving at a receiving end The wireless signal is sequentially demodulated, channel decoded, and source decoded to obtain a digital signal, and finally the digital signal is converted into an analog signal output; the data rate error of the transmitting end and the receiving end is detected;
  • the step of detecting a data rate error of the transmitting end and the receiving end comprises: a statistical transmitting data rate, the transmitting data rate is a data amount of the transmitting end in a unit time; and a statistical receiving data rate, the receiving data rate The amount of data in the unit time of the receiving end; the difference between the transmitting data rate and the received data rate is taken as the data rate error.
  • the step of adjusting the data rate of the transmitting end or the receiving end according to the data rate error is specifically: reducing the transmitting data rate at the transmitting end.
  • the step of adjusting the data rate of the transmitting end or the receiving end according to the data rate error is specifically: increasing the transmitting data rate at the transmitting end.
  • the transmission data rate is adjusted at the transmitting end, specifically by adjusting the sampling - This is achieved by maintaining the sampling duration in the frequency.
  • the step of adjusting the data rate of the transmitting end or the receiving end according to the data rate error is specifically: reducing the receiving data rate at the receiving end.
  • the step of adjusting the data rate of the transmitting end or the receiving end according to the data rate error is specifically: increasing the receiving data rate at the receiving end.
  • the receiving end adjusts the received data rate by specifically: adjusting L/R The overall frequency of the clock.
  • a wireless digital communication system includes a transmitting end and a receiving end, the transmitting end includes an analog-to-digital conversion module, a source coding module, a channel coding module, and a modulation module, and the receiving end includes a demodulation module, a channel decoding module, and a signal.
  • the source decoding module and the digital-to-analog conversion module; the analog signal is converted into a digital signal by an analog-to-digital conversion module, and is sequentially subjected to source coding by the source coding module, channel coding by the channel coding module, and modulation of the modulation module to transmit the wireless signal.
  • the wireless signal After the wireless signal is demodulated by the demodulation module, it is decoded by the channel decoding module and decoded by the source decoding module to obtain a digital signal, and finally the analog signal is obtained by the digital-to-analog conversion module, which is characterized in that the data rate is further included.
  • An error detection module configured to detect a data rate error of the transmitting end and the receiving end; and a controller, configured to adjust a data rate of the transmitting end or the receiving end according to the data rate error.
  • the data rate error detection module includes a transmit data rate statistics module for counting a transmit data rate and a receive data rate statistics module for a statistical receive data rate; wherein the transmit data rate is at a transmit end per unit time
  • the amount of data within the received data rate is the data amount of the receiving end per unit time, and the difference between the transmitted data rate and the received data rate is used as the data rate error.
  • the controller controls the transmitting end to decrease the transmit data rate.
  • the controller controls the transmitting end to increase the transmit data rate when the data rate error is less than zero.
  • the analog to digital conversion module is a successive approximation register type architecture, and the controller controls the analog to digital conversion module to adjust sampling - The sampling duration in the frequency is maintained to adjust the transmit data rate at the transmitting end.
  • the controller controls the receiving end to increase the received data rate.
  • the controller controls the receiving end to decrease the received data rate.
  • the digital-to-analog conversion module is controlled by an L/R clock, and the controller controls the digital-to-analog conversion module to adjust L/R
  • the overall frequency of the clock is used to adjust the receive data rate at the receiving end.
  • the above method and system can compensate the error of the oscillator by detecting the data rate error and adjusting the data rate of the transmitting end and the receiving end according to the data rate error to match the two.
  • FIG. 1 is a block diagram of a wireless digital communication system of an embodiment
  • Figure 2 (a) to Figure 2 (c) are schematic diagrams for adjusting the sampling duration
  • Figure 3 (a) to Figure 3 (c) are schematic diagrams for adjusting the overall frequency of the L/R clock
  • FIG. 4 is a flow chart of a data rate error compensation method in a wireless digital communication system according to an embodiment.
  • FIG. 1 it is a wireless digital communication system of an embodiment.
  • the system includes a transmitting end 100 and a receiving end 200.
  • Transmitter 100 The analog to digital conversion module 110, the source coding module 120, the channel coding module 130, and the modulation module 140 are sequentially connected.
  • the receiving end 200 includes a demodulation module 210 The channel decoding module 220, the source decoding module 230, and the digital to analog conversion module 240.
  • the analog signal is converted to a digital signal by analog-to-digital conversion module 110, and sequentially passed through source coding module 120.
  • the source code is encoded, channel coded by the channel coding module 130, and modulated by the modulation module 140 to transmit a wireless signal.
  • the received wireless signal is demodulated by the module 210. After demodulation, it is decoded by the channel decoding module 220 and decoded by the source decoding module 230 to obtain a digital signal, and finally the analog signal is obtained by the digital-to-analog conversion module 240.
  • the data rate error detecting module 300 detects the transmitting end 100 and the receiving end 200 The data rate error is determined to determine whether the transmit data transmitted by the transmitting end 100 and the receiving end 200 match the data.
  • Data rate error detection module 300 Specifically, it includes a transmit data rate statistics module 310 for counting transmit data rates and a receive data rate statistics module 320 for counting received data rates.
  • the transmit data rate statistics module 310 is connected to the analog to digital conversion module. Between 110 and the source coding module 120, the amount of data of the transmitting end 100 in a unit time is counted, that is, the data rate is transmitted.
  • Receive data rate statistics module 320 is connected to the source decoding module 230 Between the digital-to-analog conversion module 240, the amount of data of the receiving end 200 in a unit time is counted, that is, the received data rate. The difference between the transmission data rate and the reception data rate is taken as the data rate error.
  • the above data rate error is sent to the controller 400 via a command channel. Controller 400
  • the data rate of the transmitting end 100 or the receiving end 200 is adjusted according to the data rate error to match the transmission data of the transmitting end 100 and the receiving data of the receiving end 200.
  • the controller 400 controls the transmitting end 100. Reduce the transmit data rate. When the data rate error is less than zero, the controller 400 controls the transmitting end 100 to increase the transmission data rate.
  • the analog-to-digital conversion module 110 is used as an example of a successive approximation register type architecture to illustrate the controller. 400 Adjusts the way the transmit data rate of the transmit end 100 is transmitted.
  • the analog-to-digital conversion module 110 of the successive approximation register type architecture it generally uses a sample-and-hold clock to sample, quantize, and then analog-to-digital conversion.
  • FIG 2 (a) to Figure 2 (c) is a schematic diagram of adjusting the sampling duration.
  • the sampling duration is 4 clock cycles.
  • the sampling duration is For 3 clock cycles, in Figure 2 (c), the sample duration is 5 clock cycles.
  • the controller 400 controls the analog to digital conversion module. 110 Adjust the sample duration to 3 clock cycles. When the data rate error is less than zero, the controller 400 controls the analog to digital conversion module 110 to adjust the sampling duration to 5 Clock cycle. In order to achieve the purpose of reducing the transmission data rate and increasing the transmission data rate, respectively.
  • the transmitting end can also be adjusted by adjusting the receiving data rate of the receiving end 200.
  • the transmission data and the receiving end 200 match the speed of the received data.
  • the controller 400 controls the receiving end 200. Increase the receiving data rate.
  • the controller 400 controls the receiving end 200 to decrease the received data rate.
  • digital to analog conversion module 240 in use L / R
  • the controller 400 adjusts the receiving data rate of the receiving end 200.
  • L/R The overall frequency of the clock is used to adjust the received data rate.
  • FIG 3 (a) to Figure 3 (c) it is a schematic diagram of adjusting the overall frequency of the L/R clock.
  • L/R The overall frequency of the clock is 96KHz.
  • the overall frequency of the L/R clock is 95.427KHz.
  • the overall frequency of the L/R clock is 95.579KHz.
  • the controller 400 controls the digital to analog conversion module 240. Adjust the overall frequency of the L/R clock to 96KHz. When the data rate error is less than zero, the controller 400 controls the digital to analog conversion module 240 to adjust the overall frequency of the L/R clock to 95.427KHz. In order to achieve the purpose of increasing the receiving data rate and reducing the receiving data rate, respectively.
  • FIG. 4 it is a flowchart of a data rate error compensation method in a wireless digital communication system of an embodiment. The method comprises the following steps:
  • the transmission data rate and the reception data rate are counted, and the difference between the transmission data rate and the reception data rate is taken as the data rate error.
  • the transmit data rate is a data amount of the transmitting end in a unit time
  • the received data rate is a data amount of the receiving end in a unit time.
  • the transmission data rate is calculated by S110, and the received data rate is counted while performing step S120.
  • step S140 determining whether the data rate error is greater than zero, if yes, executing step S150, otherwise performing step S160 .
  • S150 Reduce the transmission data rate at the transmitting end and/or increase the receiving data rate at the receiving end.
  • S160 Increase the transmission data rate at the transmitting end and/or decrease the receiving data rate at the receiving end.
  • the transmission data rate is adjusted by adjusting the sampling - This is achieved by maintaining the sampling duration in the frequency.
  • the receiving end when the L/R clock is used for digital-to-analog conversion, the receiving end adjusts the received data rate by specifically: adjusting L/R The overall frequency of the clock.
  • the above method and system can compensate the error of the oscillator by detecting the data rate error and adjusting the data rate of the transmitting end and the receiving end according to the data rate error to match the two.

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Abstract

本发明公开一种无线数字通信系统中的数据率误差补偿方法，包括如下步骤：在发射端将模拟信号转换为数字信号，并依次进行信源编码、信道编码、调制，最终发射无线信号；在接收端接收所述无线信号，并依次解调、进行信道解码、信源译码得到数字信号，最终将数字信号转换为模拟信号输出；检测发射端和接收端的数据率误差；根据所述数据率误差调整发射端或接收端的数据率。此外，还公开一种无线数字通信系统。上述方法和系统能够补偿发射端和接收端的振荡器之间的误差。

Description

无线数字通信系统及其中的数据率误差补偿方法
【技术领域】
本发明涉及无线通信，尤其是涉及一种无线数字通信及其中的数据率误差补偿方法。
【背景技术】
在利用无线数字通信系统传输模拟信号时，首先在发射端将模拟信号转换为数字信号，然后将数字信号依次进行信源编码、信道编码以及调制后向外发射，接收端接收到信号之后则依次解调、信道译码以及信源解码还原数字信号，进而将数字信号转换为模拟信号。
在调制和解调时，均采用高频振荡信号。发射端和接收端的高频振荡信号应该具有相同的频率且同步，然而振荡器之间实际上存在着极小的误差。
另一方面，在发射端和接收端传输信号的过程中，为了保证信号发送及接收的连续性，通常都设置缓冲器。
当发射端和接收端的振荡器存在误差时，发送端和接收端的数据量会产生误差，会导致缓冲器溢出的情况。
【发明内容】
基于此，有必要提供一种能够补偿振荡器误差的无线数字通信中的数据率误差补偿方法。
此外，还提供一种无线数字通信系统。
一种无线数字通信系统中的数据率误差补偿方法，包括如下步骤：在发射端将模拟信号转换为数字信号，并依次进行信源编码、信道编码、调制，最终发射无线信号；在接收端接收所述无线信号，并依次解调、进行信道解码、信源译码得到数字信号，最终将数字信号转换为模拟信号输出；检测发射端和接收端的数据率误差；根据所述数据率误差调整发射端或接收端的数据率。
优选地，所述检测发射端和接收端的数据率误差的步骤具体包括：统计发射数据率，所述发射数据率为发射端在单位时间内的数据量；统计接收数据率，所述接收数据率为接收端在单位时间内的数据量；将发射数据率和接收数据率的差值作为所述数据率误差。
优选地，当所述数据率误差大于零时，根据所述数据率误差调整发射端或接收端的数据率的步骤具体为：在发射端降低发射数据率。
优选地，当所述数据率误差小于零时，根据所述数据率误差调整发射端或接收端的数据率的步骤具体为：在发射端提高发射数据率。
优选地，在采用逐次逼近方式将模拟信号转换为数字信号时，在发射端调整发射数据率具体是通过调整采样 - 保持频率中的采样持续时间来实现。
优选地，当所述数据率误差大于零时，根据所述数据率误差调整发射端或接收端的数据率的步骤具体为：在接收端降低接收数据率。
优选地，当所述数据率误差小于零时，根据所述数据率误差调整发射端或接收端的数据率的步骤具体为：在接收端提高接收数据率。
优选地，在使用 L/R 时钟进行数模转换时，接收端调整接收数据率具体是：调整 L/R 时钟的整体频率。
一种无线数字通信系统，包括发射端和接收端，所述发射端包括模数转换模块、信源编码模块、信道编码模块以及调制模块，所述接收端包括解调模块、信道解码模块、信源译码模块以及数模转换模块；模拟信号经模数转换模块转换为数字信号，并依次经信源编码模块进行信源编码、经信道编码模块进行信道编码、经调制模块调制后发射无线信号；所述无线信号接解调模块解调后，依次由信道解码模块解码、信源译码模块译码后得到数字信号，最终经数模转换模块得到模拟信号，其特征在于，还包括数据率误差检测模块，用于检测发射端和接收端的数据率误差；以及控制器，用于根据所述数据率误差调整发射端或接收端的数据率。
优选地，所述数据率误差检测模块包括用于统计发射数据率的发射数据率统计模块和用于统计接收数据率的接收数据率统计模块；其中，所述发射数据率为发射端在单位时间内的数据量，所述接收数据率为接收端在单位时间内的数据量，发射数据率和接收数据率的差值作为所述数据率误差。
优选地，当所述数据率误差大于零时，所述控制器控制发射端降低发射数据率。
优选地，当所述数据率误差小于零时，所述控制器控制发射端提高发射数据率。
优选地，所述模数转换模块为逐次逼近寄存器型架构，所述控制器控制模数转换模块调整采样 - 保持频率中的采样持续时间来调整发射端的发射数据率。
优选地，当所述数据率误差大于零时，所述控制器控制接收端提高接收数据率。
优选地，当所述数据率误差小于零时，所述控制器控制接收端降低接收数据率。
优选地，所述数模转换模块采用 L/R 时钟进行控制，所述控制器控制数模转换模块调整 L/R 时钟的整体频率来调整接收端的接收数据率。
上述方法和系统通过检测数据率误差，进而根据该数据率误差调整发射端和接收端的数据率，使二者匹配，能够补偿振荡器的误差。
【附图说明】
图 1 为一实施例的无线数字通信系统模块图；
图 2 （ a ）至图 2 （ c ）为调整采样持续时间的示意图；
图 3 （ a ）至图 3 （ c ）为调整 L/R 时钟的整体频率的示意图；
图 4 为一实施例的无线数字通信系统中的数据率误差补偿方法流程图。
【具体实施方式】
如图 1 所示，为一实施例的无线数字通信系统。该系统包括发射端 100 和接收端 200 。发射端 100 包括依次连接的模数转换模块 110 、信源编码模块 120 、信道编码模块 130 以及调制模块 140 。接收端 200 包括解调模块 210 、信道解码模块 220 、信源译码模块 230 以及数模转换模块 240 。模拟信号经模数转换模块 110 转换为数字信号，并依次经信源编码模块 120 进行信源编码、经信道编码模块 130 进行信道编码、经调制模块 140 调制后发射无线信号。在接收端 200 ，接收的无线信号被解调模块 210 解调后，依次由信道解码模块 220 解码、信源译码模块 230 译码后得到数字信号，最终经数模转换模块 240 得到模拟信号。
在传输无线信号的过程中，数据率误差检测模块 300 检测发射端 100 和接收端 200 的数据率误差，以确定发射端 100 发送数据和接收端 200 接收数据的速度是否匹配。数据率误差检测模块 300 具体包括用于统计发射数据率的发射数据率统计模块 310 和用于统计接收数据率的接收数据率统计模块 320 。发射数据率统计模块 310 连接在模数转换模块 110 与信源编码模块 120 之间，统计发射端 100 在单位时间内的数据量，即发送数据率。接收数据率统计模块 320 连接在信源译码模块 230 与数模转换模块 240 之间，统计接收端 200 在单位时间内数据量，即接收数据率。将发射数据率和接收数据率的差值作为所述数据率误差。
上述数据率误差通过命令通道（ command channel ）发送到控制器 400 。控制器 400 根据所述数据率误差调整发射端 100 或接收端 200 的数据率，以使发射端 100 发送数据和接收端 200 接收数据的速度匹配。
具体地，当所述数据率误差大于零时，控制器 400 控制发射端 100 降低发射数据率。当所述数据率误差小于零时，控制器 400 控制发射端 100 提高发射数据率。以模数转换模块 110 为逐次逼近寄存器型架构为例，说明控制器 400 调整发射端 100 的发射数据率的方式。
对于逐次逼近寄存器型架构的模数转换模块 110 ，其一般采用采样保持时钟来采样、量化，进而模数转换。如图 2 （ a ）至图 2 （ c ）所示，为调整采样持续时间的示意图。图 2 （ a ）中，采样持续时间为 4 个时钟周期，图 2 （ b ）中，采样持续时间为 3 个时钟周期，图 2 （ c ）中，采样持续时间为 5 个时钟周期。
如在图 2 （ a ）所示的采样持续时间下，当所述数据率误差大于零时，控制器 400 控制模数转换模块 110 将采样持续时间调整为 3 个时钟周期。当所述数据率误差小于零时，控制器 400 控制模数转换模块 110 将采样持续时间调整为 5 个时钟周期。以分别达到降低发射数据率和提高发射数据率的目的。
除了可以通过调整发射端 100 的发射数据率外，还可以通过调整接收端 200 的接收数据率来使发射端 100 发送数据和接收端 200 接收数据的速度匹配。
具体地，当所述数据率误差大于零时，控制器 400 控制接收端 200 提高接收数据率。当所述数据率误差小于零时，控制器 400 控制接收端 200 降低接收数据率。以数模转换模块 240 在使用 L/R 时钟进行数模转换时为例，说明控制器 400 调整接收端 200 的接收数据率的方式。
对于使用 L/R 时钟进行数模转换的模数转换模块 240 ，通过调整 L/R 时钟的整体频率来调整接收数据率。如图 3 （ a ）至图 3 （ c ）所示，为调整 L/R 时钟的整体频率的示意图。图 3 （ a ）中， L/R 时钟的整体频率为 96KHz ，图 3 （ b ）中， L/R 时钟的整体频率为 95.427KHz ，图 3 （ c ）中， L/R 时钟的整体频率为 95.579KHz 。
如在图 3 （ c ）所示的频率下，当所述数据率误差大于零时，控制器 400 控制数模转换模块 240 将 L/R 时钟的整体频率调整为 96KHz 。当所述数据率误差小于零时，控制器 400 控制数模转换模块 240 将 L/R 时钟的整体频率调整为 95.427KHz 。以分别达到提高接收数据率和降低接收数据率的目的。
如图 4 所示，为一实施例的无线数字通信系统中的数据率误差补偿方法流程图。该方法包括如下步骤：
S110 ：在发射端将模拟信号转换为数字信号，并依次进行信源编码、信道编码、调制，最终发射无线信号。
S120 ：在接收端接收所述无线信号，并依次解调、进行信道解码、信源译码得到数字信号，最终将数字信号转换为模拟信号输出。
S130 ：统计发射数据率和接收数据率，将发射数据率和接收数据率的差值作为所述数据率误差。所述发射数据率为发射端在单位时间内的数据量，所述接收数据率为接收端在单位时间内的数据量。在执行步骤 S110 的同时统计发射数据率，在执行步骤 S120 的同时统计接收数据率。
S140 ：判断所述数据率误差是否大于零，若是，则执行步骤 S150 ，否则执行步骤 S160 。
S150 ：在发射端降低发射数据率和 / 或在接收端提高接收数据率。
S160 ：在发射端提高发射数据率和 / 或在接收端降低接收数据率。
在发射端，采用逐次逼近方式将模拟信号转换为数字信号时，调整发射数据率具体是通过调整采样 - 保持频率中的采样持续时间来实现。
在接收端，使用 L/R 时钟进行数模转换时，接收端调整接收数据率具体是：调整 L/R 时钟的整体频率。
上述方法和系统通过检测数据率误差，进而根据该数据率误差调整发射端和接收端的数据率，使二者匹配，能够补偿振荡器的误差。
以上所述实施例仅表达了本发明的几种实施方式，其描述较为具体和详细，但并不能因此而理解为对本发明专利范围的限制。应当指出的是，对于本领域的普通技术人员来说，在不脱离本发明构思的前提下，还可以做出若干变形和改进，这些都属于本发明的保护范围。因此，本发明专利的保护范围应以所附权利要求为准。

Claims (16)

  1. 一种无线数字通信系统中的数据率误差补偿方法，包括如下步骤：
    在发射端将模拟信号转换为数字信号，并依次进行信源编码、信道编码、调制，最终发射无线信号；
    在接收端接收所述无线信号，并依次解调、进行信道解码、信源译码得到数字信号，最终将数字信号转换为模拟信号输出；
    检测发射端和接收端的数据率误差；
    根据所述数据率误差调整发射端或接收端的数据率。
  2. 如权利要求 1 所述的无线数字通信系统中的数据率误差补偿方法，其特征在于，所述检测发射端和接收端的数据率误差的步骤具体包括：
    统计发射数据率，所述发射数据率为发射端在单位时间内的数据量；
    统计接收数据率，所述接收数据率为接收端在单位时间内的数据量；
    将发射数据率和接收数据率的差值作为所述数据率误差。
  3. 如权利要求 2 所述的无线数字通信系统中的数据率误差补偿方法，其特征在于，当所述数据率误差大于零时，根据所述数据率误差调整发射端或接收端的数据率的步骤具体为：在发射端降低发射数据率。
  4. 如权利要求 2 所述的无线数字通信系统中的数据率误差补偿方法，其特征在于，当所述数据率误差小于零时，根据所述数据率误差调整发射端或接收端的数据率的步骤具体为：在发射端提高发射数据率。
  5. 如权利要求 3 或 4 所述的无线数字通信系统中的数据率误差补偿方法，其特征在于，在采用逐次逼近方式将模拟信号转换为数字信号时，在发射端调整发射数据率具体是通过调整采样 - 保持频率中的采样持续时间来实现。
  6. 如权利要求 2 所述的无线数字通信系统中的数据率误差补偿方法，其特征在于，当所述数据率误差大于零时，根据所述数据率误差调整发射端或接收端的数据率的步骤具体为：在接收端降低接收数据率。
  7. 如权利要求 2 所述的无线数字通信系统中的数据率误差补偿方法，其特征在于，当所述数据率误差小于零时，根据所述数据率误差调整发射端或接收端的数据率的步骤具体为：在接收端提高接收数据率。
  8. 如权利要求 6 或 7 所述的无线数字通信系统中的数据率误差补偿方法，其特征在于，在使用 L/R 时钟进行数模转换时，接收端调整接收数据率具体是：调整 L/R 时钟的整体频率。
  9. 一种无线数字通信系统，包括发射端和接收端，所述发射端包括模数转换模块、信源编码模块、信道编码模块以及调制模块，所述接收端包括解调模块、信道解码模块、信源译码模块以及数模转换模块；模拟信号经模数转换模块转换为数字信号，并依次经信源编码模块进行信源编码、经信道编码模块进行信道编码、经调制模块调制后发射无线信号；所述无线信号接解调模块解调后，依次由信道解码模块解码、信源译码模块译码后得到数字信号，最终经数模转换模块得到模拟信号，其特征在于，还包括数据率误差检测模块，用于检测发射端和接收端的数据率误差；以及控制器，用于根据所述数据率误差调整发射端或接收端的数据率。
  10. 如权利要求 9 所述的无线数字通信系统，其特征在于，所述数据率误差检测模块包括用于统计发射数据率的发射数据率统计模块和用于统计接收数据率的接收数据率统计模块；其中，所述发射数据率为发射端在单位时间内的数据量，所述接收数据率为接收端在单位时间内的数据量，发射数据率和接收数据率的差值作为所述数据率误差。
  11. 如权利要求 10 所述的无线数字通信系统，其特征在于，当所述数据率误差大于零时，所述控制器控制发射端降低发射数据率。
  12. 如权利要求 10 所述的无线数字通信系统，其特征在于，当所述数据率误差小于零时，所述控制器控制发射端提高发射数据率。
  13. 如权利要求 11 或 12 所述的无线数字通信系统，其特征在于，所述模数转换模块为逐次逼近寄存器型架构，所述控制器控制模数转换模块调整采样 - 保持频率中的采样持续时间来调整发射端的发射数据率。
  14. 如权利要求 10 所述的无线数字通信系统，其特征在于，当所述数据率误差大于零时，所述控制器控制接收端提高接收数据率。
  15. 如权利要求 10 所述的无线数字通信系统，其特征在于，当所述数据率误差小于零时，所述控制器控制接收端降低接收数据率。
  16. 如权利要求 14 或 15 所述的无线数字通信系统，其特征在于，所述数模转换模块采用 L/R 时钟进行控制，所述控制器控制数模转换模块调整 L/R 时钟的整体频率来调整接收端的接收数据率。
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