WO2013082746A1

WO2013082746A1 - Step-dimming solution for lamp ballast

Info

Publication number: WO2013082746A1
Application number: PCT/CN2011/083486
Authority: WO
Inventors: Gang Yao; Ting Zhang; Bo Zhang
Original assignee: General Electric Company
Priority date: 2011-12-05
Filing date: 2011-12-05
Publication date: 2013-06-13
Also published as: CA2857535A1; CN104255084A; MX2014006728A; CN104255084B

Abstract

A ballast for operating a plurality of parallel fluorescent lamps includes an inverter, coupled to a DC input, and configured to produce an inverter output voltage to power the plurality of parallel fluorescent lamps. A plurality of ballasting capacitors are individually coupled in series between the inverter output voltage and a corresponding one of the plurality of fluorescent lamps. A voltage regulator is coupled to the inverter and controls the inverter output at a generally constant operational voltage such that a lighted lamp remains lighted and an unlighted lamp remains unlighted. At least one dimming circuit is included and each included dimming circuit is operatively coupled to a corresponding ballasting capacitor and configured to receive a lamp control signal. Upon receiving the lamp control signal, each dimming circuit becomes operative to extinguish the corresponding lamp, and upon removal of the lamp control signal each dimming circuit becomes inoperative.

Description

STEP-DIMMING SOLUTION FOR LAMP BALLAST

BACKGROUND Field of the Invention

[0001] The aspects of the present disclosure relate generally to the field of electroluminescent devices, and in particular to fluorescent lamp ballasts for electroluminescent devices.

Description of Related Art

[0002] A gas-discharge lamp is a family of electroluminescent devices that generate light by passing an electric current through a gas or vapor within the lamp. Atoms in the vapor absorb energy from the electric current then release the energy as light. One of the best known types of gas discharge lamps is the fluorescent lamp that is often used in offices and homes. Fluorescent lamps contain mercury vapor whose atoms emit light in the non-visible low wavelength ultraviolet region. The ultraviolet radiation then causes a phosphor disposed on the interior of the lamp tube to fluoresce, thereby producing visible light. There are three types of gas discharge lamps: low pressure lamps, high pressure lamps, and high-intensity discharge (HID) lamps. Low pressure lamps, such as fluorescent lamps, have a vapor pressure below atmospheric pressure, while high pressure lamps have a vapor pressure near or above atmospheric pressure. HID lamps use an electric arc between the electrodes.

[0003] Fluorescent lamps, as well as some other types of gas discharge lamps, exhibit a phenomenon known as negative resistance in which increased current flowing through the lamp decreases the lamps electrical resistance allowing even greater currents to flow. If left uncontrolled, the negative resistance creates an unstable condition in which the lamp current rapidly increases to a level that will destroy the lamp. When driven with direct current (DC) the lamp current can be limited by placing a simple resistor in series with the lamp. However this means that the resistor will dissipate at least as much energy as the lamp, resulting in very inefficient light production. In practice, fluorescent lamps are nearly always driven with alternating current (AC), which allows lamp current to be limited using an inductor or other type of resonant circuit that can limit the flow of alternating current without dissipating energy. These current controlling circuits are generally referred to as ballast circuits or "ballasts". In practice, the term ballast is commonly used to refer to the entire fluorescent lamp drive circuit, not just the current limiting portion.

[0004] Cathodes at either end of a fluorescent lamp are used to inject electrons into a vapor within the lamp. The cathodes are structured as filaments coated with an emissive material used to enhance electron injection, where the emission mix typically comprises a mixture of barium, strontium, and calcium oxides. A small electric current is passed through the filaments to heat them to a temperature that overcomes the binding potential of the emissive material allowing thermionic emission of electrons to take place. When an electric potential is applied across the lamp, electrons are liberated from the emissive material that is coating the cathodes causing a current to flow through the vapor within the lamp. While a lamp is in operation and especially when a lamp is started, the emission mix is slowly sputtered off the filaments by bombardment with electrons and mercury ions. During the last few hours of a fluorescent lamp's life, the emission mix at one end will become nearly depleted and the cathode will begin having difficulty emitting electrons into the vapor leading to a slight rectification of the alternating current flowing through the lamp. Continued operation of a lamp after the emission mix is depleted can lead to overheating. Overheating can cause the glass to crack creating a hazardous condition and releasing the mercury vapor. It is therefore desirable to determine when lamps near their end of life (EOL) and turn them off. Methods used for detecting when a lamp is nearing its end of life and shutting it down before problems arise are complex and do not always provide detection of re-lamping, i.e. replacing a failed or missing lamp, and automatic re-starting of a replaced lamp. The process of shutting down the arc in a lamp and putting the lamp in an unlighted or glow state is referred to herein as "extinguishing". A common method of extinguishing a failing lamp is to reduce lamp current such that the arc is lost and the lamp becomes unlighted while still maintaining enough current to keep the cathodes heated at a level that can sustain thermionic emission. When a lamp is extinguished in this manner, the ends of the lamp often glow. Because of this tendency to glow, the unlighted and low current condition is referred to as a "glow state".

[0005] Referring to Figure 1, a schematic block diagram of a typical florescent lamp ballast 102 is shown that uses ballasting capacitors to provide end-of-life protection. The fluorescent lamp ballast 102 will generally be referred to as a program-start, non-dimming ballast with End-Of-Life (EOL) protection. The fluorescent lamp ballast 102 is configured to reduce the current supplied to a lamp that is nearing its end of life and has begun to exhibit rectification in a manner that extinguishes the rectifying lamp and forces it into a glow state, while the remaining, non-rectifying lamps continue to operate at normal levels.

[0006] As is shown in Figure 1, the ballast 102 receives power from a suitable AC power source 104 and powers one or more lamps 108. Throughout this description the suffix 'r' is used to denote a lamp that is nearing its end of life and exhibiting rectification of the lamp current, for example "failing lamp 108r", while the suffix 'n' is used to denote a lamp that is operating normally, i.e. not rectifying. For purposes of this description a suffix 'a', 'b', 'c', or 'd' will be used to denote a particular one of a set of multiple components, for example "lamp 108a" is used to denote the first lamp 108 of a set of lamps, and "ballasting capacitor 106d" is used to denote the fourth one of a set of ballasting capacitors 106. Like suffixes are used to the denote corresponding components of a set, for example the third ballasting capacitor is denoted "106c" and the corresponding lamp is denoted "108c", i.e. if the a lamp and its ballasting capacitor are connected in series, then lamp 108c is connected in series with and "corresponds" to ballasting capacitor 106c and lamp 108d is connected in series with and "corresponds" to ballasting capacitor 106d etc.

[0007] The ballast 102 includes an AC-to-DC power circuit 109 that uses a rectifier 110 to convert the AC input power 104 to DC power 112. The rectifier 110 produces a rectified DC voltage 112 that is supplied to a switching type DC-DC converter 120 to produce DC power 122 to drive an inverter 140. The DC-DC converter 120 includes various switching devices operated by suitable control signals (not shown) to generate conditioned DC power output 122. The converter 120 is a boost converter with a controller 130 that may include a power factor control ("PFC") component 136 to control the power factor of the ballast 102.

[0008] The ballast 102 further includes an inverter 140, also referred to as a self- oscillating inverter, which receives the conditioned DC voltage 122 and provides an AC output 123 to drive one or more parallel lamp loads 108 through corresponding ballast capacitors 106. Although two lamps 108n and 108r are illustrated in Figure 1 any number of lamps may be driven by ballast 102 where each lamp has a corresponding capacitor in ballast capacitors 106. The inverter 140 operates under control of a voltage regulator 150 and a program-start circuit 180. The inverter 140 may be any form of conversion circuit capable of generating high frequency power 123 suitable for driving one or more lamps 108. In operation, as one or more lamps 108r approach end of life they begin to exhibit rectification. The process of rectification induces a DC bias into the AC current flowing through the lamp 108r. This DC bias charges the corresponding ballast capacitance 106, thereby reducing the current flowing through the rectifying lamp 108r, extinguishing it and putting it into a glow state. By reducing the current flowing through a rectifying lamp 108r it is prevented from overheating and possibly cracking or leaking mercury vapor. The DC bias current from the failing lamps, which in this case is indicated as lamp 108r, charges only those ballast capacitors 106 associated with the failing or rectifying lamps 108r. Therefore, the remaining ballasting capacitors 106 do not accumulate a charge and do not reduce the current flowing through non-rectifying lamps 108n allowing them to continue normal operation.

[0009] The ballast 102 includes a warm-start circuit 160 with a re-lamping detector circuit 162 which detects when one of the lamps 108 has been replaced and restarts the inverter 140. When the inverter 140 is restarted the warm-start circuit 160 controls the voltage regulator 150 such that a lamp igniting voltage is provided to the lamps 108 for a period of time that allows all lamps 108 to re- start before resuming the normal operating voltage 123. The end-of- life protection ("EOL protection") described above is disclosed in co-pending application 12/500,009 filed July 9, 2009.

[0010] Fluorescent lights cannot be dimmed using standard dimmers designed for incandescent lighting. Because the cathodes in fluorescent lights rely on thermionic emission to inject electrons, simply reducing the supply voltage may not provide sufficient heating current to maintain the proper cathode temperature. Also, the voltage waveform produced by standard phase controlled dimmer switches reacts badly with many fluorescent lighting ballasts making it difficult to maintain an arc in the tube at low power levels. Special electrical requirements, including current to heat the cathodes and ballasting to compensate for negative resistance of the arc, result in dimming solutions for fluorescent fixtures that are complex and expensive. As an alternative, step dimming solutions have become available. Step dimming is where a portion, for example half, of the lamps can be turned off, while leaving the remaining lamps operating at a normal level, resulting in a reduced light level without actually dimming any of the lamps. Typical step dimming solutions provide bi-level control that shuts off half (i.e. two of the four lamps in a four lamp ballast) when a control wire is connected to the hot or neutral supply voltage. These ballasts include two inverters, each driving two of the lamps, and one of inverters shuts off when the ballast receives the bi-level control signal. However the use of multiple inverters results in a complex and costly step dimming solution.

[0011] Accordingly, it would be desirable to provide a fluorescent lamp dimming solution that resolves at least some of the problems identified above.

SUMMARY OF THE INVENTION

[0012] As described herein, the exemplary embodiments overcome one or more of the above or other disadvantages known in the art.

[0013] One aspect of the present disclosure relates to a ballast for operating a plurality of parallel fluorescent lamps. In one embodiment, the ballast includes an inverter, coupled to a DC input, and configured to produce an inverter output voltage to power the plurality of parallel fluorescent lamps. A plurality of ballasting capacitors are individually coupled in series between the inverter output voltage and a corresponding one of the plurality of fluorescent lamps. A voltage regulator is coupled to the inverter and controls the inverter output at a generally constant operational voltage such that a lighted lamp remains lighted and an unlighted lamp remains unlighted. At least one dimming circuit is included and each included dimming circuit is operatively coupled to a corresponding ballasting capacitor and configured to receive a lamp control signal. Upon receiving the lamp control signal, each dimming circuit becomes operative to extinguish the corresponding lamp, and upon removal of the lamp control signal each dimming circuit becomes inoperative.

[0014] Another aspect of the present disclosure relates to a ballast for operating a plurality of parallel fluorescent lamps. In one embodiment, the ballast includes an inverter, coupled to a DC input, and configured to produce an inverter output voltage to power the plurality of parallel fluorescent lamps. A plurality of ballasting capacitors are individually coupled in series between the inverter output voltage and a corresponding one of the plurality of fluorescent lamps. A voltage regulator is coupled to the inverter and controls the inverter output at a generally constant operational voltage such that a lighted lamp remains lighted and an unlighted lamp remains unlighted. At least one dimming circuit is included and each dimming circuit has a series connected diode and switch operatively coupled to one of the plurality of ballasting capacitors such that closing the switch rectifies the current flowing through the ballasting capacitor and extinguishing the lamp.

[0015] Another aspect of the present disclosure relates to a method for dimming a fluorescent lamp. The method includes converting a DC input voltage to an inverter output voltage to power the lamp; providing a ballasting capacitor in series with the lamp such that the ballasting capacitor limits a lamp current flowing through the ballasting capacitor and the lamp; maintaining the inverter output voltage at a generally constant operational voltage such that a lighted lamp remains lighted and an unlighted lamp remains unlighted; and applying a lamp control signal to the ballasting capacitor such that the ballasting capacitor is charged and the corresponding lamp is extinguished.

[0016] These and other aspects and advantages of the exemplary embodiments will become apparent from the following detailed description considered in conjunction with the accompanying drawings. It is to be understood, however, that the drawings are designed solely for purposes of illustration and not as a definition of the limits of the invention, for which reference should be made to the appended claims. Additional aspects and advantages of the invention will be set forth in the description that follows, and in part will be obvious from the description, or may be learned by practice of the invention. Moreover, the aspects and advantages of the invention may be realized and obtained by means of the instrumentalities and combinations particularly pointed out in the appended claims.

BRIEF DESCRIPTION OF THE DRAWINGS

[0017] In the drawings:

[0018] Figure 1 illustrates a schematic diagram of an exemplary prior art fluorescent lamp ballast incorporating ballasting capacitors to provide EOL protection.

[0019] Figure 2 illustrates a schematic diagram of an exemplary fluorescent lamp ballast that includes a step dimming circuit incorporating aspects of the present disclosure.

[0020] Figure 3 illustrates a timing diagram for control signals in a step dimming ballast incorporating aspects of the present disclosure.

[0021] Figure 4 illustrates a diagram of an exemplary circuit for injecting a lamp control signal incorporating aspects of the present disclosure. [0022] Figure 5 illustrates a schematic diagram of an exemplary inverter and lamp drive circuit for a fluorescent lamp ballast incorporating aspects of the present disclosure.

[0023] Figure 6 illustrates a schematic diagram of an exemplary voltage regulator and warm start circuit for a fluorescent lamp ballast incorporating aspects of the present disclosure.

[0024] Figure 7 illustrates rectifying and non-rectifying lamp voltage waveforms along with re-lamping detection signals produced by the exemplary ballast shown in Figures 4, 5 and 6.

[0025] Figure 8 illustrates a schematic diagram of an exemplary step dimming circuit for a fluorescent lamp ballast incorporating aspects of the present disclosure.

[0026] Figure 9 illustrates a flowchart of a method for dimming fluorescent lamps.

DETAILED DESCRIPTION OF THE DISCLOSED EMBODIMENTS

[0027] Referring now to Figure 2, a schematic is shown of an exemplary topology of a step dimming lamp drive circuit 200 incorporating aspects of the present disclosure. The aspects of the disclosed embodiments take advantage of the EOL protection built into some prior-art ballasts to provide a solution that does not require multiple inverters. The step dimming solution of the present disclosure achieves comparable functionality utilizing only a few passive components. This results in a less costly step dimming solution that is easier to manufacture, maintain, and more reliable than dual inverter designs.

[0028] Each of the ballast capacitors contained in block 106 of Figure 1, is shown in

Figure 2 as a discrete capacitor 106a, 106b, 106c, and 106d, attached in series to its corresponding lamp 108a, 108b, 108c, 108d. The self-oscillating inverter 140 of Figure 1 is represented by a half-bridge converter 245 that converts a DC supply voltage 204 to a square wave voltage at circuit node 230 feeding a resonant circuit 250 that converts the square wave voltage 230 to a generally sinusoidal AC bus 225 voltage. The half-bridge converter includes a gate driver 215 that alternately switches transistors 217 and 218 on and off to convert a DC supply voltage 204 to a square wave at node 230. This square wave 230 is applied to an inductor 205 which is part of a resonant circuit 250 that produces a high frequency AC bus voltage 225 used to drive the lamps 108a, 108b, 108c, 108d. The ballasting circuit topology shown in Figure 2 incorporates the EOL protection mechanism described above. EOL protection is triggered when a lamp, such as 108d, nears its end of life and begins to rectify the current passing through it. This rectification causes charging of the corresponding ballasting capacitor 106d which reduces the lamp current thereby extinguishing the lamp 108d. This EOL protection mechanism can be used to incorporate step dimming functionality into lamp ballasts of this type. To provide step dimming, a lamp control signal can be created that selectively triggers the EOL protection on some of the lamps thereby causing dimming of the fixture. A dimming circuit for lamp 108d is formed by including a diode 210d in parallel with the lamp 108d such that the diode 210d rectifies the lamp current thereby triggering the EOL protection and extinguishing the lamp 108d.The diode 210d injects a lamp control signal 508d between ballasting capacitor 106d and lamp 108d that causes charging of the corresponding ballasting capacitor 106d which, as was described above, extinguishes the lamp 108d. The lamp control signal 508d created by the diode 210d causes rectification of the lamp current flowing through ballasting capacitor 106d which simulates a failing lamp. As will be discussed in further detail below, other types of lamp control signals can also be used to extinguish a lamp without straying from the spirit and scope of this disclosure.

[0029] Figure 2 illustrates the use of two dimming circuits, each comprising a diode 210c

210d and switch Q3, to selectively simulate a failing condition on lamps 108c and 108d. Simulating a failing condition on the lamps 108c 108d causes the two lamps 108c 108d to be extinguished by the EOL protection, thus providing a means of step dimming the ballast. Diodes 210c and 210d are arranged to inject lamp control signals 508c, 508d between the lamps 108c and 108d and their respective ballasting capacitors 106c and 106d. In operation, diodes 210c and 210d can be selectively grounded by switching device Q3 to extinguish lamps 108c and 108d while leaving lamps 108a and 108b operating at their normal light output. When control circuit 212 receives a step dimming signal 214 it raises a signal 211 that causes switching device Q3 to close thereby allowing diodes 210c and 210d to inject lamp control signals 508c and 508d which begin rectifying the current passing through ballast capacitors 106c and 106d. Rectification of the current creates a DC bias current that charges the ballast capacitors 106c and 106d which in turn extinguishes lamps 108c and 108d. During steady state operation, the inverter 140 holds the high frequency bus voltage 225 at a level that is high enough to sustain continued operation of lamps 108a and 108b in their normal lighted condition, but at a level too low to re-ignite lamps 108c or 108d after they have been extinguished.. Thus, once Q3 is closed long enough to extinguish lamps 108c and 108d, Q3 can be opened and the lamps 108c and 108d will remain unlighted, and the step dimming lamp drive 200 will continue to operate at a dimmed level, i.e. it will continue to operate with only two lamps (108a and 108b) lighted. Although Figure 2 illustrates a diode 210c, 21 Od arrangement where the cathodes of each diode 210c, 21 Od is grounded through Q3, in alternate embodiments, polarity of the diodes 210c, 210d can be reversed such that the anode is grounded. Those skilled in the art will appreciate that the rectifier 210d and switch Q3 essentially inject a lamp control signal 508d between the lamp 108d and its ballasting capacitor 106d. In the embodiment shown in Figure 2, this lamp control signal 508d is created by the diode 210d and comprises an EOL signal with characteristics that simulate the rectification caused by a failing lamp. It will be understood through practice of this disclosure that is not necessary to use an EOL signal that mimics a failing lamp. Further embodiments provide other types of signals to extinguish the lamps.

[0030] Figure 3 illustrates a timing diagram showing the sequence of the lamp drive signals used to operate the step dimming functionality of step dimming lamp drive 200. The horizontal axis 301 represents time moving forward to the right and the vertical axis 302 represents the state of the control signals, which in this example are shown as step dimming signal 214, Q3 control signal 211 , and Regulator Reset signal 213. At time to, the step dimming signal 214 is applied to the control circuit 212 which causes the control circuit 212 of Figure 2 to raise Q3 control signal 211 to close Q3, which triggers the EOL protection thereby extinguishing lamps 108c and 108d as described above. Once lamps 108c and 108d have been extinguished the control circuit 212 lowers Q3 control signal 211 at time ti, allowing Q3 to open. However, lamps 108c and 108d remain unlighted because the steady state high frequency bus voltage 225 is not high enough to reignite them.

[0031] When an arc is formed within a fluorescent lamp it causes avalanche ionization of the gas contained in the lamp which in turn increases the conductivity of the lamp. This increased conductivity allows the lamp to maintain an arc with an applied voltage that is lower than the voltage necessary to strike the arc. This lower voltage is herein referred to as the operational voltage of the lamp. After a lamp has been extinguished the gas atoms return to their base state and the conductivity of the lamp is reduced. Once the conductivity has been reduced, the operational voltage is no longer sufficient to strike an arc within the lamp, i.e. ignite the lamp. An elevated voltage, referred to herein as the lamp igniting voltage, is necessary to strike an arc and light an unlighted lamp. Because of this difference in conductivity, applying the operational voltage to a lighted lamp will keep it lighted but will not light, i.e. ignite, an unlighted lamp.

[0032] At time the step dimming signal 214 is removed causing the control circuit 212 to issue a Regulator Reset signal 213 to the gate driver 215. When the gate driver 215 receives the Regulator Reset signal 213 it acts to increase the high frequency bus voltage 225 thereby draining the charge from ballast capacitors 106c and 106d and re-igniting lamps 108c and 108d and returning the step dimming lamp drive 200 to its highest light output level. The foregoing description illustrates an exemplary embodiment that has four lighted lamps when operating at full brightness and two lighted lamps when dimmed. One skilled in the art will recognize that other numbers of lighted lamps can be used for full brightness and dimmed brightness without straying from the spirit and scope of the disclosed embodiments.

[0033] Figure 4 illustrates a diagram of a circuit for injecting a lamp control signal 508 between a lamp 108 and its ballasting capacitor 106 to extinguish a lamp. In Figure 4, a high frequency AC bus voltage 225a and 225b is use to drive a lamp 108 that is connected in series with a ballasting capacitor 106. A dimming circuit 410 is used to inject a lamp control signal 508 between the series connected lamp 108 and ballasting capacitor 106. In the embodiment described above with reference to Figure 2 the lamp control signal rectified the lamp current similar to the way a failing lamp rectifies the lamp current. This rectifying type control signal is created by coupling a diode 210d and a switch Q3 to a circuit node 508d such that the DC bias caused by the rectified lamp current charges the ballasting capacitor 106d. Alternatively, the lamp control signal 508 can inject a DC current directly to charge the ballasting capacitor 106. Those skilled in the art will recognize that other dimming circuits 410 may be constructed to generate a lamp control signal 508 to trigger the EOL protection or otherwise extinguish the lamp 108 without straying from the spirit and scope of the present disclosure. An example of a signal that extinguishes the lamp without charging the ballasting capacitor would be a lamp control signal 508 that reduces the lamp current to about zero. A lamp control signal of this type can be generated by shorting the lamp, i.e. shorting circuit node 508 directly to ground 420. The lamp control signal 508 is activated in response to the control signal 211 described above with respect to Figure 3. In one embodiment the lamp control signal 508 may comprise a DC current that will charge the ballasting capacitor 106 in a similar fashion to the DC bias induced in the lamp current by a lamp that is nearing the end of its life. As was discussed above, charging of the ballasting capacitor 106 causes reduction of the current flowing through the lamp 108 thereby extinguishing the lamp 108. In still further embodiments the lamp control signal generation circuit 410 may extinguish the lamp 108 by shorting the lamp control signal 508 to ground 420 in response to an active control signal 211. In the example shown in Figure 4, the terminal 420 is connected to a ground GNDl, however alternatively the terminal 420 does not need to be connected to ground.

[0034] Figure 5 illustrates further details of an exemplary self-oscillating inverter 140 that receives DC power from the boost converter 120 via terminals 122a and 122b. The inverter 140 includes a resonant circuit 513 and a pair of controlled switching devices Ql and Q2. In the example shown, switching devices Ql and Q2 are semiconductor switches such as for example n-channel enhancement mode MOSFETs. Alternatively any suitable switching devices may be employed, such as for example bipolar junction transistors. The input DC 122 received at terminals 122a and 122b is selectively switched by Ql and Q2 coupled in series between a positive voltage node DC+ and a negative node coupled to a first circuit ground GNDl, where the selective switching of Ql and Q2 operates to generate a square wave at an inverter output node 511, which in turn excites the resonant circuit 513 to thereby drive a high frequency bus (HFB) at node 512.

[0035] The inverter 140 includes a transformer T2 for output power sensing and self- oscillation, a transformer T3 to adjust inverter operating frequency and output power, as well as a transformer Tl to provide current for heating the cathodes. Transformer T2 has a first winding T2A in series between the inverter output 511 and the HFB 512 along with windings T2B and T2C in switch drive control circuits 521 and 522 associated with the switching devices Ql and Q2, respectively. In operation of the inverter 140, the winding T2A acts as a primary in the resonant circuit 513 and the secondary windings T2B and T2C are connected in the gate drive circuits for Ql and Q2, respectively for oscillatory actuation of the switches according to the resonance of the circuit 513. Transformer T3 has a first winding T3A operative as a frequency control inductance in the regulator 150 and windings T3B and T3C in the switch control circuits 521 and 522, where each drive control circuit 521, 522 includes a series combination of windings from T2 and T3. The third transformer T3 is used by the voltage regulator 150 to selectively control the inductance of the gate drive circuits 521 and 522 and thus to control the inverter operating frequency for closed loop operation of the inverter 140 to control the amount of power delivered to the lamps 108 by the high frequency bus 512.

[0036] AC power from the high frequency bus 512 provides an AC output used to drive one or more lamp loads 108a, 108b, 108c, 108d (hereinafter, 108a-108d) via corresponding ballasting capacitors 106a, 106b, 106c, and 106d (hereinafter, 106a-106d). While four lamps 108a-108d are illustrated in the example shown in Figure 5, any number of lamps 108 can be thus coupled with the high frequency bus 512. [0037] A transformer Tl is provided to supply current for heating the lamp cathodes, including a primary winding T1A coupled to the inverter output 511 via a capacitor C223 and coupled via a node FT to a program-start circuit 180 for selective actuation. Node FT is also clamped to the DC+ voltage via diode D118 to remove any voltage spikes from the supply voltage at node 122a. The transformer Tl includes secondary windings TIC, T1D, TIE, and TIF for heating individual upper lamp cathodes as well as a common secondary TIB to which all the lower cathodes are coupled for heating. The lower common lamp terminals are coupled to GND1 through blocking capacitor 210 and to the winding TIB. Blocking capacitor 210 provides striation control to improve lamp aesthetics.

[0038] The high frequency bus is generated at the node 512 by the inverter 140 and the resonant circuit 513, which includes a resonant inductance T2A as well as an equivalent resonant capacitance including the equivalent of capacitors CI and C2 connected in series between the DC+ and GND1 nodes, with a center node coupled to the bus 212 via capacitor C213. A clamping circuit is formed by diodes Dl and D2 individually coupled in parallel with the capacitances CI and C2, respectively. The switches Ql and Q2 are alternately activated to provide a square wave of amplitude DC+/2 at the common inverter output node 211 (e.g., half the DC bus voltage across the terminals 122a and 122b), and this square wave inverter output excites the resonant circuit 513. Gate or control lines 514 and 516 include resistances Rl and R2 to provide control signals to the control terminals of Ql and Q2, respectively.

[0039] The switch gating signals are generated using the drive circuits 521 and 522, with the first drive circuit 521 coupled between the inverter output node 511 and a first circuit node 518, and the second drive circuit 522 coupled between the circuit ground GND1 and node 516. The drive circuits 521 and 522 include the first and second driving inductors T2B and T2C of transformer T2, which are secondary windings mutually coupled to the resonant inductor T2A of the resonant circuit 513 to induce voltage in the driving inductors T2B and T2C proportional to the instantaneous rate of change of current in the resonant circuit 513 for self-oscillatory operation of the inverter 140. In addition, the drive circuits 521 and 522 include the secondary inductors T3B and T3C serially connected to the respective first and second driving inductors T2B and T2C and the gate control lines 514 and 516. The windings T3B and T3C operate as drive control inductances of voltage regulator 150 having a tertiary frequency control inductance winding T3A by which the voltage regulator 150 can change the oscillatory frequency of the inverter 140 by varying the inductance of the windings T3B and T3C through control of the current through the frequency control inductance T3A.

[0040] In operation, the gate drive circuits 521 and 522 maintain switching device Ql in an "ON" state for a first half of a cycle and the switching device Q2 in an "ON" state for a second half of the cycle to generate a generally square wave at the output node 511 for excitation of the resonant circuit 513. The gate to source voltages of the switching devices Ql and Q2 in one embodiment are limited by bi-directional voltage clamps Zl, Z2 and Z3, Z4 (e.g., back-to- back Zener diodes) coupled between the respective switch sources and the gate control lines 514 and 516. In this embodiment, the individual bi-directional voltage clamps Zl, Z2 and Z3, Z4 cooperate with the respective inductor T3B and T3C to control the phase angle between the fundamental frequency component of voltage across the resonant circuit 513 and the AC current in the resonant inductor T2A. In some embodiments, the node SO between the Zener diodes Z3 and Z4 is connected to the warm start circuit 160 for selective switching to ground. The warm start circuit 160 will be described in greater detail below with respect to Figure 6. [0041] To start the inverter 140, series coupled resistors R3 and R4 across the input terminals 122a and 122b cooperate with a resistor Rl lO (coupled by the warm start circuit 160 between the inverter output node 511 and the circuit GND1) to initiate regenerative operation of the gate drive circuits 521 and 522. The inverter switch control circuitry further includes capacitors C3 and C4 coupled in series with the windings T3B and T3C, respectively. When DC power is initially provided to the inverter 140, C3 is charged from the positive DC input 122a via R3, R4 and Rl lO, while a resistor R5 shunts the capacitor C4 in the drive circuit 522 to prevent C4 from charging and thereby prevents concurrent activation of Ql and Q2. Since the voltage across C3 is initially zero, the series combination of T2B and T3B acts as a short circuit due to a relatively long time constant for charging of the capacitor C3. Once C3 charges up to the turn-on threshold voltage of Ql, (e.g., 2-3 volts in one embodiment), switching device Ql turns ON and a small bias current flows through Ql. This current biases Ql in a common drain, Class A amplifier configuration having sufficient gain to allow the combination of the resonant circuit 513 and the gate control circuit 521 to produce a regenerative action to begin oscillation of the inverter 140 at or near the resonant frequency of the network including C3, T3B, and T2B, which is above the natural resonant frequency of the resonant circuit 513. As a result, the resonant voltage seen at the high frequency bus node 512 lags the fundamental of the inverter output voltage at node 511, thereby facilitating soft-switching operation of the inverter 140. The inverter 140 therefore begins operation in a linear mode at startup and transitions into switching Class D mode. The inverter will not start up until the 5V power supply reaches at least the threshold of the depletion mode MOSFET Q106. When this happens, the voltage at the gate of Q2 rises and allows the inverter 140 to begin oscillating. [0042] In steady state operation of the ballast 102, the square wave voltage at the inverter output node 511 has an amplitude of approximately one-half of the voltage of the positive terminal 122a (e.g., DC+/2), and the initial bias voltage across C3 drops. In the illustrated inverter 140, a first network 524 including the capacitor C3 and inductor T3B and a second network 526 including the capacitor C4 and inductor T3C are equivalently inductive with an operating frequency above the resonant frequency of the first and second networks 524, 526. In steady state oscillatory operation, this results in a phase shift of the gate circuit to allow the current flowing through the inductor T2A to lag the fundamental frequency of the voltage produced at the inverter output node 511, thus facilitating steady-state soft-switching of the inverter 140. The output voltage of the inverter 140 in one embodiment is clamped by the serially connected clamping diodes Dl and D2 to limit high voltage seen by the resonant circuit capacitors CI and C2. As the inverter output voltage at node 511 increases, the clamping diodes Dl, D2 start to clamp, preventing the voltage across the capacitors CI and C2 from changing sign and limiting the output voltage to a value that prevents thermal damage to components of the inverter 140.

[0043] In the exemplary inverter 140 illustrated in Figure 5, a decrease of the operating frequency produces an increase of the output current and vice versa. Further, decreased loading of frequency control inductor T3A causes a decrease of the inverter operating frequency. Thus, the voltage regulator 150 (shown in more detail in Figure 6 below) increases or decreases the loading of the frequency control inductor T3A to reduce or raise the lamp power, respectively. The inverter 140 thus produces an output 106 at the HFB 512 to power a plurality of parallel lamps 108a through 108d, and the regulator 150 limits the inverter output voltage at 512 so that conduction of a rectifying lamp 108r cannot be sustained once the corresponding ballasting capacitor has accumulated a charge, while conduction of non-rectifying lamps 108n is maintained.

[0044] When the emission mix on a given filament of one of the lamps 108 starts to become depleted, this failing lamp 108r begins to rectify the applied AC voltage because additional energy is required to pass the electrons from the depleted filament to the good filament, (e.g., rectifying lamps referred to herein as 108r having voltage behavior shown in Figure 7). The resulting DC voltage across the rectifying lamp 108r charges the corresponding series-connected ballasting capacitancel06a, 106b, 106c, or 106d. The voltage across the rectifying lamp 108r is thereby offset and the charged ballasting capacitor quenches the lamp current to the point where the rectifying lamp 108r goes to a glow state. In one example, the regulator 150 regulates the HFB 512 to about 225 volts for a lamp 108 rated for about 140 volts, with one of the ballasting capacitors 106 (e.g., the corresponding one of capacitors 106a-106d) having a capacitance value of 4700pF. In this case, the regulation of the HFB 512 to the relatively low value allows continued regulated operation of the inverter 140 to adequately power the non-rectifying (e.g., non-EOL) lamps 108n for normal light output while the ballasting capacitance 106 corresponding to the rectifying lamp 108r gets charged enough to quench the rectifying lamp's current, thereby forcing the rectifying (e.g., EOL) lamp 108r into the glow state.

[0045] It is noted that conventional non-dimming program-start ballasts instead provide no inverter voltage regulation or regulate the high frequency bus to a high level (e.g., 400 volts), and thus do not allow the selective current quenching of EOL lamps, and must instead provide expensive EOL detection circuitry and shut off the inverter when an EOL condition is sensed. The presently disclosed embodiments, on the other hand, allow the inverter 140 to continue normal regulated operation to maintain conduction of non-rectifying lamps 108n while the rectifying lamp or lamps 108r are safely brought to the glow state. Thus, careful tailoring of the regulated normal operating voltage of the inverter 140 by the voltage regulator 150, together with sizing of the ballasting capacitors 106 can be successfully employed for any size lamp 108.

[0046] With continued reference to Figure 5, the re-lamping sense circuit 170 includes a sense circuit 170a-170d for each lamp 108 in the ballast 102. The sense circuit 170a includes series resistors R302 and R312 coupling the upper filament (cathode) of the lamp 108 to GND1. The connection of the two resistors R302 and R312 is at node 171a, and the circuit 170a includes a sense capacitor C312 coupled from node 171a to GND1. The illustrated embodiment of Figure 5 includes re-lamping sense circuits 170b-170d individually associated with the other three lamps 108 having corresponding voltage divider resistors R304, R306, R308, R314, R316, and R318 as well as sense capacitances C314, C316, and C318. The other re-lamping sense circuits 170b-170d operate in similar fashion to the circuit 170a to sense the presence or absence of a lamp 108 in the ballast 102 and to generate a re-lamping detection signal 171 indicating the presence or absence of a lamp 108.

[0047] In the ballast circuit for the exemplary first lamp 108a in Figure 5, 15VDC is supplied through a resistor R303, the upper filament of the lamp 108a, and the resistor R302 of the corresponding re-lamping sense circuit 170a. The ballasting capacitor 106a for the first lamp 108a prevents the DC signal from propagating to the inverter 140 while the capacitor C302 in series with inductor winding TIC forces the signal to go through the cathode of the lamp 108a to resistor R302. When a lamp 108a is present, the DC signal propagates through the cathode of the lamp 108a reaching the re-lamping sense circuit node 171a to indicate the presence of the lamp 108a. Conversely, when no lamp is present in the ballast 102, the signal stops at the open circuit and the voltage at the sense circuit node 171a indicates the absence of the lamp 108a. Signals 171a-171d are fed to the warm-start circuit 160, which responds to the signals as detailed below. The circuits 170 sense the presence (or absence) of a lamp filament, and when a defective lamp 108r is removed from its sockets (e.g., when the user notices a glowing lamp 108r in the ballast 102), the DC voltage of C312, for example, goes to zero because the DC source connection is broken by the removed filament. In such a case, the sense circuit 170a generates a re-lamping detection signal 171a (having a low level in this example, as shown in Figure 7) indicating the absence of a lamp 108, and the circuit 170 provides corresponding re-lamping detection signals 171a-171d to the re-lamping detector 162 of the warm start circuit 160.

[0048] In one embodiment, a processor U300 of the re-lamping detector 162 shown in

Figure 6, is programmed to note the low level, but maintains normal operation in the ballast 102 by continuing the normal operational mode of the voltage regulator 150. As a result, all of the remaining good lamps 108n stay lit because the high frequency bus HFB 512 is being regulated. When a new lamp 108a is installed, the DC connection of the sensing circuit 171a is restored, and the detection signal 171a again goes high. The processor notes this change in the voltage of C312 (high-going transition in signal 171a) and turns on Q320 of the regulator 150 (Figure 6). When Q320 turns on, it removes the HFB 512 bus feedback signal and causes the HFB 512 to increase to the ignition voltage level, thereby restarting the newly inserted lamp 108a while the other lamps 108n remain lit. When the new lamp 108a starts, an observer will see a momentary slight increase in the light level of the lamps 108n that have been operating, but the light level returns to normal after a short time, such as around 100ms in one example. Thus none of the lamps 108 go out that have been emitting light and the new lamp 108a is started.

[0049] Referring now to Figure 6, the exemplary voltage regulator 150 operates in a normal operating state to selectively vary the loading of T3A to control the inverter operating frequency so as to regulate the AC bus voltage at node 512 to a value such that the voltage across non-rectifying lamps 108n is at or above the normal lamp operating voltage (e.g., about 125 volts AC in one example). The regulation point of the regulator 150 is set to control the inverter output voltage 512 at generally constant regulated output value such that rectification of one or more lamps 108r causes the corresponding ballasting capacitors 106 to charge up without maintaining sufficient current to keep the lamp 108r lit and the rectifying lamp 108r goes into a glow state. The regulated output value is also sufficient to ensure that non-rectifying lamps 108n operate at their rated current.

[0050] In an igniting mode, the regulator 150 is brought to a non-regulating state by actuation of the transistor Q320 so that the voltage across the non-rectifying lamps 108n is at or above a lamp igniting voltage. For closed-loop regulation mode, the voltage regulator 150 senses the HFB 512 voltage via resistor R212, which is capacitively coupled to the bus node 512 by capacitor C216, to control a gate of an n-channel enhancement mode MOSFET Q203. In this regulation mode, the MOSFET Q203 controls the loading of the tertiary winding T3A to set the frequency of the inverter 140, in effect, increasing or decreasing the loading on T3A to reduce or raise the HFB 512 voltage. The gate signal to Q203 is delayed on startup by a time constant set by R206, R207, and C203 so that voltage regulator 150 does not begin to control the inverter 140 until initial preheating is completed. Zener Z209 and a capacitor C225 clamp the voltage at the drain of Q203 relative to GND1 and another Zener Z208 clamps the MOSFET source. The regulator 150 includes resistor R213 and capacitor C219 connected in series between the gate and source of Q203. The frequency control inductance T3A is connected to a four-diode rectifier and also to control terminals B and C to allow the warm-start circuit 160 to selectively bypass the regulation (increase the inverter output voltage) as described below. [0051] The resistors R213 and R207 establish a bias point for operation of the voltage regulator 150 such that higher bus voltages cause Q203 to increase the loading on T3A thereby increasing the inverter frequency to lower the output power, whereby the high frequency bus voltage at node 512 will not exceed a predetermined threshold set by the bias point.

[0052] With continued reference to Figure 6, the program-start circuit 180 operates to heat the lamp cathodes upon start-up of the ballast 102 under control of a microprocessor U300 of the warm start circuit 160. A heating transistor Q330 has a collector coupled to the cathode heat transformer primary winding T1A at node FT (Figure 5). At start up, Q330 is turned on, thereby energizing the cathode heat control primary winding T1A. This causes heating currents to flow in the secondary windings T1B-T1F (Figure 5) to heat the filaments (cathodes) of the lamps 108a through 108d.

[0053] The heating mode in the illustrated embodiment continues for a pre-determined time period set by the microprocessor U300. The output of the microprocessor U300 is coupled to the gate of a MOSFET Q324 to turn off Q330 to end the heating activation of Tl after this preset time period has expired. The microprocessor U300 also activates MOSFET pair Q326 and Q329 for selectively shorting the frequency control inductance T3A during the heating period via terminals CT3 and CT4. In this manner, the program-start circuit 180 also varies the loading of T3A to reduce the frequency of the inverter output to a predetermined low value.

[0054] Figure 6 also illustrates an exemplary warm-start circuit 160 including the microprocessor U300, which is operatively coupled with the quenching system 170 to receive lamp presence signals 171. When the microprocessor U300 detects re-lamping of one or more of the lamp circuits of the ballast 102 (e.g., a high-to-low transition followed by a low-high transition of the signal 171 indicating the absence of a lamp 108 followed the presence of that lamp 108), it will activate the gate of a MOSFET Q320 in the regulator 150, which shorts the bias point (junction of R213 and R207) of control MOSFET Q203 to GNDl. When the bias point is shorted to GNDl, the HFB 512 is essentially removed from the feedback loop, so the voltage regulator 150 is at the same voltage as when the ballast 102 first starts-up. As described above, the gate signal to Q203 is delayed on startup by a time constant set by R206, R207, and C203. During this time, the voltage supplied by the inverter 140 is at or above a lamp igniting voltage level and the newly added lamp 108a ignites.

[0055] The ballast 102 does not require a user to cycle power to ignite the newly added lamp 108a after a re-lamping. Moreover, as described above, the exemplary ballast 102 does not shut down the inverter 140 when a lamp 108 suffers from emission mix depletion and begins rectifying, but instead drops the rectifying lamp's voltage to a glow state which keeps non- rectifying lamps 108n lighted, thereby facilitating easy identification of failing lamps without leaving the user in the dark.

[0056] Figure 7 illustrates the voltage amplitude for lamps 108 and the re-lamping detection signals 171 generated by the exemplary first re-lamping sense circuit 170a in operation with the corresponding lamp 108a entering an EOL condition. The top graph illustrates the voltage amplitude of a rectifying lamp 108r from start-up (tO) to re-ignition after being replaced. The middle graph illustrates the voltage amplitude of a non-rectifying lamp 108n from start-up (tO) to re-ignition after a rectifying lamp 108r is replaced. The bottom graph illustrates the re- lamping detection signal voltage 171 from the circuit 170 associated with lamp 108a after lamp 108a nears EOL and begins rectifying.

[0057] From tO-tl, the program-start circuit 180 heats the cathodes of the lamps 108. At tl, the predetermined pre-heat period is over and C203 charges while the inverter 140 supplies a lamp igniting voltage 362 to ignite the lamps 108. The period between tl and t2 represents the igniting state of the voltage regulator and is controlled by the time constant set by R206, R207, and C203. At t2, the voltage regulator 150 enters its operational state where it regulates the inverter output voltage 106 such that the voltage across non-rectifying lamps 108n is at or above a normal lamp operating voltage 364 and these lamps are provided with their normal operating current via the corresponding ballasting capacitors 106. The time intervals up to this point are all predetermined by either a time constant or the microprocessor U300 in the illustrated embodiments.

[0058] After an undetermined amount of time, shown as t3 in Figure 7, the emission mix on one of the cathodes of one of the lamps 108 may become depleted to a point where the lamp (108a in this example) will begin to exhibit rectification. At t3, the corresponding ballasting capacitor (e.g., 106a for lamp 108a) charges which reduces (offsets) the voltage across the rectifying lamp 108a by an amount 368 and the capacitor 106a can no longer provide the rated operating current to the rectifying lamp 108a. Consequently, the voltage across the rectifying lamp 108a is reduced 368 to a glow voltage 366 and the lamp 108a is maintained in a glow state that prevents the filaments from overheating. Also at t3 and thereafter, the voltage across the non-rectifying lamps 108n is maintained at the normal lamp operating voltage 364.

[0059] At t4, the rectifying lamp 108r has been removed from the ballast 102 by a user, thereby causing the re-lamping sense circuit capacitor C312 to discharge. Removal of a lamp 108a in the ballast 102 does not extinguish lamps 108b through 108d remaining in the ballast 102, which therefore provides true parallel operation. At t5, a new lamp 108a is added to the ballast 102 while the ballast remains powered (the user need not cycle power to replace a failing lamp). The microprocessor U300 senses that a new lamp 108a has been added to the ballast 102 and grounds the bias point in the voltage regulator 150 by actuating Q320. The time between t5 and t6 in Figure 7 is the predetermined time that the microprocessor U300 grounds the bias point plus the time of the time constant set by R206, R207, and C203. At t5, the voltage across the lamps 108 is set to the lamp igniting voltage 362 and the newly added lamp 108a ignites without the need to cycle power to the ballast 102. Finally at t6, the voltage regulator 150 regulates the inverter output voltage 106 to provide the normal lamp operating voltage 364 to the lamps 108.

[0060] Figure 8 illustrates an exemplary embodiment of a circuit used to add step dimming functionality to the exemplary ballast 102 illustrated in Figures 1, 4, 5 and 6. One end of each of diodes D810c and D810d is connected to the high side of the lamps to be dimmed, 108c and 108d, at nodes 508c and 508d respectively. The other end of the diodes is selectively connected to electrical ground GNDl 815 by a switching device 820, which performs a similar function as switching device Q3 shown in Figure 2. In the illustrated embodiment, switching device 820 is implemented as a MOSFET Q801 in series with current limiting resistors R802, R803 and includes a control signal 825 tied to the drain of the MOSFET Q801. The control signal is tied to a supply voltage 810, such as for example 5.1 volts, through a resistor R804 in order to keep the MOSFET Q801 in the off state until the control signal is activated. When control signal 810 is activated by connecting it to ground (GNDl), the MOSFET Q801 will conduct current. When switching device 820 is conducting, diodes 810c and 810d rectify the lamp current thereby charging the ballasting capacitors 106c and 106d which in turn triggers the EOL protection on lamps 108c and 108d thereby extinguishing them which reduces the overall light output. When the control signal 825 is de-activated, i.e., disconnected from ground, a re- lamping signal is generated causing the warm start circuit 160 to re-start the lamps 108c, 108d. In the exemplary embodiment described here the lamp drive circuit 141 contained four lamps and two of the lamps 108c and 108d, were shut down for dimming. Alternatively any number of lamps can be included in the lamp drive circuit 141, and any number of lamps can be dimmed.

[0061] Referring now to Figure 9 a flowchart illustrating a method 900 for dimming fluorescent lamps is shown. An exemplary circuit that may be used to carry out the method 900 is shown in Figure 2 and will be used as an aid for describing the method 900. One skilled in the art will recognize that alternate means and apparatus may be used to accomplish the method 900 without straying from the spirit and scope of the present disclosure. The method begins by receiving a DC input voltage at step 1. The DC input voltage can be created by any suitable means such as through the use of a rectifier 110 to convert an AC supply voltage to a rectified DC voltage and a DC-DC converter 120 to convert the rectified DC voltage to a suitably conditioned DC input voltage as is shown in Figure 1 and described above. Alternatively, any suitable DC input voltage may be used. The DC input voltage is then converted to generally sinusoidal AC bus power at step 2. The AC bus power may be created using a self-oscillating inverter as described above which produces a generally sinusoidal AC bus voltage 225. In alternate embodiments the AC bus may comprise a generally sinusoidal alternating current depending on the converter and resonant circuit configuration chosen. During normal operation of the fluorescent lamp ballast, this includes full brightness as well as dimmed operation, the AC bus power is maintained at a generally constant operational voltage level, step 3. The operational voltage level is regulated at a level that is high enough to maintain an arc in lighted lamps but not high enough to ignite, i.e. strike an arc, in lamps that are unlighted. The lamp current is then limited, at step 4, with a ballasting capacitor. This can be accomplished for example as is shown in the exemplary embodiment 200, by placing a ballasting capacitor 106d in series with the lamp 108d, being driven by the AC bus power 225. In this series arrangement, any current flowing through the lamp 108d must also flow through the ballasting capacitor 106d, thereby allowing the lamp current to be controlled, i.e. limited, by the ballasting capacitor. When a dimmed light level is desired, step 5 is performed, where a lamp control signal is applied to the ballasting capacitor of step 4. An example of how a lamp control signal may be applied to the ballasting capacitor is shown in Figure 2 where the lamp control signal is applied to a circuit node 508d, located between the ballasting capacitor 106d and the corresponding series connected lamp 108d, using a diode 210d to rectify the lamp current. Note that in the exemplary lamp ballast 200, the lamp control signal is only applied to the ballasting capacitor when switch Q3 is closed. The lamp control signal can alternatively rectify the lamp current which in turn results in a DC bias current being applied to charge the ballasting capacitor. A lamp control signal that applies a DC bias current directly to the ballasting capacitor, also results in appropriate charging of the capacitor. Recall that charging of the ballasting capacitor extinguishes the corresponding lamp. In still further embodiments, the lamp control signal can directly reduce the lamp current to zero without charging the ballasting capacitor as would be the case if circuit node 508d were shorted to ground. To return the lamp ballast to full brightness the lamp control signal is removed at step 6. Removing the lamp control signal allows any charge to bleed off of the ballasting capacitor so that the full AC bus power voltage is applied to the lamp. To re-ignite any lamps that were extinguished during dimming, the AC bus voltage is increased (step 7) to an igniting voltage, i.e. increased to a voltage sufficient to initiate an arc in the fluorescent lamps. Once all the lamps are lighted, the AC bus voltage is reduced to the operational voltage, step 8.

[0062] Thus, while there have been shown, described and pointed out, fundamental novel features of the invention as applied to the exemplary embodiments thereof, it will be understood that various omissions and substitutions and changes in the form and details of devices and methods illustrated, and in their operation, may be made by those skilled in the art without departing from the spirit and scope of the invention. Moreover, it is expressly intended that all combinations of those elements and/or method steps, which perform substantially the same function in substantially the same way to achieve the same results, are within the scope of the invention. Moreover, it should be recognized that structures and/or elements and/or method steps shown and/or described in connection with any disclosed form or embodiment of the invention may be incorporated in any other disclosed or described or suggested form or embodiment as a general matter of design choice. It is the intention, therefore, to be limited only as indicated by the scope of the claims appended hereto.

Claims

1. A ballast for operating a plurality of parallel fluorescent lamps, the ballast comprising: an inverter, operatively coupled to a DC input, an output of the inverter providing an inverter output voltage to power the plurality of parallel lamps;

a plurality of ballasting capacitors, each capacitor individually coupled in series between the inverter output and a corresponding one of the plurality of parallel lamps;

a voltage regulator coupled to the inverter and configured to control the inverter output at a generally constant operational voltage such that a lighted lamp remains lighted and an unlighted lamp remains unlighted; and

at least one dimming circuit wherein each dimming circuit is coupled to a one of the plurality of ballasting capacitors and configured to receive a lamp control signal, wherein upon receiving the lamp control signal each dimming circuit becomes operative to extinguish the corresponding lamp, and upon removal of the lamp control signal each dimming circuit becomes inoperative.

2. The ballast of claim 1 , wherein the dimming circuit becomes operative to rectify a current flowing through the corresponding ballasting capacitor, charge the corresponding ballasting capacitor and extinguish the corresponding lamp.

3. The ballast of claim 1, wherein the dimming circuit becomes operative to supply a direct current to charge the corresponding ballasting capacitor and extinguish the corresponding lamp.

4. The ballast of claim 1, wherein the dimming circuit becomes operative to reduce a current through the corresponding lamp to about zero and extinguish the corresponding lamp.

5. The ballast of claim 1, wherein the inverter continues to operate after at least one lamp is extinguished.

6. The ballast of claim 1, wherein the voltage regulator is further configured to control the inverter output at a lamp igniting voltage,

wherein upon removal of the lamp control signal the voltage regulator controls the inverter output at the lamp igniting voltage, and after a pre-determined period of time the voltage regulator controls the inverter output at the generally constant operational voltage.

7. A ballast for operating a plurality of parallel fluorescent lamps, the ballast comprising: an inverter operatively coupled to a DC input, an output of the inverter providing an inverter output voltage to power the plurality of parallel lamps;

at least one dimming circuit, wherein each dimming circuit comprises a diode and a switch connected in series, and the diode is operatively coupled to a one of the plurality of ballasting capacitors such that closing the switch rectifies a current flowing through the one ballasting capacitor extinguishing the corresponding lamp.

8. The ballast of claim 7, wherein the voltage regulator is further configured to control the inverter output at a lamp igniting voltage, and

wherein upon opening the switch the voltage regulator controls the inverter output at the lamp igniting voltage , and after a pre-determined period of time the voltage regulator controls the inverter output at the generally constant operational voltage.

9. The ballast of claim 8, further comprising:

a re-lamping sense circuit coupled with at least one of the plurality of parallel lamps and operative to generate a re-lamping detection signal indicating the presence or absence of one of the plurality of parallel lamps;

a warm start circuit operative to receive the re-lamping detection signal and detect when a lamp has been added to the ballast while the ballast is operational, and upon detecting that a lamp has been added to the ballast, to cause the voltage regulator to control the inverter output at the lamp igniting voltage for a pre-determined period of time, then to cause the voltage regulator to control the inverter output at the generally constant operational voltage.

10. The ballast of claim 9, wherein closing and opening the switch causes the warm start circuit to detect that a lamp has been added to the ballast.

11. The ballast of claim 8, wherein the switch is configured to receive a lamp control signal, and,

wherein upon receiving the lamp control signal the switch closes and upon removal of the lamp control signal the switch opens.

12. The ballast of claim 8, further comprising a program start circuit operative at start-up to pre-heat cathodes of the plurality of parallel lamps, then to cause the voltage regulator to control the inverter output at the igniting voltage for a pre-determined period of time, then to control the inverter output at the generally constant operational voltage.

13. A method for dimming a fluorescent lamp, the method comprising:

converting a DC input voltage to an inverter output voltage to power the lamp; providing a ballasting capacitor in series with the lamp such that the ballasting capacitor limits a lamp current flowing through the ballasting capacitor and the lamp;

maintaining the inverter output voltage at a generally constant operational voltage such that a lighted lamp remains lighted and an unlighted lamp remains unlighted; and

applying a lamp control signal to the ballasting capacitor such that the ballasting capacitor is charged and the corresponding lamp is extinguished.

14. The method of claim 13, wherein applying the lamp control signal comprises rectifying the lamp current.

15. The method of claim 13, wherein applying the lamp control signal comprises providing a current to charge the ballasting capacitor and extinguish the lamp.

16. The method of claim 13, wherein applying the lamp control signal comprises reducing a current flowing through the lamp to about zero.

17. The method of claim 13, wherein the fluorescent lamp comprises a plurality of fluorescent lamps and applying the lamp control signal comprises extinguishing one or more of the plurality of fluorescent lamps.

18. The method of claim 13, further comprising:

removing the lamp control signal;

maintaining the inverter output voltage at an igniting voltage; and

after a pre-determined period of time, maintaining the inverter output voltage at the generally constant operational voltage.