WO2013078676A1

WO2013078676A1 - Method and device for detecting nand flash page

Info

Publication number: WO2013078676A1
Application number: PCT/CN2011/083372
Authority: WO
Inventors: 郑南成; 何建成; 罗逸夫; 周杰
Original assignee: 华为技术有限公司
Priority date: 2011-12-02
Filing date: 2011-12-02
Publication date: 2013-06-06
Also published as: CN102511040B; CN102511040A

Abstract

The present invention relates to data storage technologies. Specifically, disclosed is a method for detecting a Nand Flash page, comprising: programming a page that is in an idle state after erasure, and before writing data area data and reserve area data of the page, writing a first programming status flag into the page; reading the first programming status flag, so as to determine that the first programming status flag indicates a non-idle state; judging whether the first programming status flag indicates a programming start state, and if the first programming status flag indicates a non-programming start state, determining that the page is aborted. Also disclosed is a device for detecting a Nand Flash page.

Description

Method and device for detecting Nand Flash page

Technical field

The present invention relates to data storage technologies, and more particularly to a method and apparatus for detecting Nand Flash pages. Background technique

With the development of information technology and semiconductor technology, telecommunications equipment is increasingly demanding the capacity and performance of data storage. Nand Flash is widely used in data storage of telecommunication equipment due to its large capacity, fast erasing speed, small size and low cost.

According to the characteristics of the Nand Flash device, during programming, data is sequentially written from the front end of the Data area of the page (Page) until the end of the Spare area of the page. If an abort occurs during programming, such as power-down, reset, etc., the current page data may not be written or the current bit status is not guaranteed, which is likely to cause damage to the current programming data. If the current programming data is critical data of the file system, such as FAT (File Allocation Table), important directory, etc., it will have a very serious impact on the file system.

In the prior art, if an abnormal abort occurs during the programming process, after the system is powered on again, the NCF page is checked by the ECC (Error Correction Code) at the application layer, and the affected page is detected, so that The files or directories where the affected pages are located take appropriate recovery measures to reduce the impact on the file system. However, if the number of error bits in the Nand Flash page exceeds the ECC error detection capability, the application layer cannot detect the affected page and the corrupted file or directory. Therefore, due to the limitation of the error detection capability, the application layer verification cannot accurately detect the Nand Flash page affected by the abort, and cannot effectively eliminate the impact of the abnormal suspension on the file system. Summary of the invention

Embodiments of the present invention provide a method and apparatus for detecting a Nand Flash page, which solves the existing The technology cannot accurately detect the Nand Flash page affected by the abort.

Embodiments of the present invention adopt the following technical solutions:

An aspect of the present invention provides a method for detecting a Nand Flash page, including:

Programming a page that is idle after the erase programming state, writing a first program state flag to the page before writing the data area data and the spare area data of the page;

Reading the first programming state flag, determining that the first programming state flag indicates a non-idle state;

Determining whether the first program state flag indicates a program start state: if the first program state flag indicates a non-program start state, confirming that the page is affected by an abort. Another aspect of the present invention provides a method for detecting a Nand Flash page, including:

Programming a page that is idle after the erase programming state, writing a third program state flag to the page before and after writing data area data and spare area data of the page;

Reading the third programming status flag, determining that the third programming status flag indicates a non-idle state;

Determining whether the third program status flag indicates a program completion status: if the third program status flag indicates a non-program completion status, confirm that the page is affected by an abort. An aspect of the present invention provides a Nand Flash page detecting apparatus, including:

a writing module, configured to program a page whose erasing programming state is idle, and write a first programming status flag to the page before writing the data area data of the page and the spare area data;

a reading module, configured to read the first programming state flag;

a determining module, configured to determine that the first programming state flag indicates a non-idle state;

And a determining module, configured to determine whether the first programming status flag indicates a programming start state: if the first programming status flag indicates a non-programming start state, confirming that the page is affected by an abort. Another aspect of the present invention provides a Nand Flash page detecting apparatus, including: a writing module, configured to program a page that is idle after a program state is erased, and write data area data and spare area data of the page. Writing a third program status flag to the page before and after;

a reading module, configured to read the third programming state flag;

a determining module, configured to determine that the third programming status flag indicates a non-idle state;

The determining module is configured to determine whether the third programming status flag indicates a programming completion state: if the third programming status flag indicates a non-programming completion status, confirm that the page is affected by an abort. The method and device for detecting a Nand Flash page provided by the embodiment of the present invention can accurately detect a page affected by an abort, so as to effectively eliminate the impact of the abnormal suspension on the file system. DRAWINGS

In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings used in the embodiments will be briefly described below. It is obvious that the drawings in the following description are only some embodiments of the present invention. Those skilled in the art can also obtain other drawings based on these drawings without paying creative labor.

FIG. 1 is a schematic structural diagram of a Nand Flash page according to an embodiment of the present invention;

2 is a schematic diagram of a programming state of a Nand Flash page according to an embodiment of the present invention; FIG. 3 is a flowchart of a method for detecting a Nand Flash page according to an embodiment of the present invention; FIG. 4 is another embodiment of the present invention. A flowchart of a method for detecting a Nand Flash page provided by the example;

FIG. 5a is a schematic diagram of a location of a program status flag according to an embodiment of the present invention; FIG.

FIG. 5b is a schematic diagram of programming of an idle status page according to an embodiment of the present invention; FIG.

FIG. 6a is a schematic diagram of a location of a program status flag according to another embodiment of the present invention; FIG. 6b is a schematic diagram of programming of an idle status page according to another embodiment of the present invention; FIG. 7 is a flowchart of a method for detecting a Nand Flash page according to still another embodiment of the present invention;

FIG. 8 is a schematic diagram of a location of a program status flag according to still another embodiment of the present invention; FIG. 8b is a schematic diagram of programming of an idle status page according to still another embodiment of the present invention;

FIG. 9a is a structural block diagram of a Nand Flash page detecting apparatus according to an embodiment of the present invention;

FIG. 9b is a structural block diagram of another Nand Flash page detecting apparatus according to an embodiment of the present invention; FIG.

FIG. 10a is a structural block diagram of a Nand Flash page detecting apparatus according to another embodiment of the present invention; FIG.

FIG. 10b is a structural block diagram of another Nand Flash page detecting apparatus according to another embodiment of the present invention; FIG.

FIG. 11a is a structural block diagram of a Nand Flash page detecting apparatus according to still another embodiment of the present invention; FIG.

Figure lib is a block diagram showing the structure of another Nand Flash page detecting apparatus according to still another embodiment of the present invention. detailed description

Embodiments of the present invention provide a method and apparatus for detecting a Nand Flash page. For a better understanding of the technical solutions of the present invention, the embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

It should be understood that the described embodiments are only a part of the embodiments of the invention, and not all of the embodiments. All other embodiments obtained by a person of ordinary skill in the art based on the embodiments of the present invention without creative efforts are within the scope of the present invention.

Nand Rash consists of multiple blocks, one block consisting of multiple pages ( Page ). Nand Flash minimum erase unit is block, the minimum programming unit is page, write a file (including new write or Update) A programming operation corresponding to one or more pages. As shown in Figure 1, each page of Nand Flash contains a data area (Data Area) and an extended spare area (Spare Area).

In the following embodiments, the programming state of one page is divided into three states of idle, program start, and program completion, as shown in FIG. For an erased block (Block), the programming status of all pages of the block is idle, and all bit values of each page are 1; during programming, that is, data begins to be written until the data is written to the page. The programming state is the start of programming; the programming ends, that is, after the data writing is completed, the programming state of the page is programmed. The first embodiment of the present invention provides a method for detecting a Nand Flash page. The process is as shown in FIG. 3, and the method specifically includes the following steps:

Step S101, program the page whose idle programming state is idle, and write the first programming state flag to the page before writing the data area data of the page and the spare area data.

For an erased block, the programmed state of all pages contained in the block is idle, and all bit values for each page (including all bit values for the first program state flag for each page) are one.

In this embodiment, the first program status flag may be located at the front end of the data area of the page.

Programming a page that is idle after the erase programming state, setting the first program state flag to indicate a program start state, starting from the front end of the data area of the page until the end of the spare area of the page, the sequential write indication programming begins The first programming status flag of the status, normal data area data, normal spare area data.

The first programming state flag can be filled into the page buffer (Page Buffer) along with the data to form the content to be written to the page, and then from the front end of the data area of the page to the end of the spare area of the page, The first program status flag indicating the start state of the program in the page buffer, the normal data area data, and the normal spare area data are sequentially written in the Nand Flash page.

In this embodiment, the first programming state flag may also be located at the front end of the spare area of the page.

Program the page whose idle programming state is idle, and set the first programming state flag to indicate the programming start state, from the front end of the data area of the page to the end of the spare area of the page, The data area data having the bit value of 1 is written, the first program status flag indicating the start state of the program, the spare area data having the bit value of 1, and the normal data area data is sequentially written, indicating the start state of the programming. A programming status flag, normal spare area data.

The first programming state flag may be first filled into the page buffer, and the other portion of the page buffer is set to 1 to form the content to be written to the page, from the front end of the data area of the page to the end of the spare area of the page. And writing the data area data with the bit value of 1 in the page buffer, the first programming status flag indicating the start state of the program, and the spare area data with the bit value of 1 in the Nand Flash page; and then the first programming state The flag is filled with the data into the page cache to form the content to be written to the page. From the front end of the data area of the page to the end of the spare area of the page, the normal data area data and instructions in the page buffer are programmed. The first programming status flag of the start state, the normal spare area data is sequentially written to the Nand Rash page.

Step S102: Read the first programming status flag, and determine that the first programming status flag indicates a non-idle state.

In this embodiment, if the first program state flag is located at the front end of the data area of the page, the first program state flag may be directly read from the content of the page; if the first program state flag is located at the front end of the spare area of the page, the first The programming status flag can be read directly from the contents of the page, or the contents of the backup area can be read, and then the first programming status flag can be extracted from the contents of the backup area.

In this embodiment, when the value of the first programming state flag is all bits, the idle state is indicated. That is, the first program status flag in the page in which the program state is idle after erasing indicates the idle state.

Reading a first program status flag of the page, the value of the first program status flag is not all bits, and determining that the first program status flag indicates a non-idle state; the first program status flag is a value of all bit values If 1, it is determined that the first program status flag indicates an idle state, and the detection of the page is ended.

Step S103, determining whether the first program status flag indicates a program start state: if the first program status flag indicates a non-program start state, it is confirmed that the page is affected by the abnormal suspension.

During the Nand Flash page programming process, if an abort occurs when the first program state flag is written, the Nand Flash page affected by the abort can be detected by the method provided in the first embodiment. The second embodiment of the present invention provides a method for detecting a Nand Flash page. The process is as shown in FIG. 4, and the method specifically includes the following steps:

In this embodiment, the first program status flag and the second program status flag jointly identify three states of page idle, program start, and program completion.

Step S201: program the page whose idle programming state is idle, write the first programming state flag to the page before writing the data area data and the spare area data of the page, and write the data area data of the page and The second program status flag is written to the page after the spare area data.

In this embodiment, the location of the first programming state flag and the location of the second programming state flag may be: the first programming state flag is located at the front end of the data area, and the second programming state flag is located at the end of the spare area, as shown in FIG. 5a. Show.

The page in which the programming state is idle after erasing is programmed, as shown in Fig. 5b, the first programming state flag is set to indicate the programming start state, and the second programming state flag is set to indicate the programming completion state. From the front end of the data area of the page to the end of the spare area of the page, the first program status flag indicating the program start state, the normal data area data, the normal spare area data, and the instruction completion status are sequentially written. Two programming status flags.

The first program state flag and the second program state flag may be padded with the data into the page buffer to form the content to be written to the page, and then from the front end of the data area of the page to the end of the spare area of the page. The first programming status flag indicating the programming start state, the normal data area data, the normal spare area data, and the second programming status flag indicating the programming completion status in the page buffer are sequentially written into the Nand Flash page.

In this embodiment, the location of the first programming state flag and the location of the second programming state flag may also be: the first programming state flag is located at the front end of the spare area of the page, and the second programming state flag is located at the end of the spare area of the page. , as shown in Figure 6a. Programming the page whose idle programming state is idle, as shown in FIG. 6b, setting the first programming state flag to indicate the programming start state, from the front end of the data area of the page to the end of the spare area of the page, Sequentially writing data area data having a bit value of 1, a first program status flag indicating a start state of programming, spare area data having a bit value of 1, and a second program status flag having a bit value of 1: a second programming The status flag is set to indicate a program completion status, and then sequentially writes normal data area data, a first program status flag indicating a program start state, normal spare area data, and a second program status flag indicating a program completion status.

The first program state flag can be filled into the page buffer, and the other portion of the page buffer is set to 1 to form the content to be written to the page, and then from the front end of the data area of the page to the end of the spare area of the page. , the data area data with the bit value of 1 in the page buffer, the first program status flag indicating the start state of the program, the spare area data with the bit value of 1, and the second program status flag with the bit value of 1 are sequentially written. The Nand Flash page; and the first program state flag and the second program state flag are filled with the data into the page buffer to form the content to be written to the page, starting from the front end of the data area of the page until the page The end of the spare area, the normal data area data in the page buffer, the first program status flag indicating the start state of the program, the normal spare area data, and the second program status flag indicating the programming completion status are sequentially written to the Nand Flash page. in.

Step S202: Read the first programming status flag, and determine that the first programming status flag indicates a non-idle state.

Step S202 in this embodiment is similar to the implementation method of step S102 in the first embodiment, and details are not described herein again.

Step S203, determining whether the first programming status flag indicates a programming start state: if the first programming status flag indicates a non-programming start state, confirming that the page is affected by the abnormal suspension;

If the first program status flag indicates a program start state, reading a second program status flag of the page, determining whether the second program status flag indicates a program completion status: if the second program status flag indicates a non-program completion status, confirming the Page affected by abort; if second programming state The flag indicates the programming completion status, and it is confirmed that the page is not affected by the abort.

In this embodiment, the value of the second programming state indication is that when all the bit values are 1, the idle state is indicated. That is, the second program status flag in the page in which the program state is idle after erasing indicates the idle state.

The second program status flag is located at the end of the spare area of the page, can be read directly from the contents of the page, or can read the contents of the backup area, and then extract the second program status flag from the contents of the backup area.

During the Nand Flash page programming process, an abort occurs when writing the contents of the page (including writing data area data, writing spare area data, writing the first program status flag, or writing the second program status flag). The method provided in Example 2 can detect the Nand Flash page affected by the abort. The third embodiment of the present invention provides a method for detecting a Nand Flash page, and the process thereof is as shown in FIG. 7. The method specifically includes the following steps:

In this embodiment, the three states of the page are identified by the third program status flag, idle, program start, and program completion.

Step S301: program the page whose idle programming state is idle, and write the third programming state flag to the page before and after writing the data area data of the page and the spare area data.

In this embodiment, the third programming status flag can be located at the end of the spare area of the page, as shown in Figure 8a.

Programming the page whose idle programming state is idle, as shown in FIG. 8b, setting the third programming state flag to indicate the programming start state, from the front end of the data area of the page to the end of the spare area of the page, Sequentially writing data area data having a bit value of 1, a spare area data having a bit value of 1, a third program status flag indicating a program start state; setting a third program status flag to indicate a program completion status, and sequentially writing The normal data area data, the normal spare area data, and the third program status flag indicating the programming completion status are entered. The third program state flag can be filled into the page cache, and the other bits of the page buffer are set.

1 . constituting the content to be written to the page, and starting from the front end of the data area of the page to the end of the spare area of the page, the data area data having the bit value of 1 in the page buffer and the bit value are all 1 The spare area data, the third programming status flag indicating the programming start state is sequentially written in the Nand Flash page; and the third programming status flag is filled with the data into the page buffer to form a complete content to be written to the page. From the front end of the data area of the page to the end of the spare area of the page, the normal data area data in the page buffer, the normal spare area data, and the third programming status flag indicating the programming completion status are sequentially written to the Nand In the Flash page.

Step S302, reading a third programming status flag, determining that the third programming status flag indicates a non-idle state.

In this embodiment, the third programming state flag is located at the end of the spare area of the page, and can be directly read from the content of the page, or the content of the backup area can be read, and then the third programming state is extracted from the content of the backup area. Sign.

In this embodiment, the third programming state flag takes a value indicating that all bit values are 1, indicating an idle state. That is, the third program status flag of the page whose program state is idle after erasing indicates the idle state.

Reading a third program status flag of the page, the value of the third program status flag is not all bits, and determining that the third program status flag indicates a non-idle state; the third program status flag is a value of all bit values. If 1, it is determined that the first program status flag indicates an idle state, and the detection of the page is ended.

Step S303, determining whether the third programming status flag indicates a programming completion status:

If the third program status flag indicates a non-program completion status, it is confirmed that the page is affected by the abort;

If the third program status flag indicates a program completion status, it is confirmed that the page is not affected by the abort.

During the Nand Flash page programming process, an abnormal abort occurs when the content of the page is written (including writing data, writing the first program state flag, or writing the second program state flag), and the method provided in the third embodiment can detect A Nand Flash page that is affected by an abort. In the first, second and third embodiments, further, all the pages of all the blocks of the Nand Flash can be traversed from the first page of the first block of the Nand Flash, and the Nand Flash page affected by the abort is detected. Then you can find the files or directories where these pages are located, record the files or directories that are corrupted by the data, and isolate the files or directories, and take appropriate recovery measures against the corrupted files or directories to effectively eliminate the abnormal suspension. The impact of the file system.

In the methods provided in the first embodiment, the second programming mode, the first programming state flag, the second programming state flag, and the third programming state flag may indicate: an idle state, a programming start state, and a programming completion state. Wherein, when the programming status flag indicates an idle state, the value is that all bit values are 1.

When the programming status flag indicates the programming start status and the programming completion status, the values that can be selected in different cases are different:

In the first embodiment, the first program state flag is located at the front end of the data area of the page, and the first program state flag can remove any two values or two sector values except the bit value, indicating the programming start state and Programming completion status.

In the second embodiment, the first program state flag is located at the front end of the data area, and the second program state flag is located at the end of the spare area. The first program state flag and the second program state flag can all be removed except that all bit values are 1. Any two values or two segment values indicate the programming start state and programming completion state.

In the following three cases, the method provided by the embodiment performs two repeated programming of the page, and the programming status flag indicates that the value of the programming start state and the programming completion state is limited:

In the first embodiment, the first programming state flag is located at the front end of the spare area of the page;

In the second embodiment, the first programming status flag is located at the front end of the spare area of the page, and the second programming status flag is located at the end of the spare area of the page;

In the third embodiment, the third program status flag is located at the end of the spare area of the page.

The use of Flash programming and erase operations has the feature that the erase process is essentially all The value of the memory cell becomes "1", and programming is to change the value of some memory cells from "Γ to "0". Some bits in the value of the original program status flag are changed from "Γ to "0". , as the value of the programming status flag that is refreshed during programming. This makes it possible to program the page again without erasing the block in which the page is located.

For example: In the first embodiment, the first programming status flag is located at the front end of the spare area of the page.

The first programming status flag is set to indicate the idle state before programming, and the value is all 1s; when the first programming is refreshed to indicate the programming start state, the value taken when the programming start state is indicated indicates the idle state. Some bits in the value taken are changed from "Γ to "0".

For example, in the second embodiment, the first programming status flag is located at the front end of the spare area of the page, and the second programming status flag is located at the end of the spare area of the page.

The second programming status flag is set to indicate the idle state before programming, and the value is all 1s; the second programming time is refreshed to indicate the programming completion state, and the value taken when indicating the programming completion state indicates the idle state. Some bits in the value taken are changed from "Γ to "0".

For example: In the third embodiment, the third programming status flag is located at the end of the spare area of the page.

The third programming status flag is set to indicate the idle state before programming, and the value is that all the bit values are 1; when the first programming is refreshed to indicate the programming start state, the value taken when the programming start state is indicated indicates the idle state. Some of the values taken from the time are changed from "1" to "0"; when the second programming is refreshed to indicate the programming completion state, the value taken when the programming completion state is indicated is the value that is taken when the programming start state is indicated. Some bits in the value are changed from "Γ to "0". The value of the third program status flag indicating the idle state, the programming start state, and the programming completion state can be as follows: Programming status indicates hexadecimal value binary value

Idle Oxffff 11111111 11111111 Programming Start Oxafaf 10101111 10101111 Programming: 3⁄4成 0xa5a5 10100101 10100101

If an abnormal abort occurs during Nand Rash page programming, the Nand Flash page is affected by the abort, including at least one of the following cases: The data of the Nand Flash page cannot be written, and the bit status cannot be guaranteed. A method for detecting a Nand Flash page provided by an embodiment of the present invention, the programming state is written strictly before the data is written and after the data is written, and the Nand Flash page affected by the abnormal abort can be accurately detected and searched. Go to the file or directory where these pages are located, record the corrupted files or directory information, and isolate the files or directories so that the system and upper-layer applications can locate faults and recover from failures, and eliminate the impact of abnormal aborts on the file system. Embodiment 4 of the present invention provides a Nand Flash page detecting apparatus, as shown in FIG. 9a, including a writing module 910, a reading module 920, a determining module 930, and a determining module 940: a writing module 910, To program a page that is idle after the erase programming state, the first program state flag is written to the page before the data area data and spare area data of the page are written.

The reading module 920 is configured to read the first programming status flag.

If the first program status flag is located at the front end of the data area of the page, the first program status flag can be directly read from the content of the page; if the first program status flag is located at the front end of the spare area of the page, the first program status flag can be directly Reading from the contents of the page, the contents of the backup area can also be read, and then the first programming status flag is extracted from the contents of the backup area.

The determining module 930 is configured to determine that the first programming status flag indicates a non-idle state.

The value of the first programming state flag is not all bits, and the first programming state flag is determined. The non-idle state is indicated; the first program state flag takes a value of all bits, and then the first program state flag is determined to indicate an idle state, and the detection of the page is ended.

The determining module 940 is configured to determine whether the first programming status flag indicates a programming start state: if the first programming status flag indicates a non-programming start state, confirm that the page is affected by the abnormal abort.

Optionally, the first programming status flag is located at a front end of the data area of the page. As shown in FIG. 9b, the writing module 910 may include:

a first write sub-module 911, configured to program the page whose erased program state is idle, and set a first program state flag to indicate a program start state, starting from a front end of the data area of the page to the page At the end of the spare area, the first program status flag indicating the start state of the program, the normal data area data, and the normal spare area data are sequentially written.

Optionally, the first programming status flag is located at a front end of the spare area of the page. As shown in FIG. 9b, the writing module 910 may include:

a second write sub-module 912, configured to program the page after the erased program state is idle, and set the first program state flag to indicate a program start state, starting from a front end of the data area of the page to the page At the end of the spare area, the data area data having the bit value of 1 is sequentially written, the first program status flag indicating the start state of the program, the spare area data having the bit value of 1, and the normal data area data and the indication are sequentially written. The first programming status flag of the programming start state, normal spare area data. Embodiment 5 of the present invention provides a Nand Flash page detecting apparatus, as shown in FIG. 10a, including a writing module 1010, a reading module 1020, a determining module 1030, and a determining module 1040: a writing module 1010, After programming the page in which the programming state is idle after erasing, writing the first program status flag to the page before writing the data area data and the spare area data of the page, writing the data area data of the page and the spare area The second programming status flag is written to the page after the data.

The reading module 1020 is configured to read the first programming status flag; and is further configured to read the second programming status flag.

If the first program status flag is located at the front end of the data area of the page, the first program status flag may Reading directly from the content of the page; if the first programming status flag is located at the front end of the spare area of the page, the first programming status flag can be read directly from the content of the page, and the content of the backup area can also be read, and then backed up from the backup The first program status flag is extracted from the contents of the area.

The determining module 1030 is configured to determine that the first programming status flag indicates a non-idle state.

The value of the first program status flag is not all bits, and it is determined that the first program status flag indicates a non-idle state; the first program status flag takes a value of all bits, and the first program status flag is determined. Indicates the idle state and ends the detection of the page.

The determining module 1040 is configured to determine whether the first programming status flag indicates a programming start state: if the first programming status flag indicates a non-programming start state, confirming that the page is affected by the abnormal suspension; if the first programming status flag indicates programming a start state, determining whether the second program status flag indicates a program completion status: if the second program status flag indicates a non-program completion status, confirming that the page is affected by the abort; if the second program status flag indicates a program completion status, Confirm that the page is not affected by an abort.

Optionally, the first programming state flag is located at a front end of the data area of the page, and the second programming state flag is located at an end of the spare area of the page. As shown in FIG. 10b, the writing module 1010 may include:

The third write sub-module 1011 is configured to program the page after the erased program state is idle, set the first program state flag to indicate a program start state, and the second program state flag is set to indicate a program completion state. From the front end of the data area of the page to the end of the spare area of the page, the first program status flag indicating the program start state, the normal data area data, the normal spare area data, and the instruction completion status are sequentially written. Two programming status flags. Optionally, the first programming state flag is located at a front end of the spare area of the page, and the second programming state flag is located at an end of the spare area of the page. As shown in FIG. 10b, the writing module 1010 may include:

a fourth writing sub-module 1012, configured to program the page whose erasing programming state is idle, and set the first programming status flag to indicate a programming start state, starting from a front end of the data area of the page to the page At the end of the spare area, sequentially write data area data having a bit value of 1, a first program status flag indicating a start state of programming, spare area data having a bit value of 1, and a second program status flag having a bit value of 1 Setting the second program status flag to indicate the program completion status, sequentially writing the normal data area data, the first program status flag indicating the program start state, the normal spare area data, and the second program status indicating the program completion status. Sign. Embodiment 6 of the present invention provides a Nand Flash page detecting apparatus, as shown in FIG. 11a, including a writing module 1110, a reading module 1120, a determining module 1130, and a determining module 1140: a writing module 1110, To program a page that is idle after the erase programming state, a third program state flag is written to the page before and after the data area data and spare area data of the page are written.

The reading module 1120 is configured to read the third programming status flag.

The third program status flag is located at the end of the spare area of the page, can be read directly from the contents of the page, or can read the contents of the backup area, and then extract the third program status flag from the contents of the backup area.

The determining module 1130 is configured to determine that the third programming status flag indicates a non-idle state.

The value of the third program status flag is not all bits, and it is determined that the third program status flag indicates a non-idle state; the third program status flag takes a value of all bits, and the first program status flag is determined. Indicates the idle state and ends the detection of the page.

The determining module 1140 is configured to determine whether the third programming status flag indicates a programming completion state: if the third programming status flag indicates a non-program completion status, confirming that the page is affected by the abnormal suspension; if the third programming status flag indicates that the programming is completed Status, confirm that the page is not affected by the abort ring.

Optionally, the third programming state flag is located at an end of the spare area of the page. As shown in FIG. lib, the writing module 1110 may include:

a fifth writing sub-module 1111, configured to program the page whose erasing programming state is idle, and set a third programming status flag to indicate a programming start state, starting from a front end of the data area of the page to the page At the end of the spare area, sequentially write data area data having a bit value of 1, a spare area data having a bit value of 1, a third program status flag indicating a start state of programming, and setting a third program status flag to indicate that programming is completed. The status, and then sequentially writes the normal data area data, the normal spare area data, and the third program status flag indicating the programming completion status. The content of the information exchange, the execution process, and the like between the modules in the foregoing embodiments of the present invention are based on the same concept as the method embodiment of the present invention. For details, refer to the description in the method embodiment of the present invention. Said. The technical solution provided by the embodiment of the present invention can accurately detect the Nand Flash page affected by the abnormal suspension, so as to effectively eliminate the impact of the abnormal suspension on the file system.

A person skilled in the art can understand that all or part of the steps of the foregoing embodiment can be implemented by a computer program to instruct related hardware, and the program can be stored in a computer readable storage medium. In execution, the flow of an embodiment of the methods as described above may be included. The storage medium may be a magnetic disk, an optical disk, a read-only memory (ROM), or a random access memory (RAM).

The above is only the specific embodiment of the present invention, but the scope of the present invention is not limited thereto, and any change or replacement that can be easily conceived by those skilled in the art within the technical scope of the present invention is All should be covered by the scope of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.

Claims

A method for detecting a Nand Flash page, comprising:

For page programming after the erase programming state is idle, the first program state flag is written to the page before the data area data and the spare area data of the page are written;

Reading the first program state flag, determining that the first program state flag indicates a non-idle state; determining whether the first program state flag indicates a program start state: if the first program state flag indicates a non-program start state , confirm that the page is affected by an abort.

2. The method according to claim 1, wherein the method further comprises:

Writing a second program status flag to the page after writing data area data and spare area data of the page;

If the first program status flag indicates a program start state, reading the second program status flag, determining whether the second program status flag indicates a program completion status: if the second program status flag indicates a non-program completion status , confirm that the page is affected by an abort.

3. The method according to claim 1, wherein the first programming state flag is located at a front end of a data area of the page;

The first programming status flag is written to the page, and specifically includes:

The first program state flag indicating the program start state, the normal data area data, and the normal spare area data are sequentially written from the front end of the data area of the page to the end of the spare area of the page.

4. The method according to claim 1, wherein the first programming state flag is located at a front end of a spare area of the page;

Data area data having a bit value of 1, the first program status flag indicating a program start state, and a bit value are sequentially written from the front end of the data area of the page to the end of the spare area of the page. The spare area data is 1; the normal data area data is sequentially written, the first program status flag indicating the programming start state, and the normal spare area data.

5. The method according to claim 2, wherein the first program state flag is located at a front end of a data area of the page, and the second program state flag is located at an end of a spare area of the page;

The flag is written to the page, specifically including:

The first program state flag indicating the program start state, the normal data area data, the normal spare area data, the instruction programming are sequentially written from the front end of the data area of the page to the end of the spare area of the page. The second programming state flag of the completion state.

6. The method according to claim 2, wherein: the first programming state flag is located at a front end of a spare area of the page, and the second programming state flag is located at an end of a spare area of the page;

The flag is written to the page, specifically including:

From the front end of the data area of the page to the end of the spare area of the page, the data area data having the bit value of 1 is sequentially written, the first program status flag indicating the start state of the program, and the bit value are all The spare area data of 1 and the second program status flag having a bit value of 1; sequentially writing normal data area data, the first program status flag indicating a programming start state, normal spare area data, indication The second programming state flag of the programming completion state.

7. A method for detecting a Nand Flash page, comprising:

For page programming after the erase programming state is idle, writing a third program state flag to the page before and after writing data area data and spare area data of the page;

Reading the third program status flag, determining that the third program status flag indicates a non-idle state; determining whether the third program status flag indicates a program completion status: if the third program status flag indicates a non-program completion status , confirm that the page is affected by an abort.

The method according to claim 7, wherein the third programming status flag is located at an end of the spare area of the page;

Data area data having a bit value of 1 and spare area data having a bit value of 1 are sequentially written from the front end of the data area of the page to the end of the spare area of the page, and the instruction indicating the start state of the program is described. The third program status flag; the normal data area data, the normal spare area data, and the third program status flag indicating the programming completion status are sequentially written.

9. A Nand Flash page detecting device, comprising:

a writing module, configured to program a page whose idle programming state is idle, and write a first programming state flag to the page before writing data area data and spare area data of the page;

a reading module, configured to read the first programming state flag;

And a determining module, configured to determine whether the first programming status flag indicates a programming start state: if the first programming status flag indicates a non-programming start state, confirming that the page is affected by an abnormal suspension.

10. The apparatus according to claim 9, wherein the apparatus further comprises: writing a program status flag to the page;

The reading module is further configured to read the second programming state flag;

The determining module is further configured to: if the first programming status flag indicates a programming start state, determine whether the second programming status flag indicates a programming completion state: if the second programming status flag indicates a non-programming completion status, confirming The page is affected by an abort.

11. The apparatus according to claim 9, wherein the first program state flag is located at a front end of a data area of the page;

The writing module includes:

a first write submodule, configured to program the page that is idle after the erased programming state, from the page The front end of the data area starts to the end of the spare area of the page, and the first program status flag indicating the program start state, the normal data area data, and the normal spare area data are sequentially written.

12. The apparatus according to claim 9, wherein the first program state flag is located at a front end of a spare area of the page;

The writing module includes:

a second write sub-module, configured to program the page in which the program state after the erase is idle, from the front end of the data area of the page to the end of the spare area of the page, the sequential write bit values are Data area data of 1, a first program status flag indicating a program start state, spare area data having a bit value of 1; and sequentially writing normal data area data, the first program state indicating a program start state Flag, normal spare area data.

13. The apparatus according to claim 10, wherein: the first program state flag is located at a front end of a data area of the page, and the second program state flag is located at an end of a spare area of the page; The writing module includes:

a third write submodule, configured to program the page in which the program state after the erase is idle, from the front end of the data area of the page to the end of the spare area of the page, sequentially writing the instruction start state The first program state flag, normal data area data, normal spare area data, the second program status flag indicating a program completion status.

14. The apparatus according to claim 10, wherein: the first program state flag is located at a front end of a spare area of the page, and the second program state flag is located at an end of a spare area of the page; The writing module includes:

a fourth write sub-module, configured to program the page in which the program state is idle after erasing, from the front end of the data area of the page to the end of the spare area of the page, sequentially writing bit values Data area data of 1, a first program state flag indicating a program start state, spare area data having a bit value of 1, and the second program status flag having a bit value of 1; and sequentially writing normal data The area data, the first program status flag indicating a program start state, normal spare area data, and the second program status flag indicating a program completion status.

15. A Nand Flash page detecting apparatus, comprising:

a writing module, configured to program a page whose idle programming state is idle, and write a third programming status flag to the page before and after writing data area data and spare area data of the page;

a reading module, configured to read the third programming state flag;

The determining module is configured to determine whether the third programming status flag indicates a programming completion state: if the third programming status flag indicates a non-programming completion status, confirm that the page is affected by the abnormal suspension.

16. The apparatus of claim 15, wherein the third programming state flag is located at an end of a spare area of the page;

The writing module includes:

a fifth writing sub-module, configured to program the page in which the programming state is idle after erasing, from the front end of the data area of the page to the end of the spare area of the page, sequentially writing bit values Data area data of 1, data of spare area with bit value of 1, third program status flag indicating a start state of programming; sequential writing of normal data area data, normal spare area data, indicating completion status of programming The third programming state flag.