WO2013049817A1 - Opto-electrical devices with reduced efficiency droop and forward voltage - Google Patents

Opto-electrical devices with reduced efficiency droop and forward voltage Download PDF

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WO2013049817A1
WO2013049817A1 PCT/US2012/058308 US2012058308W WO2013049817A1 WO 2013049817 A1 WO2013049817 A1 WO 2013049817A1 US 2012058308 W US2012058308 W US 2012058308W WO 2013049817 A1 WO2013049817 A1 WO 2013049817A1
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group
barrier
layers
light emitting
ingan
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French (fr)
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Shuji Nakamura
Steven P. Denbaars
Shinichi Tanaka
Daniel F. Feezell
Yuji Zhao
Chih-Chien Pan
Christian G. Van De Walle
Feng Wu
Qimin YAN
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The Regents Of The University Of California
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H01L33/0062—Processes for devices with an active region comprising only III-V compounds
    • H01L33/0075—Processes for devices with an active region comprising only III-V compounds comprising nitride compounds
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B82—NANOTECHNOLOGY
    • B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y20/00—Nanooptics, e.g. quantum optics or photonic crystals
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/04—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
    • H01L33/06—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/16—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular crystal structure or orientation, e.g. polycrystalline, amorphous or porous
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00—Semiconductor lasers
    • H01S5/30—Structure or shape of the active region; Materials used for the active region
    • H01S5/34—Structure or shape of the active region; Materials used for the active region comprising quantum well or superlattice structures, e.g. single quantum well [SQW] lasers, multiple quantum well [MQW] lasers or graded index separate confinement heterostructure [GRINSCH] lasers
    • H01S5/3407—Structure or shape of the active region; Materials used for the active region comprising quantum well or superlattice structures, e.g. single quantum well [SQW] lasers, multiple quantum well [MQW] lasers or graded index separate confinement heterostructure [GRINSCH] lasers characterised by special barrier layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/26—Materials of the light emitting region
    • H01L33/30—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table
    • H01L33/32—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table containing nitrogen
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/40—Materials therefor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00—Semiconductor lasers
    • H01S5/20—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers
    • H01S5/2004—Confining in the direction perpendicular to the layer structure
    • H01S5/2009—Confining in the direction perpendicular to the layer structure by using electron barrier layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00—Semiconductor lasers
    • H01S5/20—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers
    • H01S5/2004—Confining in the direction perpendicular to the layer structure
    • H01S5/2009—Confining in the direction perpendicular to the layer structure by using electron barrier layers
    • H01S5/2013—MQW barrier reflection layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00—Semiconductor lasers
    • H01S5/30—Structure or shape of the active region; Materials used for the active region
    • H01S5/32—Structure or shape of the active region; Materials used for the active region comprising PN junctions, e.g. hetero- or double- heterostructures
    • H01S5/3202—Structure or shape of the active region; Materials used for the active region comprising PN junctions, e.g. hetero- or double- heterostructures grown on specifically orientated substrates, or using orientation dependent growth
    • H01S5/320275—Structure or shape of the active region; Materials used for the active region comprising PN junctions, e.g. hetero- or double- heterostructures grown on specifically orientated substrates, or using orientation dependent growth semi-polar orientation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00—Semiconductor lasers
    • H01S5/30—Structure or shape of the active region; Materials used for the active region
    • H01S5/32—Structure or shape of the active region; Materials used for the active region comprising PN junctions, e.g. hetero- or double- heterostructures
    • H01S5/3211—Structure or shape of the active region; Materials used for the active region comprising PN junctions, e.g. hetero- or double- heterostructures characterised by special cladding layers, e.g. details on band-discontinuities
    • H01S5/3216—Structure or shape of the active region; Materials used for the active region comprising PN junctions, e.g. hetero- or double- heterostructures characterised by special cladding layers, e.g. details on band-discontinuities quantum well or superlattice cladding layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00—Semiconductor lasers
    • H01S5/30—Structure or shape of the active region; Materials used for the active region
    • H01S5/34—Structure or shape of the active region; Materials used for the active region comprising quantum well or superlattice structures, e.g. single quantum well [SQW] lasers, multiple quantum well [MQW] lasers or graded index separate confinement heterostructure [GRINSCH] lasers
    • H01S5/343—Structure or shape of the active region; Materials used for the active region comprising quantum well or superlattice structures, e.g. single quantum well [SQW] lasers, multiple quantum well [MQW] lasers or graded index separate confinement heterostructure [GRINSCH] lasers in AIIIBV compounds, e.g. AlGaAs-laser, InP-based laser
    • H01S5/34333—Structure or shape of the active region; Materials used for the active region comprising quantum well or superlattice structures, e.g. single quantum well [SQW] lasers, multiple quantum well [MQW] lasers or graded index separate confinement heterostructure [GRINSCH] lasers in AIIIBV compounds, e.g. AlGaAs-laser, InP-based laser with a well layer based on Ga(In)N or Ga(In)P, e.g. blue laser

Definitions

  • the invention is related generally to the field of opto-electrical devices, and more particularly, to Group-Ill nitride light emitting diodes (LEDs) having reduced efficiency droop and forward voltage.
  • LEDs Group-Ill nitride light emitting diodes
  • polarization-induced quantum confined Stark effects reduce the overlap of the electron and hole wavefunctions inside the quantum wells, thereby reducing their radiative recombination efficiency.
  • IQE internal quantum efficiency
  • Efficiency droop results from the decay of the external quantum efficiency (EQE) at high drive currents.
  • EQE external quantum efficiency
  • FIG. 1 is a graph that shows EQE (%) and light output power (LOP) (mW) vs. current density (A/cm 2 ) for an LED device fabricated on a ⁇ 20-2-1 ⁇ GaN semipolar substrate.
  • Group-III-V LEDs e.g., (In,Al,Ga)As and (Al,Ga)InP LEDs
  • nearly all InGaN LEDs exhibit a maximum EQE at a very low current density (typically less than 10 A/cm 2 ).
  • current density typically less than 10 A/cm 2
  • a monotonic decay in EQE is observed even under short-pulse, low-duty-factor, constant temperature injection.
  • Auger recombination current roll-over, electron leakage, carrier injection efficiency, polarization fields, and band filling of localized states.
  • either more LED chips or larger-area LED chips are needed for applications requiring high lumen output, which results in increased wafer area and leads to higher costs.
  • the present invention discloses device structures and methods of fabrication for Group-Ill nitride LEDs that reduce efficiency droop and forward voltage.
  • Group-Ill nitride LEDs comprised of GaN thin films grown by metal organic chemical vapor deposition (MOCVD) on ⁇ 20-2-1 ⁇ semipolar GaN substrates, as well as Group-Ill nitride LEDs comprised of quantum well (QW) active regions having graded barriers that are beneficial for devices having more than three QWs, such as compositionally step-graded (CSG) InGaN barriers.
  • QW quantum well
  • CSG compositionally step-graded
  • Group-Ill nitride LEDs having n-type superlattice layers located below the QW active regions of at least three periods, and p-type superlattice layers located above the QW active regions.
  • FIG. 1 is a graph that shows external quantum efficiency (EQE) (%) and light output power (LOP) (mW) vs. Current Density (A/cm 2 ) for a light emitting diode on a
  • FIG. 2 is a schematic of an LED epi structure on a ⁇ 20-2-1 ⁇ GaN semipolar substrate, according to one embodiment of the present invention.
  • FIG. 3 is a graph that shows Droop Ratio (%) vs. Current Density (A/cm 2 ) for Devices A through E of FIG. 2.
  • FIG. 4 is a graph that shows EQE (%) vs. Current Density (A/cm 2 ) for Devices A through E of FIG. 2.
  • FIG. 5(a) is a schematic diagram illustrating the structure of a light-emitting diode with compositionally step-graded (CSG) InGaN barriers according to one embodiment of the present invention.
  • FIG. 5(b) is a transmission electron microscopy (TEM) image of an active region of a light-emitting diode with CSG InGaN barriers.
  • TEM transmission electron microscopy
  • FIG. 6(a) is a graph of quick electroluminescence testing (QT) output power (mW) vs. stable trimethyl-indium (TMI) flow (seem).
  • FIG. 6(b) is a graph of QT output power (mW) vs. step-graded TMI flow (seem) and efficiency droop (%) vs. step-graded TMI flow (seem).
  • FIG. 7(a) is a graph of Indium content (%) vs. TMI flow (seem).
  • FIG. 7(b) is an x-ray diffraction measurement of Indium content for a TMI flow of 50 seem.
  • FIG. 8 is a graph of external quantum efficiency (EQE) (%) vs. current density (A/cm 2 ) and light output power (mW) vs. current density (A/cm 2 ).
  • FIG. 9(a) is a graph of current (A) vs. voltage (V).
  • FIG. 9(b) is a graph of current (A) vs. voltage (V).
  • LEDs were fabricated on semipolar (20-2-1) freestanding GaN substrates.
  • the (20-2-1) plane is the back side of the (20-21) plane, which has recently been utilized to demonstrate green lasers.
  • the potential of several LED structures on the (20-2-1) plane were examined for the purposes of providing low droop ratios. Some structures were found to be effective at reducing droop, particularly those utilizing large numbers of quantum wells and p-type superlattice layers. For the optimum structure, the droop ratios obtained were 3.0% (at 50 A/cm 2 ), 6.4% (at 100 A/cm 2 ), 10.0% (at 150 A/cm 2 ) and 13.6% (at 200 A/cm 2 ).
  • the LEDs of the present invention were grown on semipolar (20-2-1) freestanding GaN substrates by atmospheric-pressure MOCVD.
  • the substrates were supplied by Mitsubishi Chemical Corporation.
  • FIG. 2 A schematic of the epitaxial structure for Devices A-E is shown in FIG. 2, wherein FIG. 2 illustrates an LED epi structure on ⁇ 20-2-1 ⁇ GaN semipolar substrate. Devices A through E have similar structures.
  • the structure for Device A is comprised of a semipolar ⁇ 20-2-1 ⁇ GaN substrate 200, a 1 ⁇ Si doped (5x l0 18 cm “3 ) n-type GaN layer 202, an n-type superlattice (SL) comprised of 10 periods of GaN / InGaN (3 nm / 3 nm) 204, and an MQW active region 206 comprised of a three period stack of 13 nm GaN barriers and 3 nm InGaN quantum wells, wherein the first GaN barrier is doped with silicon (2xl0 17 cm "3 ).
  • SL n-type superlattice
  • the MQW active region 206 is followed by a p-type superlattice 208 comprised of 5 periods of AlGaN / GaN (2 nm / 2 nm), and a 240 nm Mg-doped (5xl0 18 cm “3 ) p-type GaN layer 210.
  • the structure for Device B is similar to that of Device A, except that it is comprised of a 20 nm AlGaN electron blocking layer (EBL) 208, instead of a 5 period p-type superlattice 208.
  • EBL electron blocking layer
  • Device C is the same as that of Device B, except that it is comprised of 13 nm InGaN barriers in a 3 QW active region 206, although the other layers are the same as those in Device B.
  • Device D is the same as that of Device B, except that it is comprised of 13 nm GaN barriers in a 6 QW active region 206, although the other layers are the same as those in Device B.
  • Device E is the same as that of Device B, except that it is comprised of 13 nm graded InGaN barriers in the active region 206, where the TMI flow changes gradually from 2 seem to 20 seem during the barrier growth.
  • Device E contains a 9 QW active region 206, although the other layers are the same as those in Device B.
  • the typical growth temperature was ⁇ 1000°C for the n-type
  • GaN layer with a V/III ratio (the ratio of NH 3 mole fraction to Trimethyl-Gallium (TMG) mole fraction) of 3000.
  • the active region was grown at a temperature of ⁇ 850°C with a V/III ratio of 12000. All MOCVD growth was performed at atmospheric pressure (AP).
  • the low droop semipolar (20-2-1) LEDs were fabricated by the following process steps:
  • LEDs with 240 x 420 ⁇ 2 mesa sizes were formed by conventional photolithography, followed by chlorine-based inductively coupled plasma (ICP) etching.
  • ICP inductively coupled plasma
  • ITO indium tin oxide
  • n-contacts and p-pads were deposited on the n-GaN layer and the ITO transparent p-contact. 4.
  • the fabricated devices were packaged on a silver header with a silicone dome.
  • the droop ratio was calculated according to Equation 1 below (for example, at 35 A/cm 2 ):
  • Droop Ratio ((Maximum EQE - EQE at 35 A/cm 2 )/Maximum
  • FIG. 3 is a graph that shows the Droop Ratio (%) vs. Current Density (A/cm 2 ) for Devices A through E.
  • the droop ratio of Device B (3 QWs with GaN barriers) was only measured below 100 A/cm 2 due to heating effects and device degradation.
  • the droop ratio in Device E was 0.0% (at 35 A/cm 2 ), 3.0% (at 50 A/cm 2 ), 6.4% (at 100 A/cm 2 ), 10.0% (at 150 A/cm 2 ), and 13.6% (at 200 A/cm 2 ).
  • the droop performance of Device E is superior to that of a previously reported c-plane device with 9 QWs.
  • the peak emission wavelength of the LED was 426 nm at 20 A/cm 2 and 424 nm at 200 A/cm 2 .
  • a variety of structures can assist in achieving low droop. These structures typically involve InGaN barriers, n-type SLs, increased numbers of QWs, and graded InGaN barriers. The addition of InGaN barriers and p- type SLs is very effective for droop reduction in the high current density region.
  • a higher number of QWs also appears to be proportionally effective for droop reduction.
  • this reduction is minimized and the output power is maintained even for a large number of QWs.
  • the pulsed output power at 20 mA for Devices A through E are 26.6 mW, 20.3 mW, 23.4 mW, 28.5 mW and 24.7 mW, respectively.
  • the peak emission wavelength at 20 mA pulsed for these LEDs is around 425 nm.
  • the device with the highest output power is Device D (6 QWs with GaN barriers).
  • the 5 period p-type SL is effective for output power enhancement. For a 3 QW device, the addition of the 5 period p-type SL leads to nearly the same output power in the high current density region as the 6 QW and 9 QW devices without the 5 period p-type SL.
  • FIG. 4 is a graph that shows the EQE (%) vs. Current Density (A/cm 2 ) for
  • Devices A through E The highest EQE is observed for Device D (6 QWs with GaN barriers). The maximum EQE is shifted to the higher current density region in the devices with the 5 period p-type SL (Device A) and in the devices with 9 QWs and graded InGaN barriers (Device E).
  • LEDs grown on semipolar (20-2-1) GaN were shown to have reduced blue shift and lower Full Width at Half Maximum (FWHM) as compared to LEDs grown on c-plane GaN. This difference is particularly strong for high Indium compositions (i.e., long wavelength emitters).
  • FWHM Full Width at Half Maximum
  • QWs grown on semipolar (20-2-1) GaN may have superior alloy uniformity to those grown on c-plane GaN.
  • alloy scattering has been implicated as one source of Auger recombination in InGaN/GaN LEDs. With superior alloy uniformity, alloy scattering should be reduced. This may account for the reduced efficiency droop observed for LEDs grown on semipolar (20-2-1) GaN.
  • the preferred embodiment of the present invention is an LED grown on GaN semipolar ⁇ 20-2-1 ⁇ substrate in which the structure incorporates an n-type SL below the active layer, a nine period MQW (with graded InGaN barriers), where the TMI flow changes gradually from 2 seem to 20 seem during the barrier growth.
  • MQW with graded InGaN barriers
  • active region design such as modifying the number of QWs, the thickness of the QWs, the composition of QWs and barriers, and the doping level of active regions are possible alternatives.
  • the SL layers on the n-side and p-side may also be modified.
  • either of these layers may be omitted, contain a different number of periods, have alternative compositions or dopings, or be grown with different thicknesses than shown in the preferred embodiment.
  • the present invention may also be used with nonpolar devices, as well as semipolar devices.
  • Optical devices using the present invention include solar cells, laser diodes and optical devices other than the light emitting diodes discussed herein.
  • process steps include various other possible epitaxial growth techniques (such as MBE, MOCVD, etc.), different dry-etching techniques (such as ICP, RIE, FIB, CMP, CAIBE, etc.), formation of high light extraction structures, flip chip LEDs, vertical structure LEDs, thin GaN LEDs, chip-shaped LEDs, advanced packaging methods such as a suspended package, transparent stand package, etc.
  • epitaxial growth techniques such as MBE, MOCVD, etc.
  • dry-etching techniques such as ICP, RIE, FIB, CMP, CAIBE, etc.
  • formation of high light extraction structures such as flip chip LEDs, vertical structure LEDs, thin GaN LEDs, chip-shaped LEDs, advanced packaging methods such as a suspended package, transparent stand package, etc.
  • n-SLs have been utilized in many LED structures (e.g., c-plane, semipolar sapphire substrate based-LED, SiC substrate based-LED, and other kinds of compound semiconductor substrates), most of the semipolar GaN-substrate -based LEDs have not adopted n-SLs due to a lack of evidence of improvement in device properties (e.g., output power) with their addition.
  • the n-SLs implemented in this invention are grown with Si 2 H 6 flow and each layer in the n-SLs is doped with Silicon. If an LED grown on ⁇ 20-2-1 ⁇ contains these n-SLs, the LED will typically have a low droop ratio.
  • n-SLs is located below the QWs, a higher number of QWs (more than three periods QW) can be utilized. Additionally, the graded InGaN barrier structure is effective for a device having more than three QWs with the least decay of output power.
  • the present invention also employs compositionally step-graded (CSG) InGaN barriers instead of standard GaN barriers in LED devices to reduce droop.
  • CSG compositionally step-graded
  • InGaN barriers allows for some degree of polarization matching between the QWs and barriers, which results in improved overlap between the electron and hole wavefunctions and higher radiative efficiency, as compared to LEDs without InGaN barriers.
  • band-diagram simulations of structures with CSG InGaN barriers show curvature in the valence and conduction band profiles of the barriers, which reduces the potential barriers for electron and hole transport, allowing carriers to distribute more uniformly amongst the QWs, as compared to LEDs without CSG InGaN barriers.
  • the average carrier density per QW can be reduced, as compared to LEDs without CSG InGaN barriers.
  • the efficiency droop in such a structure can be reduced, as efficiency droop is believed to be the result of the Auger recombination rate, which is proportional to the third power of the carrier density.
  • LEDs with reduced droop are attractive from a cost standpoint, and thus will likely be used in LEDs for applications such as backlighting (televisions, mobile device displays, etc.), streetlights, automotive lighting, general illumination (indoor and outdoor), etc.
  • Reduced droop allows for the operation of the devices at high current densities (beyond 100 A/cm 2 ) while maintaining lumen output. This would allow for a reduction in the device footprint, which would save on substrate costs.
  • FIG. 5(a) is a schematic diagram of a blue LED (emitting blue light at about 440 nm) with CSG InGaN barriers, wherein the LED is grown on a c-plane patterned sapphire substrate 500 using MOCVD.
  • the LED includes a 3 ⁇ m-thick undoped GaN layer 502, a 6 ⁇ m-thick n-type GaN layer 504 with an electron concentration of 5 x 10 18 cm "3 , followed by a 30 pair Ino.01Gao.99N/GaN (3/3 nm) superlattice 506.
  • FIG. 5(b) is a transmission electron microscopy (TEM) image of the MQW active region 508.
  • TEM transmission electron microscopy
  • Mg doping may be added to the CSG InGaN barriers, which may lead to further improvements in hole transport within the active region 508.
  • EBL electron blocking layer
  • a 240 x 420 ⁇ 2 diode mesa is formed by chlorine-based reactive ion etching (RIE).
  • ITO layer 514 A 250- nm-thick Indium-Tin-Oxide (ITO) layer 514 is used as a transparent p-contact, and Ti/Al/Ni/Au layers 516 (with respective thicknesses of 10/100/10/100 nm) are deposited as an n-GaN contact. Finally, thick Ti/Au metal stack layers 518, 520 having respective thicknesses of 20/500 nm are deposited on top of both the ITO layer 514 and the n-GaN contact 516 to serve as p-side and n-side wire bond pads, respectively.
  • ITO Indium-Tin-Oxide
  • the structure of the InGaN / CSG InGaN MQW active region 508 is illustrated by a graph 522 of its potential energy function, wherein the conduction band (Ec) is shown as a function of position, distance, or thickness.
  • the step structure indicates a change in the composition of the structure, i.e., each of the CSG InGaN barriers has differing Indium compositions at different step locations of each barrier.
  • each of the CSG InGaN barriers has a material composition that creates an energy diagram showing a staircase for the differing Indium compositions at the different step locations of the barrier.
  • the differing Indium compositions at the different step locations of the barrier result from differing flows of TMI during growth of the barrier, wherein the differing flows of TMI result when the TMI flow is graded by steps, as described in more detail below.
  • a reference c-plane blue LED with GaN barriers was fabricated with the same structure and wavelength, but without the CSG barriers, for the purposes of comparison, as described below.
  • Quick electroluminescence testing was performed by simply putting Indium dots on the p-GaN and n-GaN layers as p-contact and n-contact, respectively, and measuring the LOP by using a detector underneath the sample.
  • Encapsulated devices were tested in both DC and pulsed modes.
  • the tests were done at room temperature (RT) with forward currents up to 200 mA.
  • InGaN barriers Indium content barriers
  • TMI flows during the barrier growth can be utilized to reduce strain-induced polarization, and this can be realized by increasing TMI flows during the barrier growth.
  • the QT power of InGaN/InGaN LEDs dramatically drop using a stable TMI flow above 10 seem for the barrier growth.
  • the reason for the power drop may be due to the smaller conduction and valence band offsets between quantum wells and barriers with increasing Indium contents in the barriers.
  • carriers are not well confined inside the quantum wells and the radiative efficiency is reduced.
  • blue LEDs with CSG InGaN barriers maintain high QT power levels (instead of dramatically dropping) when the TMI flow is graded by steps from 0 seem to 10, 20, 30, and 40 seem, as can be seen in FIG. 6(b).
  • the step-graded TMI flow range in the barriers in the optimized devices was selected to be from 0 to 20 seem because the encapsulated device showed the lowest efficiency droop (13.3% at current density of 200 A/cm 2 ) at these conditions.
  • the efficiency droop at a given current is calculated by:
  • FIG. 7(a) shows the Indium content corresponding to TMI flows up to 100 seem under a growth temperature of 915 °C. From the figure, it can be determined that the Indium content ranges from about 0% to about 1.2% for a TMI flow of about 0-20 seem.
  • FIG. 7(b) is an X-ray diffraction measurement showing the Indium content for a TMI flow of 50 seem.
  • FIG. 8 is a graph of EQE (%) vs. current density (A/cm 2 ) and LOP (mW) vs. current density (A/cm 2 ) for both an InGaN/GaN blue c-plane LED and a CSG InGaN blue c-plane LED at different current densities under pulsed operation (1% duty cycle).
  • This graph shows the advantages of achieving low efficiency droop by using CSG InGaN barriers in the LED structure.
  • Table 1 corresponding efficiency droops at different current densities
  • the efficiency droop can be reduced to 2.7%, 5.34% and 11.06% at 50, 100 and 200 A/cm 2 , respectively, which comprise the lowest efficiency droops as compared to the efficiency droops for LEDs using GaN or InGaN barriers.
  • FIG. 9(a) is a graph of current (A) vs. voltage (V) showing the I-V
  • the forward voltage can be reduced from 3.81 V to 3.45 V at an injection current of 20 mA by using CSG InGaN barriers instead of GaN barriers.
  • FIG. 9(b) is a graph of current (A) vs. voltage (V) showing the I-V characteristics of blue LEDs using different thicknesses for the CSG InGaN barriers.
  • the inventors further investigated the effect of forward voltages by reducing the barrier growth time for each InGaN steps as well as reducing the total thickness of CSG InGaN barriers, and, as shown in FIG. 9(b), the forward voltage can be further reduced from 3.45 V to 3.32 V and 3.21 V at an injection current of 20 mA by using 16 nm and 8 nm CSG InGaN barriers, respectively.
  • These terms as used herein are intended to be broadly construed to include respective nitrides of the single species, Al, Ga, and In, as well as binary, ternary and quaternary compositions of such Group-Ill metal species. Accordingly, these terms include, but are not limited to, the compounds of A1N, GaN, InN, AlGaN, AlInN,
  • compositions and materials within the scope of the invention may further include quantities of dopants and/or other impurity materials and/or other inclusional materials.
  • This invention also covers the selection of particular crystal orientations, directions, terminations and polarities of Group-Ill nitrides.
  • braces, ⁇ ⁇ denotes a set of symmetry-equivalent planes, which are represented by the use of parentheses, ( ).
  • brackets, [ ] denotes a direction
  • brackets, ⁇ > denotes a set of symmetry-equivalent directions.
  • Group-Ill nitride devices are grown along a polar orientation, namely a c-plane ⁇ 0001 ⁇ of the crystal, although this results in an undesirable quantum- confined Stark effect (QCSE), due to the existence of strong piezoelectric and spontaneous polarizations.
  • One approach to decreasing polarization effects in Group- Ill nitride devices is to grow the devices along nonpolar or semipolar orientations of the crystal.
  • the term "nonpolar" includes the ⁇ 11-20 ⁇ planes, known collectively as biplanes, and the ⁇ 10-10 ⁇ planes, known collectively as m-planes. Such planes contain equal numbers of Group-Ill and Nitrogen atoms per plane and are charge-neutral. Subsequent nonpolar layers are equivalent to one another, so the bulk crystal will not be polarized along the growth direction.
  • semipolar can be used to refer to any plane that cannot be classified as c-plane, a-plane, or m-plane.
  • a semipolar plane would be any plane that has at least two nonzero h, i, or k Miller indices and a nonzero 1 Miller index. Subsequent semipolar layers are equivalent to one another, so the crystal will have reduced polarization along the growth direction.

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Abstract

Device structures and methods of fabrication for Group-Ill nitride light emitting diodes (LEDs) that reduce efficiency droop and forward voltage. These include Group-Ill nitride LEDs comprised of GaN thin films grown by metal organic chemical vapor deposition (MOCVD) on {20-2-1} semipolar GaN substrates, as well as Group-Ill nitride LEDs comprised of quantum well (QW) active regions having graded barriers that are beneficial for devices having more than three QWs, such as compositionally step-graded (CSG) InGaN barriers. These also include Group-Ill nitride LEDs having n-type superlattice layers located below the QW active regions, and p-type superlattice layers located above the QW active regions.

Description

OPTO-ELECTRICAL DEVICES
WITH REDUCED EFFICIENCY DROOP AND FORWARD VOLTAGE
CROSS REFERENCE TO RELATED APPLICATIONS
This application claims the bene it under 35 U.S.C. Section 119(e) of copending and commonly-assigned applications:
U.S. Provisional Application Serial No. 61/541,756, filed on
September 30, 2011, by Shuji Nakamura, Steven P. DenBaars, Shinichi
Tanaka, Daniel F. Feezell, Yuji Zhao, and Chih-Chien Pan, entitled "OPTO- ELECTRICAL DEVICES," attorneys' docket number 30794.424-US-P1
(2012-083-1); and
U.S. Provisional Application Serial No. 61/550,736, filed on October 24, 2011, by Steven P. DenBaars, Shuji Nakamura, Christian G. Van de Walle, Feng Wu, Daniel F. Feezell, Chih-Chien Pan, and Qimin Yan, entitled "REDUCTION IN EFFICIENCY DROOP AND FORWARD VOLTAGE BY USING
COMPOSITIONALLY STEP-GRADED INDIUM GALLIUM NITRIDE
BARRIERS," attorneys' docket number 30794.430-US-P1 (2012-159-1);
both of which applications are incorporated by reference herein.
This application is related to the following co-pending and commonly- assigned applications:
U.S. Utility Patent Application Serial No. 13/283,193, filed on October 27, 2011, by Shuji Nakamura, Steven P. DenBaars, Shinichi Tanaka, Junichi Sonoda, Hung Tse Chen, and Chih-Chien Pan, entitled "LIGHT EMITTING DIODE FOR DROOP IMPROVEMENT," attorneys' docket number 30794.394-US-Ul (2011-169-2), which application claims the benefit under 35 U.S.C. Section 119(e) of co-pending and commonly-assigned U.S. Provisional Patent Application Serial No. 61/407,343, filed on October 27, 2010, by Shuji Nakamura, Steven P. DenBaars, Shinichi Tanaka, Junichi Sonoda, Hung Tse Chen, and Chih-Chien Pan, entitled "LIGHT EMITTING DIODE FOR DROOP IMPROVEMENT," attorneys' docket number 30794.394-US-P1 (2011- 169-1);
U.S. Utility Patent Application Serial No. 13/282,794, filed on October 27, 2011, by Roy B. Chung, Changseok Han, Steven P. DenBaars, James S. Speck, and Shuji Nakamura, entitled "METHOD FOR REDUCTION OF EFFICIENCY DROOP USING AN (Al,In,Ga)N/Al(x)In(l-x)N SUPERLATTICE ELECTRON BLOCKING LAYER IN NITRIDE BASED LIGHT EMITTING DIODES," attorneys' docket number 30794.399-US-U1 (2011-230-2), which application claims the benefit under 35 U.S.C. Section 119(e) of co-pending and commonly-assigned U.S. Provisional Patent Application Serial No. 61/407,362, filed on October 27, 2010, by Roy B.
Chung, Changseok Han, Steven P. DenBaars, James S. Speck, and Shuji Nakamura, entitled "METHOD FOR REDUCTION OF EFFICIENCY DROOP USING AN (Al,In,Ga)N/Al(x)In(l-x)N SUPERLATTICE ELECTRON BLOCKING LAYER IN NITRIDE BASED LIGHT EMITTING DIODES," attorneys' docket number 30794.399-US-P1 (2011-230-1);
U.S. Utility Patent Application Serial No. 13/283,259, filed on October 27, 2011, by Yuji Zhao, Junichi Sonoda, Chih-Chien Pan, Shinichi Tanaka, Steven P. DenBaars, and Shuji Nakamura, entitled "HIGH POWER, HIGH EFFICIENCY AND LOW EFFICIENCY DROOP III-NITRIDE LIGHT-EMITTING DIODES ON SEMIPOLAR {20-2-1 } SUBSTRATES," attorneys' docket number 30794.403-US- Ul (2011-258-2), which application claims the benefit under 35 U.S.C. Section 119(e) of co-pending and commonly-assigned U.S. Provisional Patent Application Serial No. 61/407,357, filed on October 27, 2010, by Yuji Zhao, Junichi Sonoda, Chih-Chien Pan, Shinichi Tanaka, Steven P. DenBaars, and Shuji Nakamura, entitled "HIGH POWER, HIGH EFFICIENCY AND LOW EFFICIENCY DROOP III- NITRIDE LIGHT-EMITTING DIODES ON SEMIPOLAR {20-2-1 }
SUBSTRATES," attorneys' docket number 30794.403-US-P1 (2011-258-1);
U.S. Utility Patent Application Serial No. 13/493,430, filed on June 11, 2012, by Shuji Nakamura, Steven P. DenBaars, Shinichi Tanaka, Daniel F. Feezell, Yuji Zhao, and Chih-Chien Pan, entitled "LOW DROOP LIGHT EMITTING DIODE STRUCTURE ON GALLIUM NITRIDE SEMIPOLAR {20-2-1 } SUBSTRATES," attorneys' docket number 30794.415-US-U1 (2011-832-2), which application claims the benefit under 35 U.S.C. Section 119(e) of co-pending and commonly-assigned U.S. Provisional Patent Application Serial No. 61/495,829, filed on June 10, 2011, by Shuji Nakamura, Steven P. DenBaars, Shinichi Tanaka, Daniel F. Feezell, Yuji Zhao, and Chih-Chien Pan, entitled "LOW DROOP LIGHT EMITTING DIODE
STRUCTURE ON GALLIUM NITRIDE SEMIPOLAR {20-2-1 } SUBSTRATES," attorneys' docket number 30794.415-US-P1 (2011-832-1); and
U.S. Utility Patent Application Serial No. 13/493,483, filed on June 11, 2012, by Shuji Nakamura, Steven P. DenBaars, Daniel F. Feezell, Chih-Chien Pan, Yuji Zhao, and Shinichi Tanaka, entitled "HIGH EMISSION POWER AND LOW
EFFICIENCY DROOP SEMIPOLAR {20-2-1 } BLUE LIGHT EMITTING
DIODES," attorneys' docket number 30794.416-US-U1 (2011-833-2), which application claims the benefit under 35 U.S.C. Section 119(e) of co-pending and commonly-assigned U.S. Provisional Patent Application Serial No. 61/495,840, filed on June 10, 2011, by Shuji Nakamura, Steven P. DenBaars, Daniel F. Feezell, Chih- Chien Pan, Yuji Zhao, and Shinichi Tanaka, entitled "HIGH EMISSION POWER AND LOW EFFICIENCY DROOP SEMIPOLAR {20-2-1 } BLUE LIGHT
EMITTING DIODES," attorneys' docket number 30794.416-US-P1 (2011-833-1); all of which applications are incorporated by reference herein.
BACKGROUND OF THE INVENTION
1. Field of the Invention.
The invention is related generally to the field of opto-electrical devices, and more particularly, to Group-Ill nitride light emitting diodes (LEDs) having reduced efficiency droop and forward voltage. 2. Description of the Related Art.
In state-of-art c-plane InGaN/GaN multiple-quantum well (MQW) LEDs, polarization-induced quantum confined Stark effects (QCSE) reduce the overlap of the electron and hole wavefunctions inside the quantum wells, thereby reducing their radiative recombination efficiency. Moreover, the internal quantum efficiency (IQE) of LEDs reaches its peak at very low current densities, typically <10 A/cm2, and monotonically decreases with further increasing injection current, which is a critical restriction for high power LED applications.
This phenomenon, known as "efficiency droop," results from the decay of the external quantum efficiency (EQE) at high drive currents. Efficiency droop becomes more severe when the peak emission wavelength of LEDs increases from the ultraviolet (UV) spectral range toward the blue and green spectral range.
In order to reduce the polarization-induced QCSE, there are some growth techniques which have been used to mitigate the efficiency droop. For example, blue MQW InGaN LEDs with InGaN or AlGaInN barriers show smaller power rollovers in the high-current-density region due to polarization matching between the quantum wells. The addition of ternary alloys reduces the strain-induced polarization and less band bending occurs in the quantum well, thereby reducing the magnitude of QCSE.
For example, (Al,Ga,In)N opto-electrical devices may be grown on polar {0001 }, nonpolar {11-20} and {10-10}, and semipolar {10-1-1 }, {11-22} and {20- 21 } GaN crystal planes. The droop ratio of devices grown on these planes is about 20% (430nm, 35A/cm2). FIG. 1 is a graph that shows EQE (%) and light output power (LOP) (mW) vs. current density (A/cm2) for an LED device fabricated on a {20-2-1 } GaN semipolar substrate.
Unlike other Group-III-V LEDs (e.g., (In,Al,Ga)As and (Al,Ga)InP LEDs), nearly all InGaN LEDs exhibit a maximum EQE at a very low current density (typically less than 10 A/cm2). As current density is increased beyond 10 A/cm2, a monotonic decay in EQE is observed even under short-pulse, low-duty-factor, constant temperature injection. Many theories regarding its origins have been reported, such as Auger recombination, current roll-over, electron leakage, carrier injection efficiency, polarization fields, and band filling of localized states. As a result of droop, either more LED chips or larger-area LED chips are needed for applications requiring high lumen output, which results in increased wafer area and leads to higher costs.
Nonetheless, there remains a need in the art for improved methods of fabricating III -nitride LEDs that address these problems. The present invention satisfies this need.
SUMMARY OF THE INVENTION
To overcome the limitations in the prior art described above, and to overcome other limitations that will become apparent upon reading and understanding the present specification, the present invention discloses device structures and methods of fabrication for Group-Ill nitride LEDs that reduce efficiency droop and forward voltage. These include Group-Ill nitride LEDs comprised of GaN thin films grown by metal organic chemical vapor deposition (MOCVD) on {20-2-1 } semipolar GaN substrates, as well as Group-Ill nitride LEDs comprised of quantum well (QW) active regions having graded barriers that are beneficial for devices having more than three QWs, such as compositionally step-graded (CSG) InGaN barriers. These also include Group-Ill nitride LEDs having n-type superlattice layers located below the QW active regions of at least three periods, and p-type superlattice layers located above the QW active regions.
BRIEF DESCRIPTION OF THE DRAWINGS
Referring now to the drawings in which like reference numbers represent corresponding parts throughout:
FIG. 1 is a graph that shows external quantum efficiency (EQE) (%) and light output power (LOP) (mW) vs. Current Density (A/cm2) for a light emitting diode on a
{20-2-1 } GaN semipolar substrate. FIG. 2 is a schematic of an LED epi structure on a {20-2-1 } GaN semipolar substrate, according to one embodiment of the present invention.
FIG. 3 is a graph that shows Droop Ratio (%) vs. Current Density (A/cm2) for Devices A through E of FIG. 2.
FIG. 4 is a graph that shows EQE (%) vs. Current Density (A/cm2) for Devices A through E of FIG. 2.
FIG. 5(a) is a schematic diagram illustrating the structure of a light-emitting diode with compositionally step-graded (CSG) InGaN barriers according to one embodiment of the present invention.
FIG. 5(b) is a transmission electron microscopy (TEM) image of an active region of a light-emitting diode with CSG InGaN barriers.
FIG. 6(a) is a graph of quick electroluminescence testing (QT) output power (mW) vs. stable trimethyl-indium (TMI) flow (seem).
FIG. 6(b) is a graph of QT output power (mW) vs. step-graded TMI flow (seem) and efficiency droop (%) vs. step-graded TMI flow (seem).
FIG. 7(a) is a graph of Indium content (%) vs. TMI flow (seem).
FIG. 7(b) is an x-ray diffraction measurement of Indium content for a TMI flow of 50 seem.
FIG. 8 is a graph of external quantum efficiency (EQE) (%) vs. current density (A/cm2) and light output power (mW) vs. current density (A/cm2).
FIG. 9(a) is a graph of current (A) vs. voltage (V).
FIG. 9(b) is a graph of current (A) vs. voltage (V).
DETAILED DESCRIPTION OF THE INVENTION
In the following description of the preferred embodiment, reference is made to the accompanying drawings which form a part hereof, and in which is shown by way of illustration a specific embodiment in which the invention may be practiced. It is to be understood that other embodiments may be utilized and structural changes may be made without departing from the scope of the present invention. LOW DROOP SEMIPOLAR (20-2-1) LEDS
In the present invention, LEDs were fabricated on semipolar (20-2-1) freestanding GaN substrates. The (20-2-1) plane is the back side of the (20-21) plane, which has recently been utilized to demonstrate green lasers. The potential of several LED structures on the (20-2-1) plane were examined for the purposes of providing low droop ratios. Some structures were found to be effective at reducing droop, particularly those utilizing large numbers of quantum wells and p-type superlattice layers. For the optimum structure, the droop ratios obtained were 3.0% (at 50 A/cm2), 6.4% (at 100 A/cm2), 10.0% (at 150 A/cm2) and 13.6% (at 200 A/cm2). These droop ratios are low in comparison to those reported for other LEDs operating at similar current densities and wavelengths. As a result, it is believed that semipolar (20-2-1) GaN LEDs are promising for high-brightness applications requiring high current densities, such as general illumination and automotive lighting. Technical Description
The LEDs of the present invention were grown on semipolar (20-2-1) freestanding GaN substrates by atmospheric-pressure MOCVD. The substrates were supplied by Mitsubishi Chemical Corporation.
A schematic of the epitaxial structure for Devices A-E is shown in FIG. 2, wherein FIG. 2 illustrates an LED epi structure on {20-2-1 } GaN semipolar substrate. Devices A through E have similar structures.
The structure for Device A is comprised of a semipolar {20-2-1 } GaN substrate 200, a 1 μιη Si doped (5x l018 cm"3) n-type GaN layer 202, an n-type superlattice (SL) comprised of 10 periods of GaN / InGaN (3 nm / 3 nm) 204, and an MQW active region 206 comprised of a three period stack of 13 nm GaN barriers and 3 nm InGaN quantum wells, wherein the first GaN barrier is doped with silicon (2xl017 cm"3). The MQW active region 206 is followed by a p-type superlattice 208 comprised of 5 periods of AlGaN / GaN (2 nm / 2 nm), and a 240 nm Mg-doped (5xl018 cm"3) p-type GaN layer 210. The structure for Device B is similar to that of Device A, except that it is comprised of a 20 nm AlGaN electron blocking layer (EBL) 208, instead of a 5 period p-type superlattice 208.
The structure for Device C is the same as that of Device B, except that it is comprised of 13 nm InGaN barriers in a 3 QW active region 206, although the other layers are the same as those in Device B.
The structure for Device D is the same as that of Device B, except that it is comprised of 13 nm GaN barriers in a 6 QW active region 206, although the other layers are the same as those in Device B.
The structure for Device E is the same as that of Device B, except that it is comprised of 13 nm graded InGaN barriers in the active region 206, where the TMI flow changes gradually from 2 seem to 20 seem during the barrier growth.
Additionally, Device E contains a 9 QW active region 206, although the other layers are the same as those in Device B.
In each instance, the typical growth temperature was ~1000°C for the n-type
GaN layer, with a V/III ratio (the ratio of NH3 mole fraction to Trimethyl-Gallium (TMG) mole fraction) of 3000. The active region was grown at a temperature of ~850°C with a V/III ratio of 12000. All MOCVD growth was performed at atmospheric pressure (AP).
Specifically, the low droop semipolar (20-2-1) LEDs were fabricated by the following process steps:
1. LEDs with 240 x 420 μιη2 mesa sizes were formed by conventional photolithography, followed by chlorine-based inductively coupled plasma (ICP) etching.
2. An indium tin oxide (ITO) transparent p-contact was deposited by electron beam deposition.
3. Ti/Al/Au n-contacts and p-pads were deposited on the n-GaN layer and the ITO transparent p-contact. 4. The fabricated devices were packaged on a silver header with a silicone dome.
5. All measurements were carried out under pulsed operation (1 kHz frequency and 1% duty cycle) at room temperature to prevent self-heating effects, and the optical emission power was measured in a calibrated integrating sphere.
The droop ratio was calculated according to Equation 1 below (for example, at 35 A/cm2):
Equation 1
Droop Ratio = ((Maximum EQE - EQE at 35 A/cm2)/Maximum
EQE)* 100(%)
The details of the LED structures of Devices A through E are described in Table 1 below.
Figure imgf000010_0001
FIG. 3 is a graph that shows the Droop Ratio (%) vs. Current Density (A/cm2) for Devices A through E. The droop ratio of Device B (3 QWs with GaN barriers) was only measured below 100 A/cm2 due to heating effects and device degradation. The figure shows that Device E (9 QWs with graded InGaN barriers) has the best droop performance. The droop ratio in Device E was 0.0% (at 35 A/cm2), 3.0% (at 50 A/cm2), 6.4% (at 100 A/cm2), 10.0% (at 150 A/cm2), and 13.6% (at 200 A/cm2). The droop performance of Device E is superior to that of a previously reported c-plane device with 9 QWs.
The peak emission wavelength of the LED was 426 nm at 20 A/cm2 and 424 nm at 200 A/cm2. As shown in FIG. 2, a variety of structures can assist in achieving low droop. These structures typically involve InGaN barriers, n-type SLs, increased numbers of QWs, and graded InGaN barriers. The addition of InGaN barriers and p- type SLs is very effective for droop reduction in the high current density region.
A higher number of QWs also appears to be proportionally effective for droop reduction. In general, it is difficult to increase the number of QWs in semipolar LEDs due to an observed reduction in output power. However, with the graded barrier structure, such as in Device E, this reduction is minimized and the output power is maintained even for a large number of QWs.
The pulsed output power at 20 mA for Devices A through E are 26.6 mW, 20.3 mW, 23.4 mW, 28.5 mW and 24.7 mW, respectively. The peak emission wavelength at 20 mA pulsed for these LEDs is around 425 nm. The device with the highest output power is Device D (6 QWs with GaN barriers). The 5 period p-type SL is effective for output power enhancement. For a 3 QW device, the addition of the 5 period p-type SL leads to nearly the same output power in the high current density region as the 6 QW and 9 QW devices without the 5 period p-type SL.
FIG. 4 is a graph that shows the EQE (%) vs. Current Density (A/cm2) for
Devices A through E. The highest EQE is observed for Device D (6 QWs with GaN barriers). The maximum EQE is shifted to the higher current density region in the devices with the 5 period p-type SL (Device A) and in the devices with 9 QWs and graded InGaN barriers (Device E).
In another study, LEDs grown on semipolar (20-2-1) GaN were shown to have reduced blue shift and lower Full Width at Half Maximum (FWHM) as compared to LEDs grown on c-plane GaN. This difference is particularly strong for high Indium compositions (i.e., long wavelength emitters). This observation implies that QWs grown on semipolar (20-2-1) GaN may have superior alloy uniformity to those grown on c-plane GaN. Recently, alloy scattering has been implicated as one source of Auger recombination in InGaN/GaN LEDs. With superior alloy uniformity, alloy scattering should be reduced. This may account for the reduced efficiency droop observed for LEDs grown on semipolar (20-2-1) GaN.
Possible Modifications and Variations
The preferred embodiment of the present invention is an LED grown on GaN semipolar {20-2-1 } substrate in which the structure incorporates an n-type SL below the active layer, a nine period MQW (with graded InGaN barriers), where the TMI flow changes gradually from 2 seem to 20 seem during the barrier growth. However, there are possible modifications and variations are available.
For example, variations in active region design, such as modifying the number of QWs, the thickness of the QWs, the composition of QWs and barriers, and the doping level of active regions are possible alternatives.
The SL layers on the n-side and p-side may also be modified. For example, either of these layers may be omitted, contain a different number of periods, have alternative compositions or dopings, or be grown with different thicknesses than shown in the preferred embodiment.
The present invention may also be used with nonpolar devices, as well as semipolar devices.
Optical devices using the present invention include solar cells, laser diodes and optical devices other than the light emitting diodes discussed herein.
Other variations of the process steps include various other possible epitaxial growth techniques (such as MBE, MOCVD, etc.), different dry-etching techniques (such as ICP, RIE, FIB, CMP, CAIBE, etc.), formation of high light extraction structures, flip chip LEDs, vertical structure LEDs, thin GaN LEDs, chip-shaped LEDs, advanced packaging methods such as a suspended package, transparent stand package, etc. Advantages and Improvements
Although n-SLs have been utilized in many LED structures (e.g., c-plane, semipolar sapphire substrate based-LED, SiC substrate based-LED, and other kinds of compound semiconductor substrates), most of the semipolar GaN-substrate -based LEDs have not adopted n-SLs due to a lack of evidence of improvement in device properties (e.g., output power) with their addition. The n-SLs implemented in this invention are grown with Si2H6 flow and each layer in the n-SLs is doped with Silicon. If an LED grown on {20-2-1 } contains these n-SLs, the LED will typically have a low droop ratio. If this kind of n-SLs is located below the QWs, a higher number of QWs (more than three periods QW) can be utilized. Additionally, the graded InGaN barrier structure is effective for a device having more than three QWs with the least decay of output power.
LOW DROOP USING COMPOSITIONALLY STEP-GRADED
INDIUM GALLIUM NITRIDE BARRIERS
The present invention also employs compositionally step-graded (CSG) InGaN barriers instead of standard GaN barriers in LED devices to reduce droop. Several advantages result from the use of CSG InGaN barriers,
First, the addition of InGaN barriers allows for some degree of polarization matching between the QWs and barriers, which results in improved overlap between the electron and hole wavefunctions and higher radiative efficiency, as compared to LEDs without InGaN barriers.
Second, band-diagram simulations of structures with CSG InGaN barriers show curvature in the valence and conduction band profiles of the barriers, which reduces the potential barriers for electron and hole transport, allowing carriers to distribute more uniformly amongst the QWs, as compared to LEDs without CSG InGaN barriers.
If a uniform carrier distribution can be maintained for a large number of QWs, the average carrier density per QW can be reduced, as compared to LEDs without CSG InGaN barriers. Thus, the efficiency droop in such a structure can be reduced, as efficiency droop is believed to be the result of the Auger recombination rate, which is proportional to the third power of the carrier density.
Compared to a reference blue InGaN/GaN LED with standard GaN barriers, the present invention demonstrates that blue LEDs (λ = 440 nm; chip size = 0.001 cm2) with CSG InGaN barriers grown on patterned sapphire substrates show reduced efficiency droop from 5.06% to 2.7%, 10.2% to 5.34% and 19% to 11.06% at current densities of 50, 100 and 200 A/cm2, respectively, under pulsed operation (1% duty cycle, period=l ms, width = 10 μβ). Additionally, due to the reduction of the potential barriers by using CSG InGaN barriers, the forward voltage can be reduced from 3.81 V to 3.45 V at an injection current of 20 mA, as compared to LEDs without CSG InGaN barriers.
LEDs with reduced droop are attractive from a cost standpoint, and thus will likely be used in LEDs for applications such as backlighting (televisions, mobile device displays, etc.), streetlights, automotive lighting, general illumination (indoor and outdoor), etc. Reduced droop allows for the operation of the devices at high current densities (beyond 100 A/cm2) while maintaining lumen output. This would allow for a reduction in the device footprint, which would save on substrate costs. Technical Description
FIG. 5(a) is a schematic diagram of a blue LED (emitting blue light at about 440 nm) with CSG InGaN barriers, wherein the LED is grown on a c-plane patterned sapphire substrate 500 using MOCVD. The LED includes a 3^m-thick undoped GaN layer 502, a 6^m-thick n-type GaN layer 504 with an electron concentration of 5 x 1018 cm"3, followed by a 30 pair Ino.01Gao.99N/GaN (3/3 nm) superlattice 506. Then, a nine -period InGaN / CSG InGaN MQW active region 508 is grown, comprised of 3.0-nm-thick Ino.i8Gao.82N quantum wells and 18-nm-thick InGaN staircase barriers having six 3 nm InGaN layers (resulting in a seven-step staircase) with Indium compositions of 0.1%, 0.3%, 0.5%, 0.7 %, 0.9%, and 1.2%, respectively, (confirmed by x-ray), in the given order, wherein FIG. 5(b) is a transmission electron microscopy (TEM) image of the MQW active region 508. Note that Mg doping may be added to the CSG InGaN barriers, which may lead to further improvements in hole transport within the active region 508. Above the active region 508 is a 0.2-um-thick Alo.2Gao.8N electron blocking layer (EBL) 510 and a 0.2^m-thick p-type GaN capping layer 512 with a hole concentration of 5 x 1017 cm"3. Subsequently, a 240 x 420 μιη2 diode mesa is formed by chlorine-based reactive ion etching (RIE). A 250- nm-thick Indium-Tin-Oxide (ITO) layer 514 is used as a transparent p-contact, and Ti/Al/Ni/Au layers 516 (with respective thicknesses of 10/100/10/100 nm) are deposited as an n-GaN contact. Finally, thick Ti/Au metal stack layers 518, 520 having respective thicknesses of 20/500 nm are deposited on top of both the ITO layer 514 and the n-GaN contact 516 to serve as p-side and n-side wire bond pads, respectively.
The structure of the InGaN / CSG InGaN MQW active region 508 is illustrated by a graph 522 of its potential energy function, wherein the conduction band (Ec) is shown as a function of position, distance, or thickness. In the graph, the step structure indicates a change in the composition of the structure, i.e., each of the CSG InGaN barriers has differing Indium compositions at different step locations of each barrier. In other words, each of the CSG InGaN barriers has a material composition that creates an energy diagram showing a staircase for the differing Indium compositions at the different step locations of the barrier. The differing Indium compositions at the different step locations of the barrier result from differing flows of TMI during growth of the barrier, wherein the differing flows of TMI result when the TMI flow is graded by steps, as described in more detail below.
In addition to the fabrication of the blue LED with CSG InGaN barriers shown in FIG. 5(a), a reference c-plane blue LED with GaN barriers was fabricated with the same structure and wavelength, but without the CSG barriers, for the purposes of comparison, as described below.
Quick electroluminescence testing (QT) was performed by simply putting Indium dots on the p-GaN and n-GaN layers as p-contact and n-contact, respectively, and measuring the LOP by using a detector underneath the sample. Encapsulated devices were tested in both DC and pulsed modes. The pulsed mode is operated with 1 KHz frequency and 1% duty cycle (pulsed period = 1 ms; pulsed width=10 μβ) to prevent self-heating effects. The tests were done at room temperature (RT) with forward currents up to 200 mA.
In order to achieve reduced band bending in the quantum wells to reduce the QCSE in c-plane polar LEDs, high Indium content barriers (InGaN barriers) can be utilized to reduce strain-induced polarization, and this can be realized by increasing TMI flows during the barrier growth. However, as can be seen in FIG. 6(a), the QT power of InGaN/InGaN LEDs dramatically drop using a stable TMI flow above 10 seem for the barrier growth. The reason for the power drop may be due to the smaller conduction and valence band offsets between quantum wells and barriers with increasing Indium contents in the barriers. Thus, carriers are not well confined inside the quantum wells and the radiative efficiency is reduced.
Compared to InGaN barriers, blue LEDs with CSG InGaN barriers maintain high QT power levels (instead of dramatically dropping) when the TMI flow is graded by steps from 0 seem to 10, 20, 30, and 40 seem, as can be seen in FIG. 6(b). The step-graded TMI flow range in the barriers in the optimized devices was selected to be from 0 to 20 seem because the encapsulated device showed the lowest efficiency droop (13.3% at current density of 200 A/cm2) at these conditions.
The efficiency droop at a given current is calculated by:
(EQE t - EQE) _
Efficiency Droop (%) = ~1Q~ 100%
EI
FIG. 7(a) shows the Indium content corresponding to TMI flows up to 100 seem under a growth temperature of 915 °C. From the figure, it can be determined that the Indium content ranges from about 0% to about 1.2% for a TMI flow of about 0-20 seem. FIG. 7(b) is an X-ray diffraction measurement showing the Indium content for a TMI flow of 50 seem.
FIG. 8 is a graph of EQE (%) vs. current density (A/cm2) and LOP (mW) vs. current density (A/cm2) for both an InGaN/GaN blue c-plane LED and a CSG InGaN blue c-plane LED at different current densities under pulsed operation (1% duty cycle). This graph shows the advantages of achieving low efficiency droop by using CSG InGaN barriers in the LED structure.
The corresponding efficiency droops at different current densities are also shown in Table 1 below.
Table 1 : corresponding efficiency droops at different current densities
Figure imgf000017_0001
As can be seen in Table 1, by using CSG InGaN barriers in LEDs, the efficiency droop can be reduced to 2.7%, 5.34% and 11.06% at 50, 100 and 200 A/cm2, respectively, which comprise the lowest efficiency droops as compared to the efficiency droops for LEDs using GaN or InGaN barriers.
FIG. 9(a) is a graph of current (A) vs. voltage (V) showing the I-V
characteristics of blue LEDs using GaN and CSG InGaN barriers. The forward voltage can be reduced from 3.81 V to 3.45 V at an injection current of 20 mA by using CSG InGaN barriers instead of GaN barriers.
FIG. 9(b) is a graph of current (A) vs. voltage (V) showing the I-V characteristics of blue LEDs using different thicknesses for the CSG InGaN barriers. The inventors further investigated the effect of forward voltages by reducing the barrier growth time for each InGaN steps as well as reducing the total thickness of CSG InGaN barriers, and, as shown in FIG. 9(b), the forward voltage can be further reduced from 3.45 V to 3.32 V and 3.21 V at an injection current of 20 mA by using 16 nm and 8 nm CSG InGaN barriers, respectively.
NOMENCLATURE
The terms "Group-Ill nitride" or "Ill-nitride" or "nitride" as used herein refer to any composition or material related to (Al, Ga, In)N semiconductors having the formula AlxGayInzN where 0 < x < 1, 0 < y < 1, 0 < z < 1, and x + y + z = 1. These terms as used herein are intended to be broadly construed to include respective nitrides of the single species, Al, Ga, and In, as well as binary, ternary and quaternary compositions of such Group-Ill metal species. Accordingly, these terms include, but are not limited to, the compounds of A1N, GaN, InN, AlGaN, AlInN,
InGaN, and AlGalnN. When two or more of the (Al, Ga, In)N component species are present, all possible compositions, including stoichiometric proportions as well as off- stoichiometric proportions (with respect to the relative mole fractions present of each of the (Al, Ga, In)N component species that are present in the composition), can be employed within the broad scope of this invention. Further, compositions and materials within the scope of the invention may further include quantities of dopants and/or other impurity materials and/or other inclusional materials.
This invention also covers the selection of particular crystal orientations, directions, terminations and polarities of Group-Ill nitrides. When identifying crystal orientations, directions, terminations and polarities using Miller indices, the use of braces, { }, denotes a set of symmetry-equivalent planes, which are represented by the use of parentheses, ( ). The use of brackets, [ ], denotes a direction, while the use of brackets, < >, denotes a set of symmetry-equivalent directions.
Many Group-Ill nitride devices are grown along a polar orientation, namely a c-plane {0001 } of the crystal, although this results in an undesirable quantum- confined Stark effect (QCSE), due to the existence of strong piezoelectric and spontaneous polarizations. One approach to decreasing polarization effects in Group- Ill nitride devices is to grow the devices along nonpolar or semipolar orientations of the crystal. The term "nonpolar" includes the {11-20} planes, known collectively as biplanes, and the {10-10} planes, known collectively as m-planes. Such planes contain equal numbers of Group-Ill and Nitrogen atoms per plane and are charge-neutral. Subsequent nonpolar layers are equivalent to one another, so the bulk crystal will not be polarized along the growth direction.
The term "semipolar" can be used to refer to any plane that cannot be classified as c-plane, a-plane, or m-plane. In crystallographic terms, a semipolar plane would be any plane that has at least two nonzero h, i, or k Miller indices and a nonzero 1 Miller index. Subsequent semipolar layers are equivalent to one another, so the crystal will have reduced polarization along the growth direction.
CONCLUSION
This concludes the description of the preferred embodiments of the present invention. The foregoing description of one or more embodiments of the invention has been presented for the purposes of illustration and description. It is not intended to be exhaustive or to limit the invention to the precise form disclosed. Many modifications and variations are possible in light of the above teaching. It is intended that the scope of the invention be limited not by this detailed description, but rather by the claims appended hereto.

Claims

WHAT IS CLAIMED IS:
1. An opto-electrical device, comprising:
a light emitting device comprised of Group-Ill nitride layers, including indium-containing nitride barrier layers, three or more quantum wells (QWs) in an active region, and an n-type superlattice (SL) structure below the active region, in order to reduce efficiency droop.
2. The device of claim 1, wherein the Group-Ill nitride layers comprise semipolar {20-2-1 } Gallium Nitride (GaN).
3. The device of claim 1, wherein the barrier layers comprise graded barrier layers.
4. The device of claim 3, wherein the Group-Ill nitride layers comprise polar Group-Ill nitride layers and at least one of the graded barrier layers comprises a compositionally step-graded (CSG) InGaN barrier.
5. The device of claim 4, wherein the CSG InGaN barrier has differing Indium compositions at different step locations of the barrier.
6. The device of claim 4, wherein the light emitting device has a reduction in efficiency droop as compared to a light emitting device without the CSG InGaN barrier.
7. The device of claim 4, wherein the light emitting device has a reduction in forward voltage as compared to a light emitting device without the CSG InGaN barrier.
8. The device of claim 1, further comprising a p-type superlattice structure above the active region.
9. The device of claim 1, wherein the light emitting device has a droop ratio less than 20% at a current density of 35 A/cm2.
10. A method of fabricating an opto-electrical device, comprising:
fabricating a light emitting device comprised of Group-Ill nitride layers, including indium-containing barrier layers, three or more quantum wells (QWs) in an active region, and an n-type superlattice (SL) structure below the active region, in order to reduce efficiency droop.
11. The method of claim 10, wherein the Group-Ill nitride layers comprise semipolar {20-2-1 } Gallium Nitride (GaN).
12. The method of claim 10, wherein the barrier layers comprise graded barrier layers.
13. The method of claim 12, wherein the Group-Ill nitride layers comprise polar Group-Ill nitride layers and at least one of the graded barrier layers comprises a compositionally step-graded (CSG) InGaN barrier.
14. The method of claim 13, wherein the CSG InGaN barrier has differing Indium compositions at different step locations of the barrier.
15. The method of claim 13, wherein the light emitting device has a reduction in efficiency droop as compared to a light emitting device without the CSG InGaN barrier.
16. The method of claim 13, wherein the light emitting device has a reduction in forward voltage as compared to a light emitting device without the CSG InGaN barrier.
17. The method of claim 10, further comprising fabricating a p-type superlattice structure above the active region.
18. The method of claim 10, wherein the light emitting device has a droop ratio less than 20% at a current density of 35 A/cm2.
19. An opto-electronic device fabricated using the method of claim 10.
20. A Group-Ill nitride light emitting device, comprising:
a semipolar {20-2-1 } Group-Ill nitride substrate,
one or more n-type Group-Ill nitride superlattice layers (n-SLs), located above the semipolar {20-2-1 } Group-Ill nitride substrate,
a Group-Ill nitride quantum well (QW) active region of at least three periods with graded Indium-containing and Gallium-containing barrier layers, located above the n-type superlattice layers, and
one or more p-type Group-Ill nitride superlattice layers (p-SLs), located above the QW active region.
21. A Group-Ill nitride light emitting device, comprising:
a substrate,
one or more n-type Group-Ill nitride superlattice layers (n-SLs), located on or above the substrate,
a Group-Ill nitride quantum well (QW) active region with Indium-containing and Gallium-containing barrier layers, located on or above the n-type superlattice layers, and wherein at least one of the graded barrier layers comprises a compositionally step-graded (CSG) Indium Gallium Nitride (InGaN) barrier.
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