WO2013020441A1

WO2013020441A1 - Method and device for handling phase transition

Info

Publication number: WO2013020441A1
Application number: PCT/CN2012/078753
Authority: WO
Inventors: 文林; 陈恺; 荀勇
Original assignee: 中兴通讯股份有限公司
Priority date: 2011-08-05
Filing date: 2012-07-17
Publication date: 2013-02-14
Also published as: CN102355317A; CN102355317B

Abstract

Disclosed are a method and device for handling a phase transition. The method comprises the following steps: comparing a detected phase transition value with a phase transition threshold value; and, in a case where the phase transition value does not exceed the phase transition threshold value, amending a time phase. The present invention improves the quality of time synchronization.

Description

TECHNICAL FIELD The present invention relates to the field of communications, and in particular to a method and apparatus for processing phase jumps. BACKGROUND OF THE INVENTION Synchronization protocols are gaining more and more attention and application in communication networks. When synchronizing using synchronization protocols, such as the IEEE 1588 synchronization protocol, the following describes the 1588 synchronization protocol as an example, and the time is defined in the 1588 synchronization protocol. Pass-through, the network device corrects the time phase each time it receives a Sync message. 1 is a schematic diagram of calculating a time offset hopping according to the 1588 synchronization protocol of the prior art, and FIG. 1 shows an exchange between a master clock and a slave clock, if the T1-T4 time therein Any one of the stamps has an error. According to the 1588 protocol phase deviation base, according to the formula, Offset=Tl+Delay-T2, Offset=T4-T3 -Delay, the calculated Offset must deviate from the actual value. Since the 1588 synchronization protocol has a large dependence on hardware, it cannot sense hardware error handling. Therefore, when the device synchronized at 1588 time is subjected to network traffic burst or its own hardware reason, it may cause an error in the timestamp. In this case, if the time offset is still calculated using the 1588 synchronization protocol, directly correcting the time phase difference will inevitably result in a large phase jump, thereby reducing the quality of the time synchronization. In severe cases, the phase information will be used. Equipment 瘫痪. In view of the above problems existing in the related art, an effective solution has not yet been proposed. SUMMARY OF THE INVENTION The present invention provides a method and apparatus for processing phase jumps to at least solve the problems in the related art described above. According to an aspect of the present invention, a method for processing a phase hopping is provided, the method comprising the steps of: comparing a detected phase hopping value with a phase hopping threshold; and wherein the phase hopping value does not exceed the phase In the case of a jump threshold, the time phase is corrected. Preferably, if the phase hopping value exceeds the phase hopping threshold, the method further includes: starting a phase hopping detection period, if the detected phase is within the phase hopping detection period When the phase jump values are positive or negative, the time phase is corrected. Preferably, in a case that the phase hopping value exceeds the phase hopping threshold, the method further includes: if the detected phase hopping value includes a positive value and a negative value, not performing a time phase Correction, enter the next phase jump detection cycle. Preferably, the method further comprises: if the phase hopping value detected by each of the consecutive predetermined number of phase hopping detection periods includes a positive value and a negative value, performing an alarm. Preferably, in a case that the phase hopping value exceeds the phase hopping threshold, the method further comprises: not performing correction of the time phase. Preferably, the method is for a precision clock synchronization protocol standard 1588 synchronization protocol standard for network measurement and control systems. According to another aspect of the present invention, there is also provided a phase jump processing apparatus, comprising: a comparison module configured to compare a detected phase jump value with a phase jump threshold; a correction module, wherein the phase jump When the value does not exceed the phase jump threshold, it is set to perform correction of the time phase. Preferably, the correction module is further configured to: when the phase hopping value exceeds the phase hopping threshold, initiate a phase hopping detection period, and in the phase hopping detection period, in the When the detected phase jump values are positive or negative, the time phase is corrected. Preferably, the correction module is further configured to: when the detected phase jump value includes a positive value and a negative value, the time phase correction is not performed, and the next phase jump detection period is detected. Preferably, the device further includes: an alarm module, configured to set a positive value and a negative value when the phase jump value detected by each of the consecutive predetermined number of phase jump detection periods includes a positive value and a negative value , to issue an alarm. According to the present invention, when the phase jump is detected, the detected phase jump value and the phase jump threshold are compared; when the phase jump value does not exceed the phase jump threshold, the time phase is corrected, and the solution is solved. The wrong timestamp is used to correct the problem caused by the time phase difference, thereby achieving the effect of improving the quality of the time phase synchronization. BRIEF DESCRIPTION OF THE DRAWINGS The accompanying drawings, which are set to illustrate,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, In the drawing: 1 is a schematic diagram of calculating a time deviation occurrence transition according to the 1588 synchronization protocol of the related art; FIG. 2 is a flowchart of a processing method of phase jump according to an embodiment of the present invention; FIG. 3 is a phase jump according to an embodiment of the present invention. FIG. 4 is a schematic diagram of a processing method of a 1588 time synchronization phase abrupt according to a preferred embodiment of the present invention; and FIG. 5 is a flow chart of a 1588 phase hopping processing method in accordance with a preferred embodiment of the present invention. BEST MODE FOR CARRYING OUT THE INVENTION Hereinafter, the present invention will be described in detail with reference to the accompanying drawings. It should be noted that the embodiments in the present application and the features in the embodiments may be combined with each other without conflict. In the following embodiments, the causes of the hopping of the time phase are considered, including normal hopping and hopping due to errors (eg, due to network traffic bursts or hardware reasons), in this embodiment a FIG. 2 is a flowchart of a method for processing a phase jump according to an embodiment of the present invention. As shown in FIG. 2, the flow includes the following steps S202 and S204. Step S202, comparing the detected phase jump value with the phase jump threshold. The threshold of the phase jump may be set to different thresholds according to different situations. In step S204, when the phase hopping value does not exceed the phase hopping threshold, the time phase is corrected. Through the above steps, when the phase jump is detected, the time phase is corrected by setting the correction condition of the time phase, that is, by comparing the detected phase jump value with the phase jump threshold; When the phase jump threshold is exceeded, the time phase is corrected, thereby solving the problem of adjusting the time phase deviation in the system, thereby achieving the effect of improving the time phase synchronization quality. In the above steps, for all cases where the threshold is exceeded, it can be considered that the time phase is abrupt due to an error (for example, a hardware cause). Although such a judgment method may cause a certain misjudgment, In the prior art, the method of not judging is still improved to the same level of synchronization quality to a certain extent. In addition, for the threshold, different sizes can be selected according to actual conditions. For the case where the threshold is exceeded, the time phase correction is not performed, but in this case, it is also possible that the jump is not caused by the occurrence of the error (that is, exceeding the threshold does not mean that the error must occur, and the situation may also be Avoid by turning the threshold up.) Therefore, in this embodiment, a preferred implementation manner is provided, in which the phase jump value exceeds the phase jump threshold In the case of a value, the phase jump detection period can be started, and in the phase jump detection period, if the detected phase jump values are both positive values or negative values, the time phase correction is performed. According to this preferred mode, the correction of the time phase is not performed uniformly for the case where the threshold value is exceeded, but the situation is further determined, thereby further improving the effect of time phase synchronization. If the detected phase jump value includes a positive value and a negative value, the time phase correction is not performed, and the next phase jump detection period is entered. In order to better handle the erroneous situation, as a preferred embodiment, if the phase hopping value detected in each of the consecutive predetermined number of phase hopping detection periods includes positive and negative values, For the value, an alarm can be issued. This makes it easier to handle errors. In this embodiment, a phase hopping processing device is also provided, which is used to implement the above embodiments and preferred embodiments thereof, and has not been described again, and the following relates to the device. Each module is described. As used below, the term "module" may implement a combination of software and/or hardware of a predetermined function. Although the systems and methods described in the following embodiments are preferably implemented in software, hardware, or a combination of software and hardware, is also possible and contemplated. 3 is a block diagram showing the structure of a processing device for phase jump according to an embodiment of the present invention. As shown in FIG. 3, the device includes a comparison module 30 and a correction module 32. The various modules of the device and their functions are described below. The comparison module 30 is configured to compare the detected phase hopping value with the phase hopping threshold. The correction module 32 is coupled to the comparison module 30 for performing time phase correction if the phase hopping value does not exceed the phase hopping threshold. As a preferred implementation, the correction module 32 is further configured to start the phase hopping detection period when the phase hopping value exceeds the phase hopping threshold, and to detect the phase during the phase hopping detection period. When the hop values are positive or negative, the time phase is corrected. When the detected phase hopping value includes positive and negative values, the time phase correction is not performed, and the next step is entered. A phase jump detection period is detected. Preferably, the apparatus further includes an alarm module configured to set a positive value and a negative value when the phase jump value detected in each of the consecutive predetermined number of phase jump detection periods includes a positive value and a negative value. , to issue an alarm. This makes the handling of errors more convenient. In the following preferred embodiment, the 1588 synchronization protocol is taken as an example for description. In the preferred embodiment, it is contemplated that if the time phase hopping for any cause is corrected after each Sync message is received, the quality of the time synchronization may be greatly degraded. For example, in the process of using 1588 synchronization, the device hardware has a short, even one error, which causes an error time deviation value to occur in the 1588 time calculation, resulting in 1588 Time synchronization phase error correction. In the preferred embodiment, a phase correction filtering algorithm is employed to avoid time synchronization protocol calculation errors due to various reasons (especially hardware reasons), cause phase jitter problems, and improve the quality of time synchronization. 4 is a schematic diagram of a 1588 time synchronization phase abrupt processing method in accordance with a preferred embodiment of the present invention, which is described below in conjunction with FIG. In the processing method shown in FIG. 4, first, the phase hopping table tolerance value is configured, wherein the phase hopping tolerance value is the magnitude of the phase hopping allowed each time. Configure the phase transition adjustment period, that is, when the phase jump occurs, check whether the phase jump is reasonable. Detects the interval at which the main clock Sync message is sent, δΡ, and detects the interval at which the main clock 1588 Sync message is sent. Calculating the phase transition detection period value, wherein the main clock 1588 Sync message transmission interval time is multiplied by the phase hopping adjustment period to obtain a phase abrupt detection period value, that is, the phase hopping detection period value=Sync message transmission interval The product of the phase adjustment period. Real-time detection of whether the phase has jumped. When the phase jumps, the detection cycle is entered. After the detection period is filtered, the phase adjustment is performed. That is, after the 1588 time synchronization calculation is completed, it is determined whether the phase difference satisfies the phase jump tolerance value. If it is satisfied, and there is no phase jump record before, the time phase can be directly corrected. Otherwise, the phase jump adjustment period detection is turned on. During the detection period, whether the phase jump is a positive transition or a negative transition is recorded, and the phase deviation value is not corrected during the detection. After the end of the detection period, analyze the positive and negative signs of the phase jump record. If the positive and negative signs are consistent, the phase adjustment is allowed. Otherwise, the phase jump positive and negative records are cleared and the next detection cycle is entered. FIG. 5 is a flowchart of a processing method of 1588 phase hopping according to a preferred embodiment of the present invention. As shown in FIG. 5, the flow includes the following steps S502 to S506. Step S502, configuring a phase jump tolerance value by using a phase jump parameter configuration module, and configuring a phase jump adjustment period. In step S504, the message detection module detects the transmission frequency of the main clock 1588 Sync message, thereby calculating the phase jump detection period. Step S506, inputting the phase deviation calculated by the 1588 protocol to the phase jump period detecting module. The phase jump of the 1588 protocol is solved by the filtering algorithm of the phase jump period detecting module. In the preferred embodiment, a processing device for 1588 phase mutation is further provided, the device includes a phase hopping parameter configuration module, a message receiving detection module and a phase hopping period detecting module, and each of the devices is The module and its functions are described. The phase jump parameter configuration module is configured to configure the phase jump tolerance value, configure the phase jump adjustment period, and maintain these configuration values. The packet receiving detection module is configured to detect the sending frequency of the main clock 1588 Sync message, and calculate the phase jump adjustment period to obtain the phase jump adjustment period time value. The phase jump period detecting module (for implementing the functions of the comparing module 30 and the correcting module 32) is configured to detect whether the phase is hopping, and if there is no phase jump in the detecting period, the 1588 can directly correct the phase deviation. If a phase jump is detected, record whether each transition is a positive or negative transition. When a detection cycle ends, it is judged whether there is both a positive transition and a negative transition in the phase jump. If there is, it is considered that the hardware system is disturbed or has an error, phase fluctuation occurs, and the filtering effect is achieved by not correcting the phase deviation. If there is a positive or negative transition in the detection period, it is proved that the phase deviation does change, that is, the phase correction is performed. With the preferred embodiment, it is possible to prevent the phase jump of 1588 time synchronization due to various reasons (for example, hardware reasons) by filtering, and solve the protection problem of hardware errors, and solve the problem that the 1588 protocol cannot sense the hardware. The error, resulting in a wrong time correction problem. In addition, since the preferred embodiment and its preferred implementation are implemented on the basis of existing hardware devices, not only does not add additional cost, but also increases the cost of the software, but effectively solves the 1588 time synchronization. The phase mutation problem improves the quality and safety of 1588 time synchronization. In another embodiment, a phase jump processing software is provided for performing the technical solutions described in the above embodiments and preferred embodiments. In another embodiment, a storage medium is provided, in which the above-described transmission delay control software is stored, including but not limited to an optical disk, a floppy disk, a hard disk, a rewritable memory, and the like. Obviously, those skilled in the art should understand that the above modules or steps of the present invention can be implemented by a general-purpose computing device, which can be concentrated on a single computing device or distributed over a network composed of multiple computing devices. Alternatively, they may be implemented by program code executable by the computing device so that they may be stored in the storage device by the computing device, or they may be separately fabricated into individual integrated circuit modules, or Multiple modules or steps are made into a single integrated circuit module. Thus, the invention is not limited to any specific combination of hardware and software. The above is only the preferred embodiment of the present invention, and is not intended to limit the present invention, and various modifications and changes can be made to the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and scope of the present invention are intended to be included within the scope of the present invention.

Claims

Claim

A method for processing a phase jump includes the following steps:

Comparing the detected phase jump value with the phase jump threshold;

In the case where the phase hopping value does not exceed the phase hopping threshold, the correction of the time phase is performed.

The method according to claim 1, wherein, in a case that the phase hopping value exceeds the phase hopping threshold, the method further includes:

The phase jump detection period is started, and in the phase jump detection period, if the detected phase jump values are positive values or both are negative values, the time phase correction is performed.

3. The method according to claim 2, wherein the method further comprises: if the detected phase jump value comprises a positive value and a negative value, the time phase correction is not performed, and the next phase transition is entered. Detection period.

4. The method according to claim 3, wherein the method further comprises:

If the phase hopping value detected for each of the successive predetermined number of phase hopping detection periods includes positive and negative values, an alarm is issued.

5. The method according to claim 1, wherein, in a case where the phase hopping value exceeds the phase hopping threshold, the method further comprises: not performing correction of a time phase.

The method according to any one of claims 1 to 5, characterized in that the method is applied to the Institute of Electrical and Electronics Engineers IEEE 1588 Synchronization Protocol Standard.

7. A phase jump processing device, comprising:

The comparison module is configured to compare the detected phase hopping value with the phase hopping threshold; and the correction module is configured to perform the correction of the time phase if the phase hopping value does not exceed the phase hopping threshold.

The device according to claim 7, wherein the correction module is further configured to: when the phase hopping value exceeds the phase hopping threshold, initiate a phase hopping detection period, and Phase jump In the variable detection period, when the detected phase jump values are both positive values or negative values, the time phase is corrected.

9. The apparatus according to claim 8, wherein the correction module is further configured to cancel the correction of the time phase when the detected phase jump value comprises a positive value and a negative value, and enter the next A phase jump detection period is detected.

10. The device according to claim 9, further comprising:

The alarm module is configured to perform an alarm when the phase jump values detected by each of the consecutive predetermined number of phase jump detection periods include positive and negative values.