WO2013008326A1 - Software verification method and software verification system - Google Patents

Software verification method and software verification system Download PDF

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Publication number
WO2013008326A1
WO2013008326A1 PCT/JP2011/066012 JP2011066012W WO2013008326A1 WO 2013008326 A1 WO2013008326 A1 WO 2013008326A1 JP 2011066012 W JP2011066012 W JP 2011066012W WO 2013008326 A1 WO2013008326 A1 WO 2013008326A1
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WIPO (PCT)
Prior art keywords
operating system
application
software verification
target application
verification target
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PCT/JP2011/066012
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French (fr)
Japanese (ja)
Inventor
浩一郎 山下
宏真 山内
鈴木　貴久
康志 栗原
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富士通株式会社
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Priority to PCT/JP2011/066012 priority Critical patent/WO2013008326A1/en
Publication of WO2013008326A1 publication Critical patent/WO2013008326A1/en

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/36—Preventing errors by testing or debugging software
    • G06F11/3664—Environments for testing or debugging software

Definitions

  • the present invention relates to a software verification method and a software verification system for verifying software.
  • multi-core environment a multi-core processor system environment
  • a thread is an execution unit of a program.
  • single-core environment When a software that was operating in a single-core processor system environment (hereinafter referred to as “single-core environment”) is operated in a multi-core environment, side effects associated with parallelization have occurred. For example, a side effect that a potential failure due to a change in operation timing becomes noticeable has occurred. Also, for software newly developed for a multi-core environment, it has been more difficult to verify all the operation timings than in a single-core environment.
  • a technique for acquiring software trace information by setting a breakpoint is disclosed. Also disclosed is a technique for executing single-core environment software and multi-core environment software and comparing runtime data. Further, as a technique for operating a plurality of environments, a technique for executing a plurality of environments on a virtual machine that virtualizes computer resources and comparing execution results of software executed on the plurality of environments is disclosed. (For example, see Patent Documents 1 to 3 below.)
  • the present invention has an object to provide a software verification method and a software verification system that facilitate software verification in a multi-core environment in order to solve the above-described problems caused by the prior art.
  • a virtual machine secures a context area based on the activation of an application in the first operating system and context in the second operating system.
  • the area information is notified, the context area data is saved in the save area based on the application state change, and the execution of the application is switched from the first operating system to the second operating system, which is executed by the second operating system.
  • a software verification method and a software verification system for comparing a context area and a save area based on a change in the state of an application are proposed.
  • FIG. 1 is an explanatory diagram illustrating an operation example of the multi-core processor system 100.
  • FIG. 2 is a block diagram illustrating a hardware example of the multi-core processor system 100.
  • FIG. 3 is a block diagram illustrating an example of functions of the multi-core processor system 100.
  • FIG. 4 is an explanatory diagram illustrating an example of a state during the operation of the single OS 113.
  • FIG. 5 is an explanatory diagram illustrating an example of a state during the operation of the multi-OS 114.
  • FIG. 6 is a flowchart illustrating an example of a processing procedure when the single OS 113 and the multi-OS 114 are activated.
  • FIG. 7 is a flowchart illustrating an example of a processing procedure when the verification target application 115 is activated.
  • FIG. 1 is an explanatory diagram illustrating an operation example of the multi-core processor system 100.
  • FIG. 2 is a block diagram illustrating a hardware example of the multi-core processor system 100.
  • FIG. 8 is a flowchart (part 1) illustrating an example of a processing procedure during verification of the verification target application 115.
  • FIG. 9 is a flowchart (part 2) illustrating an example of a processing procedure during verification of the verification target application 115.
  • FIG. 10 is an explanatory diagram illustrating an application example of a system using a computer according to the present embodiment.
  • a multi-core processor is a processor having a plurality of cores. If a plurality of cores are mounted, a single processor having a plurality of cores may be used, or a processor group in which single core processors are arranged in parallel may be used. In the present embodiment, in order to simplify the explanation, a processor group in which single core processors are arranged in parallel will be described as an example.
  • FIG. 1 is an explanatory diagram showing an operation example of the multi-core processor system 100.
  • the multi-core processor system 100 includes CPU # 0 to CPU # 3 and a shared memory 112.
  • a debugger VM virtual machine
  • OS operating system: Operating System
  • multi-OS multi-OS
  • the debugger VM 111 is a virtual machine that virtualizes computer resources and further has a debugger function. Specifically, the debugger VM 111 controls the single OS 113 and the multi OS 114 that operate on the debugger VM 111, and switches the execution OS from the single OS 113 to the multi OS 114 or from the multi OS 114 to the single OS 113. Further, the debugger VM 111 may perform memory dump, stack trace, and the like as a debugger function.
  • the shared memory 112 is a memory accessed from the CPU # 0 to CPU # 3.
  • the single OS 113 is an OS that operates on one CPU
  • the multi-OS 114 is an OS that operates on a plurality of CPUs.
  • FIG. 1 shows a state 101 and a state 102 as the operating environment of the multi-core processor system 100.
  • the multi-core processor system 100 in the state 101 is in a state where it is in a single core environment in which the single OS 113 is executed as the execution OS.
  • the multi-core processor system 100 in the state 102 is a state in which the multi-core processor system 100 is in a multi-core environment in which the multi-OS 114 is executed.
  • verification target application 115_S and verification target application 115_M which are application software (hereinafter referred to as “applications”), are verified as software to be verified. It is assumed that the verification target application 115_S and the verification target application 115_M are generated from the source code 116.
  • the verification target application 115_S is an application executed in a single core environment
  • the verification target application 115_M is an application executed in a multicore environment.
  • the verification target application 115_S and the verification target application 115_M may be the same object code or may be different.
  • the source code 116 describes that the synchronization wait process is executed inside the argumentless return value int type main function.
  • the verification target application 115_S and the verification target application 115_M are generated from the same source code 116, they may be different.
  • the verification target application 115_M may be an object code generated from a source code in which a code corresponding to a multi-core environment is added to the source code of the verification target application 115_S.
  • the multi-core processor system 100 secures the verification target application context area 121 and the save area 122.
  • the verification target application context area 121 is a context area used by software to be verified.
  • the context area is an area for storing data used by the application such as a CPU register value, a program counter, and a stack pointer.
  • the CPU # 0 executes the verification target application 115_S and has reached the synchronization waiting process which is one of the state changes of the verification target application 115_S.
  • the CPU # 0 writes the single core environment section data 123, which is the execution result of the verification target application 115_S, in the verification target application context area 121.
  • the debugger VM 111 that has received the status change of the verification target application 115_S switches the execution OS from the single OS 113 to the multi OS 114. At this time, the debugger VM 111 saves the single core environment section data 123 in the save area 122.
  • the CPUs # 0 to # 3 execute the verification target application 115_M, and have reached the synchronization waiting process which is one of the state changes of the verification target application 115_M.
  • the CPUs # 0 to # 3 write the multi-core environment section data 124, which is the execution result of the verification target application 115_M, in the verification target application context area 121.
  • the debugger VM 111 that has received the state change of the verification target application 115_M compares the single-core environment section data 123 with the multi-core environment section data 124.
  • the multi-core processor system 100 executes the verification target application in the single-core environment and the multi-core environment, and compares the write data of the two applications when the state of the application changes. Thereby, the multi-core processor system 100 does not need to trace all steps, and facilitates application verification in a multi-core environment.
  • FIG. 2 is a block diagram illustrating a hardware example of the multi-core processor system 100.
  • Multi-core processor system 100 in the present embodiment assumes a mobile terminal such as a mobile phone.
  • the multi-core processor system 100 includes CPUs 201, ROM (Read-Only Memory) 202, and RAM (Random Access Memory) 203.
  • the multi-core processor system 100 includes a flash ROM 204, a flash ROM controller 205, and a flash ROM 206. Further, the multi-core processor system 100 includes a display 207, an I / F (Interface) 208, and a keyboard 209 as input / output devices for a user and other devices. Each unit is connected by a bus 210. Note that specific devices of the shared memory 112 are a RAM 203 and a flash ROM 204. Of the data stored in the shared memory 112, data that is not written may be stored in the ROM 202.
  • the CPUs 201 control the entire multi-core processor system 100.
  • the CPUs 201 include CPU # 0 to CPU # 3.
  • the CPUs 201 may have a dedicated cache memory.
  • the ROM 202 stores programs such as a boot program.
  • the RAM 203 is used as a work area for the CPUs 201.
  • the flash ROM 204 is a flash ROM having a high reading speed, and is, for example, a NOR flash memory.
  • the flash ROM 204 stores system software such as an OS, application software, and the like.
  • the multi-core processor system 100 receives the new OS by the I / F 208 and updates the old OS stored in the flash ROM 204 to the received new OS.
  • the flash ROM controller 205 controls reading / writing of data with respect to the flash ROM 206 according to the control of the CPUs 201.
  • the flash ROM 206 is a flash ROM mainly for storing and transporting data, and is, for example, a NAND flash memory.
  • the flash ROM 206 stores data written under the control of the flash ROM controller 205. Specific examples of the data include image data and video data acquired by the user using the multi-core processor system 100 through the I / F 208, and a program for executing the software verification method according to the present embodiment.
  • the flash ROM 206 for example, a memory card, an SD card, or the like can be adopted.
  • the display 207 displays data such as a cursor, an icon or a tool box, a document, an image, and function information.
  • a TFT (Thin Film Transistor) liquid crystal display can be adopted.
  • the I / F 208 is connected to a network 211 such as a LAN, a WAN (Wide Area Network), and the Internet through a communication line, and is connected to another device via the network 211.
  • the I / F 208 controls an internal interface with the network 211 and controls input / output of data from an external device.
  • a modem or a LAN adapter can be adopted as the I / F 208.
  • the keyboard 209 has keys for inputting numbers and various instructions, and inputs data.
  • the keyboard 209 may be a touch panel type input pad or a numeric keypad.
  • FIG. 3 is a block diagram illustrating an example of functions of the multi-core processor system 100.
  • the multi-core processor system 100 includes a securing unit 301, a notification unit 302, a reception unit 303, a comparison unit 304, a switching unit 305, a switching unit 306, and an output unit 307.
  • the functions (securing unit 301 to output unit 307) serving as the control unit are realized by the CPUs 201 executing the program stored in the storage device.
  • the storage device is, for example, the ROM 202, the RAM 203, the flash ROM 204, the flash ROM 206, etc. shown in FIG.
  • the securing unit 301 to the output unit 307 are included in the function of the debugger VM 111.
  • the multi-core processor system 100 secures a user space 310.
  • the user space 310 is a space for securing an application context area.
  • the CPU # 0 executes the single OS 113.
  • the CPU # 0 executes the kernel 311 # 0
  • the CPU # 1 executes the kernel 311 # 1
  • the CPU # 2 executes the kernel 311 # 2.
  • CPU # 3 executes kernel 311 # 3.
  • the kernel 311 is software having a function that forms the core of the multi-OS 114.
  • the securing unit 301 has a function of securing a user space 310 shared by the first operating system and the second operating system.
  • the first operating system is a single OS 113
  • the second operating system is a multi-OS 114.
  • the securing unit 301 instructs the multi-OS 114 to share the user space 310.
  • the securing unit 301 may instruct the single OS 113 to share the user space 310 secured by the multi-OS 114.
  • the securing unit 301 secures the save area 122 from the shared memory 112.
  • the save area 122 is secured from an unallocated space other than the user space 310.
  • the save area 122 may be an area of 8, 16 [K bytes].
  • the upper limit and lower limit address of the reserved user space 310 and the upper limit and lower limit address of the save area 122 are stored in a storage area such as the RAM 203 and the flash ROM 204.
  • the notification unit 302 has a function of securing a context area based on the activation of the application in the first operating system and notifying the second operating system of the context area information. For example, the notification unit 302 notifies the multi-OS 114 of the verification target application context area 121 secured in response to activation by the verification target application 115_S in the single OS 113.
  • the accepting unit 303 has a function of accepting a change in the state of an application executed by the first and second operating systems.
  • the reception unit 303 receives a state change of the verification target application 115_S from the single OS 113 and receives a state change of the verification target application 115_M from the multi-OS 114.
  • the specific state change is the start of exclusive control processing, synchronization waiting processing, branch processing, or error processing. Details of each process will be described later with reference to FIG. Further, the identification information of the single OS 113 or the multi-OS 114 as the reception source OS and the type of the received state change are stored in a storage area such as the RAM 203 and the flash ROM 204.
  • the comparison unit 304 has a function of comparing the context area and the save area 122 based on the state change of the application executed in the second operating system. For example, when there is a change in the state of the verification target application 115_M executed by the multi-OS 114, the comparison unit 304 determines that the multicore environment section data 124 in the verification target application context area 121 and the single core environment section data 123 in the save area 122 And compare. Note that the comparison result is stored in a storage area such as the RAM 203 and the flash ROM 204.
  • the exchange unit 305 has a function of exchanging data in the context area and data in the save area 122. For example, the exchange unit 305 exchanges the multi-core environment section data 124 in the verification target application context area 121 and the single-core environment section data 123 in the save area 122. When the verification target application 115 is executed only on one OS, the exchange unit 305 only needs to save the data in the verification target application context area 121 to the save area 122.
  • the switching unit 306 has a function of switching the execution of the application from the first operating system to the second operating system.
  • the switching unit 306 switches the execution of the application from the second operating system to the first operating system when the comparison result by the comparing unit 304 indicates a match. For example, when the single core environment section data 123 and the multicore environment section data 124 match, the switching unit 306 switches from the multi OS 114 to the single OS 113.
  • the switching unit 306 executes the application when the comparison result by the comparison unit 304 indicates a mismatch and the state change of the verification target application 115 is the start of other processing other than the error processing.
  • the switching unit 306 Switch to single OS 113.
  • the output unit 307 has a function of outputting an alert when the comparison result by the comparison unit 304 indicates a mismatch. For example, the output unit 307 outputs an alert when the single-core environment section data 123 and the multi-core environment section data 124 do not match.
  • the content of the alert that is output includes, for example, the address of the code that called the state change process, the type of state change, and the single core environment section data 123 and multicore environment section data 124 that did not match. Memory dump etc.
  • the output unit 307 may output information on error processing when the result of the comparison by the comparison unit 304 indicates inconsistency and the application state change is the start of error processing.
  • error processing information include error causes of error processing, addresses of codes that are called to perform state changes, memory dumps of mismatched single core environment section data 123 and multicore environment section data 124, and the like. It is.
  • the output unit 307 outputs SIGBUS (SIGnal BUS error) indicating a bus error and SIGEGV (SIGnal SEGmentation Violation) indicating that an invalid address has been accessed as a signal number that is a specific error factor.
  • SIGBUS SIGnal BUS error
  • SIGEGV SIGnal SEGmentation Violation
  • the state of the single-core environment of the multi-core processor system 100 and the state of the multi-core environment will be described with reference to FIGS.
  • the verification target application 115_S is first executed in the single core environment, and then the verification target application 115_M is executed in the multicore environment.
  • the multi-core processor system 100 may first execute the verification target application 115_M in the multi-core environment and then execute the verification target application 115_S.
  • FIG. 4 is an explanatory diagram showing an example of a state during the operation of the single OS 113.
  • the state of the multi-core processor system 100 shown in FIG. CPU # 0 executes the single OS 113, and CPU # 1 to CPU # 3 are inactive.
  • the debugger VM 111 secures the user space 310 and the save area 122 in the shared memory 112 when the single OS 113 and the multi-OS 114 are booted.
  • the debugger VM 111 receives a notification of a state change from the single OS 113.
  • the details of the state change are the start of exclusive control processing, synchronization waiting processing, branch processing, and error processing as shown in the state change list 401.
  • the single OS 113 detects the start of the exclusive control process, the synchronization wait process, the branch process, and the error process, the single OS 113 notifies the debugger VM 111 as a state change.
  • Exclusive control processing is processing in which when one thread acquires the right to use a resource or the like, the other thread waits until one thread releases the right to use the resource.
  • the synchronization waiting process is a process for temporarily stopping processing of a plurality of threads up to a specific code position. When all the threads have reached a specific code position, the synchronization waiting process releases the stop and continues the next process.
  • the single OS 113 can detect that the exclusive control process is performed on the verification target application 115_S by calling a system call that performs the exclusive control process and the synchronization waiting process.
  • Branch processing is processing that branches a thread. For example, there are a fork function and a CreateThread function as branch processing.
  • the single OS 113 can detect that the branch process is performed on the verification target application 115_S by calling a system call that performs the branch process.
  • the error process is a process for notifying an error that has occurred in the program. For example, when an error occurs, the single OS 113 can detect that error processing is performed when an error interrupt is executed.
  • the debugger VM 111 When the debugger VM 111 receives the state change shown in the state change list 401, the debugger VM 111 exchanges the single core environment section data 123 and the multicore environment section data 124. Specifically, the debugger VM 111 saves the single core environment section data 123 in the save area 122. Further, the debugger VM 111 writes back the multi-core environment section data 124 existing in the save area 122 to the verification target application context area 121.
  • FIG. 5 is an explanatory diagram showing an example of a state during the multi-OS 114 operation.
  • the multi-core processor system 100 shown in FIG. CPU # 0 executes kernel 311 # 0, CPU # 1 executes kernel 311 # 1, CPU # 2 executes kernel 311 # 2, and CPU # 3 executes kernel 311 # 3.
  • the comparison unit 304 compares the single-core environment section data 123 with the multi-core environment section data 124. When the comparison results match, the debugger VM 111 switches from the multi-OS 114 to the single OS 113. If the comparison result does not match, the debugger VM 111 outputs an alert when the state change is not error processing, exchanges the single core environment section data 123 and the multicore environment section data 124, and switches from the multi OS 114 to the single OS 113. When the state change is error processing, the debugger VM 111 outputs information related to error processing and stops the verification target application 115_M.
  • FIG. 6 illustrates processing when the single OS 113 and the multi-OS 114 are started
  • FIG. 7 illustrates processing when the verification target application 115 is started
  • FIG. 8 illustrates processing in the single OS 113 during verification of the verification target application 115
  • FIG. 9 illustrates processing in the multi-OS 114 during verification of the verification target application 115.
  • FIG. 6 is a flowchart showing an example of a processing procedure when the single OS 113 and the multi-OS 114 are activated.
  • the debugger VM 111 boots the multi-OS 114 (step S601).
  • the debugger VM 111 waits until receiving a notification from the multi-OS 114.
  • the multi-OS 114 secures the user space 310 (step S602), notifies the secured user space 310 to the debugger VM 111 (step S603), and ends the process at the time of startup.
  • the debugger VM 111 that has received the notification defines the user space 310 as a shared space (step S604). Subsequently, the debugger VM 111 boots the single OS 113 (step S605). At this time, the debugger VM 111 notifies the single OS 113 of the defined shared space. Further, the debugger VM 111 waits until a notification is received from the single OS 113. The single OS 113 secures the shared space as the user space 310 (step S606), notifies the secured user space 310 to the debugger VM 111 (step S607), and ends the processing at the time of startup. The debugger VM 111 that has received the notification secures the save area 122 from the unallocated space (step S608), and ends the processing at the time of activation.
  • the single OS 113 and the multi-OS 114 have secured their own kernel space in the processing of step S602 and step S606.
  • the kernel space is an area of about 1 [M bytes], and is narrower than the user space 310.
  • FIG. 7 is a flowchart illustrating an example of a processing procedure when the verification target application 115 is activated.
  • the verification target application 115_S is first activated by the single OS 113 and then the verification target application 115_M is activated by the multi-OS 114. However, after the verification target application 115_M is first activated, 115_S may be activated.
  • the single OS 113 activates the verification target application 115_S (step S701), notifies the debugger VM 111 of the activation of the verification target application 115_S (step S702), and ends the processing when the verification target application 115 is activated.
  • the debugger VM 111 that has received the notification stores the verification target application context area 121 (step S703). As specific save contents, the debugger VM 111 saves the lower limit address and the upper limit address of the verification target application context area 121. Subsequently, the debugger VM 111 notifies the multi-OS 114 of a context area sharing instruction (step S704). Specifically, the debugger VM 111 notifies the multi-OS 114 of the address of the verification target application context area 121. After the notification, the debugger VM 111 ends the process when starting the verification target application 115.
  • the multi-OS 114 that has received the notification activates the verification target application 115_M using the verification target application context area 121 (step S705), and ends the processing when the verification target application 115 is started.
  • FIG. 8 is a flowchart (part 1) illustrating an example of a processing procedure during verification of the verification target application 115.
  • the verification target application 115_S continues to perform normal execution (step S801).
  • the single OS 113 detects a change in state performed during normal execution.
  • the verification target application 115_S is executed when the execution OS becomes the single OS 113.
  • the case where the execution OS becomes the single OS 113 is, for example, when the verification target application 115_S is activated or when the execution OS is switched from the multi-OS 114 to the single OS 113 in step S912 described later.
  • the single OS 113 determines whether or not a state change of the verification target application 115_S has been detected (step S802).
  • step S802: Yes the single OS 113 notifies the debugger VM 111 of the state change (step S803), and the process proceeds to step S802.
  • step S802: No the single OS 113 executes the process of step S802 again after a predetermined time has elapsed.
  • the debugger VM 111 receives the notification (step S804). Next, the debugger VM 111 exchanges the single-core environment section data 123 in the verification target application context area 121 and the multi-core environment section data 124 in the save area 122 (step S805). Subsequently, the debugger VM 111 switches the execution OS from the single OS 113 to the multi OS 114 (step S806), and ends the process during verification of the verification target application 115.
  • FIG. 9 is a flowchart (part 2) illustrating an example of a processing procedure during verification of the verification target application 115.
  • the verification target application 115_M continues to perform normal execution (step S901).
  • a state change made during normal execution is detected by the multi-OS 114.
  • the verification target application 115_M is executed when the execution OS becomes the multi-OS 114.
  • the case where the execution OS becomes the multi-OS 114 is, for example, the case where the execution OS is switched from the single OS 113 to the multi-OS 114 in step S806.
  • the multi-OS 114 determines whether or not a state change of the verification target application 115_M is detected (step S902). When the state change is detected (step S902: Yes), the multi-OS 114 notifies the debugger VM 111 of the state change (step S903), and the process proceeds to step S902. When the state change is not detected (step S902: No), the multi-OS 114 executes the process of step S902 again after a predetermined time has elapsed.
  • the debugger VM 111 receives the notification (step S904).
  • the debugger VM 111 compares the multi-core environment section data 124 in the verification target application context area 121 with the single-core environment section data 123 in the save area 122 (step S905). Subsequently, the debugger VM 111 determines whether or not the comparison result indicates a match (step S906). If the comparison result indicates a mismatch (step S906: No), the debugger VM 111 continues to determine whether or not the state change is the start of error processing (step S907).
  • step S907 If it is the start of error processing (step S907: Yes), the debugger VM 111 outputs information related to error processing (step S908), stops the verification target application 115_M (step S909), and is verifying the verification target application 115. The process ends.
  • step S910 the debugger VM 111 outputs an alert (step S910). After outputting the alert, the debugger VM 111 exchanges the multi-core environment section data 124 in the verification target application context area 121 and the single-core environment section data 123 in the save area 122 (step S911). After the replacement or when the comparison result indicates a match (step S906: Yes), the debugger VM 111 switches the execution OS from the multi-OS 114 to the single OS 113 (step S912), and ends the process during verification of the verification target application 115. To do.
  • the execution position of the verification target application in the single core environment may be different from the execution position of the verification target application in the multicore environment.
  • the verification target application 115_S or the verification target application 115_M is terminated first. If one of the verification target applications 115 has ended after switching from the switching source OS to the switching destination OS in the processing of step S806 and step S912, the debugger VM 111 switches to the switching source OS again and has not ended.
  • the verification target application 115 is executed.
  • FIG. 10 is an explanatory diagram showing an application example of a system using a computer according to the present embodiment.
  • a network NW is a network in which a server 1001, a server 1002, and clients 1031 to 1034 can communicate, and includes, for example, a LAN, a WAN, the Internet, a mobile phone network, and the like.
  • the server 1002 is a management server of a server group (server 1021 to server 1025) having the cloud 1020.
  • the client 1031 is a notebook PC (Personal Computer).
  • the client 1032 is a desktop PC, and the client 1033 is a mobile phone.
  • the client 1033 may be a smartphone or a PHS (Personal Handyphone System).
  • the client 1034 is a tablet terminal.
  • the server 1001, the server 1002, the server 1021 to the server 1025, and the client 1031 to the client 1034 in FIG. 10 execute the software verification method according to the present embodiment.
  • the CPU of the server 1021 executes the single OS 113
  • the CPU group of the servers 1021 to 1025 executes the multi-OS 114
  • the application is executed in the single-core environment and the multi-core environment, and the write data of the two applications is compared when the state of the application changes. Since a failure in the multi-core environment occurs due to a state change, the software verification system does not need to trace all the steps, and can easily perform application verification in the multi-core environment. In addition, the software verification system can perform verification with one board without performing debugging with two boards by switching a plurality of environments using a VM.
  • the software verification system may share the context area of the verification target application in two environments. Thereby, the software verification system can reduce the amount of memory used.
  • the software verification system may switch from the multi-core environment to the single-core environment when the comparison between the context area and the save area indicates a match. Since the comparison indicates a match and the multi-core environment is operating normally, the software verification system can continue the operation of the verification target application.
  • the software verification system may write the data in the save area back to the context area.
  • the software verification system executes the verification target application in the single core environment, so that the software verification system can verify the verification target application in the single core environment. Can continue operation.
  • the software verification system may output an alert when the comparison result indicates a mismatch.
  • the software verification system can record an intermediate calculation result at the time of a state change, and when the memory destruction occurs later, it becomes easy to trace the data that caused the memory destruction.
  • the state change may include the start of at least one of an exclusive control process, a synchronization wait process, a branch process, or an error process.
  • Problems that occur in a multi-core environment occur by executing exclusive control processing, synchronization wait processing, and branch processing. Therefore, the software verification system causes data corruption by comparing data at the start of each processing. Can be obtained with certainty.
  • the software verification system may switch from the multi-core environment to the single-core environment while outputting an alert when the comparison result indicates a mismatch and the state change is other processing other than error processing.
  • the execution position of the verification target application in the single-core environment may be different from the execution position of the verification target application in the multi-core environment. Examples of different cases include branch processing between asynchronous threads.
  • the software verification system Since the status change accepted when the execution position is shifted is another process other than the error process, the software verification system outputs an alert and continues verification of the verification target application.
  • the deviation of the execution position is resolved by the end of the thread in the verification target application or the join function. If the result of the comparison shows a match when the deviation is resolved, the software verification system uses the judgment material that the alert that has been output so far has been output as the result of the deviation and that it was not output due to a malfunction. Can be presented.
  • the software verification system may stop the verification target application while outputting information related to error processing when the comparison result indicates a mismatch and the state change is error processing.
  • the software verification system can indicate which state change caused a memory mismatch by the alert log that has been output.
  • the OS executed by the software verification system may be a single-core compatible OS or a multi-core compatible OS.
  • the OS to be executed is multi-core compatible and may be an OS group having a different number of cores.
  • the OS executed by the software verification system may be a 2-core-compatible OS and a 3-core-compatible OS.
  • the software verification method described in the present embodiment can be realized by executing a prepared program on a computer such as a personal computer or a workstation.
  • the program for executing the software verification method is recorded on a computer-readable recording medium such as a hard disk, a flexible disk, a CD-ROM, an MO, and a DVD, and is executed by being read from the recording medium by the computer.
  • the program for executing this software verification method may be distributed through a network such as the Internet.
  • Multi-core processor system 111 Debugger VM 112 Shared memory 113 Single OS 114 Multi-OS 115_S, 115_M Verification target application 121 Verification target application context area 122 Save area 123 Single-core environment section data 124 Multi-core environment section data 301 Reservation section 302 Notification section 303 Reception section 304 Comparison section 305 Exchange section 306 Switching section 307 Output section 310 User space 311 kernel

Abstract

The present invention facilitates verification of software in a multi-core environment. A multi-core processor system (100) executes a single OS (113) in a state (101). Upon receipt of a state change of an application to be verified (115_S) which is being executed on the single OS (113), a debugger VM (111) switches the executed OS from the single OS (113) to a multi OS (114). Subsequently, upon receipt of a state change of the application to be verified (115_M) which is being executed on the multi OS (114), the debugger VM (111) compares multi-core environment section data (124) with single-core environment section data (123).

Description

ソフトウェア検証方法、およびソフトウェア検証システムSoftware verification method and software verification system
　本発明は、ソフトウェアを検証するソフトウェア検証方法、およびソフトウェア検証システムに関する。 The present invention relates to a software verification method and a software verification system for verifying software.
　近年、ＣＰＵ（Ｃｅｎｔｒａｌ　Ｐｒｏｃｅｓｓｉｎｇ　Ｕｎｉｔ）が１つ搭載されたコンピュータであるシングルコアプロセッサシステムに代わって、ＣＰＵが複数搭載されたコンピュータであるマルチコアプロセッサシステムを採用する装置が増えている。マルチコアプロセッサシステム環境（以下、「マルチコア環境」と称する）では、ソフトウェア内のスレッドを各ＣＰＵに割り当てることで、各スレッドを並列に実行することができ、ソフトウェアを高速に実行することができる。ここで、なお、スレッドとは、プログラムの実行単位である。 In recent years, instead of a single core processor system, which is a computer having one CPU (Central Processing Unit), an apparatus employing a multi-core processor system, which is a computer having a plurality of CPUs, is increasing. In a multi-core processor system environment (hereinafter referred to as “multi-core environment”), by assigning a thread in software to each CPU, each thread can be executed in parallel, and the software can be executed at high speed. Here, a thread is an execution unit of a program.
　シングルコアプロセッサシステム環境（以下、「シングルコア環境」と称する）で動作していたソフトウェアをマルチコア環境で動作する場合、並列化に伴った副作用が発生していた。たとえば、動作タイミングの変化による潜在的な障害が顕著化するという副作用が発生していた。また、新たにマルチコア環境用に開発されるソフトウェアに関しても、全ての動作タイミングを検証することは、シングルコア環境より困難となっていた。 When a software that was operating in a single-core processor system environment (hereinafter referred to as “single-core environment”) is operated in a multi-core environment, side effects associated with parallelization have occurred. For example, a side effect that a potential failure due to a change in operation timing becomes noticeable has occurred. Also, for software newly developed for a multi-core environment, it has been more difficult to verify all the operation timings than in a single-core environment.
　たとえば、ソフトウェアの検証方法として、ブレークポイントを設定することで、ソフトウェアのトレース情報を取得する技術が開示されている。また、シングルコア環境のソフトウェアとマルチコア環境のソフトウェアとを実行し、実行時データを比較する技術が開示されている。また、複数の環境を動作する技術として、コンピュータの資源を仮想化した仮想計算機上で複数の環境を実行し、複数の環境上で実行されるソフトウェアの実行結果を比較するという技術が開示されている（たとえば、下記特許文献１～３を参照。）。 For example, as a software verification method, a technique for acquiring software trace information by setting a breakpoint is disclosed. Also disclosed is a technique for executing single-core environment software and multi-core environment software and comparing runtime data. Further, as a technique for operating a plurality of environments, a technique for executing a plurality of environments on a virtual machine that virtualizes computer resources and comparing execution results of software executed on the plurality of environments is disclosed. (For example, see Patent Documents 1 to 3 below.)
特開平８－１８５３３６号公報JP-A-8-185336 特開平８－１３７７１４号公報JP-A-8-137714 特開２００４－３５５２３３号公報JP 2004-355233 A
　しかしながら、上述した従来技術において、シングルコアプロセッサシステム環境とマルチコアプロセッサシステム環境の実行結果を比較する場合、ステップごとにブレークポイントを設定して比較することになるため、検証に時間がかかるという問題があった。また、ステップごとにブレークポイントを設定せず検証を行った場合、メモリ破壊が発生し、検証対象のソフトウェアを続行することでデバッグ情報も上書きされてしまうことがあり、メモリ破壊の原因を特定することが困難となる問題があった。また、メモリ破壊の問題が、検証対象のソフトウェアによる途中演算結果である場合も、途中演算を行っている箇所を特定することが困難であるという問題があった。 However, in the above-described conventional technology, when comparing the execution results of the single-core processor system environment and the multi-core processor system environment, since a breakpoint is set for each step and compared, there is a problem that verification takes time. there were. Also, if verification is performed without setting breakpoints for each step, memory corruption may occur, and debugging information may be overwritten by continuing the verification target software. Identify the cause of memory corruption There was a problem that made it difficult. In addition, even when the memory destruction problem is an intermediate calculation result by the verification target software, there is a problem that it is difficult to specify a location where the intermediate calculation is performed.
　本発明は、上述した従来技術による問題点を解消するため、マルチコア環境でのソフトウェアの検証を容易にするソフトウェア検証方法、およびソフトウェア検証システムを提供することを目的とする。 The present invention has an object to provide a software verification method and a software verification system that facilitate software verification in a multi-core environment in order to solve the above-described problems caused by the prior art.
　上述した課題を解決し、目的を達成するため、本発明の一側面によれば、仮想マシンが、第１オペレーティングシステムでのアプリケーションの起動に基づいてコンテキスト領域を確保するとともに第２オペレーティングシステムにコンテキスト領域の情報を通知し、アプリケーションの状態変化に基づいてコンテキスト領域のデータを退避領域に退避するとともに、アプリケーションの実行を第１オペレーティングシステムから第２オペレーティングシステムに切り替え、第２オペレーティングシステムで実行されるアプリケーションの状態変化に基づいてコンテキスト領域と退避領域とを比較するソフトウェア検証方法、およびソフトウェア検証システムが提案される。 In order to solve the above-described problems and achieve the object, according to one aspect of the present invention, a virtual machine secures a context area based on the activation of an application in the first operating system and context in the second operating system. The area information is notified, the context area data is saved in the save area based on the application state change, and the execution of the application is switched from the first operating system to the second operating system, which is executed by the second operating system. A software verification method and a software verification system for comparing a context area and a save area based on a change in the state of an application are proposed.
　本発明の一側面によれば、マルチコア環境でのソフトウェアの検証を容易にできるという効果を奏する。 According to one aspect of the present invention, it is possible to easily verify software in a multi-core environment.
図１は、マルチコアプロセッサシステム１００の動作例を示す説明図である。FIG. 1 is an explanatory diagram illustrating an operation example of the multi-core processor system 100. 図２は、マルチコアプロセッサシステム１００のハードウェア例を示すブロック図である。FIG. 2 is a block diagram illustrating a hardware example of the multi-core processor system 100. 図３は、マルチコアプロセッサシステム１００の機能例を示すブロック図である。FIG. 3 is a block diagram illustrating an example of functions of the multi-core processor system 100. 図４は、シングルＯＳ１１３動作中の状態例を示す説明図である。FIG. 4 is an explanatory diagram illustrating an example of a state during the operation of the single OS 113. 図５は、マルチＯＳ１１４動作中の状態例を示す説明図である。FIG. 5 is an explanatory diagram illustrating an example of a state during the operation of the multi-OS 114. 図６は、シングルＯＳ１１３およびマルチＯＳ１１４起動時の処理手順の一例を示すフローチャートである。FIG. 6 is a flowchart illustrating an example of a processing procedure when the single OS 113 and the multi-OS 114 are activated. 図７は、検証対象アプリ１１５起動時の処理手順の一例を示すフローチャートである。FIG. 7 is a flowchart illustrating an example of a processing procedure when the verification target application 115 is activated. 図８は、検証対象アプリ１１５の検証中における処理手順の一例を示すフローチャート（その１）である。FIG. 8 is a flowchart (part 1) illustrating an example of a processing procedure during verification of the verification target application 115. 図９は、検証対象アプリ１１５の検証中における処理手順の一例を示すフローチャート（その２）である。FIG. 9 is a flowchart (part 2) illustrating an example of a processing procedure during verification of the verification target application 115. 図１０は、本実施の形態にかかるコンピュータを用いたシステムの適用例を示す説明図である。FIG. 10 is an explanatory diagram illustrating an application example of a system using a computer according to the present embodiment.
　以下に添付図面を参照して、開示のソフトウェア検証方法、およびソフトウェア検証システムの実施の形態を詳細に説明する。なお、本実施の形態にかかるソフトウェア検証システムの実施の形態の一例として、複数のＣＰＵを有するマルチコアプロセッサシステムにて説明を行う。マルチコアプロセッサとは、コアが複数搭載されたプロセッサである。コアが複数搭載されていれば、複数のコアが搭載された単一のプロセッサでもよく、シングルコアのプロセッサが並列されているプロセッサ群でもよい。なお、本実施の形態では、説明を単純化するため、シングルコアのプロセッサが並列されているプロセッサ群を例にあげて説明する。 Embodiments of the disclosed software verification method and software verification system will be described in detail below with reference to the accompanying drawings. As an example of the embodiment of the software verification system according to the present embodiment, a multi-core processor system having a plurality of CPUs will be described. A multi-core processor is a processor having a plurality of cores. If a plurality of cores are mounted, a single processor having a plurality of cores may be used, or a processor group in which single core processors are arranged in parallel may be used. In the present embodiment, in order to simplify the explanation, a processor group in which single core processors are arranged in parallel will be described as an example.
　図１は、マルチコアプロセッサシステム１００の動作例を示す説明図である。マルチコアプロセッサシステム１００は、ＣＰＵ＃０～ＣＰＵ＃３と、共用メモリ１１２と、を含み、デバッガＶＭ（ｖｉｒｔｕａｌ　ｍａｃｈｉｎｅ）１１１の機能によって、シングルＯＳ（オペレーティングシステム：Ｏｐｅｒａｔｉｎｇ　Ｓｙｓｔｅｍ）１１３か、マルチＯＳ１１４か、のいずれかを実行している。 FIG. 1 is an explanatory diagram showing an operation example of the multi-core processor system 100. The multi-core processor system 100 includes CPU # 0 to CPU # 3 and a shared memory 112. Depending on the function of a debugger VM (virtual machine) 111, a single OS (operating system: Operating System) 113, a multi-OS 114, Running one of them.
　デバッガＶＭ１１１は、コンピュータの資源を仮想化した仮想計算機であり、さらにデバッガの機能を有している。具体的に、デバッガＶＭ１１１は、デバッガＶＭ１１１上にて動作するシングルＯＳ１１３とマルチＯＳ１１４を制御しており、実行ＯＳをシングルＯＳ１１３からマルチＯＳ１１４に、またはマルチＯＳ１１４からシングルＯＳ１１３に切り替える。また、デバッガＶＭ１１１は、デバッガの機能として、メモリダンプ、スタックトレース等が行えてもよい。共用メモリ１１２は、ＣＰＵ＃０～ＣＰＵ＃３からアクセスされるメモリである。シングルＯＳ１１３は、１つのＣＰＵで動作するＯＳであり、マルチＯＳ１１４は、複数のＣＰＵで動作するＯＳである。 The debugger VM 111 is a virtual machine that virtualizes computer resources and further has a debugger function. Specifically, the debugger VM 111 controls the single OS 113 and the multi OS 114 that operate on the debugger VM 111, and switches the execution OS from the single OS 113 to the multi OS 114 or from the multi OS 114 to the single OS 113. Further, the debugger VM 111 may perform memory dump, stack trace, and the like as a debugger function. The shared memory 112 is a memory accessed from the CPU # 0 to CPU # 3. The single OS 113 is an OS that operates on one CPU, and the multi-OS 114 is an OS that operates on a plurality of CPUs.
　図１では、マルチコアプロセッサシステム１００の動作環境として、状態１０１と状態１０２を示している。状態１０１におけるマルチコアプロセッサシステム１００は、実行ＯＳとして、シングルＯＳ１１３を実行しているシングルコア環境となっている状態である。状態１０２におけるマルチコアプロセッサシステム１００は、マルチコアプロセッサシステム１００がマルチＯＳ１１４を実行しているマルチコア環境となっている状態である。 FIG. 1 shows a state 101 and a state 102 as the operating environment of the multi-core processor system 100. The multi-core processor system 100 in the state 101 is in a state where it is in a single core environment in which the single OS 113 is executed as the execution OS. The multi-core processor system 100 in the state 102 is a state in which the multi-core processor system 100 is in a multi-core environment in which the multi-OS 114 is executed.
　初めに、状態１０１と状態１０２で共通する説明を行う。シングルＯＳ１１３は、ＣＰＵ＃０で実行され、マルチＯＳ１１４は、ＣＰＵ＃０～ＣＰＵ＃３で実行する。本実施の形態にかかるソフトウェア検証方法では、検証対象となるソフトウェアとして、アプリケーションソフトウェア（以下、「アプリ」と称する）である検証対象アプリ１１５＿Ｓ、検証対象アプリ１１５＿Ｍの検証を行う。検証対象アプリ１１５＿Ｓと検証対象アプリ１１５＿Ｍは、ソースコード１１６から生成されていることを想定する。 First, a description common to state 101 and state 102 will be given. The single OS 113 is executed by CPU # 0, and the multi-OS 114 is executed by CPU # 0 to CPU # 3. In the software verification method according to the present embodiment, verification target application 115_S and verification target application 115_M, which are application software (hereinafter referred to as “applications”), are verified as software to be verified. It is assumed that the verification target application 115_S and the verification target application 115_M are generated from the source code 116.
　検証対象アプリ１１５＿Ｓはシングルコア環境で実行されるアプリであり、検証対象アプリ１１５＿Ｍはマルチコア環境で実行されるアプリである。検証対象アプリ１１５＿Ｓと検証対象アプリ１１５＿Ｍは、同一のオブジェクトコードであってもよいし、異なっていてもよい。ソースコード１１６は、引数なし戻り値ｉｎｔ型のメイン関数の内部に、同期待ち処理を実行することが記述されている。 The verification target application 115_S is an application executed in a single core environment, and the verification target application 115_M is an application executed in a multicore environment. The verification target application 115_S and the verification target application 115_M may be the same object code or may be different. The source code 116 describes that the synchronization wait process is executed inside the argumentless return value int type main function.
　また、検証対象アプリ１１５＿Ｓと検証対象アプリ１１５＿Ｍは、同一のソースコード１１６から生成されていると想定したが、異なっていてもよい。たとえば、検証対象アプリ１１５＿Ｍは、検証対象アプリ１１５＿Ｓのソースコードに対してマルチコア環境対応のコードが追加されたソースコードから生成されたオブジェクトコードであってもよい。 Further, although it is assumed that the verification target application 115_S and the verification target application 115_M are generated from the same source code 116, they may be different. For example, the verification target application 115_M may be an object code generated from a source code in which a code corresponding to a multi-core environment is added to the source code of the verification target application 115_S.
　マルチコアプロセッサシステム１００は、検証対象アプリコンテキスト領域１２１と退避領域１２２を確保する。検証対象アプリコンテキスト領域１２１とは、検証対象となるソフトウェアが用いるコンテキスト領域である。また、コンテキスト領域とは、ＣＰＵのレジスタの値、プログラムカウンタ、スタックポインタなどといったアプリが使用するデータを格納する領域である。 The multi-core processor system 100 secures the verification target application context area 121 and the save area 122. The verification target application context area 121 is a context area used by software to be verified. The context area is an area for storing data used by the application such as a CPU register value, a program counter, and a stack pointer.
　状態１０１にて、ＣＰＵ＃０は、検証対象アプリ１１５＿Ｓを実行し、検証対象アプリ１１５＿Ｓの状態変化の一つである同期待ち処理に到達している。状態１０１に至るまでに、ＣＰＵ＃０は、検証対象アプリ１１５＿Ｓの実行結果であるシングルコア環境区間データ１２３を検証対象アプリコンテキスト領域１２１内に書き込む。 In the state 101, the CPU # 0 executes the verification target application 115_S and has reached the synchronization waiting process which is one of the state changes of the verification target application 115_S. By reaching the state 101, the CPU # 0 writes the single core environment section data 123, which is the execution result of the verification target application 115_S, in the verification target application context area 121.
　検証対象アプリ１１５＿Ｓの状態変化を受け付けたデバッガＶＭ１１１は、実行ＯＳをシングルＯＳ１１３からマルチＯＳ１１４に切り替える。このとき、デバッガＶＭ１１１は、シングルコア環境区間データ１２３を退避領域１２２に退避する。 The debugger VM 111 that has received the status change of the verification target application 115_S switches the execution OS from the single OS 113 to the multi OS 114. At this time, the debugger VM 111 saves the single core environment section data 123 in the save area 122.
　続けて、状態１０２にて、ＣＰＵ＃０～ＣＰＵ＃３は、検証対象アプリ１１５＿Ｍを実行し、検証対象アプリ１１５＿Ｍの状態変化の一つである同期待ち処理に到達している。状態１０２に至るまでに、ＣＰＵ＃０～ＣＰＵ＃３は、検証対象アプリ１１５＿Ｍの実行結果であるマルチコア環境区間データ１２４を検証対象アプリコンテキスト領域１２１内に書き込む。 Subsequently, in the state 102, the CPUs # 0 to # 3 execute the verification target application 115_M, and have reached the synchronization waiting process which is one of the state changes of the verification target application 115_M. Before reaching the state 102, the CPUs # 0 to # 3 write the multi-core environment section data 124, which is the execution result of the verification target application 115_M, in the verification target application context area 121.
　検証対象アプリ１１５＿Ｍの状態変化を受け付けたデバッガＶＭ１１１は、シングルコア環境区間データ１２３とマルチコア環境区間データ１２４を比較する。このように、マルチコアプロセッサシステム１００は、シングルコア環境とマルチコア環境で検証対象アプリをそれぞれ実行し、２つのアプリの書込データの比較をアプリの状態変化時に行う。これにより、マルチコアプロセッサシステム１００は、全てのステップをトレースせずに済み、マルチコア環境でのアプリ検証を容易にする。 The debugger VM 111 that has received the state change of the verification target application 115_M compares the single-core environment section data 123 with the multi-core environment section data 124. As described above, the multi-core processor system 100 executes the verification target application in the single-core environment and the multi-core environment, and compares the write data of the two applications when the state of the application changes. Thereby, the multi-core processor system 100 does not need to trace all steps, and facilitates application verification in a multi-core environment.
（マルチコアプロセッサシステム１００のハードウェア）
　図２は、マルチコアプロセッサシステム１００のハードウェア例を示すブロック図である。本実施の形態におけるマルチコアプロセッサシステム１００は、携帯電話などの携帯端末を想定している。図３において、マルチコアプロセッサシステム１００は、ＣＰＵｓ２０１と、ＲＯＭ（Ｒｅａｄ‐Ｏｎｌｙ　Ｍｅｍｏｒｙ）２０２と、ＲＡＭ（Ｒａｎｄｏｍ　Ａｃｃｅｓｓ　Ｍｅｍｏｒｙ）２０３と、を含む。 (Hardware of the multi-core processor system 100)
FIG. 2 is a block diagram illustrating a hardware example of the multi-core processor system 100. Multi-core processor system 100 in the present embodiment assumes a mobile terminal such as a mobile phone. In FIG. 3, the multi-core processor system 100 includes CPUs 201, ROM (Read-Only Memory) 202, and RAM (Random Access Memory) 203.
　また、マルチコアプロセッサシステム１００は、フラッシュＲＯＭ２０４と、フラッシュＲＯＭコントローラ２０５と、フラッシュＲＯＭ２０６と、を含む。また、マルチコアプロセッサシステム１００は、ユーザやその他の機器との入出力装置として、ディスプレイ２０７と、Ｉ／Ｆ（Ｉｎｔｅｒｆａｃｅ）２０８と、キーボード２０９と、を含む。また、各部はバス２１０によってそれぞれ接続されている。なお、共用メモリ１１２の具体的な装置としては、ＲＡＭ２０３、フラッシュＲＯＭ２０４である。また、共用メモリ１１２に格納されるデータのうち、書込を行わないデータに関しては、ＲＯＭ２０２に格納されていてもよい。 The multi-core processor system 100 includes a flash ROM 204, a flash ROM controller 205, and a flash ROM 206. Further, the multi-core processor system 100 includes a display 207, an I / F (Interface) 208, and a keyboard 209 as input / output devices for a user and other devices. Each unit is connected by a bus 210. Note that specific devices of the shared memory 112 are a RAM 203 and a flash ROM 204. Of the data stored in the shared memory 112, data that is not written may be stored in the ROM 202.
　ここで、ＣＰＵｓ２０１は、マルチコアプロセッサシステム１００の全体の制御を司る。ＣＰＵｓ２０１は、ＣＰＵ＃０～ＣＰＵ＃３を含む。また、ＣＰＵｓ２０１は、専用のキャッシュメモリを有してもよい。 Here, the CPUs 201 control the entire multi-core processor system 100. The CPUs 201 include CPU # 0 to CPU # 3. The CPUs 201 may have a dedicated cache memory.
　ＲＯＭ２０２は、ブートプログラムなどのプログラムを記憶している。ＲＡＭ２０３は、ＣＰＵｓ２０１のワークエリアとして使用される。フラッシュＲＯＭ２０４は、読出し速度が高速なフラッシュＲＯＭであり、たとえば、ＮＯＲ型フラッシュメモリである。たとえば、フラッシュＲＯＭ２０４は、ＯＳなどのシステムソフトウェアやアプリケーションソフトウェアなどを記憶している。たとえば、ＯＳを更新する場合、マルチコアプロセッサシステム１００は、Ｉ／Ｆ２０８によって新しいＯＳを受信し、フラッシュＲＯＭ２０４に格納されている古いＯＳを、受信した新しいＯＳに更新する。 The ROM 202 stores programs such as a boot program. The RAM 203 is used as a work area for the CPUs 201. The flash ROM 204 is a flash ROM having a high reading speed, and is, for example, a NOR flash memory. For example, the flash ROM 204 stores system software such as an OS, application software, and the like. For example, when updating the OS, the multi-core processor system 100 receives the new OS by the I / F 208 and updates the old OS stored in the flash ROM 204 to the received new OS.
　フラッシュＲＯＭコントローラ２０５は、ＣＰＵｓ２０１の制御に従ってフラッシュＲＯＭ２０６に対するデータのリード／ライトを制御する。フラッシュＲＯＭ２０６は、データの保存、運搬を主に目的としたフラッシュＲＯＭであり、たとえば、ＮＡＮＤ型フラッシュメモリである。フラッシュＲＯＭ２０６は、フラッシュＲＯＭコントローラ２０５の制御で書き込まれたデータを記憶する。データの具体例としては、マルチコアプロセッサシステム１００を使用するユーザがＩ／Ｆ２０８を通して取得した画像データ、映像データや、また本実施の形態にかかるソフトウェア検証方法を実行するプログラムなどである。フラッシュＲＯＭ２０６は、たとえば、メモリカード、ＳＤカードなどを採用することができる。 The flash ROM controller 205 controls reading / writing of data with respect to the flash ROM 206 according to the control of the CPUs 201. The flash ROM 206 is a flash ROM mainly for storing and transporting data, and is, for example, a NAND flash memory. The flash ROM 206 stores data written under the control of the flash ROM controller 205. Specific examples of the data include image data and video data acquired by the user using the multi-core processor system 100 through the I / F 208, and a program for executing the software verification method according to the present embodiment. As the flash ROM 206, for example, a memory card, an SD card, or the like can be adopted.
　ディスプレイ２０７は、カーソル、アイコンあるいはツールボックスを始め、文書、画像、機能情報などのデータを表示する。ディスプレイ２０７は、たとえば、ＴＦＴ（Ｔｈｉｎ　Ｆｉｌｍ　Ｔｒａｎｓｉｓｔｏｒ）液晶ディスプレイなどを採用することができる。 The display 207 displays data such as a cursor, an icon or a tool box, a document, an image, and function information. As the display 207, for example, a TFT (Thin Film Transistor) liquid crystal display can be adopted.
　Ｉ／Ｆ２０８は、通信回線を通じてＬＡＮ、ＷＡＮ（Ｗｉｄｅ　Ａｒｅａ　Ｎｅｔｗｏｒｋ）、インターネットなどのネットワーク２１１に接続され、ネットワーク２１１を介して他の装置に接続される。そして、Ｉ／Ｆ２０８は、ネットワーク２１１と内部のインターフェースを司り、外部装置からのデータの入出力を制御する。Ｉ／Ｆ２０８には、たとえばモデムやＬＡＮアダプタなどを採用することができる。 The I / F 208 is connected to a network 211 such as a LAN, a WAN (Wide Area Network), and the Internet through a communication line, and is connected to another device via the network 211. The I / F 208 controls an internal interface with the network 211 and controls input / output of data from an external device. For example, a modem or a LAN adapter can be adopted as the I / F 208.
　キーボード２０９は、数字、各種指示などの入力のためのキーを有し、データの入力を行う。また、キーボード２０９は、タッチパネル式の入力パッドやテンキーなどであってもよい。 The keyboard 209 has keys for inputting numbers and various instructions, and inputs data. The keyboard 209 may be a touch panel type input pad or a numeric keypad.
（マルチコアプロセッサシステム１００の機能）
　次に、マルチコアプロセッサシステム１００の機能について説明する。図３は、マルチコアプロセッサシステム１００の機能例を示すブロック図である。マルチコアプロセッサシステム１００は、確保部３０１と、通知部３０２と、受付部３０３と、比較部３０４と、交換部３０５と、切替部３０６と、出力部３０７とを含む。この制御部となる機能（確保部３０１～出力部３０７）は、記憶装置に記憶されたプログラムをＣＰＵｓ２０１が実行することにより、その機能を実現する。記憶装置とは、具体的には、たとえば、図２に示したＲＯＭ２０２、ＲＡＭ２０３、フラッシュＲＯＭ２０４、フラッシュＲＯＭ２０６などである。また、確保部３０１～出力部３０７は、デバッガＶＭ１１１の機能に含まれる。 (Functions of the multi-core processor system 100)
Next, functions of the multi-core processor system 100 will be described. FIG. 3 is a block diagram illustrating an example of functions of the multi-core processor system 100. The multi-core processor system 100 includes a securing unit 301, a notification unit 302, a reception unit 303, a comparison unit 304, a switching unit 305, a switching unit 306, and an output unit 307. The functions (securing unit 301 to output unit 307) serving as the control unit are realized by the CPUs 201 executing the program stored in the storage device. Specifically, the storage device is, for example, the ROM 202, the RAM 203, the flash ROM 204, the flash ROM 206, etc. shown in FIG. The securing unit 301 to the output unit 307 are included in the function of the debugger VM 111.
　また、マルチコアプロセッサシステム１００は、ユーザ空間３１０を確保している。ユーザ空間３１０とは、アプリのコンテキスト領域を確保する空間である。さらに、マルチコアプロセッサシステム１００は、シングルコア環境実行中の場合、ＣＰＵ＃０がシングルＯＳ１１３を実行する。また、マルチコアプロセッサシステム１００は、マルチコア環境実行中の場合、ＣＰＵ＃０がカーネル３１１＃０を実行し、ＣＰＵ＃１はカーネル３１１＃１を実行し、ＣＰＵ＃２はカーネル３１１＃２を実行し、ＣＰＵ＃３はカーネル３１１＃３を実行する。カーネル３１１は、マルチＯＳ１１４の中核をなす機能を有するソフトウェアである。 In addition, the multi-core processor system 100 secures a user space 310. The user space 310 is a space for securing an application context area. Further, in the multi-core processor system 100, when the single-core environment is being executed, the CPU # 0 executes the single OS 113. In the multi-core processor system 100, when the multi-core environment is being executed, the CPU # 0 executes the kernel 311 # 0, the CPU # 1 executes the kernel 311 # 1, and the CPU # 2 executes the kernel 311 # 2. CPU # 3 executes kernel 311 # 3. The kernel 311 is software having a function that forms the core of the multi-OS 114.
　確保部３０１は、第１オペレーティングシステムと第２オペレーティングシステムとで共用するユーザ空間３１０を確保する機能を有する。なお、第１オペレーティングシステムとは、シングルＯＳ１１３であり、第２オペレーティングシステムとは、マルチＯＳ１１４である。たとえば、確保部３０１は、シングルＯＳ１１３がユーザ空間３１０を確保した後、ユーザ空間３１０を共用するようにマルチＯＳ１１４に指示する。また、確保部３０１は、マルチＯＳ１１４が確保したユーザ空間３１０に関して、シングルＯＳ１１３に共用するように指示してもよい。 The securing unit 301 has a function of securing a user space 310 shared by the first operating system and the second operating system. The first operating system is a single OS 113, and the second operating system is a multi-OS 114. For example, after the single OS 113 secures the user space 310, the securing unit 301 instructs the multi-OS 114 to share the user space 310. Further, the securing unit 301 may instruct the single OS 113 to share the user space 310 secured by the multi-OS 114.
　また、確保部３０１は、共用メモリ１１２から退避領域１２２を確保する。退避領域１２２は、ユーザ空間３１０以外となる未割当の空間から確保される。なお、退避領域１２２は、８、１６［Ｋバイト］といった領域でよい。なお、確保されたユーザ空間３１０の上限、下限アドレス、退避領域１２２の上限、下限アドレスは、ＲＡＭ２０３、フラッシュＲＯＭ２０４などの記憶領域に記憶される。 Also, the securing unit 301 secures the save area 122 from the shared memory 112. The save area 122 is secured from an unallocated space other than the user space 310. The save area 122 may be an area of 8, 16 [K bytes]. The upper limit and lower limit address of the reserved user space 310 and the upper limit and lower limit address of the save area 122 are stored in a storage area such as the RAM 203 and the flash ROM 204.
　通知部３０２は、第１オペレーティングシステムでのアプリの起動に基づいてコンテキスト領域を確保するとともに第２オペレーティングシステムにコンテキスト領域の情報を通知する機能を有する。たとえば、通知部３０２は、シングルＯＳ１１３での検証対象アプリ１１５＿Ｓでの起動に応じて確保された検証対象アプリコンテキスト領域１２１を、マルチＯＳ１１４に通知する。 The notification unit 302 has a function of securing a context area based on the activation of the application in the first operating system and notifying the second operating system of the context area information. For example, the notification unit 302 notifies the multi-OS 114 of the verification target application context area 121 secured in response to activation by the verification target application 115_S in the single OS 113.
　受付部３０３は、第１および第２オペレーティングシステムで実行されるアプリの状態変化を受け付ける機能を有する。たとえば、受付部３０３は、検証対象アプリ１１５＿Ｓの状態変化をシングルＯＳ１１３から受け付け、検証対象アプリ１１５＿Ｍの状態変化をマルチＯＳ１１４から受け付ける。なお、具体的な状態変化としては、排他制御処理、同期待ち処理、分岐処理、またはエラー処理の開始である。各処理の詳細については図４にて後述する。また、受付元ＯＳとなるシングルＯＳ１１３またはマルチＯＳ１１４の識別情報、受け付けた状態変化の種類については、ＲＡＭ２０３、フラッシュＲＯＭ２０４などの記憶領域に記憶される。 The accepting unit 303 has a function of accepting a change in the state of an application executed by the first and second operating systems. For example, the reception unit 303 receives a state change of the verification target application 115_S from the single OS 113 and receives a state change of the verification target application 115_M from the multi-OS 114. The specific state change is the start of exclusive control processing, synchronization waiting processing, branch processing, or error processing. Details of each process will be described later with reference to FIG. Further, the identification information of the single OS 113 or the multi-OS 114 as the reception source OS and the type of the received state change are stored in a storage area such as the RAM 203 and the flash ROM 204.
　比較部３０４は、第２オペレーティングシステムで実行されるアプリの状態変化に基づいてコンテキスト領域と退避領域１２２とを比較する機能を有する。たとえば、比較部３０４は、マルチＯＳ１１４で実行される検証対象アプリ１１５＿Ｍの状態変化があった場合、検証対象アプリコンテキスト領域１２１内のマルチコア環境区間データ１２４と退避領域１２２内のシングルコア環境区間データ１２３とを比較する。なお、比較の結果は、ＲＡＭ２０３、フラッシュＲＯＭ２０４などの記憶領域に記憶される。 The comparison unit 304 has a function of comparing the context area and the save area 122 based on the state change of the application executed in the second operating system. For example, when there is a change in the state of the verification target application 115_M executed by the multi-OS 114, the comparison unit 304 determines that the multicore environment section data 124 in the verification target application context area 121 and the single core environment section data 123 in the save area 122 And compare. Note that the comparison result is stored in a storage area such as the RAM 203 and the flash ROM 204.
　交換部３０５は、コンテキスト領域のデータと退避領域１２２のデータを交換する機能を有する。たとえば、交換部３０５は、検証対象アプリコンテキスト領域１２１内のマルチコア環境区間データ１２４と退避領域１２２内のシングルコア環境区間データ１２３とを交換する。なお、検証対象アプリ１１５が片方のＯＳでしか実行されていない場合、交換部３０５は、検証対象アプリコンテキスト領域１２１内のデータを退避領域１２２に退避するだけでよい。 The exchange unit 305 has a function of exchanging data in the context area and data in the save area 122. For example, the exchange unit 305 exchanges the multi-core environment section data 124 in the verification target application context area 121 and the single-core environment section data 123 in the save area 122. When the verification target application 115 is executed only on one OS, the exchange unit 305 only needs to save the data in the verification target application context area 121 to the save area 122.
　切替部３０６は、アプリの実行を第１オペレーティングシステムから第２オペレーティングシステムに切り替える機能を有する。また、切替部３０６は、比較部３０４による比較の結果が一致を示すとき、アプリの実行を第２オペレーティングシステムから第１オペレーティングシステムに切り替える。たとえば、切替部３０６は、シングルコア環境区間データ１２３とマルチコア環境区間データ１２４が一致していた場合、マルチＯＳ１１４からシングルＯＳ１１３に切り替える。 The switching unit 306 has a function of switching the execution of the application from the first operating system to the second operating system. The switching unit 306 switches the execution of the application from the second operating system to the first operating system when the comparison result by the comparing unit 304 indicates a match. For example, when the single core environment section data 123 and the multicore environment section data 124 match, the switching unit 306 switches from the multi OS 114 to the single OS 113.
　また、切替部３０６は、比較部３０４による比較の結果が不一致を示し、かつ検証対象アプリ１１５の状態変化がエラー処理以外となる他の処理の開始であるとき、アプリの実行を第２オペレーティングシステムから第１オペレーティングシステムに切り替える。たとえば、切替部３０６は、シングルコア環境区間データ１２３とマルチコア環境区間データ１２４が不一致であり、かつ状態変化が排他制御処理、同期待ち処理、分岐処理のいずれかの開始である場合、マルチＯＳ１１４からシングルＯＳ１１３に切り替える。 In addition, the switching unit 306 executes the application when the comparison result by the comparison unit 304 indicates a mismatch and the state change of the verification target application 115 is the start of other processing other than the error processing. To the first operating system. For example, when the single core environment section data 123 and the multicore environment section data 124 do not match and the state change is the start of any of the exclusive control process, the synchronization wait process, and the branch process, the switching unit 306 Switch to single OS 113.
　出力部３０７は、比較部３０４による比較の結果が不一致を示す場合、アラートを出力する機能を有する。たとえば、出力部３０７は、シングルコア環境区間データ１２３とマルチコア環境区間データ１２４が不一致である場合、アラートを出力する。なお、出力されるアラートの内容としては、たとえば、状態変化を行う処理が呼ばれたコードのアドレスや、状態変化の種類や、不一致となったシングルコア環境区間データ１２３とマルチコア環境区間データ１２４のメモリダンプ等である。 The output unit 307 has a function of outputting an alert when the comparison result by the comparison unit 304 indicates a mismatch. For example, the output unit 307 outputs an alert when the single-core environment section data 123 and the multi-core environment section data 124 do not match. Note that the content of the alert that is output includes, for example, the address of the code that called the state change process, the type of state change, and the single core environment section data 123 and multicore environment section data 124 that did not match. Memory dump etc.
　また、出力部３０７は、比較部３０４による比較の結果が不一致を示し、かつ、アプリの状態変化がエラー処理の開始の場合、エラー処理に関する情報を出力してもよい。エラー処理に関する情報としては、たとえば、エラー処理のエラー要因や、状態変化を行う処理が呼ばれたコードのアドレスや、不一致となったシングルコア環境区間データ１２３とマルチコア環境区間データ１２４のメモリダンプ等である。 Further, the output unit 307 may output information on error processing when the result of the comparison by the comparison unit 304 indicates inconsistency and the application state change is the start of error processing. Examples of error processing information include error causes of error processing, addresses of codes that are called to perform state changes, memory dumps of mismatched single core environment section data 123 and multicore environment section data 124, and the like. It is.
　具体的に、シングルＯＳ１１３、マルチＯＳ１１４がＰＯＳＩＸ（Ｐｏｒｔａｂｌｅ　Ｏｐｅｒａｔｉｎｇ　Ｓｙｓｔｅｍ　Ｉｎｔｅｒｆａｃｅ）に準拠している場合を想定する。このとき、シングルＯＳ１１３、マルチＯＳ１１４は、シグナルハンドラが実行される場合にデバッガＶＭ１１１にシグナルハンドラのシグナル番号などを通知する。具体的なエラー要因となるシグナル番号として、出力部３０７は、バスエラーを示すＳＩＧＢＵＳ（ＳＩＧｎａｌ　ＢＵＳ　ｅｒｒｏｒ）や無効なアドレスへのアクセスを行ったことを示すＳＩＧＳＥＧＶ（ＳＩＧｎａｌ　ＳＥＧｍｅｎｔａｔｉｏｎ　Ｖｉｏｌａｔｉｏｎ）を出力する。なお、出力形式としては、標準出力への出力、ディスプレイ２０７への表示、または、ＲＡＭ２０３、フラッシュＲＯＭ２０４などの記憶領域に格納してもよい。 Specifically, it is assumed that the single OS 113 and the multi-OS 114 comply with POSIX (Portable Operating System Interface). At this time, the single OS 113 and the multi-OS 114 notify the debugger VM 111 of the signal number of the signal handler and the like when the signal handler is executed. The output unit 307 outputs SIGBUS (SIGnal BUS error) indicating a bus error and SIGEGV (SIGnal SEGmentation Violation) indicating that an invalid address has been accessed as a signal number that is a specific error factor. The output format may be output to standard output, displayed on the display 207, or stored in a storage area such as the RAM 203 or the flash ROM 204.
　図４と図５を用いて、マルチコアプロセッサシステム１００がシングルコア環境の状態と、マルチコア環境の状態について説明する。なお、本実施の形態では、検証対象アプリ１１５の実行順序として、初めにシングルコア環境で検証対象アプリ１１５＿Ｓを実行し、次にマルチコア環境で検証対象アプリ１１５＿Ｍを実行している。しかし、マルチコアプロセッサシステム１００は、初めにマルチコア環境で検証対象アプリ１１５＿Ｍを実行し、次に検証対象アプリ１１５＿Ｓを実行してもよい。 The state of the single-core environment of the multi-core processor system 100 and the state of the multi-core environment will be described with reference to FIGS. In the present embodiment, as the execution order of the verification target application 115, the verification target application 115_S is first executed in the single core environment, and then the verification target application 115_M is executed in the multicore environment. However, the multi-core processor system 100 may first execute the verification target application 115_M in the multi-core environment and then execute the verification target application 115_S.
　図４は、シングルＯＳ１１３動作中の状態例を示す説明図である。図４で示すマルチコアプロセッサシステム１００の状態は、状態１０１に等しい。ＣＰＵ＃０はシングルＯＳ１１３を実行し、ＣＰＵ＃１～ＣＰＵ＃３は休止している。初めに、デバッガＶＭ１１１は、シングルＯＳ１１３とマルチＯＳ１１４のブート時に、ユーザ空間３１０と退避領域１２２とを共用メモリ１１２に確保する。 FIG. 4 is an explanatory diagram showing an example of a state during the operation of the single OS 113. The state of the multi-core processor system 100 shown in FIG. CPU # 0 executes the single OS 113, and CPU # 1 to CPU # 3 are inactive. First, the debugger VM 111 secures the user space 310 and the save area 122 in the shared memory 112 when the single OS 113 and the multi-OS 114 are booted.
　デバッガＶＭ１１１は、シングルＯＳ１１３からの状態変化の通知を受け付ける。状態変化の詳細としては、状態変化一覧４０１に示すとおり、排他制御処理、同期待ち処理、分岐処理、エラー処理、の開始である。シングルＯＳ１１３は、排他制御処理、同期待ち処理、分岐処理、エラー処理の開始を検出すると、状態変化としてデバッガＶＭ１１１に通知する。 The debugger VM 111 receives a notification of a state change from the single OS 113. The details of the state change are the start of exclusive control processing, synchronization waiting processing, branch processing, and error processing as shown in the state change list 401. When the single OS 113 detects the start of the exclusive control process, the synchronization wait process, the branch process, and the error process, the single OS 113 notifies the debugger VM 111 as a state change.
　排他制御処理は、一方のスレッドがリソース等の使用権を獲得すると、一方のスレッドがリソースの使用権を解放するまで、他のスレッドを待機させる処理である。同期待ち処理は、複数のスレッドの処理を特定のコード位置までで一旦停止させる処理である。全てのスレッドが特定のコード位置に到達した場合、同期待ち処理は、停止を解除し、次の処理を継続する。シングルＯＳ１１３は、検証対象アプリ１１５＿Ｓについて排他制御処理が行われることを、排他制御処理、同期待ち処理を行うシステムコールの呼び出しによって検出することができる。 Exclusive control processing is processing in which when one thread acquires the right to use a resource or the like, the other thread waits until one thread releases the right to use the resource. The synchronization waiting process is a process for temporarily stopping processing of a plurality of threads up to a specific code position. When all the threads have reached a specific code position, the synchronization waiting process releases the stop and continues the next process. The single OS 113 can detect that the exclusive control process is performed on the verification target application 115_S by calling a system call that performs the exclusive control process and the synchronization waiting process.
　分岐処理は、スレッドを分岐する処理である。たとえば、分岐処理として、ｆｏｒｋ関数、ＣｒｅａｔｅＴｈｒｅａｄ関数が存在する。シングルＯＳ１１３は、検証対象アプリ１１５＿Ｓについて分岐処理が行われることを、分岐処理を行うシステムコールの呼び出しによって検出することができる。エラー処理は、プログラム内で発生したエラーを通知する処理である。たとえば、エラーが発生した場合、シングルＯＳ１１３は、エラー割込を実行する場合、エラー処理が行われることを検出することができる。 Branch processing is processing that branches a thread. For example, there are a fork function and a CreateThread function as branch processing. The single OS 113 can detect that the branch process is performed on the verification target application 115_S by calling a system call that performs the branch process. The error process is a process for notifying an error that has occurred in the program. For example, when an error occurs, the single OS 113 can detect that error processing is performed when an error interrupt is executed.
　デバッガＶＭ１１１は、状態変化一覧４０１に示す状態変化を受け付けた場合、シングルコア環境区間データ１２３とマルチコア環境区間データ１２４を交換する。具体的に、デバッガＶＭ１１１は、シングルコア環境区間データ１２３を退避領域１２２に退避する。また、デバッガＶＭ１１１は、退避領域１２２に存在するマルチコア環境区間データ１２４を検証対象アプリコンテキスト領域１２１に書き戻す。 When the debugger VM 111 receives the state change shown in the state change list 401, the debugger VM 111 exchanges the single core environment section data 123 and the multicore environment section data 124. Specifically, the debugger VM 111 saves the single core environment section data 123 in the save area 122. Further, the debugger VM 111 writes back the multi-core environment section data 124 existing in the save area 122 to the verification target application context area 121.
　図５は、マルチＯＳ１１４動作中の状態例を示す説明図である。図５で示すマルチコアプロセッサシステム１００は、状態１０２に等しい。ＣＰＵ＃０はカーネル３１１＃０を実行し、ＣＰＵ＃１はカーネル３１１＃１を実行し、ＣＰＵ＃２はカーネル３１１＃２を実行し、ＣＰＵ＃３はカーネル３１１＃３を実行する。 FIG. 5 is an explanatory diagram showing an example of a state during the multi-OS 114 operation. The multi-core processor system 100 shown in FIG. CPU # 0 executes kernel 311 # 0, CPU # 1 executes kernel 311 # 1, CPU # 2 executes kernel 311 # 2, and CPU # 3 executes kernel 311 # 3.
　デバッガＶＭ１１１は、マルチＯＳ１１４から状態変化一覧４０１に示す状態変化を受け付けた場合、比較部３０４によってシングルコア環境区間データ１２３とマルチコア環境区間データ１２４とを比較する。比較結果が一致した場合、デバッガＶＭ１１１は、マルチＯＳ１１４からシングルＯＳ１１３に切り替える。比較結果が不一致であった場合、デバッガＶＭ１１１は、状態変化がエラー処理でない場合、アラートを出力し、シングルコア環境区間データ１２３とマルチコア環境区間データ１２４を交換し、マルチＯＳ１１４からシングルＯＳ１１３に切り替える。状態変化がエラー処理である場合、デバッガＶＭ１１１は、エラー処理に関する情報を出力し、検証対象アプリ１１５＿Ｍを停止する。 When the debugger VM 111 receives the state change shown in the state change list 401 from the multi-OS 114, the comparison unit 304 compares the single-core environment section data 123 with the multi-core environment section data 124. When the comparison results match, the debugger VM 111 switches from the multi-OS 114 to the single OS 113. If the comparison result does not match, the debugger VM 111 outputs an alert when the state change is not error processing, exchanges the single core environment section data 123 and the multicore environment section data 124, and switches from the multi OS 114 to the single OS 113. When the state change is error processing, the debugger VM 111 outputs information related to error processing and stops the verification target application 115_M.
　続けて、図４、図５の動作を行うフローチャートを、図６～図９にて説明する。具体的に、図６では、シングルＯＳ１１３およびマルチＯＳ１１４起動時の処理を説明し、図７では、検証対象アプリ１１５起動時の処理を説明する。図８では、検証対象アプリ１１５の検証中におけるシングルＯＳ１１３での処理を説明し、図９では、検証対象アプリ１１５の検証中におけるマルチＯＳ１１４での処理を説明する。 Subsequently, flowcharts for performing the operations of FIGS. 4 and 5 will be described with reference to FIGS. Specifically, FIG. 6 illustrates processing when the single OS 113 and the multi-OS 114 are started, and FIG. 7 illustrates processing when the verification target application 115 is started. FIG. 8 illustrates processing in the single OS 113 during verification of the verification target application 115, and FIG. 9 illustrates processing in the multi-OS 114 during verification of the verification target application 115.
　図６は、シングルＯＳ１１３およびマルチＯＳ１１４起動時の処理手順の一例を示すフローチャートである。デバッガＶＭ１１１は、マルチＯＳ１１４をブートする（ステップＳ６０１）。デバッガＶＭ１１１は、マルチＯＳ１１４から通知を受け付けるまで待機する。マルチＯＳ１１４は、ユーザ空間３１０を確保し（ステップＳ６０２）、確保したユーザ空間３１０をデバッガＶＭ１１１に通知し（ステップＳ６０３）、起動時の処理を終了する。 FIG. 6 is a flowchart showing an example of a processing procedure when the single OS 113 and the multi-OS 114 are activated. The debugger VM 111 boots the multi-OS 114 (step S601). The debugger VM 111 waits until receiving a notification from the multi-OS 114. The multi-OS 114 secures the user space 310 (step S602), notifies the secured user space 310 to the debugger VM 111 (step S603), and ends the process at the time of startup.
　通知を受け付けたデバッガＶＭ１１１は、ユーザ空間３１０を共用空間として定義する（ステップＳ６０４）。続けて、デバッガＶＭ１１１は、シングルＯＳ１１３をブートする（ステップＳ６０５）。このとき、デバッガＶＭ１１１は、定義した共用空間をシングルＯＳ１１３に通知する。また、デバッガＶＭ１１１は、シングルＯＳ１１３から通知を受け付けるまで待機する。シングルＯＳ１１３は、共用空間をユーザ空間３１０として確保し（ステップＳ６０６）、確保したユーザ空間３１０をデバッガＶＭ１１１に通知し（ステップＳ６０７）、起動時の処理を終了する。通知を受け付けたデバッガＶＭ１１１は、未割当の空間から、退避領域１２２を確保し（ステップＳ６０８）、起動時の処理を終了する。 The debugger VM 111 that has received the notification defines the user space 310 as a shared space (step S604). Subsequently, the debugger VM 111 boots the single OS 113 (step S605). At this time, the debugger VM 111 notifies the single OS 113 of the defined shared space. Further, the debugger VM 111 waits until a notification is received from the single OS 113. The single OS 113 secures the shared space as the user space 310 (step S606), notifies the secured user space 310 to the debugger VM 111 (step S607), and ends the processing at the time of startup. The debugger VM 111 that has received the notification secures the save area 122 from the unallocated space (step S608), and ends the processing at the time of activation.
　なお、ステップＳ６０２、ステップＳ６０６の処理にて、シングルＯＳ１１３、マルチＯＳ１１４は、自身のカーネル空間も確保している。なお、カーネル空間は、１［Ｍバイト］程の領域となり、ユーザ空間３１０と比較すると狭い空間となる。 It should be noted that the single OS 113 and the multi-OS 114 have secured their own kernel space in the processing of step S602 and step S606. Note that the kernel space is an area of about 1 [M bytes], and is narrower than the user space 310.
　図７は、検証対象アプリ１１５起動時の処理手順の一例を示すフローチャートである。なお、図７では、初めにシングルＯＳ１１３にて検証対象アプリ１１５＿Ｓを起動した後に、マルチＯＳ１１４にて検証対象アプリ１１５＿Ｍを起動しているが、先に検証対象アプリ１１５＿Ｍを起動した後に、検証対象アプリ１１５＿Ｓを起動してもよい。 FIG. 7 is a flowchart illustrating an example of a processing procedure when the verification target application 115 is activated. In FIG. 7, the verification target application 115_S is first activated by the single OS 113 and then the verification target application 115_M is activated by the multi-OS 114. However, after the verification target application 115_M is first activated, 115_S may be activated.
　シングルＯＳ１１３は、検証対象アプリ１１５＿Ｓを起動し（ステップＳ７０１）、検証対象アプリ１１５＿Ｓの起動をデバッガＶＭ１１１に通知し（ステップＳ７０２）、検証対象アプリ１１５起動時の処理を終了する。 The single OS 113 activates the verification target application 115_S (step S701), notifies the debugger VM 111 of the activation of the verification target application 115_S (step S702), and ends the processing when the verification target application 115 is activated.
　通知を受け付けたデバッガＶＭ１１１は、検証対象アプリコンテキスト領域１２１を保存する（ステップＳ７０３）。なお、具体的な保存内容として、デバッガＶＭ１１１は、検証対象アプリコンテキスト領域１２１の下限アドレスと上限アドレスを保存する。続けて、デバッガＶＭ１１１は、コンテキスト領域共用指示をマルチＯＳ１１４に通知する（ステップＳ７０４）。具体的に、デバッガＶＭ１１１は、検証対象アプリコンテキスト領域１２１のアドレスをマルチＯＳ１１４に通知する。通知後、デバッガＶＭ１１１は、検証対象アプリ１１５起動時の処理を終了する。 The debugger VM 111 that has received the notification stores the verification target application context area 121 (step S703). As specific save contents, the debugger VM 111 saves the lower limit address and the upper limit address of the verification target application context area 121. Subsequently, the debugger VM 111 notifies the multi-OS 114 of a context area sharing instruction (step S704). Specifically, the debugger VM 111 notifies the multi-OS 114 of the address of the verification target application context area 121. After the notification, the debugger VM 111 ends the process when starting the verification target application 115.
　通知を受け付けたマルチＯＳ１１４は、検証対象アプリコンテキスト領域１２１を用いて検証対象アプリ１１５＿Ｍを起動し（ステップＳ７０５）、検証対象アプリ１１５起動時の処理を終了する。 The multi-OS 114 that has received the notification activates the verification target application 115_M using the verification target application context area 121 (step S705), and ends the processing when the verification target application 115 is started.
　図８は、検証対象アプリ１１５の検証中における処理手順の一例を示すフローチャート（その１）である。検証対象アプリ１１５＿Ｓは、通常実行を行い続ける（ステップＳ８０１）。通常実行中に行った状態変化は、シングルＯＳ１１３が検出する。また、検証対象アプリ１１５＿Ｓが実行される場合としては、実行ＯＳがシングルＯＳ１１３となる場合である。実行ＯＳがシングルＯＳ１１３となる場合として、たとえば、検証対象アプリ１１５＿Ｓ起動時点の場合や、後述するステップＳ９１２にて実行ＯＳがマルチＯＳ１１４からシングルＯＳ１１３に切り替わった場合である。 FIG. 8 is a flowchart (part 1) illustrating an example of a processing procedure during verification of the verification target application 115. The verification target application 115_S continues to perform normal execution (step S801). The single OS 113 detects a change in state performed during normal execution. The verification target application 115_S is executed when the execution OS becomes the single OS 113. The case where the execution OS becomes the single OS 113 is, for example, when the verification target application 115_S is activated or when the execution OS is switched from the multi-OS 114 to the single OS 113 in step S912 described later.
　シングルＯＳ１１３は、検証対象アプリ１１５＿Ｓの状態変化を検出したか否かを判断する（ステップＳ８０２）。状態変化を検出した場合（ステップＳ８０２：Ｙｅｓ）、シングルＯＳ１１３は、状態変化をデバッガＶＭ１１１に通知し（ステップＳ８０３）、ステップＳ８０２の処理に移行する。状態変化を検出していない場合（ステップＳ８０２：Ｎｏ）、シングルＯＳ１１３は、一定時間経過後、ステップＳ８０２の処理を再び実行する。 The single OS 113 determines whether or not a state change of the verification target application 115_S has been detected (step S802). When the state change is detected (step S802: Yes), the single OS 113 notifies the debugger VM 111 of the state change (step S803), and the process proceeds to step S802. When the state change is not detected (step S802: No), the single OS 113 executes the process of step S802 again after a predetermined time has elapsed.
　デバッガＶＭ１１１は、通知を受け付ける（ステップＳ８０４）。次に、デバッガＶＭ１１１は、検証対象アプリコンテキスト領域１２１のシングルコア環境区間データ１２３と退避領域１２２のマルチコア環境区間データ１２４を交換する（ステップＳ８０５）。続けて、デバッガＶＭ１１１は、実行ＯＳをシングルＯＳ１１３からマルチＯＳ１１４に切り替え（ステップＳ８０６）、検証対象アプリ１１５の検証中における処理を終了する。 The debugger VM 111 receives the notification (step S804). Next, the debugger VM 111 exchanges the single-core environment section data 123 in the verification target application context area 121 and the multi-core environment section data 124 in the save area 122 (step S805). Subsequently, the debugger VM 111 switches the execution OS from the single OS 113 to the multi OS 114 (step S806), and ends the process during verification of the verification target application 115.
　図９は、検証対象アプリ１１５の検証中における処理手順の一例を示すフローチャート（その２）である。検証対象アプリ１１５＿Ｍは、通常実行を行い続ける（ステップＳ９０１）。通常実行中に行った状態変化は、マルチＯＳ１１４が検出する。また、検証対象アプリ１１５＿Ｍが実行される場合としては、実行ＯＳがマルチＯＳ１１４となる場合である。実行ＯＳがマルチＯＳ１１４となる場合として、たとえば、ステップＳ８０６にて実行ＯＳがシングルＯＳ１１３からマルチＯＳ１１４に切り替わった場合である。 FIG. 9 is a flowchart (part 2) illustrating an example of a processing procedure during verification of the verification target application 115. The verification target application 115_M continues to perform normal execution (step S901). A state change made during normal execution is detected by the multi-OS 114. The verification target application 115_M is executed when the execution OS becomes the multi-OS 114. The case where the execution OS becomes the multi-OS 114 is, for example, the case where the execution OS is switched from the single OS 113 to the multi-OS 114 in step S806.
　マルチＯＳ１１４は、検証対象アプリ１１５＿Ｍの状態変化を検出したか否かを判断する（ステップＳ９０２）。状態変化を検出した場合（ステップＳ９０２：Ｙｅｓ）、マルチＯＳ１１４は、状態変化をデバッガＶＭ１１１に通知し（ステップＳ９０３）、ステップＳ９０２の処理に移行する。状態変化を検出していない場合（ステップＳ９０２：Ｎｏ）、マルチＯＳ１１４は、一定時間経過後、ステップＳ９０２の処理を再び実行する。 The multi-OS 114 determines whether or not a state change of the verification target application 115_M is detected (step S902). When the state change is detected (step S902: Yes), the multi-OS 114 notifies the debugger VM 111 of the state change (step S903), and the process proceeds to step S902. When the state change is not detected (step S902: No), the multi-OS 114 executes the process of step S902 again after a predetermined time has elapsed.
　デバッガＶＭ１１１は、通知を受け付ける（ステップＳ９０４）。次に、デバッガＶＭ１１１は、検証対象アプリコンテキスト領域１２１のマルチコア環境区間データ１２４と退避領域１２２のシングルコア環境区間データ１２３を比較する（ステップＳ９０５）。続けて、デバッガＶＭ１１１は、比較の結果が一致を示すか否かを判断する（ステップＳ９０６）。比較の結果が不一致を示す場合（ステップＳ９０６：Ｎｏ）、デバッガＶＭ１１１は、続けて、状態変化がエラー処理の開始か否かを判断する（ステップＳ９０７）。エラー処理の開始である場合（ステップＳ９０７：Ｙｅｓ）、デバッガＶＭ１１１は、エラー処理に関する情報を出力し（ステップＳ９０８）、検証対象アプリ１１５＿Ｍを停止し（ステップＳ９０９）、検証対象アプリ１１５の検証中における処理を終了する。 The debugger VM 111 receives the notification (step S904). Next, the debugger VM 111 compares the multi-core environment section data 124 in the verification target application context area 121 with the single-core environment section data 123 in the save area 122 (step S905). Subsequently, the debugger VM 111 determines whether or not the comparison result indicates a match (step S906). If the comparison result indicates a mismatch (step S906: No), the debugger VM 111 continues to determine whether or not the state change is the start of error processing (step S907). If it is the start of error processing (step S907: Yes), the debugger VM 111 outputs information related to error processing (step S908), stops the verification target application 115_M (step S909), and is verifying the verification target application 115. The process ends.
　エラー処理の開始でない場合（ステップＳ９０７：Ｎｏ）、デバッガＶＭ１１１は、アラートを出力する（ステップＳ９１０）。アラートの出力後、デバッガＶＭ１１１は、検証対象アプリコンテキスト領域１２１のマルチコア環境区間データ１２４と退避領域１２２のシングルコア環境区間データ１２３を交換する（ステップＳ９１１）。交換後、または、比較の結果が一致を示す場合（ステップＳ９０６：Ｙｅｓ）、デバッガＶＭ１１１は、実行ＯＳをマルチＯＳ１１４からシングルＯＳ１１３に切り替え（ステップＳ９１２）、検証対象アプリ１１５の検証中における処理を終了する。 If it is not the start of error processing (step S907: No), the debugger VM 111 outputs an alert (step S910). After outputting the alert, the debugger VM 111 exchanges the multi-core environment section data 124 in the verification target application context area 121 and the single-core environment section data 123 in the save area 122 (step S911). After the replacement or when the comparison result indicates a match (step S906: Yes), the debugger VM 111 switches the execution OS from the multi-OS 114 to the single OS 113 (step S912), and ends the process during verification of the verification target application 115. To do.
　なお、検証対象アプリ１１５の検証中における処理において、シングルコア環境の検証対象アプリの実行位置と、マルチコア環境の検証対象アプリの実行位置とが異なる場合も存在する。異なり続けた結果、検証対象アプリ１１５＿Ｓ、または検証対象アプリ１１５＿Ｍのいずれかが先に終了する可能性も存在する。ステップＳ８０６、ステップＳ９１２の処理にて切替元ＯＳから切替先ＯＳへ切り替えた後、どちらかの検証対象アプリ１１５が終了していた場合、デバッガＶＭ１１１は、切替元ＯＳに再度切り替え、終了していない検証対象アプリ１１５を実行する。 Note that in the process during verification of the verification target application 115, the execution position of the verification target application in the single core environment may be different from the execution position of the verification target application in the multicore environment. As a result of continuing the difference, there is a possibility that either the verification target application 115_S or the verification target application 115_M is terminated first. If one of the verification target applications 115 has ended after switching from the switching source OS to the switching destination OS in the processing of step S806 and step S912, the debugger VM 111 switches to the switching source OS again and has not ended. The verification target application 115 is executed.
　図１０は、本実施の形態にかかるコンピュータを用いたシステムの適用例を示す説明図である。図１０において、ネットワークＮＷは、サーバ１００１、サーバ１００２とクライアント１０３１～クライアント１０３４とが通信可能なネットワークであり、たとえば、ＬＡＮ、ＷＡＮ、インターネット、携帯電話網などを含む。 FIG. 10 is an explanatory diagram showing an application example of a system using a computer according to the present embodiment. In FIG. 10, a network NW is a network in which a server 1001, a server 1002, and clients 1031 to 1034 can communicate, and includes, for example, a LAN, a WAN, the Internet, a mobile phone network, and the like.
　サーバ１００２は、クラウド１０２０を有するサーバ群（サーバ１０２１～サーバ１０２５）の管理サーバである。クライアント１０３１はノート型ＰＣ（Ｐｅｒｓｏｎａｌ　Ｃｏｍｐｕｔｅｒ）である。クライアント１０３２はデスクトップ型ＰＣ、クライアント１０３３は携帯電話機である。携帯電話機として、クライアント１０３３は、スマートフォンであってもよいし、ＰＨＳ（Ｐｅｒｓｏｎａｌ　Ｈａｎｄｙｐｈｏｎｅ　Ｓｙｓｔｅｍ）であってもよい。クライアント１０３４はタブレット型端末である。 The server 1002 is a management server of a server group (server 1021 to server 1025) having the cloud 1020. The client 1031 is a notebook PC (Personal Computer). The client 1032 is a desktop PC, and the client 1033 is a mobile phone. As a mobile phone, the client 1033 may be a smartphone or a PHS (Personal Handyphone System). The client 1034 is a tablet terminal.
　図１０のサーバ１００１、サーバ１００２、サーバ１０２１～サーバ１０２５、クライアント１０３１～クライアント１０３４は、本実施の形態にかかるソフトウェア検証方法を実行する。たとえば、サーバ１０２１～１０２５を管理するＶＭにて、サーバ１０２１のＣＰＵがシングルＯＳ１１３を実行し、サーバ１０２１～サーバ１０２５のＣＰＵ群がマルチＯＳ１１４を実行し、検証対象アプリ１１５を実行する。 The server 1001, the server 1002, the server 1021 to the server 1025, and the client 1031 to the client 1034 in FIG. 10 execute the software verification method according to the present embodiment. For example, in the VM that manages the servers 1021 to 1025, the CPU of the server 1021 executes the single OS 113, the CPU group of the servers 1021 to 1025 executes the multi-OS 114, and executes the verification target application 115.
　以上説明したように、ソフトウェア検証方法、およびソフトウェア検証システムによれば、シングルコア環境とマルチコア環境でアプリをそれぞれ実行し、２つのアプリの書込データの比較をアプリの状態変化時に行う。マルチコア環境での不具合は状態変化によって発生するため、ソフトウェア検証システムは、全てのステップをトレースせずに済み、マルチコア環境でのアプリ検証を容易にできる。また、ソフトウェア検証システムは、ＶＭを用いて複数の環境を切り替えることにより、ボード２枚によるデバッグを行わず、ボード１枚で検証を行うことができる。 As described above, according to the software verification method and the software verification system, the application is executed in the single-core environment and the multi-core environment, and the write data of the two applications is compared when the state of the application changes. Since a failure in the multi-core environment occurs due to a state change, the software verification system does not need to trace all the steps, and can easily perform application verification in the multi-core environment. In addition, the software verification system can perform verification with one board without performing debugging with two boards by switching a plurality of environments using a VM.
　また、ソフトウェア検証システムは、検証対象アプリのコンテキスト領域を２つの環境で共用してもよい。これにより、ソフトウェア検証システムは、使用メモリ量を少なくすることができる。 Also, the software verification system may share the context area of the verification target application in two environments. Thereby, the software verification system can reduce the amount of memory used.
　また、ソフトウェア検証システムは、コンテキスト領域と退避領域との比較が一致を示すとき、マルチコア環境からシングルコア環境に切り替えてもよい。比較が一致を示し、マルチコア環境が正常動作していることを示すため、ソフトウェア検証システムは、検証対象アプリの動作を続行することができる。 In addition, the software verification system may switch from the multi-core environment to the single-core environment when the comparison between the context area and the save area indicates a match. Since the comparison indicates a match and the multi-core environment is operating normally, the software verification system can continue the operation of the verification target application.
　また、ソフトウェア検証システムは、退避領域のデータをコンテキスト領域に書き戻してもよい。このように、退避領域にあったシングルコア環境のデータを、コンテキスト領域に書き戻した後、シングルコア環境で検証対象アプリを実行することで、ソフトウェア検証システムは、シングルコア環境での検証対象アプリの動作を続行することができる。 In addition, the software verification system may write the data in the save area back to the context area. As described above, after the data of the single core environment in the save area is written back to the context area, the software verification system executes the verification target application in the single core environment, so that the software verification system can verify the verification target application in the single core environment. Can continue operation.
　また、ソフトウェア検証システムは、比較の結果が不一致を示すとき、アラートを出力してもよい。これにより、ソフトウェア検証システムは、状態変化の際の途中演算結果を記録しておくことができ、後にメモリ破壊が起こった際に、メモリ破壊の原因となったデータを追跡し易くなる。 In addition, the software verification system may output an alert when the comparison result indicates a mismatch. As a result, the software verification system can record an intermediate calculation result at the time of a state change, and when the memory destruction occurs later, it becomes easy to trace the data that caused the memory destruction.
　また、状態変化は、排他制御処理、同期待ち処理、分岐処理、またはエラー処理のうちの少なくとも一の処理の開始を含んでもよい。マルチコア環境で発生する不具合は、排他制御処理、同期待ち処理、分岐処理を実行することにより発生するため、ソフトウェア検証システムは、各処理の開始ごとにデータの比較を行うことで、メモリ破壊の原因となるデータを確実に取得することができる。 Further, the state change may include the start of at least one of an exclusive control process, a synchronization wait process, a branch process, or an error process. Problems that occur in a multi-core environment occur by executing exclusive control processing, synchronization wait processing, and branch processing. Therefore, the software verification system causes data corruption by comparing data at the start of each processing. Can be obtained with certainty.
　また、ソフトウェア検証システムは、比較の結果が不一致を示し、かつ、状態変化がエラー処理以外となる他の処理であるとき、アラートを出力しつつ、マルチコア環境からシングルコア環境に切り替えてもよい。状態変化が起こった場合、シングルコア環境の検証対象アプリの実行位置と、マルチコア環境の検証対象アプリの実行位置とが異なる場合がある。異なる場合としては、たとえば、非同期スレッド間の分岐処理である。 Also, the software verification system may switch from the multi-core environment to the single-core environment while outputting an alert when the comparison result indicates a mismatch and the state change is other processing other than error processing. When the state change occurs, the execution position of the verification target application in the single-core environment may be different from the execution position of the verification target application in the multi-core environment. Examples of different cases include branch processing between asynchronous threads.
　実行位置がずれた場合に受け付ける状態変化は、エラー処理以外となる他の処理であるため、ソフトウェア検証システムは、アラートを出力し、検証対象アプリの検証を続行する。実行位置のずれは、検証対象アプリ内のスレッドの終了、またはｊｏｉｎ関数などによって、解消される。ずれが解消した際に比較の結果が一致を示した場合、ソフトウェア検証システムは、いままで出力されていたアラートがずれの結果で出力されており、不具合で出力していたわけではないという判断材料を提示することができる。 Since the status change accepted when the execution position is shifted is another process other than the error process, the software verification system outputs an alert and continues verification of the verification target application. The deviation of the execution position is resolved by the end of the thread in the verification target application or the join function. If the result of the comparison shows a match when the deviation is resolved, the software verification system uses the judgment material that the alert that has been output so far has been output as the result of the deviation and that it was not output due to a malfunction. Can be presented.
　また、ソフトウェア検証システムは、比較の結果が不一致を示し、かつ、状態変化がエラー処理であるとき、エラー処理に関する情報を出力しつつ、検証対象アプリを停止してもよい。これにより、ソフトウェア検証システムは、出力され続けていたアラートのログによって、どの状態変化でメモリの不一致が発生していたかということを提示することができる。 Further, the software verification system may stop the verification target application while outputting information related to error processing when the comparison result indicates a mismatch and the state change is error processing. As a result, the software verification system can indicate which state change caused a memory mismatch by the alert log that has been output.
　また、ソフトウェア検証システムにて実行するＯＳは、シングルコア対応のＯＳとマルチコア対応のＯＳとであってもよい。また、実行するＯＳは、マルチコア対応であり、異なるコア数のＯＳ群であってもよい。具体的に、ソフトウェア検証システムにて実行するＯＳが、２コア対応のＯＳと、３コア対応のＯＳとであってもよい。 Also, the OS executed by the software verification system may be a single-core compatible OS or a multi-core compatible OS. The OS to be executed is multi-core compatible and may be an OS group having a different number of cores. Specifically, the OS executed by the software verification system may be a 2-core-compatible OS and a 3-core-compatible OS.
　なお、本実施の形態で説明したソフトウェア検証方法は、予め用意されたプログラムをパーソナル・コンピュータやワークステーション等のコンピュータで実行することにより実現することができる。本ソフトウェア検証方法を実行するプログラムは、ハードディスク、フレキシブルディスク、ＣＤ－ＲＯＭ、ＭＯ、ＤＶＤ等のコンピュータで読み取り可能な記録媒体に記録され、コンピュータによって記録媒体から読み出されることによって実行される。また本ソフトウェア検証方法を実行するプログラムは、インターネット等のネットワークを介して配布してもよい。 Note that the software verification method described in the present embodiment can be realized by executing a prepared program on a computer such as a personal computer or a workstation. The program for executing the software verification method is recorded on a computer-readable recording medium such as a hard disk, a flexible disk, a CD-ROM, an MO, and a DVD, and is executed by being read from the recording medium by the computer. The program for executing this software verification method may be distributed through a network such as the Internet.
　１００　マルチコアプロセッサシステム
　１１１　デバッガＶＭ
　１１２　共用メモリ
　１１３　シングルＯＳ
　１１４　マルチＯＳ
　１１５＿Ｓ、１１５＿Ｍ　検証対象アプリ
　１２１　検証対象アプリコンテキスト領域
　１２２　退避領域
　１２３　シングルコア環境区間データ
　１２４　マルチコア環境区間データ
　３０１　確保部
　３０２　通知部
　３０３　受付部
　３０４　比較部
　３０５　交換部
　３０６　切替部
　３０７　出力部
　３１０　ユーザ空間
　３１１　カーネル 100 Multi-core processor system 111 Debugger VM
112 Shared memory 113 Single OS
114 Multi-OS
115_S, 115_M Verification target application 121 Verification target application context area 122 Save area 123 Single-core environment section data 124 Multi-core environment section data 301 Reservation section 302 Notification section 303 Reception section 304 Comparison section 305 Exchange section 306 Switching section 307 Output section 310 User space 311 kernel

Claims (14)

  1. 　仮想マシンが、
    　第１オペレーティングシステムでのアプリケーションの起動に基づいてコンテキスト領域を確保するとともに第２オペレーティングシステムに前記コンテキスト領域の情報を通知し、
    　前記アプリケーションの状態変化に基づいて前記コンテキスト領域のデータを退避領域に退避するとともに、前記アプリケーションの実行を前記第１オペレーティングシステムから前記第２オペレーティングシステムに切り替え、
    　前記第２オペレーティングシステムで実行される前記アプリケーションの状態変化に基づいて前記コンテキスト領域と前記退避領域とを比較すること
    　を特徴とするソフトウェア検証方法。     The virtual machine
    Securing a context area based on the activation of an application in the first operating system and notifying the second operating system of the context area information;
    Based on the status change of the application, the context area data is saved in a save area, and the execution of the application is switched from the first operating system to the second operating system,
    A software verification method comprising: comparing the context area and the save area based on a change in state of the application executed by the second operating system.
  2. 　前記仮想マシンは、前記第２オペレーティングシステムに前記コンテキスト領域を前記第１オペレーティングシステムと共用するように指示すること
    　を特徴とする請求項１に記載のソフトウェア検証方法。     The software verification method according to claim 1, wherein the virtual machine instructs the second operating system to share the context area with the first operating system.
  3. 　前記比較の結果が一致を示すときは、前記仮想マシンは前記アプリケーションの実行を前記第２オペレーティングシステムから前記第１オペレーティングシステムに切り替えること
    　を特徴とする請求項１または請求項２に記載のソフトウェア検証方法。     The software verification according to claim 1 or 2, wherein when the comparison result indicates a match, the virtual machine switches execution of the application from the second operating system to the first operating system. Method.
  4. 　前記仮想マシンは、前記退避領域のデータを前記コンテキスト領域に書き戻すこと
    　を特徴とする請求項３に記載のソフトウェア検証方法。     The software verification method according to claim 3, wherein the virtual machine writes data in the save area back into the context area.
  5. 　前記比較の結果が不一致を示すときは、前記仮想マシンはアラートを出力すること
    　を特徴とする請求項１乃至請求項３の何れか一に記載のソフトウェア検証方法。     The software verification method according to any one of claims 1 to 3, wherein the virtual machine outputs an alert when the result of the comparison indicates a mismatch.
  6. 　前記アプリケーションの状態変化は、排他制御処理、同期待ち処理、分岐処理、またはエラー処理のうちの少なくとも一の処理の開始を含むこと
    　を特徴とする請求項１乃至請求項５の何れか一に記載のソフトウェア検証方法。     The state change of the application includes a start of at least one of exclusive control processing, synchronization waiting processing, branch processing, or error processing. Software verification method.
  7. 　前記比較の結果が不一致を示し、かつ、前記アプリケーションの状態変化が前記エラー処理以外となる他の処理の開始であるときは、前記仮想マシンは前記アラートを出力しつつ、前記アプリケーションの実行を前記第２オペレーティングシステムから前記第１オペレーティングシステムに切り替えること
    　を特徴とする請求項６に記載のソフトウェア検証方法。     When the result of the comparison indicates inconsistency and the state change of the application is the start of other processing other than the error processing, the virtual machine executes the application while outputting the alert. The software verification method according to claim 6, wherein the second operating system is switched to the first operating system.
  8. 　前記比較の結果が不一致を示し、かつ、前記アプリケーションの状態変化が前記エラー処理の開始であるときは、前記仮想マシンは前記エラー処理に関する情報を出力しつつ、前記アプリケーションを停止すること
    　を特徴とする請求項６に記載のソフトウェア検証方法。     The virtual machine stops the application while outputting information on the error processing when the result of the comparison indicates inconsistency and the status change of the application is the start of the error processing. The software verification method according to claim 6.
  9. 　前記第１オペレーティングシステムはシングルコア対応であり、
    　前記第２オペレーティングシステムはマルチコア対応であること
    　を特徴とする請求項１乃至請求項８の何れか一に記載のソフトウェア検証方法。     The first operating system is single-core capable;
    The software verification method according to any one of claims 1 to 8, wherein the second operating system is multi-core compatible.
  10. 　前記仮想マシンは、前記アプリケーションが起動される前に、前記第２オペレーティングシステムおよび前記第１オペレーティングシステムをブートするとともに、前記退避領域をメモリに確保すること
    　を特徴とする請求項１乃至請求項９の何れか一に記載のソフトウェア検証方法。     10. The virtual machine boots the second operating system and the first operating system and secures the save area in a memory before the application is started. The software verification method according to any one of the above.
  11. 　第１オペレーティングシステムと、
    　第２オペレーティングシステムと、
    　前記第１オペレーティングシステムと前記第２オペレーティングシステムとを制御する制御ユニットと、
    　前記第１オペレーティングシステムおよび前記第２オペレーティングシステムで共用されるコンテキスト領域と退避領域とを含むメモリと、
    　を含み、
    　前記制御ユニットは、
    　前記退避領域に保持される第１オペレーティングシステムでのアプリケーションの実行結果と前記コンテキスト領域に保持される前記第２オペレーティングシステムでの前記アプリケーションの実行結果とを比較すること
    　を特徴とするソフトウェア検証システム。     A first operating system;
    A second operating system;
    A control unit for controlling the first operating system and the second operating system;
    A memory including a context area and a save area shared by the first operating system and the second operating system;
    Including
    The control unit is
    A software verification system that compares an execution result of an application in the first operating system held in the save area with an execution result of the application in the second operating system held in the context area.
  12. 　前記制御ユニットは、
    　前記アプリケーションが所定の処理を開始するときに、前記アプリケーションを実行するシステムを前記第１オペレーティングシステムまたは前記第２オペレーティングシステムの間で切り替えること
    　を特徴とする請求項１１に記載のソフトウェア検証システム。     The control unit is
    The software verification system according to claim 11, wherein when the application starts a predetermined process, a system that executes the application is switched between the first operating system or the second operating system.
  13. 　前記所定の処理は、排他制御処理、同期待ち処理、分岐処理、またはエラー処理の何れかであること
    　を特徴とする請求項１１または請求項１２に記載のソフトウェア検証システム。     The software verification system according to claim 11 or 12, wherein the predetermined process is any one of an exclusive control process, a synchronization wait process, a branch process, and an error process.
  14. 　前記制御ユニットはデバッガであること
    　を特徴とする請求項１１乃至請求項１３の何れか一に記載のソフトウェア検証システム。     The software verification system according to any one of claims 11 to 13, wherein the control unit is a debugger.
PCT/JP2011/066012 2011-07-13 2011-07-13 Software verification method and software verification system WO2013008326A1 (en)

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