WO2013004487A3 - Method for executing processing in a secure device - Google Patents
Method for executing processing in a secure device Download PDFInfo
- Publication number
- WO2013004487A3 WO2013004487A3 PCT/EP2012/061688 EP2012061688W WO2013004487A3 WO 2013004487 A3 WO2013004487 A3 WO 2013004487A3 EP 2012061688 W EP2012061688 W EP 2012061688W WO 2013004487 A3 WO2013004487 A3 WO 2013004487A3
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- type
- task
- secure device
- hardware unit
- computational hardware
- Prior art date
Links
- 238000000034 method Methods 0.000 title abstract 3
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
- G06F21/71—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
- G06F21/72—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information in cryptographic circuits
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/60—Protecting data
- G06F21/602—Providing cryptographic facilities or services
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
- G06F21/71—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
- G06F21/75—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information by inhibiting the analysis of circuitry or operation
- G06F21/755—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information by inhibiting the analysis of circuitry or operation with measures against power attack
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3877—Concurrent instruction execution, e.g. pipeline or look ahead using a slave processor, e.g. coprocessor
- G06F9/3879—Concurrent instruction execution, e.g. pipeline or look ahead using a slave processor, e.g. coprocessor for non-native instruction execution, e.g. executing a command; for Java instruction set
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
- G06F9/5005—Allocation of resources, e.g. of the central processing unit [CPU] to service a request
- G06F9/5027—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals
- G06F9/5044—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals considering hardware capabilities
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09C—CIPHERING OR DECIPHERING APPARATUS FOR CRYPTOGRAPHIC OR OTHER PURPOSES INVOLVING THE NEED FOR SECRECY
- G09C1/00—Apparatus or methods whereby a given sequence of signs, e.g. an intelligible text, is transformed into an unintelligible sequence of signs by transposing the signs or groups of signs or by replacing them by others according to a predetermined system
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
- H04L9/002—Countermeasures against attacks on cryptographic mechanisms
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L2209/00—Additional information or applications relating to cryptographic mechanisms or cryptographic arrangements for secret or secure communication H04L9/00
- H04L2209/12—Details relating to cryptographic hardware or logic circuitry
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Software Systems (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Computer Security & Cryptography (AREA)
- Computer Hardware Design (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- General Health & Medical Sciences (AREA)
- Computer Networks & Wireless Communication (AREA)
- Bioethics (AREA)
- Health & Medical Sciences (AREA)
- Signal Processing (AREA)
- Advance Control (AREA)
- Executing Machine-Instructions (AREA)
- Power Sources (AREA)
- Storage Device Security (AREA)
Abstract
The invention is a method for executing processing in a secure device containing a microprocessor. The processing includes a task of a first type. The first type corresponds to the operations executable by the microprocessor or by a component specifically designed for the first type. The secure device also includes a computational hardware unit specifically designed for executing operations of a second type. Said second type is different from the first one. The method includes the steps of: -selection of a resource associated with the task, with the resource including the computational hardware unit, -assignment of the selected resource to the task, and -execution of the task using the computational hardware unit by executing at least one of the operations of the second type, thus diverting the computational hardware unit (U1) with respect to the use which it was originally designed for.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP11305869.7 | 2011-07-06 | ||
EP11305869A EP2544115A1 (en) | 2011-07-06 | 2011-07-06 | Method for running a process in a secured device |
Publications (2)
Publication Number | Publication Date |
---|---|
WO2013004487A2 WO2013004487A2 (en) | 2013-01-10 |
WO2013004487A3 true WO2013004487A3 (en) | 2013-03-07 |
Family
ID=46317415
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/EP2012/061688 WO2013004487A2 (en) | 2011-07-06 | 2012-06-19 | Method for executing processing in a secure device |
Country Status (2)
Country | Link |
---|---|
EP (1) | EP2544115A1 (en) |
WO (1) | WO2013004487A2 (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP3136645A1 (en) * | 2015-08-27 | 2017-03-01 | Gemalto Sa | Mixed hardware and software instructions for cryptographic functionalities implementation |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6789147B1 (en) * | 2001-07-24 | 2004-09-07 | Cavium Networks | Interface for a security coprocessor |
US20090217286A1 (en) * | 2008-02-21 | 2009-08-27 | International Business Machines Corporation | Adjunct Processor Load Balancing |
EP2192518A1 (en) * | 2008-11-19 | 2010-06-02 | Accenture Global Services GmbH | System for securing multithreaded server applications |
-
2011
- 2011-07-06 EP EP11305869A patent/EP2544115A1/en not_active Withdrawn
-
2012
- 2012-06-19 WO PCT/EP2012/061688 patent/WO2013004487A2/en active Application Filing
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6789147B1 (en) * | 2001-07-24 | 2004-09-07 | Cavium Networks | Interface for a security coprocessor |
US20090217286A1 (en) * | 2008-02-21 | 2009-08-27 | International Business Machines Corporation | Adjunct Processor Load Balancing |
EP2192518A1 (en) * | 2008-11-19 | 2010-06-02 | Accenture Global Services GmbH | System for securing multithreaded server applications |
Non-Patent Citations (1)
Title |
---|
BLUM L ET AL: "A SIMPLE UNPREDICTABLE PSEUDO-RANDOM NUMBER GENERATOR", SIAM JOURNAL ON COMPUTING, SOCIETY FOR INDUSTRIAL AND APPLIED MATHEMATICS, US, vol. 15, no. 2, 1 May 1986 (1986-05-01), pages 364 - 383, XP002037919, ISSN: 0097-5397, DOI: 10.1137/0215025 * |
Also Published As
Publication number | Publication date |
---|---|
WO2013004487A2 (en) | 2013-01-10 |
EP2544115A1 (en) | 2013-01-09 |
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