WO2013003676A2 - Systems and methods for controlling etch selectivity of various materials - Google Patents

Systems and methods for controlling etch selectivity of various materials Download PDF

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Publication number
WO2013003676A2
WO2013003676A2 PCT/US2012/044820 US2012044820W WO2013003676A2 WO 2013003676 A2 WO2013003676 A2 WO 2013003676A2 US 2012044820 W US2012044820 W US 2012044820W WO 2013003676 A2 WO2013003676 A2 WO 2013003676A2
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WO
WIPO (PCT)
Prior art keywords
tungsten
liner
layer
barrier layer
recessed feature
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
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PCT/US2012/044820
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French (fr)
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WO2013003676A3 (en
Inventor
Esther JENG
Anand Chandrashekar
Raashina Humayun
Michal Danek
Ronald Powell
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Novellus Systems Inc
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Novellus Systems Inc
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Priority to KR1020147002856A priority Critical patent/KR101951062B1/en
Publication of WO2013003676A2 publication Critical patent/WO2013003676A2/en
Publication of WO2013003676A3 publication Critical patent/WO2013003676A3/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/056—Manufacture or treatment of conductive parts of the interconnections by filling conductive material into holes, grooves or trenches
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/04—Coating on selected surface areas, e.g. using masks
    • C23C16/045—Coating cavities or hollow spaces, e.g. interior of tubes; Infiltration of porous substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/24—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials using chemical vapour deposition [CVD]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/40—Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials
    • H10P14/42—Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials using a gas or vapour
    • H10P14/43—Chemical deposition, e.g. chemical vapour deposition [CVD]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/26—Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials
    • H10P50/264—Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials by chemical means
    • H10P50/266—Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials by chemical means by vapour etching only
    • H10P50/267—Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials by chemical means by vapour etching only using plasmas
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/032—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
    • H10W20/054—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers by selectively removing parts thereof
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/056—Manufacture or treatment of conductive parts of the interconnections by filling conductive material into holes, grooves or trenches
    • H10W20/057—Manufacture or treatment of conductive parts of the interconnections by filling conductive material into holes, grooves or trenches by selectively depositing, e.g. by using selective CVD or plating

Definitions

  • the present disclosure relates to substrate processing systems, and more particularly to substrate processing systems for controlling etch selectivity of various materials.
  • Tungsten-containing film may be used for horizontal interconnects, vias between adjacent metal layers, contacts between a first metal layer and the devices on the silicon substrate, and high aspect ratio features.
  • CVD chemical vapor deposition
  • a substrate is heated to a process temperature in a deposition chamber.
  • a liner/barrier layer made of titanium or titanium nitride (TiN) is deposited. Thereafter, the tungsten-containing film (the bulk layer) is deposited on the liner/barrier layer.
  • Depositing tungsten-containing film into high aspect ratio features may cause formation of seams inside the features.
  • the seams may lead to high resistance, contamination and loss of filled materials. In other words, the seams degrade performance of integrated circuits.
  • a seam may extend close to a field region after the filling process and then open during chemical- mechanical planarization.
  • a substrate 100 includes a recessed feature 104 such as a contact or via hole to be filled with W.
  • a liner/barrier layer 108 is deposited.
  • the liner/barrier layer 108 may be made of titianium (Ti) or titanium nitride (TiN).
  • the liner/barrier layer 108 typically creates an overhang 1 10 or pinch point near an opening of the recessed feature 104.
  • a tungsten-containing film 1 12 is then deposited over the liner/barrier layer 108 using CVD deposition.
  • a seam can form when a layer that is being deposited on the side walls of the feature thickens to the point that it seals off a void space below the sealing point (also referred to as a pinch point).
  • the pinch point prevents precursors and/or other reactants from entering the void space, which remains unfilled.
  • the void space or seam is also sometimes referred to as a keyhole.
  • a keyhole 1 14 remains after deposition.
  • CMP chemical mechanical planarization
  • FIGs. 2A-2D another example of a process according to the prior art for filling a recessed feature with a tungsten-containing film is shown.
  • a substrate 130 includes a recessed feature 134 such as a contact or via hole.
  • a liner/barrier layer 138 is deposited.
  • the liner/barrier may be made of Ti/TiN and may create an overhang 140.
  • a W layer 142 is then deposited over the liner/barrier layer 138 using partial W CVD deposition.
  • an etch back step is performed with a fluorine species. Repeated deposition-etch cycles may be performed to reduce a keyhole 144 and seam in the W fill.
  • a CMP step may be used to open the keyhole 144.
  • FIGs. 2A-2D involves a partial fill in a first deposition step, which leaves the via open during a subsequent etch step.
  • the subsequent etch step targeted at W removal in the field and overhang tends to have an unwanted side effect.
  • the subsequent etch step also removes the W inside the via.
  • a subsequent deposition step regrows W at the same rate inside the via and at the overhang, which results in the same keyhole void.
  • a method for filling a recessed feature of a substrate includes a) at least partially filling a recessed feature of a substrate with tungsten-containing film using at least one of chemical vapor deposition (CVD) and atomic layer deposition (ALD); b) at a predetermined temperature, using an etchant including activated fluorine species to selectively etch the tungsten-containing film more than an underlying material of the recessed feature without removing all of the tungsten-containing film at a bottom of the recessed feature; and c) filling the recessed feature using at least one of CVD and ALD.
  • CVD chemical vapor deposition
  • ALD atomic layer deposition
  • (a) includes filling the recessed feature with the tungsten-containing film such that an opening of the recessed feature is pinched off.
  • (a) includes filling the recessed feature with the tungsten-containing film such that an opening of the recessed feature is closed and overburden is deposited.
  • (b) is performed in one of a CVD chamber and an etch chamber.
  • the underlying material includes a liner/barrier layer.
  • the liner/barrier layer includes one of titanium and tantalum.
  • the material of the liner/barrier layer includes one of titanium, titanium nitride, tantalum nitride, and TiCxNx.
  • the method includes repeating (a) and (b) one or more times before (c).
  • the method includes performing chemical mechanical planarization (CMP) of the substrate after (c).
  • CMP chemical mechanical planarization
  • the predetermined temperature is less than or equal to 150 Q C.
  • the predetermined temperature is less than or equal to 100 Q C.
  • the predetermined temperature is less than or equal to 50 Q C.
  • the liner/barrier layer includes an overhang that creates a pinch point at an opening of the recessed feature.
  • the method includes adding one or more of nitrogen, oxygen, hydrogen, helium, argon, or fluorine to slow etching of the liner/barrier layer.
  • the method includes oxidizing the liner/barrier layer prior to (a).
  • An apparatus for depositing a film on a substrate includes one or more chambers and a source that provides activated fluorine species.
  • a controller initiates in the one or more chambers: a) partially filling a recessed feature of a substrate with tungsten-containing film using at least one of chemical vapor deposition (CVD) and atomic layer deposition (ALD); b) at a predetermined temperature, using an etchant including the activated fluorine species to selectively etch the tungsten-containing film more than an underlying material of the recessed feature without removing all of the tungsten-containing film at a bottom of the recessed feature; and c) filling the feature using at least one of CVD and ALD.
  • CVD chemical vapor deposition
  • ALD atomic layer deposition
  • (a) includes filling the recessed feature with the tungsten-containing film such that an opening of the recessed feature is pinched off.
  • (a) includes filling the recessed feature with the tungsten-containing film such that an opening of the recessed feature is closed and overburden is deposited.
  • (b) is performed in one of a CVD chamber and an etch chamber.
  • the underlying material includes a liner/barrier layer.
  • the liner/barrier layer includes one of titanium and tantalum.
  • the liner/barrier layer includes one of titanium, titanium nitride, tantalum nitride, and TiCxNx.
  • the controller repeats (a) and (b) one or more times before (c).
  • chemical mechanical planarization (CMP) of the substrate is performed after (c).
  • the predetermined temperature is less than or equal to 150 Q C.
  • the predetermined temperature is less than or equal to 100 Q C.
  • the predetermined temperature is less than or equal to 50 Q C.
  • the liner/barrier layer includes an overhang that creates a pinch point at an opening of the recessed feature.
  • the controller initiates adding one or more of nitrogen, oxygen, hydrogen, helium, argon, or fluorine to slow etching of the liner/barrier layer.
  • the controller initiates oxidizing the liner/barrier layer prior to (a).
  • a method for creating a film on a substrate includes a) depositing a tungsten-containing layer using at least one of chemical vapor deposition (CVD) and atomic layer deposition (ALD) on an underlying layer, wherein the underlying material is arranged on an oxide layer of a substrate; b) at a predetermined temperature, using activated fluorine species to selectively etch the tungsten- containing layer more than the underlying layer; and c) depositing a layer over the tungsten-containing layer using at least one of CVD or ALD.
  • CVD chemical vapor deposition
  • ALD atomic layer deposition
  • the underlying layer includes a liner/barrier layer.
  • the liner/barrier layer includes one of titanium and tantalum.
  • the liner/barrier layer includes one of titanium, titanium nitride, tantalum nitride, and TiCxNx.
  • the predetermined temperature is less than or equal to 150 Q C.
  • the predetermined temperature is less than or equal to 100 Q C.
  • the predetermined temperature is less than or equal to 50 Q C.
  • the method includes adding one or more of nitrogen, oxygen, hydrogen, helium, argon, or fluorine gas to slow etching of the liner/barrier layer.
  • the method includes oxidizing the underlying layer prior to (a).
  • the layer comprises tungsten.
  • An apparatus for depositing a film on a substrate includes one or more chambers and a source that provides activated fluorine species.
  • a controller initiates in the one or more chambers: a) depositing a tungsten-containing layer using at least one of chemical vapor deposition (CVD) or atomic layer deposition (ALD) on an underlying layer, wherein the underlying layer is arranged on an oxide layer of a substrate; b) at a predetermined temperature, using activated fluorine species to selectively etch the tungsten-containing layer more than the underlying material; and c) depositing a layer over the tungsten-containing layer.
  • CVD chemical vapor deposition
  • ALD atomic layer deposition
  • the underlying material includes a liner/barrier layer.
  • the liner/barrier layer includes one of titanium and tantalum.
  • the liner/barrier layer includes one of titanium, titanium nitride, tantalum nitride, and TiCxNx.
  • the predetermined temperature is less than or equal to 150 Q C.
  • the predetermined temperature is less than or equal to 100 Q C.
  • the predetermined temperature is less than or equal to 50 Q C.
  • the controller initiates adding one or more of nitrogen, oxygen, hydrogen, helium, argon, or fluorine to slow etching of the liner/barrier layer.
  • the controller initiates oxidizing the underlying layer prior to (a).
  • the layer comprises tungsten.
  • a method for filling a recessed feature of a substrate includes a) filling a recessed feature of a substrate with tungsten-containing film using conformal chemical vapor deposition (CVD); b) at a first predetermined temperature, using activated fluorine species to selectively etch the tungsten-containing film more than an underlying material of the liner barrier layer; and c) filling the feature using selective CVD.
  • CVD conformal chemical vapor deposition
  • the method includes d) at a second predetermined temperature, using activated fluorine species to selectively etch thet-containing film more than the underlying material of the liner barrier layer.
  • the method includes repeating (c) and (d) one or more times.
  • the method includes performing chemical mechanical planarization (CMP) of the substrate after (d).
  • CMP chemical mechanical planarization
  • a method for filling a recessed feature of a substrate includes a) filling the recessed feature of a substrate with tungsten-containing film), wherein the recessed feature includes an underling material and includes an overhang that creates a pinch point at an opening of the recessed feature, and wherein a void is created in the tungsten-containing film; b) at a predetermined temperature, using activated fluorine radicals to selectively etch the tungsten-containing film more than the underlying material and to open the void in the tungsten- containing film; c) partially filling the recessed feature using selective CVD, wherein the selective CVD deposits more material at a bottom of the recessed feature than on sides or a field of the recessed feature; and d) filling a remainder of the feature using CVD.
  • FIG. 1 illustrates an example of a process for chemical vapor deposition (CVD) W fill according to the prior art
  • FIG. 2 illustrates another example of process for chemical vapor deposition (CVD) W fill according to the prior art
  • FIG. 3 is a graph showing etch rates for W and TiN and etch rate sensitivity as a function of temperature (T) according to the present disclosure
  • FIG. 4 is a graph showing etch rates for W and TiN and etch rate sensitivity as a function of 1 /T according to the present disclosure
  • FIGs. 5 and 6 are graphs illustrating etch rate for Ti and TiN and selectivity for W/Ti and W/TiN as a function of temperature for a first flow rate according to the present disclosure
  • FIGs. 7 and 8 are graphs illustrating etch rate for Ti and TiN and selectivity for W/Ti and W/TiN as a function of temperature for a second flow rate according to the present disclosure
  • FIGs. 9A-9D illustrate an example of a fill process according to the present disclosure
  • FIG. 10 is a flowchart illustrating steps of the process used in FIGs. 9A-9D according to the present disclosure.
  • FIGs. 1 1 A-1 1 D illustrate another example of a fill process according to the present disclosure
  • FIG. 12 is a flowchart illustrating steps of the process used in FIGs. 1 1 A-1 1 D according to the present disclosure
  • FIGs. 13A-13C illustrate a process for fabricating a film on a substrate according to the prior art
  • FIGs. 14A-14C illustrate an example of a process for fabricating a film on a substrate according to the present disclosure
  • FIG. 15 is a flowchart illustrating steps of the process used in FIGs. 14A-14C;
  • FIGs. 16A-16D illustrate another example of a fill process according to the present disclosure
  • FIG. 17 is a flowchart illustrating steps of the process used in FIGs. 16A-16D;
  • FIG. 18 illustrates an exemplary processing chamber
  • FIG. 19 illustrates an example of a substrate processing tool including a deposition chamber and an etch chamber.
  • the present disclosure relates to systems and methods for filling features and/or fabricating substrates such as semiconductor substrates using a process that includes selective tungsten/titanium nitride (W/TiN) etching.
  • W/TiN selective tungsten/titanium nitride
  • the term selective W etch refers to an etch step that uses a fluorine based etchant and that has an etch ratio (W/Ti, W/TiN) that can be adjusted using temperature. More particularly, selective W etching of Ti/TiN is based on the difference in apparent activation energies for fluorine (F)-radical etch of W and TiN. At high temperatures (e.g., T >150 Q C), the W/TiN etch rate ratio is ⁇ 1 .
  • the W/TiN etch rate ratio is > 1 .
  • the W/TiN etch rate ratio is >100:1 . Therefore, the systems and methods according to the present disclosure are capable of providing etch selectivity that ranges from ⁇ 0.5:1 to >100:1 .
  • the high etch selectivity enables new integration schemes as well as process control using Ti or TiN as an etch stop. Temperature may be controlled using a temperature controlled pedestal or any other suitable method. Additionally, pressure may be adjusted to alter etch selectivity.
  • Systems and methods for etching according to the present disclosure are based on a fluorine radical etch step to shape tungsten-containing film deposited in re-entrant features to enable seam free fill by a subsequent chemical vapor deposition (CVD) W.
  • the fluorine radicals may be generated from NF 3 /Ar or NF 3 /He plasma in a remote plasma source or using other approaches.
  • the deposition and etching are performed in a plasma- enhanced chemical vapor deposition system, although other systems may be used. While fluorine radicals are disclosed, any other type of activated fluorine species can be used. For example only, thermally activated fluorine gas may also be used to create activated fluorine species. Ultraviolet or microwave activated fluorine may also be used.
  • ALD deposition of tungsten-containing film may also be performed in an ALD chamber.
  • Etching may be performed in a separate etch chamber.
  • etch selectivity is shown to vary as a function of temperature. As can be seen, low temperatures provide higher W/TiN etch selectivity. In FIG. 3, the temperature dependency of etch rates for W and TiN and etch selectivity of W/TiN are shown. In FIG. 4, etch rate and etch rate selectivity are shown as a function of 1 /T for a given etchant flow.
  • FIGs. 5-8 etch rates and etch rate selectivity for W/Ti and W/TiN are shown.
  • graphs illustrating etch rates for Ti and TiN are shown as a function of temperature for first and second etchant flow rates.
  • graphs illustrating etch rate selectivity for W/Ti and W/TiN are shown as a function of temperature for the first and second flow rates.
  • the ability to selectively etch W enables enhanced plug fill of reentrant features by providing the ability to over-etch the top of the features. This could also allow for improved process margin and the ability to optimize fill for a range of feature sizes since the etch thickness does not need to be controlled as precisely.
  • a process for filling a recessed feature with tungsten-containing film includes using partial CVD fill, fluorine-based etch with selective W etch, CVD W deposition and W CMP.
  • a substrate 160 includes a recessed feature 164 such as a contact or via hole.
  • a liner/barrier layer 166 such as Ti or TiN is deposited and creates an overhang 168.
  • a tungsten-containing film 170 is then deposited over the liner/barrier layer 166 using partial W CVD deposition.
  • a selective W etch back step is performed with fluorine species as described above.
  • the temperature of the selective W etch is less than or equal to 150 Q C. In other examples, the temperature of the selective W etch is less than or equal to 100 Q C. In other examples, the temperature of the selective W etch is less than or equal to 50 Q C.
  • portions of the tungsten-containing film 170 that were previously deposited on an upper surface and near the overhang 168 are etched to the liner/barrier layer 166.
  • Deposition of W and selective W etching steps may be repeated one or more times if desired.
  • CMP may be performed.
  • the keyhole is substantially reduced or eliminated as compared to that shown in FIGs. 1 A-2D.
  • FIG. 10 a flowchart illustrating steps of a process 200 used in FIGs. 9A-9D is shown.
  • partial W fill of a recessed feature is performed using CVD W deposition.
  • selective W etching of the W is performed.
  • the selective W etch back step is performed with fluorine species as described above.
  • the temperature of the selective W etch is less than or equal to 150 Q C. In other examples, the temperature of the selective W etch is less than or equal to 100 Q C. In other examples, the temperature of the selective W etch is less than or equal to 50 Q C.
  • control may return one or more times to step 204 to perform partial deposition of W and to step 208 for selective W etching of the W at 208.
  • the feature is filled using CVD deposition of W.
  • CMP is performed.
  • FIGs. 1 1 A-1 1 D a W fill process using one or more selective W etch and selective W deposition steps is shown. Selective W etch can enable "bottom up" W fill of a recessed feature such as a trench or via using selective W etch and selective deposition.
  • a substrate 230 includes a recessed feature 232 such as a contact or via hole.
  • a liner/barrier layer 234 such as Ti/TiN is deposited and creates an overhang 236.
  • a W layer 238 is then deposited over the liner/barrier layer using conformal CVD W fill.
  • a selective W etch step is performed.
  • the selective W etch back step is performed with fluorine species as described above.
  • the temperature of the selective W etch is less than or equal to 150 Q C.
  • the temperature of the selective W etch is less than or equal to 100 Q C.
  • the temperature of the selective W etch is less than or equal to 50 Q C.
  • selective CVD W fill (for example only, > 50 nm) is performed. As used herein, selective CVD W fill deposits more W at a bottom of the feature than on sides or a field region of the feature.
  • a selective W etch is performed. Selective CVD W fill and selective W etch can be repeated as needed. A CMP step may be performed.
  • steps of a process 250 used in FIGs. 1 1 A- 1 1 D are shown.
  • a recessed feature is filled using conformal CVD W.
  • a selective W etch step is performed.
  • selective CVD fill is performed. In some examples, greater than 50 nm is deposited.
  • selective W etch is performed.
  • additional selective CVD W fill and selective W etch are performed.
  • a CMP step may be performed.
  • FIGs. 13A-13C a process for fabricating a film on a substrate according to the prior art is shown.
  • an oxide layer 304 is deposited on a substrate or underlying layer 300.
  • a liner/barrier layer 306 made of Ti or TiN is deposited on the oxide layer 304.
  • a W layer 308 is deposited on the liner/barrier layer 306.
  • an etching step is performed, which removes part of the W layer 308 and the exposed part of the liner/barrier layer 306.
  • a W layer 316 (or another material) is deposited. However, delamination may occur where the W layer 316 (or other material) is deposited on the underlying oxide layer 304.
  • a selective W etch process is used to stop on Ti or TiN at an edge of a substrate such as a wafer to prevent film peeling during subsequent W deposition.
  • the selective W etch back step is performed with fluorine species as described above.
  • the temperature of the selective W etch is less than or equal to 150 Q C. In other examples, the temperature of the selective W etch is less than or equal to 100 Q C. In other examples, the temperature of the selective W etch is less than or equal to 50 Q C.
  • An oxide layer 354 is deposited on a substrate or underlying layer identified at 350.
  • a Ti or TiN layer 356 is deposited on the oxide layer 354.
  • a W layer 362 is deposited on the TiN layer 356.
  • a selective W etching step is performed, which removes part of the W layer 362 and but stops on the exposed part of the TiN layer 356.
  • a W layer (or another material) identified at 366 is deposited on the W layer 362. Good adhesion occurs between the W layer (or other material) 366 and underlying TiN layer and the problem of delamination is reduced or eliminated.
  • steps of a process 400 used in FIGs. 14A- 14C are shown.
  • an oxide layer is deposited on a substrate.
  • a Ti or TiN layer is deposited on the oxide layer.
  • a first W layer is deposited.
  • a selective W etch is performed to etch part of the first W layer.
  • the selective W etch back step is performed with fluorine species as described above.
  • the temperature of the selective W etch is less than or equal to 150 Q C. In other examples, the temperature of the selective W etch is less than or equal to 100 Q C. In other examples, the temperature of the selective W etch is less than or equal to 50 Q C.
  • a second W layer or another material is deposited on the first W layer and at least part of the Ti or TiN layer.
  • FIGs. 16A-16D another approach for filling a recessed feature with W is shown.
  • a substrate 450 defines a recessed feature 452 such as a via or contact hole having a pinch point or overhang 456.
  • Conformal CVD W deposition is performed to fill the feature with W identified at 454.
  • a void 458 is created in the W layer 454.
  • selective W etching is used to open the void 458.
  • the selective W etch back step is performed with fluorine species as described above.
  • the temperature of the selective W etch is less than or equal to 150 Q C.
  • the temperature of the selective W etch is less than or equal to 100 Q C.
  • the temperature of the selective W etch is less than or equal to 50 Q C.
  • selective CVD W fill is used to fill the feature near the pinch point 456.
  • conformal CVD deposition is performed to fill the remainder of the feature.
  • the via is closed off until the end of the etch process, which keeps the W inside the via intact.
  • the W in the field and at the pinch point is overetched, which exposes the underlayer.
  • a subsequent deposition step allows faster regrowth on the existing W in the via compared to slow W growth on the exposed underlayer in the pinch point and via. The selectively faster regrowth in the via allows for complete fill before the top pinches off.
  • FIG. 17 a process 520 used in FIGs. 16A-16D is shown.
  • conformal CVD deposition is performed to fill a feature of a substrate.
  • selective W etching is used to open a void.
  • selective CVD W fill is used to fill the feature near a pinch point.
  • conformal CVD deposition is performed to fill the remainder of the feature. CMP may be performed.
  • a process gas may be added during selective W etching to inhibit Ti or TiN etching.
  • one or more of nitrogen, oxygen, hydrogen, helium, argon, or fluorine gas may be added to slow down Ti or TiN etch.
  • oxygen and nitrogen the following reactions occur:
  • the liner/barrier layer may be made of TiCxNx or TaN.
  • the liner/barrier layer can be oxidized prior to W deposition to create an effective etch stop.
  • the present disclosure provides new processing capabilities for W metallization, which can be used for many applications such as logic and memory contact fill, DRAM buried wordline fill, vertically integrated memory gate/wordline fill, 3D integration (TSV), etc.
  • the substrate processing system 600 includes a chamber 618 with a pedestal 620, a shower head 614, and an in-situ plasma generator 616.
  • the apparatus 600 also includes a system controller 622 to receive input and/or supply control signals to various devices. While a single chamber is shown, the processes described herein may be implemented in one or more processing chambers.
  • the etchant and, in certain embodiments, inert gases, such as argon, helium and others, are supplied to a remote plasma generator 606 from a source 602, which may be a storage tank. Any suitable remote plasma generator 606 may be used for activating the etchant before introducing it into the chamber 618.
  • the remote plasma generator 606 is typically a self-contained device generating weakly ionized plasma using the supplied etchant. Embedded into the remote plasma generator 606, a high power RF generator provides energy to the electrons in the plasma. The energy is then transferred to the neutral etchant molecules leading to high temperature causing thermal dissociation of these molecules. The remote plasma generator 606 may dissociate a high percentage of incoming etchant molecules due to high RF energy and special channel geometry causing the etchant to adsorb most of this energy.
  • etchant flows from the remote plasma generator 606 through a connecting line 608 into the chamber 618, where the mixture is distributed through the shower head 614.
  • etchant flows into the chamber 618 directly completely bypassing the remote plasma generator 606 (e.g., the system 600 does not include such generator).
  • the remote plasma generator 606 may be turned off while flowing the etchant into the chamber 618, for example, because activation of the etchant is not needed.
  • a plasma generator 616 may be used.
  • the generator 616 is a High Frequency (HF) generator capable of providing between about 0 W and 10,000 W at frequencies between about 1 MHz and 100 MHz.
  • the HF generator may deliver between about 0 W to 5,000 W at about 13.56 MHz.
  • the RF generator 616 may generate in-situ plasma to enhance removal of the initial tungsten layer.
  • the RF generator 616 is not used during the removal operations of the process.
  • the chamber 618 may include one or more sensors 624 for sensing various process parameters, such as degree of deposition and etching, concentrations, pressure, temperature, and others.
  • the sensors 624 may provide information on chamber conditions during the process to the system controller 622. Examples of the sensors2 624 include mass flow controllers, pressure sensors, thermocouples, and others. The sensor 624 may also include an infra-red detector or optical detector to monitor presence of gases in the chamber and control measures.
  • Deposition and selective removal operations generate various volatile species that are evacuated from the chamber 618. Moreover, processing is performed at certain predetermined pressure levels the chamber 618. Both of these functions are achieved using a vacuum outlet 626, which may be a vacuum pump.
  • the system controller 622 executes system control software including sets of instructions for controlling the timing, mixture of gases, chamber pressure, chamber temperature, and other parameters of a particular process.
  • Other computer programs stored on memory devices associated with the controller may be employed in some embodiments.
  • the computer program code for controlling the processes in a process sequence can be written in any conventional computer readable programming language: for example, assembly language, C, C++, Pascal, Fortran or others. Compiled object code or script is executed by the processor to perform the tasks identified in the program.
  • the system software may be designed or configured in many different ways. For example, various chamber component subroutines or control objects may be written to control operation of the chamber components necessary to carry out the described processes. Examples of programs or sections of programs for this purpose include process gas control code, pressure control code, and plasma control code.
  • the controller parameters relate to process conditions such as, for example, timing of each operation, pressure inside the chamber, substrate temperature, etchant flow rates, etc. These parameters are provided to the user in the form of a recipe, and may be entered utilizing the user interface. Signals for monitoring the process may be provided by analog and/or digital input connections of the system controller 622. The signals for controlling the process are output on the analog and digital output connections of the apparatus 600.
  • FIG. 19 an example of a substrate processing tool 700 including a deposition chamber 702 and an etch chamber 704 is shown.
  • Deposition of the tungsten-containing film may be performed in the deposition chamber 702.
  • a controller 708 may be used to control operation of the deposition chamber 702 and/or the etch chamber 704.
  • the controller 708 may initiate transfer of a substrate to/from the etch chamber 704 and/or the deposition chamber 702 using a substrate handler 712. While the deposition chamber 702 and the etch chamber 704 are shown as part of the same tool 700, the deposition chamber 702 and the etch chamber 704 may be associated with different tools.

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Abstract

A method for filling a recessed feature of a substrate includes a) at least partially filling a recessed feature of a substrate with tungsten-containing film using at least one of chemical vapor deposition (CVD) and atomic layer deposition (ALD); b) at a predetermined temperature, using an etchant including activated fluorine species to selectively etch the tungsten-containing film more than an underlying material of the recessed feature without removing all of the tungsten-containing film at a bottom of the recessed feature; and c) filling the recessed feature using at least one of CVD and ALD.

Description

SYSTEMS AND METHODS FOR CONTROLLING ETCH SELECTIVITY OF
VARIOUS MATERIALS
CROSS-REFERENCE TO RELATED APPLICATIONS
[0001] This application claims priority to U.S. Patent Application Serial No. 13/536,095, filed on June 28, 2012, and the benefit of U.S. Patent Application Serial No. 61 /503,271 , filed on June 30, 201 1 . The disclosures of these applications are hereby incorporated by reference in their entirety.
FIELD
[0002] The present disclosure relates to substrate processing systems, and more particularly to substrate processing systems for controlling etch selectivity of various materials.
BACKGROUND
[0003] The background description provided herein is for the purpose of generally presenting the context of the disclosure. Work of the presently named inventors, to the extent it is described in this background section, as well as aspects of the description that may not otherwise qualify as prior art at the time of filing, are neither expressly nor impliedly admitted as prior art against the present disclosure.
[0004] Deposition of tungsten-containing film using chemical vapor deposition (CVD) is an integral part of many semiconductor fabrication processes. Tungsten-containing film may be used for horizontal interconnects, vias between adjacent metal layers, contacts between a first metal layer and the devices on the silicon substrate, and high aspect ratio features. During deposition, a substrate is heated to a process temperature in a deposition chamber. A liner/barrier layer made of titanium or titanium nitride (TiN) is deposited. Thereafter, the tungsten-containing film (the bulk layer) is deposited on the liner/barrier layer.
[0005] Depositing tungsten-containing film into high aspect ratio features may cause formation of seams inside the features. The seams may lead to high resistance, contamination and loss of filled materials. In other words, the seams degrade performance of integrated circuits. For example, a seam may extend close to a field region after the filling process and then open during chemical- mechanical planarization.
[0006] Referring now to FIGs. 1 A-1 D, an example of a process according to the prior art for filling a recessed feature with tungsten-containing film is shown. In FIG. 1 A, a substrate 100 includes a recessed feature 104 such as a contact or via hole to be filled with W. In FIG. 1 B, a liner/barrier layer 108 is deposited. The liner/barrier layer 108 may be made of titianium (Ti) or titanium nitride (TiN). The liner/barrier layer 108 typically creates an overhang 1 10 or pinch point near an opening of the recessed feature 104. A tungsten-containing film 1 12 is then deposited over the liner/barrier layer 108 using CVD deposition.
[0007] Filling features with tungsten-containing film may cause formation of seams inside the filled features. A seam can form when a layer that is being deposited on the side walls of the feature thickens to the point that it seals off a void space below the sealing point (also referred to as a pinch point). The pinch point prevents precursors and/or other reactants from entering the void space, which remains unfilled. The void space or seam is also sometimes referred to as a keyhole. In FIG. 1 C, a keyhole 1 14 remains after deposition. In FIG. 1 D, chemical mechanical planarization (CMP) opens the keyhole 1 14.
[0008] In FIGs. 2A-2D, another example of a process according to the prior art for filling a recessed feature with a tungsten-containing film is shown. In FIG. 2A, a substrate 130 includes a recessed feature 134 such as a contact or via hole. A liner/barrier layer 138 is deposited. The liner/barrier may be made of Ti/TiN and may create an overhang 140. A W layer 142 is then deposited over the liner/barrier layer 138 using partial W CVD deposition. In FIG. 2B, an etch back step is performed with a fluorine species. Repeated deposition-etch cycles may be performed to reduce a keyhole 144 and seam in the W fill. In FIG. 2D, a CMP step may be used to open the keyhole 144.
[0009] The approach of FIGs. 2A-2D involves a partial fill in a first deposition step, which leaves the via open during a subsequent etch step. The subsequent etch step targeted at W removal in the field and overhang tends to have an unwanted side effect. The subsequent etch step also removes the W inside the via. A subsequent deposition step regrows W at the same rate inside the via and at the overhang, which results in the same keyhole void.
SUMMARY
[0010] This section provides a general summary of the disclosure, and is not a comprehensive disclosure of its full scope or all of its features.
[0011] A method for filling a recessed feature of a substrate includes a) at least partially filling a recessed feature of a substrate with tungsten-containing film using at least one of chemical vapor deposition (CVD) and atomic layer deposition (ALD); b) at a predetermined temperature, using an etchant including activated fluorine species to selectively etch the tungsten-containing film more than an underlying material of the recessed feature without removing all of the tungsten-containing film at a bottom of the recessed feature; and c) filling the recessed feature using at least one of CVD and ALD.
[0012] In other features, (a) includes filling the recessed feature with the tungsten-containing film such that an opening of the recessed feature is pinched off.
[0013] In other features, (a) includes filling the recessed feature with the tungsten-containing film such that an opening of the recessed feature is closed and overburden is deposited.
[0014] In other features, (b) is performed in one of a CVD chamber and an etch chamber.
[0015] In other features, the underlying material includes a liner/barrier layer. The liner/barrier layer includes one of titanium and tantalum. The material of the liner/barrier layer includes one of titanium, titanium nitride, tantalum nitride, and TiCxNx. The method includes repeating (a) and (b) one or more times before (c).
[0016] In other features, the method includes performing chemical mechanical planarization (CMP) of the substrate after (c).
[0017] In other features, the predetermined temperature is less than or equal to 150 QC. The predetermined temperature is less than or equal to 100 QC. The predetermined temperature is less than or equal to 50 QC. The liner/barrier layer includes an overhang that creates a pinch point at an opening of the recessed feature.
[0018] In other features, the method includes adding one or more of nitrogen, oxygen, hydrogen, helium, argon, or fluorine to slow etching of the liner/barrier layer.
[0019] In other features, the method includes oxidizing the liner/barrier layer prior to (a).
[0020] An apparatus for depositing a film on a substrate includes one or more chambers and a source that provides activated fluorine species. A controller initiates in the one or more chambers: a) partially filling a recessed feature of a substrate with tungsten-containing film using at least one of chemical vapor deposition (CVD) and atomic layer deposition (ALD); b) at a predetermined temperature, using an etchant including the activated fluorine species to selectively etch the tungsten-containing film more than an underlying material of the recessed feature without removing all of the tungsten-containing film at a bottom of the recessed feature; and c) filling the feature using at least one of CVD and ALD.
[0021] In other features, (a) includes filling the recessed feature with the tungsten-containing film such that an opening of the recessed feature is pinched off.
[0022] In other features, (a) includes filling the recessed feature with the tungsten-containing film such that an opening of the recessed feature is closed and overburden is deposited.
[0023] In other features, (b) is performed in one of a CVD chamber and an etch chamber.
[0024] In other features, the underlying material includes a liner/barrier layer. The liner/barrier layer includes one of titanium and tantalum. The liner/barrier layer includes one of titanium, titanium nitride, tantalum nitride, and TiCxNx.
[0025] In other features, the controller repeats (a) and (b) one or more times before (c). In other features, chemical mechanical planarization (CMP) of the substrate is performed after (c). The predetermined temperature is less than or equal to 150 QC. The predetermined temperature is less than or equal to 100 QC. The predetermined temperature is less than or equal to 50 QC. [0026] In other features, the liner/barrier layer includes an overhang that creates a pinch point at an opening of the recessed feature. The controller initiates adding one or more of nitrogen, oxygen, hydrogen, helium, argon, or fluorine to slow etching of the liner/barrier layer. The controller initiates oxidizing the liner/barrier layer prior to (a).
[0027] A method for creating a film on a substrate includes a) depositing a tungsten-containing layer using at least one of chemical vapor deposition (CVD) and atomic layer deposition (ALD) on an underlying layer, wherein the underlying material is arranged on an oxide layer of a substrate; b) at a predetermined temperature, using activated fluorine species to selectively etch the tungsten- containing layer more than the underlying layer; and c) depositing a layer over the tungsten-containing layer using at least one of CVD or ALD.
[0028] In other features, the underlying layer includes a liner/barrier layer. The liner/barrier layer includes one of titanium and tantalum. The liner/barrier layer includes one of titanium, titanium nitride, tantalum nitride, and TiCxNx.
[0029] In other features, the predetermined temperature is less than or equal to 150 QC. The predetermined temperature is less than or equal to 100 QC. The predetermined temperature is less than or equal to 50 QC.
[0030] In other features, the method includes adding one or more of nitrogen, oxygen, hydrogen, helium, argon, or fluorine gas to slow etching of the liner/barrier layer. The method includes oxidizing the underlying layer prior to (a). The layer comprises tungsten.
[0031] An apparatus for depositing a film on a substrate includes one or more chambers and a source that provides activated fluorine species. A controller initiates in the one or more chambers: a) depositing a tungsten-containing layer using at least one of chemical vapor deposition (CVD) or atomic layer deposition (ALD) on an underlying layer, wherein the underlying layer is arranged on an oxide layer of a substrate; b) at a predetermined temperature, using activated fluorine species to selectively etch the tungsten-containing layer more than the underlying material; and c) depositing a layer over the tungsten-containing layer.
[0032] In other features, the underlying material includes a liner/barrier layer. The liner/barrier layer includes one of titanium and tantalum. The liner/barrier layer includes one of titanium, titanium nitride, tantalum nitride, and TiCxNx. [0033] In other features, the predetermined temperature is less than or equal to 150 QC. The predetermined temperature is less than or equal to 100 QC. The predetermined temperature is less than or equal to 50 QC.
[0034] In other features, the controller initiates adding one or more of nitrogen, oxygen, hydrogen, helium, argon, or fluorine to slow etching of the liner/barrier layer. The controller initiates oxidizing the underlying layer prior to (a). The layer comprises tungsten.
[0035] A method for filling a recessed feature of a substrate includes a) filling a recessed feature of a substrate with tungsten-containing film using conformal chemical vapor deposition (CVD); b) at a first predetermined temperature, using activated fluorine species to selectively etch the tungsten-containing film more than an underlying material of the liner barrier layer; and c) filling the feature using selective CVD.
[0036] In other features, the method includes d) at a second predetermined temperature, using activated fluorine species to selectively etch thet-containing film more than the underlying material of the liner barrier layer.
[0037] In other features, the method includes repeating (c) and (d) one or more times.
[0038] In other features, the method includes performing chemical mechanical planarization (CMP) of the substrate after (d).
[0039] A method for filling a recessed feature of a substrate includes a) filling the recessed feature of a substrate with tungsten-containing film), wherein the recessed feature includes an underling material and includes an overhang that creates a pinch point at an opening of the recessed feature, and wherein a void is created in the tungsten-containing film; b) at a predetermined temperature, using activated fluorine radicals to selectively etch the tungsten-containing film more than the underlying material and to open the void in the tungsten- containing film; c) partially filling the recessed feature using selective CVD, wherein the selective CVD deposits more material at a bottom of the recessed feature than on sides or a field of the recessed feature; and d) filling a remainder of the feature using CVD.
[0040] Further areas of applicability will become apparent from the description provided herein. The description and specific examples in this summary are intended for purposes of illustration only and are not intended to limit the scope of the present disclosure.
BRIEF DESCRIPTION OF THE DRAWINGS
[0041] The present disclosure will become more fully understood from the detailed description and the accompanying drawings, wherein:
[0042] FIG. 1 illustrates an example of a process for chemical vapor deposition (CVD) W fill according to the prior art;
[0043] FIG. 2 illustrates another example of process for chemical vapor deposition (CVD) W fill according to the prior art;
[0044] FIG. 3 is a graph showing etch rates for W and TiN and etch rate sensitivity as a function of temperature (T) according to the present disclosure;
[0045] FIG. 4 is a graph showing etch rates for W and TiN and etch rate sensitivity as a function of 1 /T according to the present disclosure;
[0046] FIGs. 5 and 6 are graphs illustrating etch rate for Ti and TiN and selectivity for W/Ti and W/TiN as a function of temperature for a first flow rate according to the present disclosure;
[0047] FIGs. 7 and 8 are graphs illustrating etch rate for Ti and TiN and selectivity for W/Ti and W/TiN as a function of temperature for a second flow rate according to the present disclosure;
[0048] FIGs. 9A-9D illustrate an example of a fill process according to the present disclosure;
[0049] FIG. 10 is a flowchart illustrating steps of the process used in FIGs. 9A-9D according to the present disclosure;
[0050] FIGs. 1 1 A-1 1 D illustrate another example of a fill process according to the present disclosure;
[0051] FIG. 12 is a flowchart illustrating steps of the process used in FIGs. 1 1 A-1 1 D according to the present disclosure;
[0052] FIGs. 13A-13C illustrate a process for fabricating a film on a substrate according to the prior art;
[0053] FIGs. 14A-14C illustrate an example of a process for fabricating a film on a substrate according to the present disclosure; [0054] FIG. 15 is a flowchart illustrating steps of the process used in FIGs. 14A-14C;
[0055] FIGs. 16A-16D illustrate another example of a fill process according to the present disclosure;
[0056] FIG. 17 is a flowchart illustrating steps of the process used in FIGs. 16A-16D;
[0057] FIG. 18 illustrates an exemplary processing chamber; and
[0058] FIG. 19 illustrates an example of a substrate processing tool including a deposition chamber and an etch chamber. DETAILED DESCRIPTION
[0059] The following description is merely illustrative in nature and is in no way intended to limit the disclosure, its application, or uses. For purposes of clarity, the same reference numbers will be used in the drawings to identify similar elements. As used herein, the phrase at least one of A, B, and C should be construed to mean a logical (A or B or C), using a non-exclusive logical or. It should be understood that steps within a method may be executed in different order without altering the principles of the present disclosure. As used herein, deposition and etching of tungsten refers to deposition and etching of tungsten or tungsten-containing film.
[0060] The present disclosure relates to systems and methods for filling features and/or fabricating substrates such as semiconductor substrates using a process that includes selective tungsten/titanium nitride (W/TiN) etching. As used herein, the term selective W etch refers to an etch step that uses a fluorine based etchant and that has an etch ratio (W/Ti, W/TiN) that can be adjusted using temperature. More particularly, selective W etching of Ti/TiN is based on the difference in apparent activation energies for fluorine (F)-radical etch of W and TiN. At high temperatures (e.g., T >150 QC), the W/TiN etch rate ratio is < 1 . At low temperatures (e.g., T < 150 QC), the W/TiN etch rate ratio is > 1 . At temperatures T < 50 QC, the W/TiN etch rate ratio is >100:1 . Therefore, the systems and methods according to the present disclosure are capable of providing etch selectivity that ranges from <0.5:1 to >100:1 . [0061] The high etch selectivity enables new integration schemes as well as process control using Ti or TiN as an etch stop. Temperature may be controlled using a temperature controlled pedestal or any other suitable method. Additionally, pressure may be adjusted to alter etch selectivity. Systems and methods for etching according to the present disclosure are based on a fluorine radical etch step to shape tungsten-containing film deposited in re-entrant features to enable seam free fill by a subsequent chemical vapor deposition (CVD) W. In some examples, the fluorine radicals may be generated from NF3/Ar or NF3/He plasma in a remote plasma source or using other approaches. In some examples, the deposition and etching are performed in a plasma- enhanced chemical vapor deposition system, although other systems may be used. While fluorine radicals are disclosed, any other type of activated fluorine species can be used. For example only, thermally activated fluorine gas may also be used to create activated fluorine species. Ultraviolet or microwave activated fluorine may also be used.
[0062] While the foregoing examples describe deposition and etch steps in a CVD chamber, other devices may be used. For example, ALD deposition of tungsten-containing film may also be performed in an ALD chamber. Etching may be performed in a separate etch chamber.
[0063] Referring now to FIGs. 3 and 4, etch selectivity is shown to vary as a function of temperature. As can be seen, low temperatures provide higher W/TiN etch selectivity. In FIG. 3, the temperature dependency of etch rates for W and TiN and etch selectivity of W/TiN are shown. In FIG. 4, etch rate and etch rate selectivity are shown as a function of 1 /T for a given etchant flow.
[0064] Referring now to FIGs. 5-8, etch rates and etch rate selectivity for W/Ti and W/TiN are shown. In FIGs. 5 and 7, graphs illustrating etch rates for Ti and TiN are shown as a function of temperature for first and second etchant flow rates. In FIGs. 6 and 8, graphs illustrating etch rate selectivity for W/Ti and W/TiN are shown as a function of temperature for the first and second flow rates.
[0065] The ability to selectively etch W enables enhanced plug fill of reentrant features by providing the ability to over-etch the top of the features. This could also allow for improved process margin and the ability to optimize fill for a range of feature sizes since the etch thickness does not need to be controlled as precisely.
[0066] Referring now to FIGs. 9A-9D, a process for filling a recessed feature with tungsten-containing film according to the present disclosure is shown. The process includes using partial CVD fill, fluorine-based etch with selective W etch, CVD W deposition and W CMP. In FIG. 9A, a substrate 160 includes a recessed feature 164 such as a contact or via hole. A liner/barrier layer 166 such as Ti or TiN is deposited and creates an overhang 168.
[0067] A tungsten-containing film 170 is then deposited over the liner/barrier layer 166 using partial W CVD deposition. In FIG. 9B and 9C, a selective W etch back step is performed with fluorine species as described above. In some examples, the temperature of the selective W etch is less than or equal to 150 QC. In other examples, the temperature of the selective W etch is less than or equal to 100 QC. In other examples, the temperature of the selective W etch is less than or equal to 50 QC.
[0068] As can be appreciated, portions of the tungsten-containing film 170 that were previously deposited on an upper surface and near the overhang 168 are etched to the liner/barrier layer 166. Deposition of W and selective W etching steps may be repeated one or more times if desired. In FIG. 9D, CMP may be performed. As can be seen, the keyhole is substantially reduced or eliminated as compared to that shown in FIGs. 1 A-2D.
[0069] Referring now to FIG. 10, a flowchart illustrating steps of a process 200 used in FIGs. 9A-9D is shown. At 204, partial W fill of a recessed feature is performed using CVD W deposition. At 208, selective W etching of the W is performed. The selective W etch back step is performed with fluorine species as described above. In some examples, the temperature of the selective W etch is less than or equal to 150 QC. In other examples, the temperature of the selective W etch is less than or equal to 100 QC. In other examples, the temperature of the selective W etch is less than or equal to 50 QC. At 212, if the feature is not filled in one step, control may return one or more times to step 204 to perform partial deposition of W and to step 208 for selective W etching of the W at 208. At 216, the feature is filled using CVD deposition of W. At 220, CMP is performed. [0070] Referring now to FIGs. 1 1 A-1 1 D, a W fill process using one or more selective W etch and selective W deposition steps is shown. Selective W etch can enable "bottom up" W fill of a recessed feature such as a trench or via using selective W etch and selective deposition. In FIG. 1 1 A, a substrate 230 includes a recessed feature 232 such as a contact or via hole. A liner/barrier layer 234 such as Ti/TiN is deposited and creates an overhang 236. A W layer 238 is then deposited over the liner/barrier layer using conformal CVD W fill.
[0071] For example only, conformal CVD deposition of tungsten-containing film is described in U.S. Patent No. 6,635,965 entitled "Method for Producing Ultra-thin tungsten Layers with Improved Step Coverage", which issued on October 21 , 2003, U.S. Patent No. 7,141 ,494 entitled "Method for Reducing tungsten Film Roughness and Improving Step Coverage", which issued on November 28, 2006, U.S. Patent Application Publication No. 20080254623 entitled "Method for Growing Low Resistivity tungsten for High Aspect Ratio and Small Features", and U.S. Patent Application Serial No. 12,755,248 entitled "Method for Depositing Ultrathin Low Resistivity tungsten Film for Small Critical Dimension Contacts and Interconnects", which are all hereby incorporated by reference in their entirety. These references describe one or more suitable conformal CVD deposition processes, although other conformal CVD deposition systems and processes may be used.
[0072] In FIG. 1 1 B, a selective W etch step is performed. The selective W etch back step is performed with fluorine species as described above. In some examples, the temperature of the selective W etch is less than or equal to 150 QC. In other examples, the temperature of the selective W etch is less than or equal to 100 QC. In other examples, the temperature of the selective W etch is less than or equal to 50 QC. In FIG. 1 1 C, selective CVD W fill (for example only, > 50 nm) is performed. As used herein, selective CVD W fill deposits more W at a bottom of the feature than on sides or a field region of the feature.
[0073] For example only, selective CVD fill is described in Patent Publication No. 201 10059608 entitled "Systems and Methods for Selective tungsten Deposition in Vias", U.S. Patent No. 8,1 19,527 entitled "Depositing tungsten into High Aspect Ratio Features", which issued on February 21 , 2012, U.S. Patent No. 8,124,531 entitled "Depositing tungsten into High Aspect Ratio Features", which issued on February 21 , 2012, and U.S. Patent Publication No. 201201 15329 entitled "Depositing tungsten into High Aspect Ratio Features", which are all hereby incorporated by reference in their entirety. While these references describe suitable selective CVD fill processes, other selective CVD fill systems and processes may be used.
[0074] In FIG. 1 1 D, a selective W etch is performed. Selective CVD W fill and selective W etch can be repeated as needed. A CMP step may be performed.
[0075] Referring now to FIG. 12, steps of a process 250 used in FIGs. 1 1 A- 1 1 D are shown. At 254, a recessed feature is filled using conformal CVD W. At 258, a selective W etch step is performed. At 262, selective CVD fill is performed. In some examples, greater than 50 nm is deposited. At 264, selective W etch is performed. At 266, if the process is not complete, additional selective CVD W fill and selective W etch are performed. At 268, a CMP step may be performed.
[0076] Referring now to FIGs. 13A-13C, a process for fabricating a film on a substrate according to the prior art is shown. In FIG. 13A, an oxide layer 304 is deposited on a substrate or underlying layer 300. A liner/barrier layer 306 made of Ti or TiN is deposited on the oxide layer 304. A W layer 308 is deposited on the liner/barrier layer 306. In FIG. 13B, an etching step is performed, which removes part of the W layer 308 and the exposed part of the liner/barrier layer 306. A W layer 316 (or another material) is deposited. However, delamination may occur where the W layer 316 (or other material) is deposited on the underlying oxide layer 304.
[0077] Referring now to FIGs. 14A-14C, a process for fabricating a film using selective W etch and having CVD W adhesion control at an edge of the substrate is shown. A selective W etch process is used to stop on Ti or TiN at an edge of a substrate such as a wafer to prevent film peeling during subsequent W deposition. The selective W etch back step is performed with fluorine species as described above. In some examples, the temperature of the selective W etch is less than or equal to 150 QC. In other examples, the temperature of the selective W etch is less than or equal to 100 QC. In other examples, the temperature of the selective W etch is less than or equal to 50 QC. [0078] An oxide layer 354 is deposited on a substrate or underlying layer identified at 350. A Ti or TiN layer 356 is deposited on the oxide layer 354. A W layer 362 is deposited on the TiN layer 356. A selective W etching step is performed, which removes part of the W layer 362 and but stops on the exposed part of the TiN layer 356.
[0079] A W layer (or another material) identified at 366 is deposited on the W layer 362. Good adhesion occurs between the W layer (or other material) 366 and underlying TiN layer and the problem of delamination is reduced or eliminated.
[0080] Referring now to FIG. 15, steps of a process 400 used in FIGs. 14A- 14C are shown. At 404, an oxide layer is deposited on a substrate. At 408, a Ti or TiN layer is deposited on the oxide layer. At 412, a first W layer is deposited. At 416, a selective W etch is performed to etch part of the first W layer. The selective W etch back step is performed with fluorine species as described above. In some examples, the temperature of the selective W etch is less than or equal to 150 QC. In other examples, the temperature of the selective W etch is less than or equal to 100 QC. In other examples, the temperature of the selective W etch is less than or equal to 50 QC. At 420, a second W layer or another material is deposited on the first W layer and at least part of the Ti or TiN layer.
[0081] Referring now to FIGs. 16A-16D, another approach for filling a recessed feature with W is shown. In FIG. 16A, a substrate 450 defines a recessed feature 452 such as a via or contact hole having a pinch point or overhang 456. Conformal CVD W deposition is performed to fill the feature with W identified at 454. A void 458 is created in the W layer 454.
[0082] In FIG. 16B, selective W etching is used to open the void 458. The selective W etch back step is performed with fluorine species as described above. In some examples, the temperature of the selective W etch is less than or equal to 150 QC. In other examples, the temperature of the selective W etch is less than or equal to 100 QC. In other examples, the temperature of the selective W etch is less than or equal to 50 QC. [0083] In FIG. 16C, selective CVD W fill is used to fill the feature near the pinch point 456. In FIG. 16C, conformal CVD deposition is performed to fill the remainder of the feature.
[0084] In the proposed approach, the via is closed off until the end of the etch process, which keeps the W inside the via intact. At the same time, the W in the field and at the pinch point is overetched, which exposes the underlayer. A subsequent deposition step allows faster regrowth on the existing W in the via compared to slow W growth on the exposed underlayer in the pinch point and via. The selectively faster regrowth in the via allows for complete fill before the top pinches off.
[0085] Referring now to FIG. 17, a process 520 used in FIGs. 16A-16D is shown. At 524, conformal CVD deposition is performed to fill a feature of a substrate. At 526, selective W etching is used to open a void. At 530, selective CVD W fill is used to fill the feature near a pinch point. At 534, conformal CVD deposition is performed to fill the remainder of the feature. CMP may be performed.
[0086] In other features, a process gas may be added during selective W etching to inhibit Ti or TiN etching. For example, one or more of nitrogen, oxygen, hydrogen, helium, argon, or fluorine gas may be added to slow down Ti or TiN etch. For example, for oxygen and nitrogen, the following reactions occur:
TiFx + 20 -> Ti02 + x/2F2
TiFx + N TiN + X/2F2
In other features, instead of Ti or TiN, the liner/barrier layer may be made of TiCxNx or TaN. In still other features, the liner/barrier layer can be oxidized prior to W deposition to create an effective etch stop.
[0087] The present disclosure provides new processing capabilities for W metallization, which can be used for many applications such as logic and memory contact fill, DRAM buried wordline fill, vertically integrated memory gate/wordline fill, 3D integration (TSV), etc.
[0088] Referring now to FIG. 18, an example of a substrate processing system 600 for processing a partially fabricated semiconductor substrate is shown. The substrate processing system 600 includes a chamber 618 with a pedestal 620, a shower head 614, and an in-situ plasma generator 616. The apparatus 600 also includes a system controller 622 to receive input and/or supply control signals to various devices. While a single chamber is shown, the processes described herein may be implemented in one or more processing chambers.
[0089] The etchant and, in certain embodiments, inert gases, such as argon, helium and others, are supplied to a remote plasma generator 606 from a source 602, which may be a storage tank. Any suitable remote plasma generator 606 may be used for activating the etchant before introducing it into the chamber 618.
[0090] The remote plasma generator 606 is typically a self-contained device generating weakly ionized plasma using the supplied etchant. Embedded into the remote plasma generator 606, a high power RF generator provides energy to the electrons in the plasma. The energy is then transferred to the neutral etchant molecules leading to high temperature causing thermal dissociation of these molecules. The remote plasma generator 606 may dissociate a high percentage of incoming etchant molecules due to high RF energy and special channel geometry causing the etchant to adsorb most of this energy.
[0091] In certain embodiments, etchant flows from the remote plasma generator 606 through a connecting line 608 into the chamber 618, where the mixture is distributed through the shower head 614. In other embodiments, etchant flows into the chamber 618 directly completely bypassing the remote plasma generator 606 (e.g., the system 600 does not include such generator). Alternatively, the remote plasma generator 606 may be turned off while flowing the etchant into the chamber 618, for example, because activation of the etchant is not needed.
[0092] A plasma generator 616 may be used. In one example, the generator 616 is a High Frequency (HF) generator capable of providing between about 0 W and 10,000 W at frequencies between about 1 MHz and 100 MHz. In a more specific examples, the HF generator may deliver between about 0 W to 5,000 W at about 13.56 MHz. The RF generator 616 may generate in-situ plasma to enhance removal of the initial tungsten layer. In certain embodiments, the RF generator 616 is not used during the removal operations of the process. [0093] The chamber 618 may include one or more sensors 624 for sensing various process parameters, such as degree of deposition and etching, concentrations, pressure, temperature, and others. The sensors 624 may provide information on chamber conditions during the process to the system controller 622. Examples of the sensors2 624 include mass flow controllers, pressure sensors, thermocouples, and others. The sensor 624 may also include an infra-red detector or optical detector to monitor presence of gases in the chamber and control measures.
[0094] Deposition and selective removal operations generate various volatile species that are evacuated from the chamber 618. Moreover, processing is performed at certain predetermined pressure levels the chamber 618. Both of these functions are achieved using a vacuum outlet 626, which may be a vacuum pump.
[0095] The system controller 622 executes system control software including sets of instructions for controlling the timing, mixture of gases, chamber pressure, chamber temperature, and other parameters of a particular process. Other computer programs stored on memory devices associated with the controller may be employed in some embodiments.
[0096] The computer program code for controlling the processes in a process sequence can be written in any conventional computer readable programming language: for example, assembly language, C, C++, Pascal, Fortran or others. Compiled object code or script is executed by the processor to perform the tasks identified in the program. The system software may be designed or configured in many different ways. For example, various chamber component subroutines or control objects may be written to control operation of the chamber components necessary to carry out the described processes. Examples of programs or sections of programs for this purpose include process gas control code, pressure control code, and plasma control code.
[0097] The controller parameters relate to process conditions such as, for example, timing of each operation, pressure inside the chamber, substrate temperature, etchant flow rates, etc. These parameters are provided to the user in the form of a recipe, and may be entered utilizing the user interface. Signals for monitoring the process may be provided by analog and/or digital input connections of the system controller 622. The signals for controlling the process are output on the analog and digital output connections of the apparatus 600.
[0098] Referring now to FIG. 19, an example of a substrate processing tool 700 including a deposition chamber 702 and an etch chamber 704 is shown. Deposition of the tungsten-containing film may be performed in the deposition chamber 702. A controller 708 may be used to control operation of the deposition chamber 702 and/or the etch chamber 704. The controller 708 may initiate transfer of a substrate to/from the etch chamber 704 and/or the deposition chamber 702 using a substrate handler 712. While the deposition chamber 702 and the etch chamber 704 are shown as part of the same tool 700, the deposition chamber 702 and the etch chamber 704 may be associated with different tools.
[0099] The broad teachings of the disclosure can be implemented in a variety of forms. Therefore, while this disclosure includes particular examples, the true scope of the disclosure should not be so limited since other modifications will become apparent to the skilled practitioner upon a study of the drawings, the specification, and the following claims.

Claims

IN THE CLAIMS What is claimed is:
1 . A method for filling a recessed feature of a substrate, comprising:
a) at least partially filling a recessed feature of a substrate with tungsten-containing film using at least one of chemical vapor deposition (CVD) and atomic layer deposition (ALD);
b) at a predetermined temperature, using an etchant including activated fluorine species to selectively etch the tungsten-containing film more than an underlying material of the recessed feature without removing all of the tungsten-containing film at a bottom of the recessed feature; and
c) filling the recessed feature using at least one of CVD and ALD.
2. The method of claim 1 , wherein (a) includes filling the recessed feature with the tungsten-containing film such that an opening of the recessed feature is pinched off.
3. The method of claim 1 , wherein (a) includes filling the recessed feature with the tungsten-containing film such that an opening of the recessed feature is closed and overburden is deposited on a field of the substrate.
4. The method of claim 1 , wherein (b) is performed in one of a CVD chamber and an etch chamber.
5. The method of claim 1 , wherein the underlying material includes a liner/barrier layer.
6. The method of claim 2, wherein the liner/barrier layer includes one of titanium and tantalum.
7. The method of claim 1 , wherein the liner/barrier layer includes one of titanium, titanium nitride, tantalum nitride, and TiCxNx.
8. The method of claim 1 , further comprising repeating (a) and (b) one or more times before (c).
9. The method of claim 1 , further comprising performing chemical mechanical planarization (CMP) of the substrate after (c).
10. The method of claim 1 , wherein the predetermined temperature is less than or equal to 150 QC.
1 1 . The method of claim 1 , wherein the predetermined temperature is less than or equal to 100 QC.
12. The method of claim 1 , wherein the predetermined temperature is less than or equal to 50 QC.
13. The method of claim 5, wherein the liner/barrier layer includes an overhang that creates a pinch point at an opening of the recessed feature.
14. The method of claim 1 , further comprising adding one or more of nitrogen, oxygen, hydrogen, helium, argon, or fluorine to slow etching of the liner/barrier layer.
15. The method of claim 5, further comprising oxidizing the liner/barrier layer prior to (a).
16. An apparatus for depositing a film on a substrate, comprising:
one or more chambers;
a source that provides activated fluorine species; and
a controller that initiates in the one or more chambers:
a) partially filling a recessed feature of a substrate with tungsten-containing film using at least one of chemical vapor deposition (CVD) and atomic layer deposition (ALD); b) at a predetermined temperature, using an etchant including the activated fluorine species to selectively etch the tungsten-containing film more than an underlying material of the recessed feature without removing all of the tungsten-containing film at a bottom of the recessed feature; and
c) filling the feature using at least one of CVD and ALD.
17. The apparatus of claim 16, wherein (a) includes filling the recessed feature with the tungsten-containing film such that an opening of the recessed feature is pinched off.
18. The apparatus of claim 16, wherein (a) includes filling the recessed feature with the tungsten-containing film such that an opening of the recessed feature is closed and overburden is deposited on a field of the substrate.
19. The apparatus of claim 16, wherein (b) is performed in one of a CVD chamber and an etch chamber.
20. The apparatus of claim 16, wherein the underlying material includes a liner/barrier layer.
21 . The apparatus of claim 20, wherein the liner/barrier layer includes one of titanium and tantalum.
22. The apparatus of claim 20, wherein the liner/barrier layer includes one of titanium, titanium nitride, tantalum nitride, and TiCxNx.
23. The apparatus of claim 26, further comprising repeating (a) and (b) one or more times before (c).
24. The apparatus of claim 16, wherein chemical mechanical planarization (CMP) of the substrate is performed after (c).
25. The apparatus of claim 16, wherein the predetermined temperature is less than or equal to 150 QC.
26. The apparatus of claim 16, wherein the predetermined temperature is less than or equal to 100 QC.
27. The apparatus of claim 16, wherein the predetermined temperature is less than or equal to 50 QC.
28. The apparatus of claim 16, wherein the liner/barrier layer includes an overhang that creates a pinch point at an opening of the recessed feature.
29. The apparatus of claim 16, wherein the controller initiates adding one or more of nitrogen, oxygen, hydrogen, helium, argon, or fluorine to slow etching of the liner/barrier layer.
30. The apparatus of claim 16, wherein the controller initiates oxidizing the liner/barrier layer prior to (a).
31 . A method for creating a film on a substrate, comprising:
a) depositing a tungsten-containing layer using at least one of chemical vapor deposition (CVD) and atomic layer deposition (ALD) on an underlying layer, wherein the underlying material is arranged on an oxide layer of a substrate;
b) at a predetermined temperature, using activated fluorine species to selectively etch the tungsten-containing layer more than the underlying layer; and
c) depositing a layer over the tungsten-containing layer using at least one of CVD or ALD.
32. The method of claim 31 , wherein the underlying layer includes a liner/barrier layer.
33. The method of claim 32, wherein the liner/barrier layer includes one of titanium and tantalum.
34. The method of claim 32, wherein the liner/barrier layer includes one of titanium, titanium nitride, tantalum nitride, and TiCxNx.
35. The method of claim 31 , wherein the predetermined temperature is less than or equal to 150 QC.
36. The method of claim 31 , wherein the predetermined temperature is less than or equal to 100 QC.
37. The method of claim 31 , wherein the predetermined temperature is less than or equal to 50 QC.
38. The method of claim 31 , further comprising adding one or more of nitrogen, oxygen, hydrogen, helium, argon, or fluorine gas to slow etching of the liner/barrier layer.
39. The method of claim 31 , further comprising oxidizing the underlying layer prior to (a).
40. The method of claim 31 , wherein the layer comprises tungsten.
41 . An apparatus for depositing a film on a substrate, comprising:
one or more chambers;
a source that provides activated fluorine species; and
a controller that initiates in the one or more chambers:
a) depositing a tungsten-containing layer using at least one of chemical vapor deposition (CVD) or atomic layer deposition (ALD) on an underlying layer, wherein the underlying layer is arranged on an oxide layer of a substrate; b) at a predetermined temperature, using activated fluorine species to selectively etch the tungsten-containing layer more than the underlying material; and
c) depositing a layer over the tungsten-containing layer.
42. The apparatus of claim 41 , wherein the underlying material includes a liner/barrier layer.
43. The apparatus of claim 42, wherein the liner/barrier layer includes one of titanium and tantalum.
44. The apparatus of claim 42, wherein the liner/barrier layer includes one of titanium, titanium nitride, tantalum nitride, and TiCxNx.
45. The apparatus of claim 41 , wherein the predetermined temperature is less than or equal to 150 QC.
46. The apparatus of claim 41 , wherein the predetermined temperature is less than or equal to 100 QC.
47. The apparatus of claim 41 , wherein the predetermined temperature is less than or equal to 50 QC.
48. The apparatus of claim 41 , wherein the controller initiates adding one or more of nitrogen, oxygen, hydrogen, helium, argon, or fluorine to slow etching of the liner/barrier layer.
49. The apparatus of claim 41 , wherein the controller initiates oxidizing the underlying layer prior to (a).
50. The apparatus of claim 41 , wherein the layer comprises tungsten.
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Families Citing this family (171)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8129270B1 (en) 2008-12-10 2012-03-06 Novellus Systems, Inc. Method for depositing tungsten film having low resistivity, low roughness and high reflectivity
US20100144140A1 (en) * 2008-12-10 2010-06-10 Novellus Systems, Inc. Methods for depositing tungsten films having low resistivity for gapfill applications
US9653353B2 (en) 2009-08-04 2017-05-16 Novellus Systems, Inc. Tungsten feature fill
US12444651B2 (en) 2009-08-04 2025-10-14 Novellus Systems, Inc. Tungsten feature fill with nucleation inhibition
US10256142B2 (en) 2009-08-04 2019-04-09 Novellus Systems, Inc. Tungsten feature fill with nucleation inhibition
US9548228B2 (en) 2009-08-04 2017-01-17 Lam Research Corporation Void free tungsten fill in different sized features
US9324576B2 (en) 2010-05-27 2016-04-26 Applied Materials, Inc. Selective etch for silicon films
US10283321B2 (en) 2011-01-18 2019-05-07 Applied Materials, Inc. Semiconductor processing system and methods using capacitively coupled plasma
US8999856B2 (en) 2011-03-14 2015-04-07 Applied Materials, Inc. Methods for etch of sin films
US9064815B2 (en) 2011-03-14 2015-06-23 Applied Materials, Inc. Methods for etch of metal and metal-oxide films
US8771536B2 (en) 2011-08-01 2014-07-08 Applied Materials, Inc. Dry-etch for silicon-and-carbon-containing films
US8808563B2 (en) 2011-10-07 2014-08-19 Applied Materials, Inc. Selective etch of silicon by way of metastable hydrogen termination
US9267739B2 (en) 2012-07-18 2016-02-23 Applied Materials, Inc. Pedestal with multi-zone temperature control and multiple purge capabilities
US9373517B2 (en) 2012-08-02 2016-06-21 Applied Materials, Inc. Semiconductor processing with DC assisted RF power for improved control
US9034770B2 (en) 2012-09-17 2015-05-19 Applied Materials, Inc. Differential silicon oxide etch
US9023734B2 (en) 2012-09-18 2015-05-05 Applied Materials, Inc. Radical-component oxide etch
US9390937B2 (en) 2012-09-20 2016-07-12 Applied Materials, Inc. Silicon-carbon-nitride selective etch
US9132436B2 (en) 2012-09-21 2015-09-15 Applied Materials, Inc. Chemical control features in wafer process equipment
US8969212B2 (en) 2012-11-20 2015-03-03 Applied Materials, Inc. Dry-etch selectivity
US8980763B2 (en) 2012-11-30 2015-03-17 Applied Materials, Inc. Dry-etch for selective tungsten removal
US9064816B2 (en) * 2012-11-30 2015-06-23 Applied Materials, Inc. Dry-etch for selective oxidation removal
US9111877B2 (en) 2012-12-18 2015-08-18 Applied Materials, Inc. Non-local plasma oxide etch
US8921234B2 (en) 2012-12-21 2014-12-30 Applied Materials, Inc. Selective titanium nitride etching
US10256079B2 (en) 2013-02-08 2019-04-09 Applied Materials, Inc. Semiconductor processing systems having multiple plasma configurations
US9362130B2 (en) 2013-03-01 2016-06-07 Applied Materials, Inc. Enhanced etching processes using remote plasma sources
US9040422B2 (en) 2013-03-05 2015-05-26 Applied Materials, Inc. Selective titanium nitride removal
US10170282B2 (en) 2013-03-08 2019-01-01 Applied Materials, Inc. Insulated semiconductor faceplate designs
US9887095B2 (en) 2013-03-12 2018-02-06 Taiwan Semiconductor Manufacturing Company, Ltd. System and method for an etch process with silicon concentration control
US20140271097A1 (en) 2013-03-15 2014-09-18 Applied Materials, Inc. Processing systems and methods for halide scavenging
US9493879B2 (en) 2013-07-12 2016-11-15 Applied Materials, Inc. Selective sputtering for pattern transfer
US9773648B2 (en) 2013-08-30 2017-09-26 Applied Materials, Inc. Dual discharge modes operation for remote plasma
US8956980B1 (en) 2013-09-16 2015-02-17 Applied Materials, Inc. Selective etch of silicon nitride
US9236265B2 (en) 2013-11-04 2016-01-12 Applied Materials, Inc. Silicon germanium processing
US9576809B2 (en) 2013-11-04 2017-02-21 Applied Materials, Inc. Etch suppression with germanium
US9520303B2 (en) 2013-11-12 2016-12-13 Applied Materials, Inc. Aluminum selective etch
US9245762B2 (en) 2013-12-02 2016-01-26 Applied Materials, Inc. Procedure for etch rate consistency
US9117855B2 (en) 2013-12-04 2015-08-25 Applied Materials, Inc. Polarity control for remote plasma
US9263278B2 (en) 2013-12-17 2016-02-16 Applied Materials, Inc. Dopant etch selectivity control
TWI654333B (en) 2013-12-18 2019-03-21 美商蘭姆研究公司 Semiconductor substrate processing apparatus including uniformity baffles
US9190293B2 (en) 2013-12-18 2015-11-17 Applied Materials, Inc. Even tungsten etch for high aspect ratio trenches
US9704798B2 (en) * 2013-12-20 2017-07-11 Intel Corporation Using materials with different etch rates to fill trenches in semiconductor devices
US9287134B2 (en) 2014-01-17 2016-03-15 Applied Materials, Inc. Titanium oxide etch
US9396989B2 (en) 2014-01-27 2016-07-19 Applied Materials, Inc. Air gaps between copper lines
US9293568B2 (en) 2014-01-27 2016-03-22 Applied Materials, Inc. Method of fin patterning
US9385028B2 (en) 2014-02-03 2016-07-05 Applied Materials, Inc. Air gap process
US9290843B2 (en) 2014-02-11 2016-03-22 Lam Research Corporation Ball screw showerhead module adjuster assembly for showerhead module of semiconductor substrate processing apparatus
US9425078B2 (en) * 2014-02-26 2016-08-23 Lam Research Corporation Inhibitor plasma mediated atomic layer deposition for seamless feature fill
US9499898B2 (en) 2014-03-03 2016-11-22 Applied Materials, Inc. Layered thin film heater and method of fabrication
US9299575B2 (en) 2014-03-17 2016-03-29 Applied Materials, Inc. Gas-phase tungsten etch
US9299538B2 (en) 2014-03-20 2016-03-29 Applied Materials, Inc. Radial waveguide systems and methods for post-match control of microwaves
US9299537B2 (en) 2014-03-20 2016-03-29 Applied Materials, Inc. Radial waveguide systems and methods for post-match control of microwaves
US9136273B1 (en) 2014-03-21 2015-09-15 Applied Materials, Inc. Flash gate air gap
US9903020B2 (en) 2014-03-31 2018-02-27 Applied Materials, Inc. Generation of compact alumina passivation layers on aluminum plasma equipment components
US9269590B2 (en) 2014-04-07 2016-02-23 Applied Materials, Inc. Spacer formation
US9653352B2 (en) * 2014-04-11 2017-05-16 Applied Materials, Inc. Methods for forming metal organic tungsten for middle of the line (MOL) applications
US9309598B2 (en) 2014-05-28 2016-04-12 Applied Materials, Inc. Oxide and metal removal
US9847289B2 (en) 2014-05-30 2017-12-19 Applied Materials, Inc. Protective via cap for improved interconnect performance
US9406523B2 (en) 2014-06-19 2016-08-02 Applied Materials, Inc. Highly selective doped oxide removal method
US9378969B2 (en) 2014-06-19 2016-06-28 Applied Materials, Inc. Low temperature gas-phase carbon removal
US9425058B2 (en) 2014-07-24 2016-08-23 Applied Materials, Inc. Simplified litho-etch-litho-etch process
US9496167B2 (en) 2014-07-31 2016-11-15 Applied Materials, Inc. Integrated bit-line airgap formation and gate stack post clean
US9159606B1 (en) 2014-07-31 2015-10-13 Applied Materials, Inc. Metal air gap
US9378978B2 (en) 2014-07-31 2016-06-28 Applied Materials, Inc. Integrated oxide recess and floating gate fin trimming
US9165786B1 (en) 2014-08-05 2015-10-20 Applied Materials, Inc. Integrated oxide and nitride recess for better channel contact in 3D architectures
US9659753B2 (en) 2014-08-07 2017-05-23 Applied Materials, Inc. Grooved insulator to reduce leakage current
US9553102B2 (en) 2014-08-19 2017-01-24 Applied Materials, Inc. Tungsten separation
US9355856B2 (en) 2014-09-12 2016-05-31 Applied Materials, Inc. V trench dry etch
US9478434B2 (en) 2014-09-24 2016-10-25 Applied Materials, Inc. Chlorine-based hardmask removal
US9368364B2 (en) 2014-09-24 2016-06-14 Applied Materials, Inc. Silicon etch process with tunable selectivity to SiO2 and other materials
US9613822B2 (en) 2014-09-25 2017-04-04 Applied Materials, Inc. Oxide etch selectivity enhancement
US9966240B2 (en) 2014-10-14 2018-05-08 Applied Materials, Inc. Systems and methods for internal surface conditioning assessment in plasma processing equipment
US9355922B2 (en) 2014-10-14 2016-05-31 Applied Materials, Inc. Systems and methods for internal surface conditioning in plasma processing equipment
US11637002B2 (en) 2014-11-26 2023-04-25 Applied Materials, Inc. Methods and systems to enhance process uniformity
US9299583B1 (en) 2014-12-05 2016-03-29 Applied Materials, Inc. Aluminum oxide selective etch
US10573496B2 (en) 2014-12-09 2020-02-25 Applied Materials, Inc. Direct outlet toroidal plasma source
US10224210B2 (en) 2014-12-09 2019-03-05 Applied Materials, Inc. Plasma processing system with direct outlet toroidal plasma source
US9502258B2 (en) 2014-12-23 2016-11-22 Applied Materials, Inc. Anisotropic gap etch
US9343272B1 (en) 2015-01-08 2016-05-17 Applied Materials, Inc. Self-aligned process
US11257693B2 (en) 2015-01-09 2022-02-22 Applied Materials, Inc. Methods and systems to improve pedestal temperature control
US9373522B1 (en) 2015-01-22 2016-06-21 Applied Mateials, Inc. Titanium nitride removal
US9449846B2 (en) 2015-01-28 2016-09-20 Applied Materials, Inc. Vertical gate separation
US9728437B2 (en) 2015-02-03 2017-08-08 Applied Materials, Inc. High temperature chuck for plasma processing systems
US20160225652A1 (en) 2015-02-03 2016-08-04 Applied Materials, Inc. Low temperature chuck for plasma processing systems
US9881805B2 (en) 2015-03-02 2018-01-30 Applied Materials, Inc. Silicon selective removal
US9595466B2 (en) 2015-03-20 2017-03-14 Applied Materials, Inc. Methods for etching via atomic layer deposition (ALD) cycles
US9741593B2 (en) 2015-08-06 2017-08-22 Applied Materials, Inc. Thermal management systems and methods for wafer processing systems
US9691645B2 (en) 2015-08-06 2017-06-27 Applied Materials, Inc. Bolted wafer chuck thermal management systems and methods for wafer processing systems
US9349605B1 (en) 2015-08-07 2016-05-24 Applied Materials, Inc. Oxide etch selectivity systems and methods
US9972504B2 (en) 2015-08-07 2018-05-15 Lam Research Corporation Atomic layer etching of tungsten for enhanced tungsten deposition fill
US9978610B2 (en) 2015-08-21 2018-05-22 Lam Research Corporation Pulsing RF power in etch process to enhance tungsten gapfill performance
US10504700B2 (en) 2015-08-27 2019-12-10 Applied Materials, Inc. Plasma etching systems and methods with secondary plasma injection
US10533251B2 (en) 2015-12-31 2020-01-14 Lam Research Corporation Actuator to dynamically adjust showerhead tilt in a semiconductor processing apparatus
US10504754B2 (en) 2016-05-19 2019-12-10 Applied Materials, Inc. Systems and methods for improved semiconductor etching and component protection
US10522371B2 (en) 2016-05-19 2019-12-31 Applied Materials, Inc. Systems and methods for improved semiconductor etching and component protection
US10373820B2 (en) 2016-06-01 2019-08-06 Asm Ip Holding B.V. Deposition of organic films
US10453701B2 (en) 2016-06-01 2019-10-22 Asm Ip Holding B.V. Deposition of organic films
US9865484B1 (en) 2016-06-29 2018-01-09 Applied Materials, Inc. Selective etch using material modification and RF pulsing
US10566211B2 (en) 2016-08-30 2020-02-18 Lam Research Corporation Continuous and pulsed RF plasma for etching metals
US10062575B2 (en) 2016-09-09 2018-08-28 Applied Materials, Inc. Poly directional etch by oxidation
US10629473B2 (en) 2016-09-09 2020-04-21 Applied Materials, Inc. Footing removal for nitride spacer
US10062585B2 (en) 2016-10-04 2018-08-28 Applied Materials, Inc. Oxygen compatible plasma source
US9934942B1 (en) 2016-10-04 2018-04-03 Applied Materials, Inc. Chamber with flow-through source
US10546729B2 (en) 2016-10-04 2020-01-28 Applied Materials, Inc. Dual-channel showerhead with improved profile
US9721789B1 (en) 2016-10-04 2017-08-01 Applied Materials, Inc. Saving ion-damaged spacers
US10062579B2 (en) 2016-10-07 2018-08-28 Applied Materials, Inc. Selective SiN lateral recess
US9947549B1 (en) 2016-10-10 2018-04-17 Applied Materials, Inc. Cobalt-containing material removal
US10163696B2 (en) 2016-11-11 2018-12-25 Applied Materials, Inc. Selective cobalt removal for bottom up gapfill
US9768034B1 (en) 2016-11-11 2017-09-19 Applied Materials, Inc. Removal methods for high aspect ratio structures
US10242908B2 (en) 2016-11-14 2019-03-26 Applied Materials, Inc. Airgap formation with damage-free copper
US10026621B2 (en) 2016-11-14 2018-07-17 Applied Materials, Inc. SiN spacer profile patterning
US11430656B2 (en) * 2016-11-29 2022-08-30 Asm Ip Holding B.V. Deposition of oxide thin films
US10566206B2 (en) 2016-12-27 2020-02-18 Applied Materials, Inc. Systems and methods for anisotropic material breakthrough
US10403507B2 (en) 2017-02-03 2019-09-03 Applied Materials, Inc. Shaped etch profile with oxidation
US10431429B2 (en) 2017-02-03 2019-10-01 Applied Materials, Inc. Systems and methods for radial and azimuthal control of plasma uniformity
US10043684B1 (en) 2017-02-06 2018-08-07 Applied Materials, Inc. Self-limiting atomic thermal etching systems and methods
US10319739B2 (en) 2017-02-08 2019-06-11 Applied Materials, Inc. Accommodating imperfectly aligned memory holes
US10943834B2 (en) 2017-03-13 2021-03-09 Applied Materials, Inc. Replacement contact process
US10319649B2 (en) 2017-04-11 2019-06-11 Applied Materials, Inc. Optical emission spectroscopy (OES) for remote plasma monitoring
JP7176860B6 (en) 2017-05-17 2022-12-16 アプライド マテリアルズ インコーポレイテッド Semiconductor processing chamber to improve precursor flow
US11276559B2 (en) 2017-05-17 2022-03-15 Applied Materials, Inc. Semiconductor processing chamber for multiple precursor flow
US11276590B2 (en) 2017-05-17 2022-03-15 Applied Materials, Inc. Multi-zone semiconductor substrate supports
US10497579B2 (en) 2017-05-31 2019-12-03 Applied Materials, Inc. Water-free etching methods
US10049891B1 (en) 2017-05-31 2018-08-14 Applied Materials, Inc. Selective in situ cobalt residue removal
US10920320B2 (en) 2017-06-16 2021-02-16 Applied Materials, Inc. Plasma health determination in semiconductor substrate processing reactors
US10541246B2 (en) 2017-06-26 2020-01-21 Applied Materials, Inc. 3D flash memory cells which discourage cross-cell electrical tunneling
US10727080B2 (en) 2017-07-07 2020-07-28 Applied Materials, Inc. Tantalum-containing material removal
US10541184B2 (en) 2017-07-11 2020-01-21 Applied Materials, Inc. Optical emission spectroscopic techniques for monitoring etching
US10354889B2 (en) 2017-07-17 2019-07-16 Applied Materials, Inc. Non-halogen etching of silicon-containing materials
US10190216B1 (en) 2017-07-25 2019-01-29 Lam Research Corporation Showerhead tilt mechanism
US10043674B1 (en) 2017-08-04 2018-08-07 Applied Materials, Inc. Germanium etching systems and methods
US10170336B1 (en) 2017-08-04 2019-01-01 Applied Materials, Inc. Methods for anisotropic control of selective silicon removal
US10297458B2 (en) 2017-08-07 2019-05-21 Applied Materials, Inc. Process window widening using coated parts in plasma etch processes
JP6979463B2 (en) * 2017-09-25 2021-12-15 株式会社Kokusai Electric Semiconductor device manufacturing methods, substrate processing devices and programs
US10283324B1 (en) 2017-10-24 2019-05-07 Applied Materials, Inc. Oxygen treatment for nitride etching
US10128086B1 (en) 2017-10-24 2018-11-13 Applied Materials, Inc. Silicon pretreatment for nitride removal
JP7018748B2 (en) * 2017-11-28 2022-02-14 東京エレクトロン株式会社 Film formation method and calculation method of film formation conditions
US10256112B1 (en) 2017-12-08 2019-04-09 Applied Materials, Inc. Selective tungsten removal
US10903054B2 (en) 2017-12-19 2021-01-26 Applied Materials, Inc. Multi-zone gas distribution systems and methods
US11328909B2 (en) 2017-12-22 2022-05-10 Applied Materials, Inc. Chamber conditioning and removal processes
US10854426B2 (en) 2018-01-08 2020-12-01 Applied Materials, Inc. Metal recess for semiconductor structures
US10685905B2 (en) 2018-01-24 2020-06-16 Toyota Motor Engineering & Manufacturing North America, Inc. Multi-layer cooling structure including through-silicon vias through a plurality of directly-bonded substrates and methods of making the same
US10157817B1 (en) 2018-01-26 2018-12-18 Toyota Motor Engineering & Manufacturing North America, Inc. Chip-scale cooling device having through-silicon vias and flow directing features
US10964512B2 (en) 2018-02-15 2021-03-30 Applied Materials, Inc. Semiconductor processing chamber multistage mixing apparatus and methods
US10679870B2 (en) 2018-02-15 2020-06-09 Applied Materials, Inc. Semiconductor processing chamber multistage mixing apparatus
TWI766433B (en) 2018-02-28 2022-06-01 美商應用材料股份有限公司 Systems and methods to form airgaps
US10593560B2 (en) 2018-03-01 2020-03-17 Applied Materials, Inc. Magnetic induction plasma source for semiconductor processes and equipment
US10319600B1 (en) 2018-03-12 2019-06-11 Applied Materials, Inc. Thermal silicon etch
US10497573B2 (en) 2018-03-13 2019-12-03 Applied Materials, Inc. Selective atomic layer etching of semiconductor materials
US10573527B2 (en) 2018-04-06 2020-02-25 Applied Materials, Inc. Gas-phase selective etching systems and methods
US10490406B2 (en) 2018-04-10 2019-11-26 Appled Materials, Inc. Systems and methods for material breakthrough
US10699879B2 (en) 2018-04-17 2020-06-30 Applied Materials, Inc. Two piece electrode assembly with gap for plasma control
US10886137B2 (en) 2018-04-30 2021-01-05 Applied Materials, Inc. Selective nitride removal
US11078570B2 (en) * 2018-06-29 2021-08-03 Lam Research Corporation Azimuthal critical dimension non-uniformity for double patterning process
US10755941B2 (en) 2018-07-06 2020-08-25 Applied Materials, Inc. Self-limiting selective etching systems and methods
US10872778B2 (en) 2018-07-06 2020-12-22 Applied Materials, Inc. Systems and methods utilizing solid-phase etchants
US10672642B2 (en) 2018-07-24 2020-06-02 Applied Materials, Inc. Systems and methods for pedestal configuration
US10892198B2 (en) 2018-09-14 2021-01-12 Applied Materials, Inc. Systems and methods for improved performance in semiconductor processing
US11049755B2 (en) 2018-09-14 2021-06-29 Applied Materials, Inc. Semiconductor substrate supports with embedded RF shield
US11062887B2 (en) 2018-09-17 2021-07-13 Applied Materials, Inc. High temperature RF heater pedestals
US11417534B2 (en) 2018-09-21 2022-08-16 Applied Materials, Inc. Selective material removal
US11682560B2 (en) 2018-10-11 2023-06-20 Applied Materials, Inc. Systems and methods for hafnium-containing film removal
US11121002B2 (en) 2018-10-24 2021-09-14 Applied Materials, Inc. Systems and methods for etching metals and metal derivatives
US11437242B2 (en) 2018-11-27 2022-09-06 Applied Materials, Inc. Selective removal of silicon-containing materials
US11721527B2 (en) 2019-01-07 2023-08-08 Applied Materials, Inc. Processing chamber mixing systems
US10920319B2 (en) 2019-01-11 2021-02-16 Applied Materials, Inc. Ceramic showerheads with conductive electrodes
JP7257930B2 (en) * 2019-10-08 2023-04-14 東京エレクトロン株式会社 Substrate processing method and substrate processing apparatus
JP2021080536A (en) * 2019-11-21 2021-05-27 東京エレクトロン株式会社 Substrate processing method and substrate processing apparatus
CN115461846B (en) 2020-03-31 2023-07-25 玛特森技术公司 Processing of workpieces using fluorocarbon plasma
US12593667B2 (en) * 2022-06-10 2026-03-31 Nanya Technology Corporation Method of fabricating void-free conductive feature of semiconductor device
US20230413533A1 (en) * 2022-06-10 2023-12-21 Nanya Technology Corporation Method of fabricating semiconductor device with void-free conductive feature
WO2026003905A1 (en) * 2024-06-24 2026-01-02 株式会社日立ハイテク Plasma treatment method

Family Cites Families (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE69213928T2 (en) * 1992-05-27 1997-03-13 Sgs Thomson Microelectronics Wiring on tungsten seals
US5514622A (en) * 1994-08-29 1996-05-07 Cypress Semiconductor Corporation Method for the formation of interconnects and landing pads having a thin, conductive film underlying the plug or an associated contact of via hole
US5994220A (en) * 1996-02-02 1999-11-30 Micron Technology, Inc. Method for forming a semiconductor connection with a top surface having an enlarged recess
US5654234A (en) * 1996-04-29 1997-08-05 Taiwan Semiconductor Manufacturing Company, Ltd. Method for forming a void-free tungsten-plug contact in the presence of a contact opening overhang
US5641710A (en) * 1996-06-10 1997-06-24 Taiwan Semiconductor Manufacturing Company, Ltd. Post tungsten etch back anneal, to improve aluminum step coverage
KR100458295B1 (en) 1997-12-30 2005-04-06 주식회사 하이닉스반도체 Contact plug formation method of semiconductor device
TW412792B (en) * 1999-02-10 2000-11-21 Applied Materials Inc Etching back process for solving the plug loss
JP2000306997A (en) * 1999-04-20 2000-11-02 Nec Corp Semiconductor device having barrier metal layer and method of manufacturing the same
US6635965B1 (en) 2001-05-22 2003-10-21 Novellus Systems, Inc. Method for producing ultra-thin tungsten layers with improved step coverage
US7955972B2 (en) 2001-05-22 2011-06-07 Novellus Systems, Inc. Methods for growing low-resistivity tungsten for high aspect ratio and small features
US7141494B2 (en) 2001-05-22 2006-11-28 Novellus Systems, Inc. Method for reducing tungsten film roughness and improving step coverage
JP2003142484A (en) * 2001-10-31 2003-05-16 Mitsubishi Electric Corp Method for manufacturing semiconductor device
KR100528073B1 (en) 2003-04-07 2005-11-15 동부아남반도체 주식회사 Fabricating method of semiconductor device
US20070049017A1 (en) * 2005-08-29 2007-03-01 Chao-Ching Hsieh Plug fabricating method for dielectric layer
US20070298607A1 (en) 2006-06-23 2007-12-27 Andryushchenko Tatyana N Method for copper damascence fill for forming an interconnect
KR100745954B1 (en) * 2006-07-05 2007-08-02 주식회사 하이닉스반도체 Manufacturing Method of Flash Memory Device
US20100144140A1 (en) * 2008-12-10 2010-06-10 Novellus Systems, Inc. Methods for depositing tungsten films having low resistivity for gapfill applications
US20100267230A1 (en) 2009-04-16 2010-10-21 Anand Chandrashekar Method for forming tungsten contacts and interconnects with small critical dimensions
US8124531B2 (en) * 2009-08-04 2012-02-28 Novellus Systems, Inc. Depositing tungsten into high aspect ratio features
US8119527B1 (en) 2009-08-04 2012-02-21 Novellus Systems, Inc. Depositing tungsten into high aspect ratio features
US8207062B2 (en) 2009-09-09 2012-06-26 Novellus Systems, Inc. Method for improving adhesion of low resistivity tungsten/tungsten nitride layers
US8193081B2 (en) * 2009-10-20 2012-06-05 Taiwan Semiconductor Manufacturing Company, Ltd. Method and system for metal gate formation with wider metal gate fill margin

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