WO2013001837A1 - Receiving device and buffer control method - Google Patents

Receiving device and buffer control method Download PDF

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Publication number
WO2013001837A1
WO2013001837A1 PCT/JP2012/004247 JP2012004247W WO2013001837A1 WO 2013001837 A1 WO2013001837 A1 WO 2013001837A1 JP 2012004247 W JP2012004247 W JP 2012004247W WO 2013001837 A1 WO2013001837 A1 WO 2013001837A1
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WIPO (PCT)
Prior art keywords
buffer
control unit
data
soft decision
decision data
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PCT/JP2012/004247
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French (fr)
Japanese (ja)
Inventor
大輔 富嶋
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パナソニックモバイルコミュニケーションズ株式会社
株式会社エヌ・ティ・ティ・ドコモ
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Publication of WO2013001837A1 publication Critical patent/WO2013001837A1/en

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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0045Arrangements at the receiver end
    • H04L1/0054Maximum-likelihood or sequential decoding, e.g. Viterbi, Fano, ZJ algorithms
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/12Arrangements for detecting or preventing errors in the information received by using return channel
    • H04L1/16Arrangements for detecting or preventing errors in the information received by using return channel in which the return channel carries supervisory signals, e.g. repetition request signals
    • H04L1/18Automatic repetition systems, e.g. Van Duuren systems
    • H04L1/1812Hybrid protocols; Hybrid automatic repeat request [HARQ]
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/12Arrangements for detecting or preventing errors in the information received by using return channel
    • H04L1/16Arrangements for detecting or preventing errors in the information received by using return channel in which the return channel carries supervisory signals, e.g. repetition request signals
    • H04L1/18Automatic repetition systems, e.g. Van Duuren systems
    • H04L1/1825Adaptation of specific ARQ protocol parameters according to transmission conditions
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/12Arrangements for detecting or preventing errors in the information received by using return channel
    • H04L1/16Arrangements for detecting or preventing errors in the information received by using return channel in which the return channel carries supervisory signals, e.g. repetition request signals
    • H04L1/18Automatic repetition systems, e.g. Van Duuren systems
    • H04L1/1829Arrangements specially adapted for the receiver end
    • H04L1/1835Buffer management

Definitions

  • the present invention relates to a receiving apparatus, for example, a HARQ (Hybrid Automatic Repeat Repeat) process applied to a downlink physical layer communication process of HSPA + (High Speed Speed Packet Access Plus) and LTE (Long Term Evolution).
  • HARQ Hybrid Automatic Repeat Repeat
  • the present invention relates to buffer control technology.
  • HS-DSCH High-Speed Downlink Shared Channel
  • PDSCH Physical Downlink Shared Channel
  • PDSCH transmission in LTE etc.
  • FEC Forward Error Control: forward
  • turbo codes to perform error correction Error correction
  • a terminal In the HARQ technology, a terminal (UE: User Equipment) is required to be provided with a buffer that temporarily stores soft decision data of a received code string (for example, a symbol string). Such a buffer is called a soft buffer or an IR (Incremental Redundancy) buffer.
  • the size of the IR buffer is defined in the UE capability (terminal capability) information together with the throughput information and the like, and the IR buffer size is notified from the terminal to the base station side.
  • transmission data is turbo-encoded, and then processing for matching the data size to the size of the IR buffer of the terminal (HSPA + first rate match, LTE rate match) is performed, and then transmitted to the terminal .
  • the symbol string extracted from the received signal is soft-decided, and the LLR (log likelihood ratio) data of the determination result is stored in the IR buffer.
  • the original data is decoded from this symbol string. If the original data cannot be restored due to a code error as a result of the decoding process, an automatic retransmission request is made from the terminal to the base station by the HARQ process.
  • the terminal When the redundant data is retransmitted from the base station in response to this request, the terminal combines the LLR data of the redundant data with the LLR data stored in the IR buffer, and tries to decode the original data again.
  • Non-Patent Document 1 shows contents that define the size of a soft buffer.
  • the terminal must appropriately hold the LLR of PDSCH transmission data for HARQ combining, but the size of turbo-encoded data is very redundant and large, more than three times the original data.
  • it is not easy for the terminal to increase the buffer size because it increases the circuit scale and power consumption. Therefore, Non-Patent Document 1 categorizes the size of the soft buffer capable of storing LLR data for some transmission data, and describes the contents that define the size of the soft buffer of the terminal according to this category. Yes.
  • Non-Patent Document 2 discloses a technique for performing the following measures when the transmission data after turbo encoding becomes larger than the size of the soft buffer of the terminal. That is, when the transmission data after turbo coding is divided into a plurality of code blocks and transmitted, individual sizes (division sizes) obtained by dividing the soft buffer of the terminal by the number of code blocks are calculated. And the data of the said division size is extracted from the head of each code block, This data is transmitted, On the other hand, the remaining part of each code block is not transmitted.
  • An object of the present invention is to provide a receiving apparatus capable of reducing power consumption by reducing writing of soft decision data to a buffer without causing a decrease in throughput in the HARQ process.
  • the receiving apparatus performs a decoding process of the original data from the symbol string, a buffer for storing soft decision data of the symbol string extracted from the received signal, and when the original data cannot be restored, Based on the soft decision data stored in the buffer and a retransmitted symbol sequence of the received signal, a decoding unit that performs decoding processing of the original data again, and on the buffer based on quality information indicating the quality of the communication channel And a buffer control unit that changes the storage size of the soft decision data to be written.
  • the present invention it is possible to appropriately change the write size of the soft decision data used in the decoding process of the original data to the buffer based on the quality information of the communication channel. Therefore, when code errors do not occur much, the soft decision data write size can be reduced to reduce wasteful power consumption. Furthermore, when many code errors occur and many error corrections are required, it is possible to prevent the decoding processing throughput from being lowered by returning the soft decision data writing size to the original size.
  • FIG. 1 The block diagram which shows the structure of the radio
  • FIG. 10 is a diagram for explaining an example of a storage state of LLR data when the usage rate of the IR buffer is set low in the first embodiment
  • the figure explaining the order of writing and reading to the circular buffer by the derate match unit The figure which shows an example of the output data of a circular buffer, and the output pattern of a buffer enable
  • the block diagram which shows the periphery of IR buffer of Embodiment 2 in detail
  • the figure explaining the bit shift process of LLR data performed by the writing control part The figure explaining the bit shift process of LLR data performed by the reading control part
  • FIG. 10 is a diagram for explaining an example of a storage state of LLR data when the IR buffer usage rate is set low in the second embodiment
  • Block diagram showing in detail the periphery of the IR buffer of the third embodiment
  • FIG. 1 is a block diagram showing a configuration of a wireless communication apparatus according to an embodiment of the present invention.
  • This wireless communication apparatus is mounted on a mobile terminal (UE: User Equipment), and performs communication with a base station using the HSPA + and LTE wireless connection schemes.
  • UE User Equipment
  • This radio communication apparatus has a receiving unit (receiving device) configured as a receiving radio unit (Rx-RF) 13 that performs signal processing in the radio frequency domain, and a synchronization process for signals AD-converted by the receiving radio unit 13 And an IFFT processing unit 14 for extracting a symbol string by performing an inverse Fourier transform process, and signal separation / demodulation for obtaining an LLR (log likelihood ratio) by performing channel estimation and soft decision on the extracted symbol string Unit 15, a derate matching unit 16 that restores the symbol arrangement rate-matched at the base station to the LLR data (soft decision data) of the symbol sequence, and the LLR data for processing by the derate matching unit 16
  • the circular buffer 17 for temporarily storing, the IR buffer 20 for temporarily storing LLR data for the HARQ process, and the overall IR buffer 20
  • An IR buffer control unit 30 that performs control, a HARQ synthesis processing unit 18 that performs synthesis processing of LLR data of the symbol sequence retransmitted by the HARQ process, and
  • the wireless communication apparatus includes a CRC adding unit 41 that adds a CRC (Cyclic Redundancy Check) code for error detection to transmission data, and error correction for the transmission data to which the CRC code is added.
  • a turbo encoding unit 42 that generates a turbo code that enables transmission, a rate matching unit 43 that performs rate matching on transmission data after turbo encoding, and subcarrier modulation with a symbol string after rate matching in parallel
  • a transmission radio unit (Tx-RF) 46 for adjusting and amplifying and outputting is provided.
  • the wireless communication apparatus includes an antenna element 11 that transmits and receives radio waves, an antenna sharing unit 12 that switches the antenna element 11 between reception and transmission, and a control unit 50 that performs communication processing in an upper layer. It has been.
  • the reception data decoded by the turbo decoding unit 19 is input to the control unit 50, and the transmission data sent to the CRC adding unit 41 is output from the control unit 50.
  • the control unit 50 performs error detection on the received data.
  • the control unit 50 monitors the reception operation and generates various information related to the quality of the communication channel and the communication method.
  • this wireless communication apparatus is provided with a W-CDMA (Wideband Code Division Multiple Access) wireless unit and a modulation / demodulation unit. These can be switched to the configuration of the receiving radio unit 13, the synchronization / IFFT processing unit 14, the signal separation / demodulation unit 15, the transmission radio unit 46, the FFT unit 45, and the modulation unit 44 of the OFDMA (Orthogonal Frequency Division Multiple Access) system. Has been. By this switching, the LTE system and the HSPA + system can be switched.
  • the wireless communication apparatus includes a plurality of antenna elements 11 and a signal separation unit that separates a plurality of reception signals transmitted from the plurality of antennas and received by being superimposed. As a result, the wireless communication apparatus can be switched to a MIMO (Multi-Input-Multi-Output) transmission method.
  • MIMO Multi-Input-Multi-Output
  • the HARQ combining processing unit 18 performs combining processing between the LLR data of the retransmitted symbol string and the stored LLR data as described above during the period in which the data retransmission by the HARQ process is performed. Then, the HARQ synthesis processing unit 18 sends the synthesized LLR data to the turbo decoding unit 19 and the IR buffer control unit 30. On the other hand, during the period in which the data retransmission by the HARQ process is not performed and the first data transmission is performed, the HARQ synthesis processing unit 18 uses the LLR data of the symbol sequence transmitted from the derate matching unit 16 as it is. The data is sent to the turbo decoding unit 19 and the IR buffer control unit 30.
  • FIG. 2 is a block diagram showing details of the IR buffer 20 and the IR buffer control unit 30 according to the first embodiment.
  • the IR buffer control unit 30 includes a write control unit 31, a read control unit 32, an IR buffer storage valid signal generation unit 33, a buffer control unit 34, and the like.
  • the write control unit 31 receives the LLR data supplied from the HARQ synthesis processing unit 18 and the buffer enable signal output from the IR buffer storage valid signal generation unit 33. Then, the write control unit 31 converts the LLR data (w.LLR) sent from the HARQ combining processing unit 18 into the write address w. By outputting to the IR buffer 20 together with the add, the LLR data is written to the IR buffer 20. On the other hand, the write control unit 31 discards the LLR data sent from the HARQ synthesis processing unit 18 during a period in which the buffer enable is invalid. Write address w. The add is initialized to the start address for each HARQ process at the start of one HARQ process, and thereafter incremented and updated each time LLR data is written.
  • the read control unit 32 receives the buffer enable output from the IR buffer storage valid signal generation unit 33, and performs control to read LLR data (r.LLR) from the IR buffer 20 in synchronization with the HARQ process. Specifically, at the start of one HARQ process, the read address r. add is initialized to the start address for each HARQ process. When an automatic retransmission request is made in the HARQ process and data retransmission is performed, the read control unit 32 starts read control in synchronization with the reception process of the retransmission data. When the read control is started, the read control unit 32 reads the read address r. The add is output to the IR buffer 20 to read the LLR data, which is output to the HARQ synthesis processing unit 18. The read control unit 32 does not read LLR data while the buffer enable is invalid. Read address r. “add” is incremented every time the LLR data is read.
  • the buffer control unit 34 determines the size of LLR data to be stored in the IR buffer 20 based on the line quality information and control information supplied from the control unit 50, and uses this storage size information (LLR size) as an IR buffer storage valid signal.
  • the data is output to the generation unit 33.
  • the channel quality information which is a parameter for determining the storage size, includes CQI (channel quality indicator), PER (packet error rate) generated by the control unit 50 for feedback to the base station, and the number of retransmissions by the HARQ process. Is included.
  • any currently selected RAT Radio Access Technology: LTE-FDD (Frequency Division Duplex), LTE-TDD (Time Division Duplex) or HSPA + is selected as the system information.
  • the control information includes the specified size of the IR buffer corresponding to the currently selected RAT, the number of HARQ processes executed in parallel, and the number of code blocks when transmission data is divided into blocks and transmitted. Each information is included.
  • FIG. 3 shows a flowchart for explaining the operation of the buffer control unit 34 of the first embodiment.
  • the buffer control unit 34 When the buffer control unit 34 acquires the CQI and PER information from the control unit 50, the buffer control unit 34 obtains the average values avg_CQI and avg_PER from the CQI and PER acquired in the immediately preceding fixed period (step 301). Next, the buffer control unit 34 compares these with predetermined thresholds th_CQI and th_PER (step 302). As a result, if both average values avg_CQI, avg_PER are equal to or greater than the threshold values th_CQI, th_PER, the buffer control unit 34 sets the number of internal loops, which is an internal variable, to “0” (step 303), and the IR buffer 20 Is determined to be 100% (step 304).
  • the CQI is defined so that the quality decreases when the value is small and the quality improves when the value is large.
  • the number of inner loops is an internal variable indicating whether or not the usage rate of the IR buffer 20 is being reduced, and the number of times the usage rate has been changed during the period of reduction.
  • the buffer control unit 34 determines whether or not the current HARQ process retransmission count is 1 or less. (Step 305). If it is two or more times, the buffer control unit 34 performs the processing of steps 303 and 304. If it is one or less time, the processing of the buffer control unit 34 proceeds to step 306.
  • step 306 the buffer control unit 34 determines whether or not the number of inner loops is greater than “0”. If “0”, the buffer controller 34 determines the usage rate of the IR buffer 20 to be 70% (step 307), and The number of loops is set to “1” (step 308).
  • step 306 the buffer control unit 34 adds “+1” to the number of inner loops (step 309), and then determines whether or not the current transmission data is for retransmission. Is determined (step 310). If it is retransmission data, the buffer control unit 34 increases the usage rate of the IR buffer by one step (step 311). On the other hand, if it is the first transmission data, the buffer control unit 34 reduces the usage rate of the IR buffer 20 by one step (step 312).
  • the buffer control unit 34 uses the specified size of the IR buffer 20 notified from the control unit 50. Multiply rate. Then, the buffer control unit 34 determines the size of the calculation result as the total use size of the IR buffer 20 that stores the LLR data (step 313).
  • the total usage size of the IR buffer is defined as “1327248 bits” defined in the UE category. To be determined. Further, when the UE category is HSPA + category 20 and the IR buffer 20 usage rate is not limited, the total use size of the IR buffer is determined to be “518400 bits” defined in the UE category. When the usage rate is determined to be 70%, 50%, 35%, etc., the IR buffer 20 has a size similar to the value obtained by multiplying the prescribed size corresponding to each UE category by the usage rate. It is determined as the total use size.
  • the buffer control unit 34 subsequently determines the IR buffer from the total use size and the information on the number of HARQ processes, the number of code blocks, and the radio transmission mode notified from the control unit 50.
  • the data length (number of LLRs) of the LLR data stored in 20 is determined as follows. That is, since a plurality of HARQ processes are executed in parallel, the buffer control unit 34 must distribute the total used size of the IR buffer 20 among the plurality of HARQ processes. For this reason, the buffer control unit 34 stores the data length of the LLR data in each HARQ process (the number of LLRs) so that the maximum value of the total size of the LLR data stored in each process becomes the determined total use size.
  • the buffer control unit 34 When LTE-TDD wireless connection is selected, the buffer control unit 34 equally distributes all used sizes of the IR buffer 20 by a plurality of HARQ processes, and assigns them to the IR buffer 20 by each HARQ process. The data length of the LLR data to be stored may be determined. Then, the buffer control unit 34 notifies the IR buffer storage valid signal generation unit 33 of the data length of the LLR data as the storage size information (LLR size).
  • the buffer control unit 34 performs the above-described change control of the storage size of the LLR data in accordance with the start timing of each HARQ process. Alternatively, the buffer control unit 34 executes such change control at an arbitrary cycle and an arbitrary timing. When the storage size of the LLR data is changed at an arbitrary timing, the buffer control unit 34 applies the change in the storage size from the start of the next HAQR process (when receiving the first data, not the retransmission data). To be controlled.
  • FIG. 4A is a diagram for explaining a storage state of LLR data when the usage rate of the IR buffer 20 is 100%
  • FIG. 4B is an example of a storage state of LLR data when the usage rate of the IR buffer 20 is set low.
  • FIG. 4A and 4B show the storage state of LLR data in LTE
  • RV shows a redundancy version representing the beginning of the transmission code range at the time of retransmission.
  • FIG. 5 is a diagram illustrating the order of writing and reading to the circular buffer 17 by the derate matching unit 16
  • FIG. 6 is a diagram illustrating an example of output data of the circular buffer 17 and an output pattern of buffer enable. , Respectively.
  • the symbol arrangement of the received symbol string is changed by the derate match unit 16. Therefore, when only the LLR data in the predetermined code range 22 is stored in the IR buffer 20, it is distinguished whether or not the LLR data of the received symbol string is included in the code range 22 in the array after the derate match. There is a need to. In this embodiment, such a distinction is realized by the operation of the IR buffer storage valid signal generation unit 33 based on the read address of the circular buffer 17.
  • the derate match unit 16 stores the LLR data of the received symbol sequence in the circular buffer 17 in the order of addresses, and then reads them in the order prescribed for the derate match and sends them to the subsequent stage. .
  • the IR buffer storage valid signal generation unit 33 first determines the address range 17b of the circular buffer 17 to which the LLR data to be stored in the IR buffer 20 is written based on the storage size information of the LLR data notified from the buffer control unit 34. To do.
  • the IR buffer storage valid signal generation unit 33 inputs the read address of the circular buffer 17 and validates the buffer enable if the read address is in the address range 17b, and enables the buffer enable if the read address is outside the address range 17b. Is invalid.
  • the buffer enable value is switched according to the read address of the circular buffer 17, as shown in FIG. Then, by such a buffer enable signal, the write operation of the write control unit 31 and the read operation of the read control unit 32 are permitted or prohibited, and only the LLR data in the address range 17b is read from or written to the IR buffer 20. It has become.
  • the following reception process is performed.
  • an automatic retransmission request for the HARQ process is controlled by the control unit 50. Is transmitted via the transmitter.
  • the reception radio unit 13 and the synchronization / IFFT processing unit 14 extract a signal reception and redundant symbol sequence, and the signal separation / demodulation unit 15 extracts this symbol sequence. Is soft-decided.
  • the LLR data stored in the IR buffer is read out under the control of the IR buffer control unit 30, and the LLR data and the LLR data of the redundant symbol sequence are combined by the HARQ combining processing unit 18.
  • the synthesized LLR data is sent to the turbo decoding unit 19, and the original data is decoded again.
  • the synthesized LLR data is also adjusted in size under the control of the IR buffer control unit 30 and stored in the IR buffer 20 in case a second decoding error occurs. By repeating such reception processing, data transmitted from the base station is received.
  • the radio communication apparatus of the first embodiment during the above reception process, when the communication channel quality is good and the received code error is small, the size of the LLR data stored in the IR buffer 20 is reduced. Thus, the amount of access to the IR buffer 20 is reduced. Therefore, the power consumed by the IR buffer 20 can be reduced. On the other hand, when the quality of the communication channel is poor and the number of received code errors is large, the size of the LLR data stored in the IR buffer 20 is changed in a direction approaching the original size. Can be avoided.
  • FIG. 7 is a block diagram illustrating details of the IR buffer 20 and the IR buffer control unit 30 according to the second embodiment.
  • the bit width of each LLR data is reduced instead of reducing the number of LLR data of the received symbol string as in the first embodiment. And stored in the IR buffer 20.
  • the IR buffer control unit 30 includes a write control unit 31A, a read control unit 32A, an IR buffer storage valid signal generation unit 33, a buffer control unit 34A, and the like.
  • the write control unit 31A receives the LLR data supplied from the HARQ synthesis processing unit 18 and the buffer enable signal output from the IR buffer storage valid signal generation unit 33. Then, the write control unit 31A writes the LLR data supplied when the buffer enable is valid to the IR buffer 20. Furthermore, the write control unit 31A according to the second embodiment receives right bit shift amount data (right bit shift value) from the buffer control unit 34A. When the LLR data is written to the IR buffer 20, the LLR data is bit-shifted by the right bit shift amount to reduce the bit width of each LLR data. Then, the write control unit 31A writes this LLR data to the IR buffer 20.
  • right bit shift amount data right bit shift value
  • FIG. 8A shows a diagram for explaining bit shift processing of LLR data performed by the write control unit 31A.
  • the write control unit 31A converts the upper 4 bits into the lower direction. Bit shift to the lower 4 bits. By this bit shift, the bit width of the individual LLR data is halved, and the same effect as when the value of the individual LLR data is rounded (rounded) to the upper 4 digits is obtained.
  • the write control unit 31A adds “1” to the least significant bit of the remaining bits and rounds off. It is also possible to prevent the fraction processing error from accumulating.
  • the read control unit 32A receives the buffer enable signal output from the IR buffer storage valid signal generation unit 33, and synchronizes with the HARQ process when the buffer enable is valid. Read LLR data from. Then, the read control unit 32A outputs the read LLR data to the HARQ synthesis processing unit 18. Furthermore, the read control unit 32A according to the second embodiment receives left bit shift amount data (left bit shift value) from the buffer control unit 34A. Then, when reading the LLR data from the IR buffer 20, the read control unit 32A performs bit shift on the individual LLR data by the left bit shift amount, and restores the bit width of the individual LLR data. After that, the read control unit 32A sends the LLR data to the HARQ synthesis processing unit 18.
  • left bit shift amount data left bit shift value
  • FIG. 8B is a diagram illustrating the bit shift processing of LLR data performed by the read control unit 32A.
  • the read control unit 32A bit-shifts the bit string before the shift in the upper direction and sets the lower 4 bits to zero. Pack with values.
  • the bit width of the LLR data is restored to the original while the values of the individual LLR data are rounded to the upper 4 digits. Therefore, the HARQ synthesis processing unit 18 can synthesize LLR data by a normal processing operation in the LLR data synthesis process.
  • the error of the LLR data value due to the reduction / expansion of the bit width due to the bit shift is limited to the lower-order digits.
  • the buffer control unit 34A determines the bit width of the LLR data stored in the IR buffer 20 based on the control information supplied from the control unit 50 as shown below. Then, the buffer control unit 34A writes the right bit shift amount data (right bit shift value) and the left bit shift amount data (left bit shift value) corresponding to the bit width to the write control unit 31A and the read control unit 32A. And output respectively.
  • FIG. 9 shows a flowchart for explaining the operation of the buffer control unit 34A.
  • the processing steps 301 to 313 until the total use size of the IR buffer 20 is determined is the same as in the first embodiment.
  • the buffer control unit 34A When the total use size of the IR buffer 20 is determined in step 313, the buffer control unit 34A then stores the information in the IR buffer 20 from the HARQ process number, code block number, and radio transmission mode information notified from the control unit 50.
  • the bit width of the LLR data to be determined is determined as follows. That is, since a plurality of HARQ processes are executed in parallel, the buffer control unit 34A causes the maximum value of the total size of the LLR data stored in each of the plurality of HARQ processes to be the above-determined total use size.
  • the total used size of the IR buffer 20 is distributed to each HARQ process.
  • the buffer control unit 34A may distribute all the used sizes of the IR buffer 20 evenly in a plurality of HARQ processes. Then, the buffer control unit 34A determines the bit width of the LLR data so that each buffer size distributed to each HARQ process fits from the start end to the end of a set of transmitted symbol sequences (step). 701).
  • FIG. 10A is a diagram for explaining the storage state of LLR data when the usage rate of the IR buffer 20 is 100%
  • FIG. 10B is an example of the storage state of LLR data when the usage rate of the IR buffer 20 is set low.
  • FIG. 10A when the line quality is not good and the usage rate of the IR buffer 20 is 100%, all the LLR data of the received symbol sequence is stored in the IR buffer 20 without reducing the bit width.
  • FIG. 10B when the line quality is good and the usage rate of the IR buffer 20 is set low, all the LLR data of the received symbol sequence are uniformly reduced in bit width, and the IR buffer 20 Stored in In FIGS. 10A and 10B, the LLR data storage portion is shown by shading.
  • the storage size information (LLR size) output from the buffer control unit 34A to the IR buffer storage valid signal generation unit 33 is a value according to the prescribed size of the UE category. Therefore, the IR buffer storage valid signal generation unit 33 validates the buffer enable regardless of the read address range of the circular buffer 17 sent from the derate matching unit 16.
  • the radio communication apparatus of the second embodiment when the communication channel quality is good and the received code error is small, the bit size of the LLR data stored in the IR buffer 20 in each HARQ process is reduced. Therefore, the access amount to the IR buffer 20 is reduced. Therefore, the power consumed by the IR buffer 20 can be reduced.
  • the bit width of the LLR data stored in the IR buffer 20 in each HARQ process changes in the direction in which it is restored. A reduction in the combined gain can be avoided.
  • FIG. 11 is a block diagram showing details of the IR buffer and IR buffer control unit of the third embodiment.
  • the IR buffer 20 is composed of a plurality of buffer blocks 20A to 20F that can individually control power.
  • Embodiment 3 when the usage rate of the IR buffer 20 is reduced, the power of the unused blocks among the buffer blocks 20A to 20F is switched off to further reduce the power consumption.
  • the buffer blocks 20A to 20F are divided into different sizes (some may be the same size), and the total block size can be selected from a large number of sizes by changing the combination of the blocks. .
  • the sizes of the buffer blocks 20A to 20F such as the size of the buffer block 20A being “518400 bits” and the size of the buffer block 20B being “259200 bits”, are described in each column of “Block A” to “Block F” in Table 2 to be described later. is doing.
  • the IR buffer control unit 30 of the third embodiment includes a write control unit 31B, a read control unit 32B, an IR buffer storage valid signal generation unit 33, and a buffer control unit 34B.
  • the write control unit 31B is configured to distribute and output a write address and write data to the corresponding block among the buffer blocks 20A to 20F. Further, when the write control unit 31B sequentially writes a series of LLR data in the HARQ process, the write control unit 31B sequentially generates the addresses of blocks that are powered on among the buffer blocks 20A to 20F as write addresses. Has a function of generating addresses.
  • the read control unit 32B distributes and outputs the read address to the corresponding block among the buffer blocks 20A to 20F, and reads the read data from the corresponding block. It is configured. In addition, when reading the series of LLR data in the HARQ process, the read control unit 32B sequentially generates the addresses of the blocks that are powered on among the buffer blocks 20A to 20F as read addresses. It has a function to generate an address.
  • the buffer control unit 34B in order to realize the address generation function of the write control unit 31B and the address generation function of the read control unit 32B, the buffer control unit 34B, for example, turns on the power of the buffer blocks 20A to 20F. It is configured to send off information to the write control unit 31B and the read control unit 32B. Alternatively, the buffer control unit 34B is configured to appropriately select an address range used for automatic generation for each HARQ process, and to send information on this address range to the write control unit 31B and the read control unit 32B. May be. Thereby, the above address generation is realized.
  • the buffer control unit 34B determines the data length and bit width of the LLR data stored in the IR buffer 20 based on the control information supplied from the control unit 50. Then, the buffer control unit 34B outputs the right bit shift amount data and the left bit shift amount data corresponding to the bit width to the write control unit 31A and the read control unit 32A, respectively. Further, the buffer control unit 34B determines which of the buffer blocks 20A to 20F are used and which block is not used, and outputs a signal “Power ON / OFF” for switching these power on / off. Next, details of these operations will be described.
  • FIGS. 12A and 12B are flowcharts for explaining the operation of the buffer control unit 34B according to the third embodiment.
  • the processing in steps 301 to 312 is the same as that in the first embodiment.
  • the buffer control unit 34B may change the usage rate setting stepwise in step 311 or 312. , The process proceeds to step 1001. Then, the buffer control unit 34B determines whether the usage rate of the IR buffer 20 set at this time is 80% or more (step 1001). If the result is less than 80%, the processing of the buffer control unit 34B proceeds to step 1003 as it is. On the other hand, if it is 80% or more, the buffer control unit 34B sets the usage rate of the IR buffer 20 to 100% and sets the number of internal loops, which is an internal variable, to “0” (step 1002). Then, the buffer control unit 34B advances the process to step 1003.
  • the buffer control unit 34 multiplies the specified size of the IR buffer by the usage rate. Then, the buffer control unit 34 determines the size of the calculation result as the total use size of the IR buffer 20 that stores the LLR data. Further, the buffer control unit 34 determines a block to be turned on and a block to be turned off among the buffer blocks 20A to 20F so as to ensure the total use size (step 1003).
  • Step 1003 the buffer control unit 34 outputs a signal for switching power on / off to each of the buffer blocks 20A to 20F according to this determination.
  • the buffer control unit 34 determines the IR buffer 20 based on the total use size of the IR buffer 20 determined in Step 1003 and the information on the number of HARQ processes, the number of code blocks, and the radio transmission mode notified from the control unit 50.
  • the data length (number of LLRs) of the LLR data stored in and the bit width of each LLR data are determined as follows. That is, the maximum value of the total size of the LLR data stored in the IR buffer 20 in a plurality of HARQ processes becomes the determined total use size, and the influence of the reduction of the LLR data in each HARQ process is not biased.
  • the buffer control unit 34 determines the data length (number of LLRs) and bit width of the LLR data (step 1004).
  • the buffer control unit 34 outputs the determined data length of the LLR data to the IR buffer storage effective signal generation unit 33 as storage size information (LLR size). Further, the buffer control unit 34 associates the determined bit width with the right bit shift amount data (right bit ⁇ shift value) to the write control unit 31B and the left bit shift amount data (left bit shift value) to the read control unit 32B. ) Is output.
  • the IR buffer storage valid signal generator 33 operates in the same manner as in the first embodiment. That is, the IR buffer storage valid signal generation unit 33 inputs the storage size information and the read address of the circular buffer 17. The IR buffer storage valid signal generation unit 33 compares the read address with the address range 17b (see FIG. 5) determined based on the storage size information, and determines whether the buffer enable is valid based on the comparison result. Switch between disabled.
  • the wireless communication apparatus of the third embodiment when the data length or bit width of the LLR data stored in the IR buffer 20 is reduced by the HARQ process and the total use size of the IR buffer 20 is reduced, the buffer block Of the 20A to 20F, the power of the unused blocks is turned off. Therefore, the power consumed by the IR buffer 20 can be further reduced by reducing the size of the LLR data.
  • the quality information may include the Doppler shift frequency of the radio signal or the delay spread of the radio signal.
  • the HSPA + and LTE wireless connection schemes, MIMO and other wireless transmission modes can be switched, but the wireless connection scheme and the wireless transmission mode are fixed. Also good.
  • LLR is applied as soft decision data of a received symbol string.
  • another function value is applied if it represents the likelihood of a symbol string. May be.
  • the receiving apparatus according to the present invention can be applied to, for example, communication terminals using HSPA + and LTE wireless connection methods.
  • IR buffer 30 IR buffer control unit 31, 31A, 31B Write control unit 32, 32A, 32B Read control unit 33 IR buffer storage valid signal generation unit 34 , 34A, 34B Buffer control unit

Abstract

The purpose of the present invention is to reduce writing of soft decision data to a buffer and reduce power consumption without leading to throughput reduction in a HARQ process. A receiving device has a buffer (20) for storing soft decision data in a symbol string extracted from a received signal, and is provided with a buffer controller (30) for modifying the storage size of soft decision data to be written to the buffer (20) on the basis of quality information that expresses the quality of a communication channel, in a receiving device that re-decodes the original data on the basis of the soft decision data stored in the buffer (20) and the symbol string of resent received signals in the case that the original data cannot be reproduced from the symbol string.

Description

受信装置およびバッファ制御方法Receiving apparatus and buffer control method
 本発明は、受信装置に関し、例えば、HSPA+(High Speed Packet Access plus)およびLTE(Long Term Evolution)のダウンリンク物理層の通信処理に適用されるHARQ(Hybrid Automatic Repeat reQuest:自動再送要求)プロセスのバッファ制御技術に関する。 The present invention relates to a receiving apparatus, for example, a HARQ (Hybrid Automatic Repeat Repeat) process applied to a downlink physical layer communication process of HSPA + (High Speed Speed Packet Access Plus) and LTE (Long Term Evolution). The present invention relates to buffer control technology.
 従来、HSPA+におけるHS-DSCH(High Speed Downlink Shared Channel)のPDSCH(Physical Downlink Shared Channel)送信、または、LTEにおけるPDSCH送信等おいて、誤り訂正を行うためにターボ符号によるFEC(Forward Error Control:前方誤り訂正)の技術と、HARQの技術が採用されている。 Conventionally, HS-DSCH (High-Speed Downlink Shared Channel) transmission in HSPA +, PDSCH (Physical Downlink Shared Channel) transmission, or PDSCH transmission in LTE, etc., FEC (Forward Error Control: forward) using turbo codes to perform error correction Error correction) technology and HARQ technology are employed.
 HARQ技術においては、端末(UE:User Equipment)に、受信された符号列(例えばシンボル列)の軟判定データを一時的に記憶するバッファを設けることが要求される。このようなバッファはソフトバッファまたはIR(Incremental Redundancy)バッファと呼ばれる。IRバッファのサイズは、スループットの情報等とともに、UE capability(端末能力)の情報内に規定されており、また、このIRバッファのサイズは端末から基地局側へ通知される。 In the HARQ technology, a terminal (UE: User Equipment) is required to be provided with a buffer that temporarily stores soft decision data of a received code string (for example, a symbol string). Such a buffer is called a soft buffer or an IR (Incremental Redundancy) buffer. The size of the IR buffer is defined in the UE capability (terminal capability) information together with the throughput information and the like, and the IR buffer size is notified from the terminal to the base station side.
 PDSCH送信において、送信データはターボ符号化された後、データサイズを端末のIRバッファのサイズに合わせる処理(HSPA+の第1レートマッチ、LTEのレートマッチ)が行われ、その後、端末へ送信される。端末では、受信信号から抽出されたシンボル列が軟判定され、この判定結果のLLR(対数尤度比)データがIRバッファに記憶される。そして、端末において、このシンボル列から元データの復号処理が行われる。復号処理の結果、符号誤りにより元データが復元できなかった場合には、HARQプロセスにより端末から基地局へ自動再送要求がなされる。この要求により基地局から冗長データが再送されると、端末でこの冗長データのLLRデータとIRバッファに記憶されているLLRデータとが合成されて、再度、元データの復号が試みられる。 In PDSCH transmission, transmission data is turbo-encoded, and then processing for matching the data size to the size of the IR buffer of the terminal (HSPA + first rate match, LTE rate match) is performed, and then transmitted to the terminal . At the terminal, the symbol string extracted from the received signal is soft-decided, and the LLR (log likelihood ratio) data of the determination result is stored in the IR buffer. Then, in the terminal, the original data is decoded from this symbol string. If the original data cannot be restored due to a code error as a result of the decoding process, an automatic retransmission request is made from the terminal to the base station by the HARQ process. When the redundant data is retransmitted from the base station in response to this request, the terminal combines the LLR data of the redundant data with the LLR data stored in the IR buffer, and tries to decode the original data again.
 また、本発明に関連する従来技術として、非特許文献1には、ソフトバッファのサイズを規定する内容が示されている。端末はHARQ合成用にPDSCH送信データのLLRを適宜保持しなければならないが、ターボ符号化されたデータサイズは元データの3倍以上と非常に冗長で大きくなる。一方、端末にとってバッファサイズを増大することは回路規模と消費電力の増大を招くため容易ではない。そこで、非特許文献1には、幾つかの送信データに対してLLRデータを保存可能なソフトバッファのサイズについてカテゴリ分けを行い、このカテゴリに従って端末のソフトバッファのサイズを規定する内容が示されている。 In addition, as a related art related to the present invention, Non-Patent Document 1 shows contents that define the size of a soft buffer. The terminal must appropriately hold the LLR of PDSCH transmission data for HARQ combining, but the size of turbo-encoded data is very redundant and large, more than three times the original data. On the other hand, it is not easy for the terminal to increase the buffer size because it increases the circuit scale and power consumption. Therefore, Non-Patent Document 1 categorizes the size of the soft buffer capable of storing LLR data for some transmission data, and describes the contents that define the size of the soft buffer of the terminal according to this category. Yes.
 また、非特許文献2には、ターボ符号化後の送信データが端末のソフトバッファのサイズより大きくなった場合に次のような対処を行う技術が開示されている。すなわち、ターボ符号化後の送信データを複数のコードブロックに分割して送信する場合に、このコードブロックの数で端末のソフトバッファを分割した個々のサイズ(分割サイズ)を計算する。そして、各コードブロックの先頭から上記分割サイズのデータを抽出して、このデータを送信する一方、各コードブロックの残りの部分は送信しない。 Also, Non-Patent Document 2 discloses a technique for performing the following measures when the transmission data after turbo encoding becomes larger than the size of the soft buffer of the terminal. That is, when the transmission data after turbo coding is divided into a plurality of code blocks and transmitted, individual sizes (division sizes) obtained by dividing the soft buffer of the terminal by the number of code blocks are calculated. And the data of the said division size is extracted from the head of each code block, This data is transmitted, On the other hand, the remaining part of each code block is not transmitted.
 上記従来のHARQプロセスでは、通信品質、電波の伝搬環境の良し悪しに関わらず、受信されたシンボル列の全てのLLRデータをIRバッファに格納するようになっている。したがって、通信品質または伝搬環境が良くて受信されたシンボル列の誤り率が低くなると、IRバッファに格納されるLLRデータはほとんど使用されないため、LLRデータをIRバッファへ書き込む際の消費電力が無駄なものになる。一方、IRバッファに格納されるLLRデータのサイズを、通信品質、電波の伝搬環境の良し悪しに関わらずに、単純に小さくしたのでは、受信データの誤り率が高くなった場合に、HARQプロセスによる再送合成利得が低くなるという問題が生じる。 In the above-described conventional HARQ process, all the LLR data of the received symbol string is stored in the IR buffer regardless of the communication quality and the radio wave propagation environment. Therefore, if the error rate of the received symbol sequence is low due to good communication quality or propagation environment, the LLR data stored in the IR buffer is hardly used, and power consumption when writing the LLR data to the IR buffer is wasted. Become a thing. On the other hand, if the size of the LLR data stored in the IR buffer is simply reduced regardless of the communication quality and radio wave propagation environment, if the error rate of received data increases, the HARQ process There arises a problem that the retransmission combined gain due to becomes low.
 この発明の目的は、HARQプロセスにおけるスループットの低下を招くことなく、軟判定データのバッファへの書き込みを少なくして消費電力の削減を図れる受信装置を提供することである。 An object of the present invention is to provide a receiving apparatus capable of reducing power consumption by reducing writing of soft decision data to a buffer without causing a decrease in throughput in the HARQ process.
 本発明に係る受信装置は、受信信号から抽出されたシンボル列の軟判定データを記憶するバッファと、前記シンボル列から元データの復号処理を行うとともに、元データが復元できなかった場合に、前記バッファに記憶された前記軟判定データと再送された受信信号のシンボル列とに基づいて再度の元データの復号処理を行う復号部と、通信チャネルの品質を表わす品質情報に基づいて、前記バッファへ書き込む前記軟判定データの格納サイズを変更するバッファ制御部と、を備えている構成を採る。 The receiving apparatus according to the present invention performs a decoding process of the original data from the symbol string, a buffer for storing soft decision data of the symbol string extracted from the received signal, and when the original data cannot be restored, Based on the soft decision data stored in the buffer and a retransmitted symbol sequence of the received signal, a decoding unit that performs decoding processing of the original data again, and on the buffer based on quality information indicating the quality of the communication channel And a buffer control unit that changes the storage size of the soft decision data to be written.
 本発明によれば、元データの再度の復号処理に使用される軟判定データのバッファへの書き込みサイズを、通信チャネルの品質情報に基づいて適宜変更することができる。従って、符号誤りの発生が余り生じない場合には軟判定データの書き込みサイズを小さくして無駄な消費電力の削減を図ることができる。さらに、符号誤りが多く発生して多くの誤り訂正を要するような場合には軟判定データの書き込みサイズを元に戻して復号処理のスループットが低下することを回避できる。 According to the present invention, it is possible to appropriately change the write size of the soft decision data used in the decoding process of the original data to the buffer based on the quality information of the communication channel. Therefore, when code errors do not occur much, the soft decision data write size can be reduced to reduce wasteful power consumption. Furthermore, when many code errors occur and many error corrections are required, it is possible to prevent the decoding processing throughput from being lowered by returning the soft decision data writing size to the original size.
本発明の実施形態の無線受信装置の構成を示すブロック図The block diagram which shows the structure of the radio | wireless receiver of embodiment of this invention 実施の形態1のIRバッファの周辺を詳細に示すブロック図Block diagram showing in detail the periphery of the IR buffer of the first embodiment 実施の形態1のバッファ制御部の動作を説明するフローチャートA flowchart for explaining the operation of the buffer control unit according to the first embodiment. 実施の形態1においてIRバッファの使用率が100%のときのLLRデータの格納状態を説明する図The figure explaining the storage state of LLR data when the usage rate of the IR buffer is 100% in the first embodiment 実施の形態1においてIRバッファの使用率が低く設定されたときのLLRデータの格納状態の一例を説明する図FIG. 10 is a diagram for explaining an example of a storage state of LLR data when the usage rate of the IR buffer is set low in the first embodiment デレートマッチ部によるサーキュラバッファへの書き込みと読み出しの順番を説明する図The figure explaining the order of writing and reading to the circular buffer by the derate match unit サーキュラバッファの出力データとバッファイネーブルの出力パターンの一例を示す図The figure which shows an example of the output data of a circular buffer, and the output pattern of a buffer enable 実施の形態2のIRバッファの周辺を詳細に示すブロック図The block diagram which shows the periphery of IR buffer of Embodiment 2 in detail 書き込み制御部により行われるLLRデータのビットシフト処理を説明する図The figure explaining the bit shift process of LLR data performed by the writing control part 読み込み制御部により行われるLLRデータのビットシフト処理を説明する図The figure explaining the bit shift process of LLR data performed by the reading control part 実施の形態2のバッファ制御部の動作を説明するフローチャートFlowchart for explaining the operation of the buffer control unit of the second embodiment 実施の形態2においてIRバッファの使用率が100%のときのLLRデータの格納状態を説明する図The figure explaining the storage state of LLR data when the usage rate of the IR buffer is 100% in the second embodiment 実施の形態2においてIRバッファの使用率が低く設定されたときのLLRデータの格納状態の一例を説明する図FIG. 10 is a diagram for explaining an example of a storage state of LLR data when the IR buffer usage rate is set low in the second embodiment 実施の形態3のIRバッファの周辺を詳細に示すブロック図Block diagram showing in detail the periphery of the IR buffer of the third embodiment 実施の形態3のバッファ制御部の動作を説明するフローチャートの第1部First part of a flowchart for explaining the operation of the buffer control unit according to the third embodiment. 同、フローチャートの第2部Same as above, part 2 of the flowchart
 以下、本発明の実施の形態を図面に基づいて説明する。 Hereinafter, embodiments of the present invention will be described with reference to the drawings.
 図1は、本発明の実施形態の無線通信装置の構成を示すブロック図である。この無線通信装置は、移動端末(UE:User Equipment)に搭載されて、HSPA+とLTEの無線接続方式により基地局との間で通信を行うものである。 FIG. 1 is a block diagram showing a configuration of a wireless communication apparatus according to an embodiment of the present invention. This wireless communication apparatus is mounted on a mobile terminal (UE: User Equipment), and performs communication with a base station using the HSPA + and LTE wireless connection schemes.
 この無線通信装置は、受信部(受信装置)の構成として、無線周波数領域の信号処理を行う受信無線部(Rx-RF)13と、受信無線部13によりAD変換された信号に対して同期処理および逆フーリエ変換処理を行ってシンボル列を抽出する同期・IFFT処理部14と、抽出されたシンボル列に対してチャネル推定および軟判定を行ってLLR(対数尤度比)を求める信号分離・復調部15と、シンボル列のLLRデータ(軟判定データ)に対して基地局でレートマッチされたシンボル配列を元に戻すデレートマッチ部16と、デレートマッチ部16の処理のためにLLRデータを一時的に記憶するサーキュラバッファ17と、HARQプロセス用にLLRデータを一時的に記憶するIRバッファ20と、IRバッファ20の全体的な制御を行うIRバッファ制御部30と、HARQプロセスにより再送されたシンボル列のLLRデータとIRバッファ20に記憶されているLLRデータとの合成処理を行うHARQ合成処理部18と、受信したシンボル列に対してターボ復号処理を行って元データを復元するターボ復号部19等を備えている。 This radio communication apparatus has a receiving unit (receiving device) configured as a receiving radio unit (Rx-RF) 13 that performs signal processing in the radio frequency domain, and a synchronization process for signals AD-converted by the receiving radio unit 13 And an IFFT processing unit 14 for extracting a symbol string by performing an inverse Fourier transform process, and signal separation / demodulation for obtaining an LLR (log likelihood ratio) by performing channel estimation and soft decision on the extracted symbol string Unit 15, a derate matching unit 16 that restores the symbol arrangement rate-matched at the base station to the LLR data (soft decision data) of the symbol sequence, and the LLR data for processing by the derate matching unit 16 The circular buffer 17 for temporarily storing, the IR buffer 20 for temporarily storing LLR data for the HARQ process, and the overall IR buffer 20 An IR buffer control unit 30 that performs control, a HARQ synthesis processing unit 18 that performs synthesis processing of LLR data of the symbol sequence retransmitted by the HARQ process, and LLR data stored in the IR buffer 20, and a received symbol sequence A turbo decoding unit 19 that performs turbo decoding processing to restore original data is provided.
 また、この無線通信装置は、送信部の構成として、送信データに誤り検出用のCRC(Cyclic Redundancy Check)コードを付加するCRC付加部41と、CRCコードの付加された送信データに対して誤り訂正を可能とするターボ符号を生成するターボ符号化部42と、ターボ符号化後の送信データに対してレートマッチを行うレートマッチ部43と、レートマッチ後のシンボル列をパラレルにしてサブキャリア変調する変調部44と、変調部44から出力される複数のサブキャリア信号をFFT(高速フーリエ変換)処理してCP(cyclic prefix)を付加するFFT部45と、FFT処理された信号を無線送信用に調整・増幅して出力する送信無線部(Tx-RF)46等を備えている。 In addition, the wireless communication apparatus includes a CRC adding unit 41 that adds a CRC (Cyclic Redundancy Check) code for error detection to transmission data, and error correction for the transmission data to which the CRC code is added. A turbo encoding unit 42 that generates a turbo code that enables transmission, a rate matching unit 43 that performs rate matching on transmission data after turbo encoding, and subcarrier modulation with a symbol string after rate matching in parallel The modulation unit 44, the FFT unit 45 for adding a CP (cyclic prefix) by performing FFT (Fast Fourier Transform) processing on a plurality of subcarrier signals output from the modulation unit 44, and the FFT-processed signal for wireless transmission A transmission radio unit (Tx-RF) 46 for adjusting and amplifying and outputting is provided.
 さらに、この無線通信装置には、電波の送受信を行うアンテナ素子11と、アンテナ素子11を受信用と送信用とに切り換えるアンテナ共用部12と、上位層の通信処理を行う制御ユニット50とが設けられている。上記ターボ復号部19により復号された受信データは制御ユニット50へ入力され、上記CRC付加部41へ送られる送信データは制御ユニット50から出力される。制御ユニット50は、受信データの誤り検出を行う。また、制御ユニット50は、受信動作の監視を行って通信チャネルの品質および通信方式に関する種々の情報を生成する。 Further, the wireless communication apparatus includes an antenna element 11 that transmits and receives radio waves, an antenna sharing unit 12 that switches the antenna element 11 between reception and transmission, and a control unit 50 that performs communication processing in an upper layer. It has been. The reception data decoded by the turbo decoding unit 19 is input to the control unit 50, and the transmission data sent to the CRC adding unit 41 is output from the control unit 50. The control unit 50 performs error detection on the received data. In addition, the control unit 50 monitors the reception operation and generates various information related to the quality of the communication channel and the communication method.
 また、図1では省略しているが、この無線通信装置には、W-CDMA(広帯域符号分割多重アクセス)方式の無線部と変調復調部とが設けられている。そして、これらがOFDMA(直交周波数分割多重アクセス)方式の受信無線部13、同期・IFFT処理部14、信号分離・復調部15、送信無線部46、FFT部45および変調部44の構成と切り換え可能にされている。この切り換えにより、LTEの方式とHSPA+の方式とが切り換えられるようになっている。また、この無線通信装置には、複数のアンテナ素子11と、複数のアンテナから送信され重畳されて受信された複数の受信信号を分離する信号分離部が設けられている。これにより、無線通信装置は、MIMO(Multi Input Multi Output)の伝送方式にも切り換えられるようになっている。 Although not shown in FIG. 1, this wireless communication apparatus is provided with a W-CDMA (Wideband Code Division Multiple Access) wireless unit and a modulation / demodulation unit. These can be switched to the configuration of the receiving radio unit 13, the synchronization / IFFT processing unit 14, the signal separation / demodulation unit 15, the transmission radio unit 46, the FFT unit 45, and the modulation unit 44 of the OFDMA (Orthogonal Frequency Division Multiple Access) system. Has been. By this switching, the LTE system and the HSPA + system can be switched. In addition, the wireless communication apparatus includes a plurality of antenna elements 11 and a signal separation unit that separates a plurality of reception signals transmitted from the plurality of antennas and received by being superimposed. As a result, the wireless communication apparatus can be switched to a MIMO (Multi-Input-Multi-Output) transmission method.
 HARQ合成処理部18は、HARQプロセスによるデータ再送が行われている期間には、上述のように再送されたシンボル列のLLRデータと保存されているLLRデータとの合成処理を行う。そして、HARQ合成処理部18は、合成されたLLRデータをターボ復号部19とIRバッファ制御部30へ送る。一方、HARQプロセスによるデータ再送が行われてなく、初回のデータ送信が行われている期間には、HARQ合成処理部18は、デレートマッチ部16から送られてきたシンボル列のLLRデータをそのままターボ復号部19とIRバッファ制御部30へ送る。 The HARQ combining processing unit 18 performs combining processing between the LLR data of the retransmitted symbol string and the stored LLR data as described above during the period in which the data retransmission by the HARQ process is performed. Then, the HARQ synthesis processing unit 18 sends the synthesized LLR data to the turbo decoding unit 19 and the IR buffer control unit 30. On the other hand, during the period in which the data retransmission by the HARQ process is not performed and the first data transmission is performed, the HARQ synthesis processing unit 18 uses the LLR data of the symbol sequence transmitted from the derate matching unit 16 as it is. The data is sent to the turbo decoding unit 19 and the IR buffer control unit 30.
 (実施の形態1)
 図2には、実施の形態1のIRバッファ20とIRバッファ制御部30の詳細を表わしたブロック図を示す。
(Embodiment 1)
FIG. 2 is a block diagram showing details of the IR buffer 20 and the IR buffer control unit 30 according to the first embodiment.
 実施の形態1のIRバッファ制御部30は、書き込み制御部31、読み込み制御部32、IRバッファ格納有効信号生成部33、バッファ制御部34等から構成される。 The IR buffer control unit 30 according to the first embodiment includes a write control unit 31, a read control unit 32, an IR buffer storage valid signal generation unit 33, a buffer control unit 34, and the like.
 書き込み制御部31は、HARQ合成処理部18から供給されるLLRデータと、IRバッファ格納有効信号生成部33から出力されるバッファイネーブルの信号とを、それぞれ受ける。そして、書き込み制御部31は、バッファイネーブルが有効の期間に、HARQ合成処理部18から送られてきたLLRデータ(w.LLR)を、ライトアドレスw.addとともにIRバッファ20に出力することで、このLLRデータをIRバッファ20へ書き込む。一方、書き込み制御部31は、バッファイネーブルが無効の期間に、HARQ合成処理部18から送られてきたLLRデータは破棄する。ライトアドレスw.addは、1つのHARQプロセスの開始時にHARQプロセスごとの開始アドレスに初期化され、その後、LLRデータを書き込んでいくごとにカウントアップして更新されていく。 The write control unit 31 receives the LLR data supplied from the HARQ synthesis processing unit 18 and the buffer enable signal output from the IR buffer storage valid signal generation unit 33. Then, the write control unit 31 converts the LLR data (w.LLR) sent from the HARQ combining processing unit 18 into the write address w. By outputting to the IR buffer 20 together with the add, the LLR data is written to the IR buffer 20. On the other hand, the write control unit 31 discards the LLR data sent from the HARQ synthesis processing unit 18 during a period in which the buffer enable is invalid. Write address w. The add is initialized to the start address for each HARQ process at the start of one HARQ process, and thereafter incremented and updated each time LLR data is written.
 読み込み制御部32は、IRバッファ格納有効信号生成部33から出力されるバッファイネーブルを受けて、HARQプロセスに同期してIRバッファ20からLLRデータ(r.LLR)を読み出す制御を行う。詳細には、1つのHARQプロセスの開始時に、リードアドレスr.addがHARQプロセスごとの開始アドレスに初期化される。そして、HARQプロセスで自動再送要求がなされてデータ再送が行われた場合に、読み込み制御部32は、この再送データの受信処理に同期させて読み込み制御を開始する。読み込み制御が開始されたら、読み込み制御部32は、バッファイネーブルが有効の期間にリードアドレスr.addをIRバッファ20へ出力してLLRデータを読み出し、これをHARQ合成処理部18へ出力する。読み込み制御部32は、バッファイネーブルが無効の期間にはLLRデータの読み込みを行わない。リードアドレスr.addは、LLRデータを読み出すごとにカウントアップされていく。 The read control unit 32 receives the buffer enable output from the IR buffer storage valid signal generation unit 33, and performs control to read LLR data (r.LLR) from the IR buffer 20 in synchronization with the HARQ process. Specifically, at the start of one HARQ process, the read address r. add is initialized to the start address for each HARQ process. When an automatic retransmission request is made in the HARQ process and data retransmission is performed, the read control unit 32 starts read control in synchronization with the reception process of the retransmission data. When the read control is started, the read control unit 32 reads the read address r. The add is output to the IR buffer 20 to read the LLR data, which is output to the HARQ synthesis processing unit 18. The read control unit 32 does not read LLR data while the buffer enable is invalid. Read address r. “add” is incremented every time the LLR data is read.
 バッファ制御部34は、制御ユニット50から供給される回線品質情報および制御情報に基づいてIRバッファ20に格納するLLRデータのサイズを決定し、この格納サイズ情報(LLR size)をIRバッファ格納有効信号生成部33に出力する。ここで、格納サイズを決定するパラメータである回線品質情報には、基地局へのフィードバック用に制御ユニット50により生成されたCQI(チャネル品質インジケータ)、PER(パケットエラーレート)、HARQプロセスによる再送回数が含まれる。また、上記制御情報には、方式情報として、現在選択されているRAT(Radio Access Technology:LTE-FDD(周波数分割複信)、LTE-TDD(時分割複信)あるいはHSPA+の何れが選択されているか)、無線伝送モード(Transmission Mode:MIMOであるか否か)の各情報が含まれる。また、この制御情報には、現在選択されているRATに対応するIRバッファの規定サイズ、並列的に実行されるHARQプロセスの数、送信データがブロック分割されて送信される際のコードブロック数の各情報が含まれる。 The buffer control unit 34 determines the size of LLR data to be stored in the IR buffer 20 based on the line quality information and control information supplied from the control unit 50, and uses this storage size information (LLR size) as an IR buffer storage valid signal. The data is output to the generation unit 33. Here, the channel quality information, which is a parameter for determining the storage size, includes CQI (channel quality indicator), PER (packet error rate) generated by the control unit 50 for feedback to the base station, and the number of retransmissions by the HARQ process. Is included. In the control information, any currently selected RAT (Radio Access Technology: LTE-FDD (Frequency Division Duplex), LTE-TDD (Time Division Duplex) or HSPA + is selected as the system information. ) And wireless transmission mode (Transmission Mode: whether or not MIMO). The control information includes the specified size of the IR buffer corresponding to the currently selected RAT, the number of HARQ processes executed in parallel, and the number of code blocks when transmission data is divided into blocks and transmitted. Each information is included.
 図3には、実施の形態1のバッファ制御部34の動作を説明するフローチャートを示す。 FIG. 3 shows a flowchart for explaining the operation of the buffer control unit 34 of the first embodiment.
 バッファ制御部34は、制御ユニット50からCQIとPERの情報を取得すると、直前の一定期間に取得したCQIとPERからこれらの平均値avg_CQI,avg_PERを求める(ステップ301)。次いで、バッファ制御部34は、これらと所定の閾値th_CQI,th_PERとをそれぞれ比較する(ステップ302)。その結果、両方の平均値avg_CQI,avg_PERがそれぞれ閾値th_CQI,th_PER以上であれば、バッファ制御部34は、内部変数である内部ループ回数を「0」にセットして(ステップ303)、IRバッファ20の使用率を100%に決定する(ステップ304)。なお、この実施形態では、CQIは値が小さいときに品質低下、値が大きいときに品質向上となるように定義されている。また、上記の内部ループ回数とは、IRバッファ20の使用率の削減中であるか否か、ならびに、削減中の期間に使用率を変更した回数を表わす内部変数である。 When the buffer control unit 34 acquires the CQI and PER information from the control unit 50, the buffer control unit 34 obtains the average values avg_CQI and avg_PER from the CQI and PER acquired in the immediately preceding fixed period (step 301). Next, the buffer control unit 34 compares these with predetermined thresholds th_CQI and th_PER (step 302). As a result, if both average values avg_CQI, avg_PER are equal to or greater than the threshold values th_CQI, th_PER, the buffer control unit 34 sets the number of internal loops, which is an internal variable, to “0” (step 303), and the IR buffer 20 Is determined to be 100% (step 304). In this embodiment, the CQI is defined so that the quality decreases when the value is small and the quality improves when the value is large. The number of inner loops is an internal variable indicating whether or not the usage rate of the IR buffer 20 is being reduced, and the number of times the usage rate has been changed during the period of reduction.
 一方、ステップ302の比較で、両方の平均値avg_CQI,avg_PERがそれぞれ閾値th_CQI,th_PERより小さいと判定されたら、バッファ制御部34は、現在のHARQプロセスの再送回数が1回以下であるか判定する(ステップ305)。そして、2回以上であれば、バッファ制御部34は、上記ステップ303,304の処理を行い、1回以下であれば、バッファ制御部34の処理はステップ306へ進む。 On the other hand, if it is determined in the comparison in step 302 that both average values avg_CQI and avg_PER are smaller than the threshold values th_CQI and th_PER, the buffer control unit 34 determines whether or not the current HARQ process retransmission count is 1 or less. (Step 305). If it is two or more times, the buffer control unit 34 performs the processing of steps 303 and 304. If it is one or less time, the processing of the buffer control unit 34 proceeds to step 306.
 ステップ306では、バッファ制御部34は、内部ループ回数が「0」より大きいか判定し、「0」であれば、IRバッファ20の使用率を70%に決定し(ステップ307)、かつ、内部ループ回数を「1」にセットする(ステップ308)。 In step 306, the buffer control unit 34 determines whether or not the number of inner loops is greater than “0”. If “0”, the buffer controller 34 determines the usage rate of the IR buffer 20 to be 70% (step 307), and The number of loops is set to “1” (step 308).
 一方、ステップ306で内部ループ回数が「0」より大きければ、先ず、バッファ制御部34は、内部ループ回数を「+1」加算し(ステップ309)、次いで、今回の送信データが再送のものか否かを判定する(ステップ310)。そして、再送データであれば、バッファ制御部34は、IRバッファの使用率を一段階上昇させる(ステップ311)。一方、初回の送信データであれば、バッファ制御部34は、IRバッファ20の使用率を一段階低下させる(ステップ312)。 On the other hand, if the number of inner loops is greater than “0” in step 306, first, the buffer control unit 34 adds “+1” to the number of inner loops (step 309), and then determines whether or not the current transmission data is for retransmission. Is determined (step 310). If it is retransmission data, the buffer control unit 34 increases the usage rate of the IR buffer by one step (step 311). On the other hand, if it is the first transmission data, the buffer control unit 34 reduces the usage rate of the IR buffer 20 by one step (step 312).
 上記のように、ステップ304,307,311,312でIRバッファ20の使用率が決定されたら、次に、バッファ制御部34は、制御ユニット50から通知されているIRバッファ20の規定サイズに使用率を乗算する。そして、バッファ制御部34は、この計算結果のサイズを、LLRデータを格納するIRバッファ20の全使用サイズとして決定する(ステップ313)。 As described above, when the usage rate of the IR buffer 20 is determined in steps 304, 307, 311, 312, the buffer control unit 34 then uses the specified size of the IR buffer 20 notified from the control unit 50. Multiply rate. Then, the buffer control unit 34 determines the size of the calculation result as the total use size of the IR buffer 20 that stores the LLR data (step 313).
Figure JPOXMLDOC01-appb-T000001
Figure JPOXMLDOC01-appb-T000001
 例えば、表1に示されるように、UEカテゴリがLTEの或るカテゴリでIRバッファ20の使用率が制限されていないときには、IRバッファの全使用サイズが上記UEカテゴリで規定されている“1237248bit”に決定される。また、UEカテゴリがHSPA+のカテゴリ20でIRバッファ20の使用率の制限がないときには、IRバッファの全使用サイズが上記UEカテゴリで規定されている“518400bit”に決定される。また、使用率が70%、50%、35%などに決定された場合には、上記の各UEカテゴリに応じた規定サイズにそれぞれ使用率を乗算した値と同程度のサイズが、IRバッファ20の全使用サイズとして決定される。 For example, as shown in Table 1, when the UE category is a certain category of LTE and the usage rate of the IR buffer 20 is not limited, the total usage size of the IR buffer is defined as “1327248 bits” defined in the UE category. To be determined. Further, when the UE category is HSPA + category 20 and the IR buffer 20 usage rate is not limited, the total use size of the IR buffer is determined to be “518400 bits” defined in the UE category. When the usage rate is determined to be 70%, 50%, 35%, etc., the IR buffer 20 has a size similar to the value obtained by multiplying the prescribed size corresponding to each UE category by the usage rate. It is determined as the total use size.
 ステップ313で全使用サイズを決定したら、続いて、バッファ制御部34は、この全使用サイズと、制御ユニット50から通知されているHARQプロセス数、コードブロック数および無線伝送モードの情報から、IRバッファ20に格納するLLRデータのデータ長(LLRの個数)を次のように決定する。すなわち、複数のHARQプロセスが並列的に実行されるため、バッファ制御部34は、上記のIRバッファ20の全使用サイズをこれら複数のHARQプロセスで分配しなければならない。そのため、バッファ制御部34は、各プロセスで格納されるLLRデータのトータルサイズの最大値が上記決定された全使用サイズとなるように、各HARQプロセスにおけるLLRデータの格納データ長(LLRの個数)を決定する(ステップ314)。なお、LTE-TDD方式の無線接続が選択されている場合には、バッファ制御部34は、複数のHARQプロセスでIRバッファ20の全使用サイズを均等に振り分けて、各HARQプロセスでIRバッファ20に格納するLLRデータのデータ長を決定しても良い。そして、バッファ制御部34は、このLLRデータのデータ長を上記の格納サイズ情報(LLR size)としてIRバッファ格納有効信号生成部33に通知する。 When the total use size is determined in step 313, the buffer control unit 34 subsequently determines the IR buffer from the total use size and the information on the number of HARQ processes, the number of code blocks, and the radio transmission mode notified from the control unit 50. The data length (number of LLRs) of the LLR data stored in 20 is determined as follows. That is, since a plurality of HARQ processes are executed in parallel, the buffer control unit 34 must distribute the total used size of the IR buffer 20 among the plurality of HARQ processes. For this reason, the buffer control unit 34 stores the data length of the LLR data in each HARQ process (the number of LLRs) so that the maximum value of the total size of the LLR data stored in each process becomes the determined total use size. Is determined (step 314). When LTE-TDD wireless connection is selected, the buffer control unit 34 equally distributes all used sizes of the IR buffer 20 by a plurality of HARQ processes, and assigns them to the IR buffer 20 by each HARQ process. The data length of the LLR data to be stored may be determined. Then, the buffer control unit 34 notifies the IR buffer storage valid signal generation unit 33 of the data length of the LLR data as the storage size information (LLR size).
 バッファ制御部34は、上記のようなLLRデータの格納サイズの変更制御を、個々のHARQプロセスの開始タイミングに合わせて実行する。或いは、バッファ制御部34は、このような変更制御を、任意の周期、任意のタイミングで実行する。任意のタイミングで、LLRデータの格納サイズが変更された場合には、バッファ制御部34は、次のHAQRプロセスの開始時(再送データでなく初回データの受信時)から上記格納サイズの変更が適用されように制御する。 The buffer control unit 34 performs the above-described change control of the storage size of the LLR data in accordance with the start timing of each HARQ process. Alternatively, the buffer control unit 34 executes such change control at an arbitrary cycle and an arbitrary timing. When the storage size of the LLR data is changed at an arbitrary timing, the buffer control unit 34 applies the change in the storage size from the start of the next HAQR process (when receiving the first data, not the retransmission data). To be controlled.
 図4Aは、IRバッファ20の使用率が100%のときのLLRデータの格納状態を説明する図、図4Bは、IRバッファ20の使用率が低く設定されたときのLLRデータの格納状態の一例を説明する図である。図4A,図4Bは、LTEにおけるLLRデータの格納状態を示すものであり、RVは再送時における送信コード範囲の先頭を表わすリダンダンシーバージョンを示している。 4A is a diagram for explaining a storage state of LLR data when the usage rate of the IR buffer 20 is 100%, and FIG. 4B is an example of a storage state of LLR data when the usage rate of the IR buffer 20 is set low. FIG. 4A and 4B show the storage state of LLR data in LTE, and RV shows a redundancy version representing the beginning of the transmission code range at the time of retransmission.
 図4Aに示すように、回線品質が悪くてIRバッファ20の使用率が100%のときには受信データの全てのLLRデータがIRバッファ20に格納される。一方、図4Bに示すように、回線品質が良好でIRバッファ20の使用率が低く設定されているときには受信データの一部のコード範囲22のLLRデータのみがIRバッファ20に格納されるように制御される。なお、この実施形態では、HARQプロセスによりデータ再送が行われてRV(Redundancy Version)に基づき異なるコード範囲のデータ再送が行われた場合には次のように処理される。すなわち、先にLLRデータが格納されているコード範囲22と重なる分のLLRデータのみがIRバッファ20に格納され、このコード範囲22と重ならない範囲のLLRデータはIRバッファ20に格納されない。 As shown in FIG. 4A, when the line quality is poor and the usage rate of the IR buffer 20 is 100%, all the LLR data of the received data is stored in the IR buffer 20. On the other hand, as shown in FIG. 4B, when the line quality is good and the usage rate of the IR buffer 20 is set low, only the LLR data in the code range 22 of a part of the received data is stored in the IR buffer 20. Be controlled. In this embodiment, when data retransmission is performed by the HARQ process and data retransmission of a different code range is performed based on RV (Redundancy Version), the following processing is performed. That is, only the LLR data that overlaps the code range 22 in which the LLR data is previously stored is stored in the IR buffer 20, and the LLR data in a range that does not overlap with the code range 22 is not stored in the IR buffer 20.
 図5には、デレートマッチ部16によるサーキュラバッファ17への書き込み順序と読み出し順序を説明する図を、図6には、サーキュラバッファ17の出力データとバッファイネーブルの出力パターンの一例を示す図を、それぞれ示す。 FIG. 5 is a diagram illustrating the order of writing and reading to the circular buffer 17 by the derate matching unit 16, and FIG. 6 is a diagram illustrating an example of output data of the circular buffer 17 and an output pattern of buffer enable. , Respectively.
 受信されたシンボル列は、デレートマッチ部16によりシンボル配列が変更される。そのため、所定のコード範囲22のLLRデータのみをIRバッファ20へ格納する場合、受信されたシンボル列のLLRデータが、デレートマッチ後の配列でコード範囲22に含まれているのか否かを区別する必要がある。この実施の形態では、このような区別を、サーキュラバッファ17の読出しアドレスに基づくIRバッファ格納有効信号生成部33の動作により実現している。 The symbol arrangement of the received symbol string is changed by the derate match unit 16. Therefore, when only the LLR data in the predetermined code range 22 is stored in the IR buffer 20, it is distinguished whether or not the LLR data of the received symbol string is included in the code range 22 in the array after the derate match. There is a need to. In this embodiment, such a distinction is realized by the operation of the IR buffer storage valid signal generation unit 33 based on the read address of the circular buffer 17.
 すなわち、図5に示すように、デレートマッチ部16は、受信されたシンボル列のLLRデータをサーキュラバッファ17にアドレス順に格納したのち、デレートマッチ用に規定された順序で読み出して後段へ送る。 That is, as shown in FIG. 5, the derate match unit 16 stores the LLR data of the received symbol sequence in the circular buffer 17 in the order of addresses, and then reads them in the order prescribed for the derate match and sends them to the subsequent stage. .
 IRバッファ格納有効信号生成部33は、先ず、バッファ制御部34から通知されたLLRデータの格納サイズ情報に基づき、IRバッファ20に格納すべきLLRデータが書き込まれるサーキュラバッファ17のアドレス範囲17bを決定する。そして、IRバッファ格納有効信号生成部33は、サーキュラバッファ17のリードアドレスを入力して、このリードアドレスがアドレス範囲17bにあればバッファイネーブルを有効とし、このアドレス範囲17bから外れていればバッファイネーブルを無効とする。 The IR buffer storage valid signal generation unit 33 first determines the address range 17b of the circular buffer 17 to which the LLR data to be stored in the IR buffer 20 is written based on the storage size information of the LLR data notified from the buffer control unit 34. To do. The IR buffer storage valid signal generation unit 33 inputs the read address of the circular buffer 17 and validates the buffer enable if the read address is in the address range 17b, and enables the buffer enable if the read address is outside the address range 17b. Is invalid.
 このような処理により、図6に示されるように、サーキュラバッファ17のリードアドレスに応じてバッファイネーブルの値が切り換えられる。そして、このようなバッファイネーブルの信号によって、書き込み制御部31のライト動作と読み込み制御部32のリード動作とが許可または禁止されて、アドレス範囲17bのLLRデータのみがIRバッファ20へ読み書きされるようになっている。 By such processing, the buffer enable value is switched according to the read address of the circular buffer 17, as shown in FIG. Then, by such a buffer enable signal, the write operation of the write control unit 31 and the read operation of the read control unit 32 are permitted or prohibited, and only the LLR data in the address range 17b is read from or written to the IR buffer 20. It has become.
 上記のように構成された無線通信装置においては、次のような受信処理が行われる。 In the wireless communication apparatus configured as described above, the following reception process is performed.
 すなわち、基地局から送信された電波が受信されると、受信無線部13および同期・IFFT処理部14により受信された信号からシンボル列が抽出される。
 続いて、信号分離・復調部15によりこのシンボル列が軟判定された後、この判定結果のLLRデータがIRバッファ制御部30の制御によってサイズが調整されてIRバッファ20に記憶される。
That is, when a radio wave transmitted from the base station is received, a symbol string is extracted from the signals received by the reception radio unit 13 and the synchronization / IFFT processing unit 14.
Subsequently, after the symbol separation is determined softly by the signal separation / demodulation unit 15, the size of the LLR data of the determination result is adjusted by the control of the IR buffer control unit 30 and stored in the IR buffer 20.
 そして、ターボ復号部19により上記のシンボル列から元データの復号処理が行われ、その結果、符号誤りにより元データが復元できなかった場合には、制御ユニット50の制御によりHARQプロセスの自動再送要求が送信部を介して送信される。 Then, when the original data is decoded from the symbol sequence by the turbo decoding unit 19 and the original data cannot be restored due to a code error, an automatic retransmission request for the HARQ process is controlled by the control unit 50. Is transmitted via the transmitter.
 さらに、この要求により基地局から冗長データが再送されると、受信無線部13および同期・IFFT処理部14により信号受信および冗長のシンボル列が抽出されて、信号分離・復調部15によりこのシンボル列が軟判定される。 Further, when redundant data is retransmitted from the base station in response to this request, the reception radio unit 13 and the synchronization / IFFT processing unit 14 extract a signal reception and redundant symbol sequence, and the signal separation / demodulation unit 15 extracts this symbol sequence. Is soft-decided.
 続いて、IRバッファ制御部30の制御によりIRバッファに記憶されているLLRデータが読み出され、このLLRデータと冗長のシンボル列のLLRデータとがHARQ合成処理部18により合成される。 Subsequently, the LLR data stored in the IR buffer is read out under the control of the IR buffer control unit 30, and the LLR data and the LLR data of the redundant symbol sequence are combined by the HARQ combining processing unit 18.
 そして、この合成されたLLRデータがターボ復号部19に送られて、元データの再度の復号処理が行われる。この合成されたLLRデータも、再度の復号エラーが生じたときのために、IRバッファ制御部30の制御によってサイズが調整されてIRバッファ20に格納される。
 このような受信処理を繰り返して、基地局から送信されたデータが受信されていく。
Then, the synthesized LLR data is sent to the turbo decoding unit 19, and the original data is decoded again. The synthesized LLR data is also adjusted in size under the control of the IR buffer control unit 30 and stored in the IR buffer 20 in case a second decoding error occurs.
By repeating such reception processing, data transmitted from the base station is received.
 この実施の形態1の無線通信装置によれば、上記の受信処理の途中、通信チャネルの品質が良好で受信された符合の誤りが少ないときには、IRバッファ20へ格納するLLRデータのサイズが小さくされてIRバッファ20へのアクセス量が少なくされる。したがって、IRバッファ20で消費される電力の削減を図ることができる。一方、通信チャネルの品質が悪くて受信された符号の誤りが多いときには、IRバッファ20へ格納するLLRデータのサイズが元のサイズに近づく方向に変更されるので、HARQプロセスによる再送合成利得の低下を回避することができる。 According to the radio communication apparatus of the first embodiment, during the above reception process, when the communication channel quality is good and the received code error is small, the size of the LLR data stored in the IR buffer 20 is reduced. Thus, the amount of access to the IR buffer 20 is reduced. Therefore, the power consumed by the IR buffer 20 can be reduced. On the other hand, when the quality of the communication channel is poor and the number of received code errors is large, the size of the LLR data stored in the IR buffer 20 is changed in a direction approaching the original size. Can be avoided.
 (実施の形態2)
 図7には、実施の形態2のIRバッファ20とIRバッファ制御部30の詳細を示すブロック図を示す。
(Embodiment 2)
FIG. 7 is a block diagram illustrating details of the IR buffer 20 and the IR buffer control unit 30 according to the second embodiment.
 実施の形態2は、IRバッファ20の使用率を低減する場合に、実施の形態1のように受信したシンボル列のLLRデータの個数を削減するのではなく、個々のLLRデータのビット幅を小さくしてIRバッファ20に格納するようにしたものである。 In the second embodiment, when the usage rate of the IR buffer 20 is reduced, the bit width of each LLR data is reduced instead of reducing the number of LLR data of the received symbol string as in the first embodiment. And stored in the IR buffer 20.
 実施の形態2のIRバッファ制御部30は、書き込み制御部31Aと、読み込み制御部32Aと、IRバッファ格納有効信号生成部33と、バッファ制御部34A等から構成される。 The IR buffer control unit 30 according to the second embodiment includes a write control unit 31A, a read control unit 32A, an IR buffer storage valid signal generation unit 33, a buffer control unit 34A, and the like.
 書き込み制御部31Aは、実施の形態1と同様に、HARQ合成処理部18から供給されるLLRデータと、IRバッファ格納有効信号生成部33から出力されるバッファイネーブルの信号とを、それぞれ受ける。そして、書き込み制御部31Aは、バッファイネーブルが有効のときに供給されたLLRデータをIRバッファ20へ書き込んでいく。さらに、実施の形態2の書き込み制御部31Aは、バッファ制御部34Aから右ビットシフト量のデータ(right bit shift value)を受ける。そして、LLRデータをIRバッファ20へ書き込む際に、LLRデータに対して上記右ビットシフト量だけビットシフトを行って、個々のLLRデータのビット幅を縮小する。その上で、書き込み制御部31Aは、このLLRデータをIRバッファ20へ書き込んでいく。 As with the first embodiment, the write control unit 31A receives the LLR data supplied from the HARQ synthesis processing unit 18 and the buffer enable signal output from the IR buffer storage valid signal generation unit 33. Then, the write control unit 31A writes the LLR data supplied when the buffer enable is valid to the IR buffer 20. Furthermore, the write control unit 31A according to the second embodiment receives right bit shift amount data (right bit shift value) from the buffer control unit 34A. When the LLR data is written to the IR buffer 20, the LLR data is bit-shifted by the right bit shift amount to reduce the bit width of each LLR data. Then, the write control unit 31A writes this LLR data to the IR buffer 20.
 図8Aには、書き込み制御部31Aにより行われるLLRデータのビットシフト処理を説明する図を示す。例えば、HARQ合成処理部18から供給された1つのLLRデータが8bitであり、右ビットシフト量が4bitであった場合、図8Aに示すように、書き込み制御部31Aは、上位4ビットを下位方向へビットシフトして、下位4ビットを切り捨てる。このビットシフトにより、個々のLLRデータのビット幅が半分にされ、且つ、個々のLLRデータの値が上位4桁の値に丸め(端数処理)られたのと同様の作用が得られる。なお、このビットシフトの際、切り捨てられるビットの最上位の値が「1」である場合に、書き込み制御部31Aは、残されるビットの最下位ビットに「1」を加算して、四捨五入のように端数処理の誤差が累積しないようにしても良い。 FIG. 8A shows a diagram for explaining bit shift processing of LLR data performed by the write control unit 31A. For example, when one LLR data supplied from the HARQ synthesis processing unit 18 is 8 bits and the right bit shift amount is 4 bits, as shown in FIG. 8A, the write control unit 31A converts the upper 4 bits into the lower direction. Bit shift to the lower 4 bits. By this bit shift, the bit width of the individual LLR data is halved, and the same effect as when the value of the individual LLR data is rounded (rounded) to the upper 4 digits is obtained. In this bit shift, when the most significant value of the bits to be discarded is “1”, the write control unit 31A adds “1” to the least significant bit of the remaining bits and rounds off. It is also possible to prevent the fraction processing error from accumulating.
 読み込み制御部32Aは、実施の形態1と同様に、IRバッファ格納有効信号生成部33から出力されるバッファイネーブルの信号を受けて、バッファイネーブルが有効のときにHARQプロセスに同期してIRバッファ20からLLRデータを読み出す。そして、読み込み制御部32Aは、読み出したLLRデータをHARQ合成処理部18へ出力する。さらに、実施の形態2の読み込み制御部32Aは、バッファ制御部34Aから左ビットシフト量のデータ(left bit shift value)を受ける。そして、読み込み制御部32Aは、LLRデータをIRバッファ20から読み出す際に、個々のLLRデータに対して上記左ビットシフト量だけビットシフトを行って、個々のLLRデータのビット幅を元に戻す。その上で、読み込み制御部32Aは、このLLRデータをHARQ合成処理部18へ送る。 Similar to the first embodiment, the read control unit 32A receives the buffer enable signal output from the IR buffer storage valid signal generation unit 33, and synchronizes with the HARQ process when the buffer enable is valid. Read LLR data from. Then, the read control unit 32A outputs the read LLR data to the HARQ synthesis processing unit 18. Furthermore, the read control unit 32A according to the second embodiment receives left bit shift amount data (left bit shift value) from the buffer control unit 34A. Then, when reading the LLR data from the IR buffer 20, the read control unit 32A performs bit shift on the individual LLR data by the left bit shift amount, and restores the bit width of the individual LLR data. After that, the read control unit 32A sends the LLR data to the HARQ synthesis processing unit 18.
 図8Bには、読み込み制御部32Aにより行われるLLRデータのビットシフト処理を説明する図を示す。例えば、左ビットシフト量が4bitで、IRバッファ20に4bit幅のLLRデータが格納されている場合、読み込み制御部32Aは、シフト前のビット列を上位方向へビットシフトして、下位4ビットをゼロ値で詰める。このビットシフトにより、個々のLLRデータの値が上位4桁の値に丸められたまま、LLRデータのビット幅が元に戻される。従って、HARQ合成処理部18は、LLRデータの合成処理で、通常の処理動作でLLRデータの合成を行うことができる。また、ビットシフトによるビット幅の縮小・拡大に起因したLLRデータ値の誤差は下位数桁分の切り捨て分に留まる。 FIG. 8B is a diagram illustrating the bit shift processing of LLR data performed by the read control unit 32A. For example, when the left bit shift amount is 4 bits and the 4-bit-wide LLR data is stored in the IR buffer 20, the read control unit 32A bit-shifts the bit string before the shift in the upper direction and sets the lower 4 bits to zero. Pack with values. By this bit shift, the bit width of the LLR data is restored to the original while the values of the individual LLR data are rounded to the upper 4 digits. Therefore, the HARQ synthesis processing unit 18 can synthesize LLR data by a normal processing operation in the LLR data synthesis process. In addition, the error of the LLR data value due to the reduction / expansion of the bit width due to the bit shift is limited to the lower-order digits.
 バッファ制御部34Aは、次に示すように、制御ユニット50から供給される制御情報に基づいてIRバッファ20に格納するLLRデータのビット幅を決定する。そして、バッファ制御部34Aは、このビット幅に対応する右ビットシフト量のデータ(right bit shift value)と左ビットシフト量のデータ(left bit shift value)とを書き込み制御部31Aと読み込み制御部32Aとにそれぞれ出力する。 The buffer control unit 34A determines the bit width of the LLR data stored in the IR buffer 20 based on the control information supplied from the control unit 50 as shown below. Then, the buffer control unit 34A writes the right bit shift amount data (right bit shift value) and the left bit shift amount data (left bit shift value) corresponding to the bit width to the write control unit 31A and the read control unit 32A. And output respectively.
 図9には、バッファ制御部34Aの動作を説明するフローチャートを示す。このフローチャートにおいて、IRバッファ20の全使用サイズを決定するまでの処理(ステップ301~313)は、実施の形態1と同様である。 FIG. 9 shows a flowchart for explaining the operation of the buffer control unit 34A. In this flowchart, the processing (steps 301 to 313) until the total use size of the IR buffer 20 is determined is the same as in the first embodiment.
 ステップ313でIRバッファ20の全使用サイズを決定したら、次いで、バッファ制御部34Aは、制御ユニット50から通知されているHARQプロセス数、コードブロック数および無線伝送モードの情報から、IRバッファ20に格納するLLRデータのビット幅を次のように決定する。すなわち、複数のHARQプロセスは並列的に実行されるので、バッファ制御部34Aは、これら複数のHARQプロセスでそれぞれ格納されるLLRデータのトータルサイズの最大値が上記決定された全使用サイズとなるように、各HARQプロセスごとにIRバッファ20の全使用サイズを分配する。なお、LTE-TDD方式の無線接続が選択されている場合には、バッファ制御部34Aは、複数のHARQプロセスで均等にIRバッファ20の全使用サイズを振り分けるようにしてよい。そして、バッファ制御部34Aは、各HARQプロセスに分配された各バッファサイズに、送信されてくる1セットのシンボル列の始端から終端までがそれぞれ収まるように、LLRデータのビット幅を決定する(ステップ701)。 When the total use size of the IR buffer 20 is determined in step 313, the buffer control unit 34A then stores the information in the IR buffer 20 from the HARQ process number, code block number, and radio transmission mode information notified from the control unit 50. The bit width of the LLR data to be determined is determined as follows. That is, since a plurality of HARQ processes are executed in parallel, the buffer control unit 34A causes the maximum value of the total size of the LLR data stored in each of the plurality of HARQ processes to be the above-determined total use size. The total used size of the IR buffer 20 is distributed to each HARQ process. When the LTE-TDD wireless connection is selected, the buffer control unit 34A may distribute all the used sizes of the IR buffer 20 evenly in a plurality of HARQ processes. Then, the buffer control unit 34A determines the bit width of the LLR data so that each buffer size distributed to each HARQ process fits from the start end to the end of a set of transmitted symbol sequences (step). 701).
 図10Aは、IRバッファ20の使用率が100%のときのLLRデータの格納状態を説明する図、図10Bは、IRバッファ20の使用率が低く設定されたときのLLRデータの格納状態の一例を説明する図である。図10Aに示すように、回線品質が良好でなくIRバッファ20の使用率が100%のときには、受信されたシンボル列の全てのLLRデータがビット幅を削減することなくIRバッファ20に格納される。一方、図10Bに示すように、回線品質が良好でIRバッファ20の使用率が低く設定されているときには、受信されたシンボル列の全てのLLRデータが一律にビット幅を縮小されてIRバッファ20に格納される。図10A,Bにおいて網掛けによりLLRデータの格納部分を示している。 FIG. 10A is a diagram for explaining the storage state of LLR data when the usage rate of the IR buffer 20 is 100%, and FIG. 10B is an example of the storage state of LLR data when the usage rate of the IR buffer 20 is set low. FIG. As shown in FIG. 10A, when the line quality is not good and the usage rate of the IR buffer 20 is 100%, all the LLR data of the received symbol sequence is stored in the IR buffer 20 without reducing the bit width. . On the other hand, as shown in FIG. 10B, when the line quality is good and the usage rate of the IR buffer 20 is set low, all the LLR data of the received symbol sequence are uniformly reduced in bit width, and the IR buffer 20 Stored in In FIGS. 10A and 10B, the LLR data storage portion is shown by shading.
 なお、実施の形態2ではバッファ制御部34AからIRバッファ格納有効信号生成部33へ出力される格納サイズ情報(LLR size)は、UEカテゴリの規定サイズに従った値となる。従って、IRバッファ格納有効信号生成部33は、デレートマッチ部16から送られてくるサーキュラバッファ17のリードアドレスの範囲に因らずにバッファイネーブルを有効とする。 In the second embodiment, the storage size information (LLR size) output from the buffer control unit 34A to the IR buffer storage valid signal generation unit 33 is a value according to the prescribed size of the UE category. Therefore, the IR buffer storage valid signal generation unit 33 validates the buffer enable regardless of the read address range of the circular buffer 17 sent from the derate matching unit 16.
 この実施の形態2の無線通信装置によれば、通信チャネルの品質が良好で受信された符合の誤りが少ないときには、各HARQプロセスでIRバッファ20に格納されるLLRデータのビットサイズが小さくされるので、IRバッファ20へのアクセス量が少なくなる。したがって、IRバッファ20で消費される電力の削減を図ることができる。一方、通信チャネルの品質が悪くて受信された符号の誤りが多いときには、各HARQプロセスでIRバッファ20へ格納されるLLRデータのビット幅が元に戻される方向に変化するので、HARQプロセスの再送合成利得の低下を回避できる。 According to the radio communication apparatus of the second embodiment, when the communication channel quality is good and the received code error is small, the bit size of the LLR data stored in the IR buffer 20 in each HARQ process is reduced. Therefore, the access amount to the IR buffer 20 is reduced. Therefore, the power consumed by the IR buffer 20 can be reduced. On the other hand, when the quality of the communication channel is poor and the number of received code errors is large, the bit width of the LLR data stored in the IR buffer 20 in each HARQ process changes in the direction in which it is restored. A reduction in the combined gain can be avoided.
 (実施の形態3)
 図11には、実施の形態3のIRバッファとIRバッファ制御部との詳細を示すブロック図を示す。
(Embodiment 3)
FIG. 11 is a block diagram showing details of the IR buffer and IR buffer control unit of the third embodiment.
 実施の形態3は、IRバッファ20を個別に電源制御が可能な複数のバッファブロック20A~20Fから構成したものである。そして、実施の形態3では、IRバッファ20の使用率を低減する際、バッファブロック20A~20Fのうち使用しないブロックの電源をオフに切り換えて、消費電力をより低減するようにしている。 In the third embodiment, the IR buffer 20 is composed of a plurality of buffer blocks 20A to 20F that can individually control power. In Embodiment 3, when the usage rate of the IR buffer 20 is reduced, the power of the unused blocks among the buffer blocks 20A to 20F is switched off to further reduce the power consumption.
 バッファブロック20A~20Fは、それぞれ異なるサイズ(一部同一サイズでも良い)に分割されており、ブロックの組み合わせを変化させることでブロックの合計サイズを多数のサイズの中から選択できるようになっている。後述する表2の“ブロックA”~“ブロックF”の各欄に、バッファブロック20Aのサイズが“518400bit”、バッファブロック20Bのサイズが“259200bit”等、各バッファブロック20A~20Fのサイズを併記している。 The buffer blocks 20A to 20F are divided into different sizes (some may be the same size), and the total block size can be selected from a large number of sizes by changing the combination of the blocks. . The sizes of the buffer blocks 20A to 20F, such as the size of the buffer block 20A being “518400 bits” and the size of the buffer block 20B being “259200 bits”, are described in each column of “Block A” to “Block F” in Table 2 to be described later. is doing.
 実施の形態3のIRバッファ制御部30は、図11に示すように、書き込み制御部31Bと、読み込み制御部32Bと、IRバッファ格納有効信号生成部33と、バッファ制御部34Bを備えている。 As shown in FIG. 11, the IR buffer control unit 30 of the third embodiment includes a write control unit 31B, a read control unit 32B, an IR buffer storage valid signal generation unit 33, and a buffer control unit 34B.
 書き込み制御部31Bは、実施の形態2の書き込み制御部31Aの動作に加え、ライトアドレスとライトデータとをバッファブロック20A~20Fのうち対応するブロックへ振り分けて出力するように構成されている。また、書き込み制御部31Bは、HARQプロセスで一連のLLRデータを順次書き込んでいく際に、バッファブロック20A~20Fのうち電源オンされているブロックのアドレスがライトアドレスとして順に生成されていくように一連のアドレス生成を行う機能を有している。 In addition to the operation of the write control unit 31A of the second embodiment, the write control unit 31B is configured to distribute and output a write address and write data to the corresponding block among the buffer blocks 20A to 20F. Further, when the write control unit 31B sequentially writes a series of LLR data in the HARQ process, the write control unit 31B sequentially generates the addresses of blocks that are powered on among the buffer blocks 20A to 20F as write addresses. Has a function of generating addresses.
 読み込み制御部32Bは、実施の形態2の読み込み制御部32Aの動作に加え、リードアドレスをバッファブロック20A~20Fのうち対応するブロックへ振り分けて出力して、対応するブロックからリードデータを読み込むように構成されている。また、読み込み制御部32Bは、HARQプロセスで一連のLLRデータを読み出していく際に、バッファブロック20A~20Fのうち電源オンされているブロックのアドレスがリードアドレスとして順に生成されていくように一連のアドレス生成を行う機能を有している。 In addition to the operation of the read control unit 32A of the second embodiment, the read control unit 32B distributes and outputs the read address to the corresponding block among the buffer blocks 20A to 20F, and reads the read data from the corresponding block. It is configured. In addition, when reading the series of LLR data in the HARQ process, the read control unit 32B sequentially generates the addresses of the blocks that are powered on among the buffer blocks 20A to 20F as read addresses. It has a function to generate an address.
 図11では省略しているが、上記の書き込み制御部31Bのアドレス生成機能と読み込み制御部32Bのアドレス生成機能を実現するために、バッファ制御部34Bは、例えば、バッファブロック20A~20Fの電源オン・オフの情報を、書き込み制御部31Bと読み込み制御部32Bへ送るように構成されている。或いは、バッファ制御部34Bは、1つのHARQプロセスごとに、自動生成に使用するアドレス範囲を適宜選択して、このアドレス範囲の情報を書き込み制御部31Bと読み込み制御部32Bとへ送るように構成してもよい。これにより、上記のアドレス生成が実現される。 Although omitted in FIG. 11, in order to realize the address generation function of the write control unit 31B and the address generation function of the read control unit 32B, the buffer control unit 34B, for example, turns on the power of the buffer blocks 20A to 20F. It is configured to send off information to the write control unit 31B and the read control unit 32B. Alternatively, the buffer control unit 34B is configured to appropriately select an address range used for automatic generation for each HARQ process, and to send information on this address range to the write control unit 31B and the read control unit 32B. May be. Thereby, the above address generation is realized.
 バッファ制御部34Bは、制御ユニット50から供給される制御情報に基づいてIRバッファ20に格納するLLRデータのデータ長とビット幅とを決定する。そして、バッファ制御部34Bは、このビット幅に対応する右ビットシフト量データと左ビットシフト量データとを書き込み制御部31Aと読み込み制御部32Aとにそれぞれ出力する。さらに、バッファ制御部34Bは、バッファブロック20A~20Fのうち使用するブロックと非使用のブロックとを決定して、これらの電源オン・オフを切り換える信号“Power ON/OFF”を出力する。次に、これらの動作の詳細を説明する。 The buffer control unit 34B determines the data length and bit width of the LLR data stored in the IR buffer 20 based on the control information supplied from the control unit 50. Then, the buffer control unit 34B outputs the right bit shift amount data and the left bit shift amount data corresponding to the bit width to the write control unit 31A and the read control unit 32A, respectively. Further, the buffer control unit 34B determines which of the buffer blocks 20A to 20F are used and which block is not used, and outputs a signal “Power ON / OFF” for switching these power on / off. Next, details of these operations will be described.
 図12Aと図12Bには、実施の形態3のバッファ制御部34Bの動作を説明するフローチャートを示す。このフローチャートにおいて、ステップ301~312の処理は実施の形態1のものと同様である。 12A and 12B are flowcharts for explaining the operation of the buffer control unit 34B according to the third embodiment. In this flowchart, the processing in steps 301 to 312 is the same as that in the first embodiment.
 実施の形態3では、IRバッファ20の使用率の切り換えを80%以上の範囲では行われないようにするため、バッファ制御部34Bは、ステップ311または312で使用率の設定を段階的に変更したら、処理をステップ1001へ進める。そして、バッファ制御部34Bは、この時点で設定されているIRバッファ20の使用率が80%以上であるか判定する(ステップ1001)。その結果、80%より小さければ、バッファ制御部34Bの処理は、そのままステップ1003へ進む。一方、80%以上であればバッファ制御部34Bは、IRバッファ20の使用率を100%に設定し、かつ、内部変数である内部ループ回数を「0」にセットする(ステップ1002)。そして、バッファ制御部34Bは処理をステップ1003へ進める。 In the third embodiment, in order to prevent the usage rate of the IR buffer 20 from being switched in the range of 80% or more, the buffer control unit 34B may change the usage rate setting stepwise in step 311 or 312. , The process proceeds to step 1001. Then, the buffer control unit 34B determines whether the usage rate of the IR buffer 20 set at this time is 80% or more (step 1001). If the result is less than 80%, the processing of the buffer control unit 34B proceeds to step 1003 as it is. On the other hand, if it is 80% or more, the buffer control unit 34B sets the usage rate of the IR buffer 20 to 100% and sets the number of internal loops, which is an internal variable, to “0” (step 1002). Then, the buffer control unit 34B advances the process to step 1003.
 ステップ304,307,311,312,1002でIRバッファ20の使用率が決定されてステップ1003へ進んだら、バッファ制御部34は、IRバッファの規定サイズに使用率を乗算する。そして、バッファ制御部34は、この計算結果のサイズを、LLRデータを格納するIRバッファ20の全使用サイズとして決定する。さらに、バッファ制御部34は、この全使用サイズが確保されるようにバッファブロック20A~20Fのうち電源オンにするブロックとオフにするブロックとを決定する(ステップ1003)。 When the usage rate of the IR buffer 20 is determined in steps 304, 307, 311, 312, and 1002, and the processing proceeds to step 1003, the buffer control unit 34 multiplies the specified size of the IR buffer by the usage rate. Then, the buffer control unit 34 determines the size of the calculation result as the total use size of the IR buffer 20 that stores the LLR data. Further, the buffer control unit 34 determines a block to be turned on and a block to be turned off among the buffer blocks 20A to 20F so as to ensure the total use size (step 1003).
Figure JPOXMLDOC01-appb-T000002
Figure JPOXMLDOC01-appb-T000002
 この表の“ブロックA~ブロックF”の列に、各条件におけるバッファブロック20A~20Fの電源オン・オフ(“1”がオン、“0”がオフ)の決定パターンをそれぞれ示す。バッファ制御部34は、例えば、UEカテゴリがLTEのカテゴリでIRバッファの使用率が70%に決定されていれば、ステップ1003において、3つのバッファブロック20A,20C,20Dを電源オンにするブロックに決定する。これにより、IRバッファ20の全使用サイズ“864000bit”が確保される。また、UEカテゴリがHSPA+のカテゴリ20でIRバッファの使用率が35%に決定されていれば、バッファ制御部34は、ステップ1003において、バッファブロック20Cを電源オンにするブロックに決定する。これにより、IRバッファ20の全使用サイズ“172800bit”が確保される。 In the column of “Block A to Block F” in this table, determination patterns of power on / off (“1” is on and “0” is off) of the buffer blocks 20A to 20F under each condition are shown. For example, if the UE category is the LTE category and the IR buffer usage rate is determined to be 70%, the buffer control unit 34 sets the three buffer blocks 20A, 20C, and 20D to power on in step 1003. decide. As a result, the total used size “864000 bits” of the IR buffer 20 is secured. If the UE category is HSPA + category 20 and the usage rate of the IR buffer is determined to be 35%, the buffer control unit 34 determines in step 1003 that the buffer block 20C is a block to be powered on. As a result, the total use size “172800 bits” of the IR buffer 20 is secured.
 ステップ1003で電源オン・オフを切り換えるブロックを決定したら、バッファ制御部34は、この決定に従って電源オン・オフを切り換える信号を各バッファブロック20A~20Fに出力する。 When the block for switching power on / off is determined in Step 1003, the buffer control unit 34 outputs a signal for switching power on / off to each of the buffer blocks 20A to 20F according to this determination.
 続いて、バッファ制御部34は、ステップ1003で決定されたIRバッファ20の全使用サイズと、制御ユニット50から通知されているHARQプロセス数、コードブロック数および無線伝送モードの情報から、IRバッファ20に格納するLLRデータのデータ長(LLRの個数)と、個々のLLRデータのビット幅を、次のように決定する。すなわち、複数のHARQプロセスでIRバッファ20に格納されるLLRデータのトータルサイズの最大値が上記決定された全使用サイズとなり、且つ、各HARQプロセスにおけるLLRデータの削減の影響が偏らないように、バッファ制御部34は、上記LLRデータのデータ長(LLRの個数)とビット幅とを決定する(ステップ1004)。そして、バッファ制御部34は、この決定されたLLRデータのデータ長を格納サイズ情報(LLR size)としてIRバッファ格納有効信号生成部33に出力する。さらに、バッファ制御部34は、上記決定されたビット幅に対応させて書き込み制御部31Bへ右ビットシフト量データ(right bit shift value)と読み込み制御部32Bへ左ビットシフト量データ(left bit shift value)とを出力する。 Subsequently, the buffer control unit 34 determines the IR buffer 20 based on the total use size of the IR buffer 20 determined in Step 1003 and the information on the number of HARQ processes, the number of code blocks, and the radio transmission mode notified from the control unit 50. The data length (number of LLRs) of the LLR data stored in and the bit width of each LLR data are determined as follows. That is, the maximum value of the total size of the LLR data stored in the IR buffer 20 in a plurality of HARQ processes becomes the determined total use size, and the influence of the reduction of the LLR data in each HARQ process is not biased. The buffer control unit 34 determines the data length (number of LLRs) and bit width of the LLR data (step 1004). Then, the buffer control unit 34 outputs the determined data length of the LLR data to the IR buffer storage effective signal generation unit 33 as storage size information (LLR size). Further, the buffer control unit 34 associates the determined bit width with the right bit shift amount data (right bit へ shift value) to the write control unit 31B and the left bit shift amount data (left bit shift value) to the read control unit 32B. ) Is output.
 IRバッファ格納有効信号生成部33は、実施の形態1のものと同様に動作する。すなわち、IRバッファ格納有効信号生成部33は、上記格納サイズ情報と、サーキュラバッファ17のリードアドレスを入力する。そして、IRバッファ格納有効信号生成部33は、このリードアドレスと上記の格納サイズ情報に基づき決定されるアドレス範囲17b(図5参照)とを比較して、この比較結果に基づきバッファイネーブルの有効と無効とを切り換える。 The IR buffer storage valid signal generator 33 operates in the same manner as in the first embodiment. That is, the IR buffer storage valid signal generation unit 33 inputs the storage size information and the read address of the circular buffer 17. The IR buffer storage valid signal generation unit 33 compares the read address with the address range 17b (see FIG. 5) determined based on the storage size information, and determines whether the buffer enable is valid based on the comparison result. Switch between disabled.
 この実施の形態3の無線通信装置によれば、HARQプロセスでIRバッファ20へ格納するLLRデータのデータ長またはビット幅が小さくされて、IRバッファ20の全使用サイズが削減される際、バッファブロック20A~20Fのうち使用されないブロックの電源がオフにされる。従って、LLRデータのサイズ削減によりIRバッファ20で消費される電力をより低減することができる。 According to the wireless communication apparatus of the third embodiment, when the data length or bit width of the LLR data stored in the IR buffer 20 is reduced by the HARQ process and the total use size of the IR buffer 20 is reduced, the buffer block Of the 20A to 20F, the power of the unused blocks is turned off. Therefore, the power consumed by the IR buffer 20 can be further reduced by reducing the size of the LLR data.
 なお、上記実施の形態1~3では、通信チャネルの品質を表わす品質情報として、CQI、PER、および、HARQプロセスによる再送回数を適用した例を示している。しかし、品質情報としては、無線信号のドップラーシフト周波数、または、無線信号の遅延スプレッドを含めるようにしてもよい。また、上記実施の形態1~3では、HSPA+とLTEの無線接続方式、MIMOとそれ以外の無線伝送モードとをそれぞれ切換え可能な構成を示しているが、無線接続方式と無線伝送モードは固定としてもよい。また、上記実施の形態1~3では、受信されたシンボル列の軟判定データとしてLLRを適用した例を示しているが、シンボル列の尤度を表わすものであれば別の関数値を適用してもよい。 In the first to third embodiments, examples in which the number of retransmissions by CQI, PER, and HARQ process are applied as quality information indicating the quality of the communication channel are shown. However, the quality information may include the Doppler shift frequency of the radio signal or the delay spread of the radio signal. In the first to third embodiments, a configuration is shown in which the HSPA + and LTE wireless connection schemes, MIMO and other wireless transmission modes can be switched, but the wireless connection scheme and the wireless transmission mode are fixed. Also good. In the first to third embodiments, an example is shown in which LLR is applied as soft decision data of a received symbol string. However, another function value is applied if it represents the likelihood of a symbol string. May be.
 2011年6月29日出願の特願2011-144411の日本出願に含まれる明細書、図面および要約書の開示内容は、すべて本願に援用される。 The disclosure of the specification, drawings and abstract contained in the Japanese application of Japanese Patent Application No. 2011-144411 filed on June 29, 2011 is incorporated herein by reference.
 本発明に係る受信装置は、例えばHSPA+およびLTEの無線接続方式の通信端末に適用できる。 The receiving apparatus according to the present invention can be applied to, for example, communication terminals using HSPA + and LTE wireless connection methods.
 16 デレートマッチ部
 17 サーキュラバッファ
 18 HARQ合成処理部
 19 ターボ復号部
 20 IRバッファ
 30 IRバッファ制御部
 31,31A,31B 書き込み制御部
 32,32A,32B 読み込み制御部
 33 IRバッファ格納有効信号生成部
 34,34A,34B バッファ制御部
 
 
16 Derate match unit 17 Circular buffer 18 HARQ synthesis processing unit 19 Turbo decoding unit 20 IR buffer 30 IR buffer control unit 31, 31A, 31B Write control unit 32, 32A, 32B Read control unit 33 IR buffer storage valid signal generation unit 34 , 34A, 34B Buffer control unit

Claims (9)

  1.  受信信号から抽出されたシンボル列の軟判定データを記憶するバッファと、
     前記シンボル列から元データの復号処理を行うとともに、元データが復元できなかった場合に、前記バッファに記憶された前記軟判定データと再送された受信信号のシンボル列とに基づいて再度の元データの復号処理を行う復号部と、
     通信チャネルの品質を表わす品質情報に基づいて、前記バッファへ書き込む前記軟判定データの格納サイズを変更するバッファ制御部と、
     を備える受信装置。
    A buffer for storing soft decision data of a symbol sequence extracted from a received signal;
    The original data is decoded from the symbol sequence, and when the original data cannot be restored, the original data is regenerated based on the soft decision data stored in the buffer and the retransmitted symbol sequence of the received signal. A decoding unit for performing the decoding process of
    A buffer control unit that changes a storage size of the soft decision data to be written to the buffer based on quality information indicating a quality of a communication channel;
    A receiving device.
  2.  前記バッファ制御部は、前記品質情報と、信号の伝送方式を表わす方式情報とに基づいて、前記軟判定データの格納サイズを変更する、
     請求項1記載の受信装置。
    The buffer control unit changes the storage size of the soft decision data based on the quality information and system information representing a signal transmission system.
    The receiving device according to claim 1.
  3.  前記バッファは、電源のオン・オフを個別に切り換え可能な複数のバッファブロックを有し、
     前記バッファ制御部は、前記軟判定データの格納サイズの変更により前記複数のバッファブロックのうち使用されなくなったバッファブロックの電源をオフに切り換える、
     請求項1記載の受信装置。
    The buffer has a plurality of buffer blocks that can be switched on and off individually,
    The buffer control unit switches off the power of a buffer block that is no longer used among the plurality of buffer blocks due to a change in the storage size of the soft decision data.
    The receiving device according to claim 1.
  4.  前記バッファ制御部は、個々の前記軟判定データのビット幅を縮小または拡大することにより前記軟判定データの格納サイズを変更する、
     請求項1記載の受信装置。
    The buffer control unit changes the storage size of the soft decision data by reducing or expanding the bit width of each of the soft decision data.
    The receiving device according to claim 1.
  5.  前記バッファ制御部の制御に応じた格納サイズで前記軟判定データを前記バッファへ書き込む書き込み制御部と、
     前記再度の復号処理が行われる場合に、前記バッファ制御部の制御に応じた格納サイズで前記軟判定データを前記バッファから読み出す読み込み制御部と、
     をさらに備える請求項1記載の受信装置。
    A write control unit for writing the soft decision data into the buffer with a storage size according to the control of the buffer control unit;
    A read control unit that reads the soft decision data from the buffer with a storage size according to the control of the buffer control unit when the decoding process is performed again;
    The receiving device according to claim 1, further comprising:
  6.  前記個々の軟判定データの下位ビットを破棄して前記バッファ制御部の制御に応じたビット幅に変更するとともに、当該ビット幅の変更された軟判定データを前記バッファへ書き込む書き込み制御部と、
     前記再度の復号処理が行われる場合に、前記ビット幅の変更された軟判定データを前記バッファから読み出すとともに、任意の下位ビットを補填して元のビット幅に戻す読み込み制御部と、
     をさらに備える請求項4記載の受信装置。
    A write control unit that discards the lower bits of the individual soft decision data and changes the bit width according to the control of the buffer control unit, and writes the soft decision data with the changed bit width to the buffer;
    When the decoding process is performed again, the soft-decision data whose bit width has been changed is read from the buffer, and a read control unit that makes up any lower bits and restores the original bit width;
    The receiving device according to claim 4, further comprising:
  7.  前記品質情報には、基地局へのフィードバック用に生成されるチャネル品質インジケータ、受信パケットのエラーレート、受信信号の再送回数、無線信号のドップラーシフト周波数、または、無線信号の遅延スプレッドが含まれる、
     請求項1記載の受信装置。
    The quality information includes a channel quality indicator generated for feedback to the base station, an error rate of the received packet, the number of retransmissions of the received signal, a Doppler shift frequency of the radio signal, or a delay spread of the radio signal.
    The receiving device according to claim 1.
  8.  前記方式情報には、無線接続方式の情報、または、無線伝送モードの情報が含まれる、
     請求項2記載の受信装置。
    The method information includes wireless connection method information or wireless transmission mode information.
    The receiving device according to claim 2.
  9.  受信信号から抽出されたシンボル列の軟判定データをバッファに記憶し、
     前記シンボル列から元データを復元できなかった場合に、前記バッファに記憶された前記軟判定データと再送された受信信号のシンボル列とに基づいて元データの再度の復号処理を行い、
     通信チャネルの品質を表わす品質情報に基づいて、前記バッファへ書き込む前記軟判定データの格納サイズを変更する、
     バッファ制御方法。
    The soft decision data of the symbol sequence extracted from the received signal is stored in a buffer,
    When the original data could not be restored from the symbol sequence, the original data is decoded again based on the soft decision data stored in the buffer and the retransmitted symbol sequence of the received signal,
    Based on the quality information representing the quality of the communication channel, the storage size of the soft decision data to be written to the buffer is changed.
    Buffer control method.
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