WO2012149775A1 - Procédé et dispositif de traitement de données - Google Patents

Procédé et dispositif de traitement de données Download PDF

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Publication number
WO2012149775A1
WO2012149775A1 PCT/CN2011/080280 CN2011080280W WO2012149775A1 WO 2012149775 A1 WO2012149775 A1 WO 2012149775A1 CN 2011080280 W CN2011080280 W CN 2011080280W WO 2012149775 A1 WO2012149775 A1 WO 2012149775A1
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WIPO (PCT)
Prior art keywords
data
type
units
unit
packet
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PCT/CN2011/080280
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English (en)
Chinese (zh)
Inventor
王工艺
陈昊
郑伟
常胜
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华为技术有限公司
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Publication date
Application filed by 华为技术有限公司 filed Critical 华为技术有限公司
Priority to CN201180001883.2A priority Critical patent/CN102388385B/zh
Priority to PCT/CN2011/080280 priority patent/WO2012149775A1/fr
Publication of WO2012149775A1 publication Critical patent/WO2012149775A1/fr

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Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/14—Channel dividing arrangements, i.e. in which a single bit stream is divided between several baseband channels and reassembled at the receiver

Definitions

  • Embodiments of the present invention relate to the field of domain data processing and, more particularly, to methods and apparatus for data processing. Background technique
  • ASIC APPLICATION SPECIFIC INTEGRATED CIRCUITS, ASIC
  • FPGA Field PROGRAMMABLE GATE ARRAY
  • a variety of data packets are defined in the QPI (Quick Path Interconnect) protocol. Some of the data packets are of a certain length, and some of the data packets are variable in length.
  • the NCS (Non Coherent Standard) package is a variable length packet, usually composed of 1 to 3 data units (ie, flit), where each data unit flit is fixed length, for example, 80 bits (bit). The length of the variable length NCS packet is available in the first flit.
  • NCS1 denotes an NCS packet of length 1 flit, that is, only one header flit( header flit );
  • NCS2 denotes an NCS packet of length 2 flit, that is, contains one header flit and one data flit (data flit)
  • NCS3 represents an NCS packet with a length of 3 flits, that is, a header flit and two data flit.
  • data packets such as empty data packets. These other types of packets can be fixed length or variable length.
  • Embodiments of the present invention provide a data processing method and apparatus capable of performing alignment processing on a plurality of variable length packets based on a segmentation parallel mechanism.
  • a data processing method including: dividing, in order, input data including N data units corresponding to a current clock cycle into M data segments, where M and N are positive integers, and N is greater than or equal to 2 and M is smaller than N; performing an alignment operation on the first type of data unit in each of the M data segments in parallel, before shifting the first type of data unit to other types of data units, among other types of data
  • the units are all set to the null packet type, where the first type is the type of the packet to be processed, and the other type is the type of the packet that does not need to be processed; the M segments of the aligned data are combined into a data unit containing N data units.
  • an apparatus for data processing including: a segmentation unit, configured to sequentially divide input data including N data units corresponding to a current clock cycle into M data segments, where M and N are both a positive integer, N is greater than or equal to 2 and M is less than N; a parallel processing unit for performing an alignment operation on the first type of data unit in each of the M data segments in parallel, shifting the first type of data unit Before other types of data units, other types of data units are set to the empty packet type, the first type is the type of data packet to be processed, and the other type is the type of data packet that does not need to be processed;
  • the aligned M data segments are combined into output data containing N data units.
  • the data processing method and apparatus of the embodiments of the present invention segment the variable length packets and perform alignment operations on the segments in parallel, thereby facilitating maintenance of the design code, and improving code coverage during design code verification, and significantly improving timing. . DRAWINGS
  • FIG. 1 is a flow chart of a method of data processing in accordance with an embodiment of the present invention.
  • FIG. 2 is a structural diagram of an apparatus for data processing according to an embodiment of the present invention.
  • 3 is a block diagram of a parallel processing unit in accordance with an embodiment of the present invention.
  • FIG. 4 is a schematic diagram of a specific process of data processing according to an embodiment of the present invention. detailed description
  • the embodiment of the present invention proposes to divide the input data in each clock cycle into multiple data segments, wherein the lengths of the data segments may be equal or different.
  • one data segment includes 2 data units
  • another data segment includes 3 data units, and so on.
  • individual data units may belong to different types, but other types of data units do not exist between data units of the same type.
  • the alignment operation is performed in parallel on a plurality of data units of the same type for each data segment in each clock cycle. After the aligned data units are obtained, the data segments obtained by the segments are combined step by step, and finally the output data of each clock cycle in which the same type of data units are aligned is obtained.
  • the alignment operation in the embodiment of the present invention is only for the same type of data unit, different types of data units can perform alignment operations in different alignment processing devices, respectively. That is, only one data unit of the same type is aligned in one alignment processing device, and the data unit that the alignment processing device cannot process will be regarded as an empty data packet. It can be understood that the alignment operations for different types of data units can also be parallel in the same clock cycle.
  • the input data including N data units corresponding to the current clock cycle is sequentially divided into M data segments, where M and N are positive integers, N is greater than or equal to 2, and M is less than N.
  • N is an even number
  • N is an odd number
  • the data packet is located at the end of the N data after the alignment operation of the N data units, so the alignment result of the N data units is not affected.
  • 3 data units and 2 data can be used. Units are combined to solve the problem of odd data unit segmentation.
  • the data units in the current data segment are aligned in parallel based on the X unprocessed quantity identifiers, that is, the other types of data units in the current data segment are also set to the empty data packet type, and The first type of data unit is shifted to the data unit of the null packet type, thereby obtaining X rearrangement combinations.
  • X corresponds to the maximum number of data units included in the first type of data packet, and the unprocessed number identification is used to indicate the number of unprocessed data units in the first type of data packet.
  • the method of combining the data units in the data segment directly with the X unprocessed quantity identifiers to obtain the X rearrangement combinations can identify the data type of the data units in the data segment. Since the number of data units in a data segment is limited, it is easy to exhaust all combinations of data units and unprocessed data identification.
  • an input and output logical table in which two data units are combined with three unprocessed number identifiers and three data units are combined with three unprocessed number identifiers will be given. Referring to such a logical table, the result of alignment of the data units in the data segment can be directly obtained.
  • the unprocessed quantity identifier is represented by a binary number. For example, taking the NCS packet data type as an example, 2, b 00 indicates that there are no unprocessed NCS packet data units, 2, b 01 indicates that there is still one unprocessed NCS packet data unit, and 2'b 10 indicates that there are still 2 Unprocessed NCS packet data unit. For another example, if the data packet of other data types includes 5 data units, 2, b 100, 2'b 011, 2'b 010. 2, b 001 can be used to indicate the number of unprocessed data units.
  • a rearrangement combination is selected from the X rearrangement combinations according to the selection identifier outputted after the data unit alignment operation in the previous data segment of the current data segment, wherein the selection identifier is the above X One of the unprocessed quantity identifiers used to represent the number of unprocessed data units in the first type of data packet in the current data segment.
  • the selection flag of the last data segment output will be latched as the selection identifier for the first data segment alignment operation for the next clock cycle of the current clock cycle.
  • the two adjacent data segments are first combined to obtain a new data segment, and then the adjacent two new data segments are combined to finally obtain output data including N data units.
  • the data processing method of the embodiment of the present invention segments the variable length packets and performs alignment operations on the segments in parallel, thereby facilitating maintenance of the design code, and improving the code coverage rate during design code verification, and significantly improving the timing.
  • the apparatus 20 for data processing includes a segmentation unit 21, a parallel processing unit 22, and a combination unit 23.
  • the segmentation unit 21 is configured to sequentially divide the input data including N data units corresponding to the current clock cycle into M data segments, where M and N are positive integers, N is greater than or equal to 2, and M is less than N.
  • the parallel processing unit 22 is configured to perform an alignment operation on the first type of data units in each of the M data segments in parallel, before shifting the first type of data units to other types of data units, where other types
  • the data unit can be set to an empty packet type.
  • the first type is the type of packet to be processed, and the other types are the type of packet that does not need to be processed. Out of the data.
  • Parallel processing can also be implemented in each data segment, and the type of data is identified.
  • the parallel processing unit 22 further includes a parallel processing module 221 and a selection module 222.
  • the parallel processing module 221 is configured to perform an alignment operation on the data units in the current data segment in parallel based on the X unprocessed quantity identifiers respectively, to obtain X rearrangement combinations, where X corresponds to the data packet included in the first type.
  • the maximum number of data units, the unprocessed quantity identifier is used to indicate the number of unprocessed data units in the first type of data packet.
  • the parallel processing module 221 completes the identification of the data type by the comparison with the logical table, thereby setting other types of data units in the current data segment to the empty packet type.
  • the selecting module 222 is configured to select one rearrangement combination from the X rearrangement combinations according to the selection identifier outputted after the data unit alignment operation in the previous data segment of the current data segment, wherein the selection identifier is the X unprocessed quantity identifiers. One for indicating the number of unprocessed data units in the first type of data packet in the current data segment.
  • the parallel processing unit 22 may further include a latch module 223 for latching the last one The selection identifier of the data segment output is used as the selection identifier of the first data segment alignment operation of the next clock cycle of the current clock cycle.
  • the combining unit 23 of the data processing device 20 can sequentially and sequentially align the adjacent two adjacent operations.
  • the data segments are combined into output data comprising N data units, prior to shifting the first type of data units of the N data units to other types of data units.
  • the apparatus for data processing of the embodiment of the present invention segments the variable length packet and performs alignment operations on the segments in parallel, thereby facilitating maintenance of the design code, and improving code coverage during design code verification, and significantly improving timing. .
  • 8 flits need to be processed and stored in parallel, and these 8 flits can be a combination of any type of protocol packets, resulting in multiple possibilities for the same type of packets contained in 8 flits.
  • NCS package Take the NCS package as an example: there may be 0 to 8 NCS1s in 8 flits, or 0 to 4 NCS2s, or 0 to 3 NCS3s, or a combination of NCS1 or NCS2 or NCS3, or NCS packages and other packages.
  • the combination, and their position in the 8 flit is uncertain; and NCS2 or NCS3 may span multiple 8flit groups.
  • Table 1 below gives schematic input data for 8 flits corresponding to clocks N to N+3.
  • X means that there is no need to care about “bubbles", that is, empty packets, and "others” means packets of other data types except NCS.
  • ⁇ 2" , “_3” indicate the first flit belonging to the NCS, the second flit, and the third flit.
  • the eight flits processed at the same time contain three Flits of the NCS type, that is, one NCS 1 and two NCS3s. Among them, one NCS3 spans 8 flits, only one flit is in the 8 flits currently processed, and the other 2 flit are not in the 8 flits currently processed.
  • the clock N + 1 There is only one NCS type flit in the 8 flits processed at the same time. It is necessary to know that this data is the first data in NCS3 received in the last clock cycle. And so on.
  • the output data obtained by the method based on the segmentation parallel data processing according to the embodiment of the present invention as shown in Table 1 is as shown in Table 2 below.
  • NCS type data since only one type of data is processed, for example, only NCS type data is used in the example, other types of packets outside the NCS are identified as empty packets.
  • the data processing process based on segmentation parallelism is the process of "squeezing out" empty packets in segments and in parallel.
  • the input data with 8 flits is divided into 2 data segments for each 2 flit, and 4 data segments are produced in total. Then, the four data segments are aligned in parallel to obtain four sets of aligned data segments. Then, the four sets of data segments are combined into two units in parallel, and combined into a new data segment having four flit aligned. Finally, the two new data segments are combined into output data with 8 flit aligned.
  • two flit in each data segment combined with the unprocessed number identifier are also aligned in parallel, and three rearrangements are obtained.
  • the flit in the same NCS packet after segmentation will likely be split into different data segments, so using the "unprocessed number identifier" to indicate that there may be several flits in the NCS packet involved in the processing. Not processed.
  • the binary numbers 00, 01, and 10 are used to indicate that the number of unprocessed flits existing in the next data segment is 0, respectively. 1 or 2 pieces.
  • Table 3 below shows all 22 combinations of input and output for the parallel processing module to align 2 flit.
  • the combination of 8 flits is transformed into the output of 4 data segments through the segmentation operation, where the flit is aligned.
  • the two or two data segments are operated to achieve a reduction in complexity.
  • the alignment operations of the data segments of various lengths are all parallel, the timing is greatly improved.
  • FIG. 4 is a schematic diagram of a process of data processing according to an embodiment of the present invention.
  • PPM Parallel Process Module
  • PPM0 operates on flitO/1
  • PPM1 operates on flit2/3
  • PPM2 operates on flit4/5
  • PPM3 operates on flit6/7.
  • PPG Parallel Process Group
  • the unprocessed quantity of each parallel processing group identifies the contx differently, thus resulting in three different reordering combinations. Then, according to the selection identifier contxl outputted by the previous data segment, the remake combination result outputted by the current data segment is selected.
  • the unprocessed quantity identifier contx ranges from 0 to 2, indicating the number of unfinished remaining flits from external input data.
  • the selection identifier contx_q of the last data segment PPM3 is latched as the selection flag contxl of PPM0 for the flitO/1 operation of the next clock cycle. Since the parallel processing of PPG enables identification of data types, packets of other data types other than the NCS packet type are set to null packets. It can be seen that each alignment operation is a process of squeezing out unwanted "bubbles (empty packets)".
  • flitO is the head of the NCS1 flit (H)
  • flitl is the null packet (X)
  • reference table 3 corresponds to 2 b00, 2, b01 and 2
  • the output is:
  • the next selection identifier contxl 2, b00, the number of flits in the aligned data segment is 1 and the result of flit alignment.
  • the output is:
  • the next selection identifier contx 2, bl0, the number of flits in the aligned data segment is 1 and the result of flit alignment.
  • the next selection identifier contx 2, bl0, the number of flits in the aligned data segment is 2 and flit The result of the alignment.
  • the operation of 8 flits when the clock is (N + 1) is the same as that of the above 4 .
  • the two adjacent data segments are respectively combined by the first stage to obtain two new data segments, and each of the data segments has four flits, and the four flits.
  • the "bubble" between the fluts of the NCS type is gone.
  • the final output data including 8 flit is obtained, and all the "bubbles" between the fluts of the NCS type in the 8 flit are gone. Also, it can be seen that the number of flits of the NCS type in the eight flits of the current clock is five. This provides great convenience for subsequent storage operations.
  • the data processing method and apparatus of the embodiments of the present invention segment the variable length packets and perform alignment operations on the segments in parallel, thereby facilitating maintenance of the design code and improving the code for design code verification. Coverage, while significantly improving timing.
  • a program product which can enable a processor running the program product to implement the following functions: First, the input data including N data units corresponding to the current clock cycle is sequentially divided into M pieces. a data segment, wherein M and N are both positive integers, N is greater than or equal to 2, and M is less than N; then, the first type of data unit in each of the M data segments is aligned in parallel to make the first type Before the data unit is shifted to other types of data units, other types of data units are set to the empty packet type, where the first type is the type of the packet to be processed, and the other types are the types of packets that need not be processed; Finally, the aligned M data segments are combined into output data containing N data units.
  • the output data aligned in each clock cycle thus obtained is sequentially stored in the buffer, since there is no empty packet data unit between the data units to be processed of the output data or His type of data unit can effectively save storage space.
  • an information storage medium for storing the above program product is provided.
  • the disclosed systems, devices, and methods may be implemented in other ways.
  • the device embodiments described above are merely illustrative.
  • the division of the unit is only a logical function division.
  • there may be another division manner for example, multiple units or components may be combined or Can be integrated into another system, or some features can be ignored, or not executed.
  • the coupling or direct coupling or communication connection shown or discussed may be an indirect coupling or communication connection through some interface, device or unit, and may be electrical, mechanical or otherwise.
  • the components displayed for the unit may or may not be physical units, ie may be located in one place, or may be distributed over multiple network units. Some or all of the units may be selected according to actual needs to achieve the objectives of the solution of the embodiment.
  • each functional unit in each embodiment of the present invention may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit.
  • the functions such as those implemented in the form of software functional units and sold or used as stand-alone products, may be stored in a computer readable storage medium.
  • the technical solution of the present invention which is essential or contributes to the prior art, or a part of the technical solution, may be embodied in the form of a software product, which is stored in a storage medium, including
  • the instructions are used to cause a computer device (which may be a personal computer, server, or network device, etc.) to perform all or part of the steps of the methods described in various embodiments of the present invention.
  • the storage medium includes: a USB flash drive, a removable hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk, and the like, which can store program codes.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)

Abstract

L'invention porte sur un procédé et un dispositif de traitement de données. Le procédé de traitement de données consiste à : diviser les données d'entrée contenant N unités de données correspondant à la période d'horloge courante en M segments de données en ordre, M et N étant tous les deux des entiers positifs, N étant supérieur ou égal à 2 et M étant inférieur à N ; effectuer une opération d'alignement sur des unités de données d'un premier type dans chacun des M segments de données en parallèle, et autoriser les unités de données du premier type à se décaler vers l'avant d'unités de données d'un autre type, les unités de données d'un autre type étant toutes réglées à un type de paquet de données vide, et le premier type étant un type de paquet de données à traiter, et l'autre type étant un type à ne pas traiter ; et combiner les M segments de données après traitement d'alignement en des données de sortie contenant N unités de données. Le dispositif de traitement de données comprend une unité de segmentation, une unité de traitement parallèle et une unité de combinaison. Le procédé et le dispositif de traitement de données des modes de réalisation de la présente invention peuvent segmenter des paquets à longueur variable et effectuer une opération d'alignement sur chacun des segments en parallèle, ce qui facilite le maintien du code de conception, augmente le degré de couverture de code durant une vérification de code de conception et en même temps améliore nettement la séquence temporelle.
PCT/CN2011/080280 2011-09-28 2011-09-28 Procédé et dispositif de traitement de données WO2012149775A1 (fr)

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US20160098440A1 (en) * 2014-10-06 2016-04-07 Microsoft Technology Licensing, Llc Validation of segmented data entries
CN104579565A (zh) * 2014-12-31 2015-04-29 曙光信息产业(北京)有限公司 传输系统的数据处理方法和装置
WO2018107476A1 (fr) * 2016-12-16 2018-06-21 华为技术有限公司 Dispositif d'accès à la mémoire, dispositif informatique et dispositif appliqué à un calcul de réseau neuronal convolutif
CN112131182A (zh) * 2020-08-14 2020-12-25 陕西千山航空电子有限责任公司 一种包采类型的飞参数据的快速对齐处理方法

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