WO2012146017A1 - 功率放大装置及功放电路 - Google Patents

功率放大装置及功放电路 Download PDF

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Publication number
WO2012146017A1
WO2012146017A1 PCT/CN2011/081494 CN2011081494W WO2012146017A1 WO 2012146017 A1 WO2012146017 A1 WO 2012146017A1 CN 2011081494 W CN2011081494 W CN 2011081494W WO 2012146017 A1 WO2012146017 A1 WO 2012146017A1
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Prior art keywords
power amplifier
power
amplifier
circuit
stage
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PCT/CN2011/081494
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English (en)
French (fr)
Inventor
崔晓俊
陈化璋
刘建利
安晋元
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中兴通讯股份有限公司
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Application filed by 中兴通讯股份有限公司 filed Critical 中兴通讯股份有限公司
Priority to US13/521,137 priority Critical patent/US20140218116A1/en
Priority to EP11854540.9A priority patent/EP2538552A4/en
Publication of WO2012146017A1 publication Critical patent/WO2012146017A1/zh

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Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F3/00Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/20Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
    • H03F3/21Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
    • H03F3/211Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only using a combination of several amplifiers
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F1/00Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/02Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
    • H03F1/0205Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers
    • H03F1/0288Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers using a main and one or several auxiliary peaking amplifiers whereby the load is connected to the main amplifier using an impedance inverter, e.g. Doherty amplifiers
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F3/00Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/189High-frequency amplifiers, e.g. radio frequency amplifiers
    • H03F3/19High-frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only
    • H03F3/193High-frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only with field-effect devices
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F3/00Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/20Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
    • H03F3/24Power amplifiers, e.g. Class B amplifiers, Class C amplifiers of transmitter output stages
    • H03F3/245Power amplifiers, e.g. Class B amplifiers, Class C amplifiers of transmitter output stages with semiconductor devices only
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F3/00Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/60Amplifiers in which coupling networks have distributed constants, e.g. with waveguide resonators
    • H03F3/602Combinations of several amplifiers
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F2200/00Indexing scheme relating to amplifiers
    • H03F2200/405Indexing scheme relating to amplifiers the output amplifying stage of an amplifier comprising more than three power stages
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F2200/00Indexing scheme relating to amplifiers
    • H03F2200/408Indexing scheme relating to amplifiers the output amplifying stage of an amplifier comprising three power stages

Definitions

  • the present invention relates to the field of communications, and in particular, to a power amplifying device and a power amplifier circuit in the field of communications.
  • the Doherty technology was invented by W.H. Doherty in 1936. It was originally applied to traveling wave tubes and provides high-power transmitters for broadcasting. Its architecture is simple and efficient, and its efficiency is high.
  • the traditional Doherty structure consists of two power amplifiers: one main power amplifier (also known as carrier power amplifier, ie Carrier Power Amplifier), one auxiliary power amplifier (also known as peak power amplifier, ie Peak Power Amplifier), the main power amplifier works in class B or Class AB, auxiliary power amplifier works in category C.
  • the two amplifiers do not work in turn, but the main amplifier always works, and the auxiliary amplifier works until the set peak (this amplifier is also called Peak power amplifier) doctrine 90 behind the main amplifier.
  • the quarter-wave line is the impedance replacement.
  • the purpose is to reduce the apparent impedance of the main power amplifier when the auxiliary power amplifier works, and to ensure that the active load impedance of the auxiliary power amplifier is lower when the auxiliary power amplifier works and the output current of the main power amplifier becomes larger. Since the main power amplifier has a quarter-wavelength line behind it, in order to make the two power amplifier outputs in phase, a 90° phase shift is also required in front of the auxiliary power amplifier, as shown in Fig. 1.
  • the main power amplifier works in class B. When the input signal is relatively small, only the main power amplifier is in working state; when the output voltage of the tube reaches the peak saturation point, the theoretical efficiency can reach 78.5 %. If the stimulus is doubled at this time, then the tube will saturate at half the peak and the efficiency will reach a maximum of 78.5 %. At this point, the auxiliary amplifier will also work with the main amplifier.
  • the introduction of the auxiliary power amplifier makes the load decrease from the perspective of the main power amplifier, because the auxiliary power amplifier acts as a load on the load equivalent to a negative impedance in series, so even if the output voltage of the main power amplifier is saturated, the output power is due to the load. The decrease continues to increase (the current flowing through the load becomes larger).
  • the auxiliary power amplifier When the incentive is reached At the peak of the peak, the auxiliary power amplifier also reached its maximum efficiency, so the efficiency of the two power amplifiers is much higher than the efficiency of a single class B power amplifier.
  • the maximum efficiency of a single Class B amplifier is 78.5 % at the peak, and now 78.5 % of the efficiency occurs at half the peak, so this system structure can achieve high efficiency (maximum output efficiency per amplifier).
  • the link structure commonly used in the industry is: pre-propelled RF small-signal amplifier, working mode is CLASS A; push and final stage use the same type of RF power amplifier tube (currently used in the industry is LDMOS device), push The working mode is CLASS AB, and the last level is Doherty structure.
  • the Doherty structure is only applied to the final stage, and the same type of power amplifier tube is used in both the push stage and the final stage.
  • the advantages are as follows:
  • the supply voltage and the biasing method are the same, so the bias circuit is simple in design;
  • the dispersion of mass production is relatively easy to control.
  • a status quo that cannot be ignored is:
  • the mainstream LDMOS device has been developed to the eighth generation, and its cost is low, but the performance improvement space is very limited, and it is far from meeting the requirements of green environmental protection.
  • the efficiency of the power amplifier is mainly Determined by the final stage, the final stage contributes 90% of the operating current. It is of great significance to further improve the efficiency, but the 10% of the driving level is also more and more important, so it is also necessary to improve the circuit at the driving stage.
  • the present invention provides a power amplifying device including one or more push-stage power amplifier circuits connected in series and a final power amplifier circuit connected to an output terminal of a last push-stage power amplifier circuit, the push Both the stage power amplifier circuit and the final stage power amplifier circuit use a Doherty circuit structure, and the push stage power amplifier circuit uses a laterally diffused metal oxide semiconductor field effect transistor (LDMOS) power amplifier tube to implement a carrier amplifier and auxiliary of the Doherty circuit structure.
  • LDMOS laterally diffused metal oxide semiconductor field effect transistor
  • the final stage power amplifier circuit uses a high electron mobility transistor (HEMT) power amplifier tube to implement a carrier amplifier and a Peak amplifier of the Doherty circuit structure.
  • HEMT high electron mobility transistor
  • the present invention provides another power amplifying device, which includes one or more push-stage power amplifier circuits connected in series and a final power amplifier circuit connected to an output terminal of the last push-level power amplifier circuit,
  • Both the booster stage power amplifier circuit and the final stage power amplifier circuit employ a Doherty circuit structure, and the push stage power amplifier circuit and the final stage power amplifier circuit implement a carrier amplifier of the Doherty circuit structure using a high electron mobility transistor (HEMT) power amplifier tube.
  • HEMT high electron mobility transistor
  • the present invention also provides a power amplifier circuit of a power amplifying device, wherein the power amplifier circuit uses a Doherty circuit structure, and the final power amplifier circuit uses a high electron mobility transistor (HEMT) power amplifier tube to implement Doherty.
  • HEMT high electron mobility transistor
  • the power amplifier circuit is a push stage or a final stage of the power amplifying device.
  • the present invention provides a power amplifier circuit of another power amplifying device, and the power amplifier circuit includes:
  • a power distribution sub-circuit a main amplifier connected to the output of the power distribution sub-circuit, the main amplifier being implemented by a high electron mobility transistor (HEMT) power amplifier tube;
  • HEMT high electron mobility transistor
  • At least one auxiliary amplifier connected to the output of the power distribution sub-circuit, the auxiliary amplifier being implemented by a high electron mobility transistor (HEMT) power amplifier tube;
  • HEMT high electron mobility transistor
  • the power amplifier circuit is a push stage or a final stage of the power amplifying device.
  • the power amplifying device and the power amplifier circuit of the embodiment of the invention adopt Doherty technology, and A new combination of a carrier amplifier and a Peak amplifier improves the efficiency of power amplification compared to the prior art.
  • Figure 1 is a block diagram of a conventional Doherty power amplifier
  • Figure 2 is a schematic block diagram of the Doherty circuit structure
  • Embodiment 1 of the present invention is a schematic block diagram of Embodiment 1 of the present invention.
  • Embodiment 2 of the present invention is a schematic block diagram of Embodiment 2 of the present invention.
  • FIG. 5 is a schematic block diagram of Embodiment 3 of the present invention.
  • Figure 6 is a schematic block diagram of Embodiment 4 of the present invention.
  • the power amplifying device of the invention adopts a high-efficiency Doherty circuit structure in the final-stage power amplifier circuit and the push-level power amplifier circuit, and simultaneously combines the push-stage amplifier and the final-stage amplifier, and adopts a new combined architecture to realize the efficiency of the entire Doherty power amplifier. Significantly improved.
  • the power amplifying apparatus of the present invention includes one or more series of driver stage power amplifiers (Driver Stage Power Amplifiers) and a final stage power amplifier circuit (Final Stage) connected to the output of the last push stage power amplifier circuit.
  • Power Amplifier in particular, in the present invention, the push stage power amplifier circuit uses a Doherty circuit structure.
  • the Doherty circuit structure includes: a power distribution sub-circuit 10, a main amplifier 20 connected to an output end of the power distribution sub-circuit 10, and at least one auxiliary amplifier 30, and the main amplifier a power combining sub-circuit 40 connected to the output of the auxiliary amplifier.
  • the main amplifier 20 also known as a carrier amplifier, provides the primary power amplification function, such as continuous power amplifier.
  • Auxiliary amplifiers also known as carrier amplifiers, provide auxiliary power amplification, such as operating only under certain conditions, such as reaching a preset peak.
  • the power distribution sub-circuit 10 includes a series of functional devices such as a power distribution, a 90-degree quarter-wave line, and a phase compensation line.
  • the power synthesis sub-circuit 40 includes a 90-degree quarter-wave line.
  • a series of functional devices, such as a phase compensation line and an impedance conversion are designed, selected, and matched according to specific implementation requirements, and are not limited by the present invention.
  • the main amplifier and the auxiliary amplifier can be implemented by using various types of power amplifier tubes, preferably, by using a laterally double-diffused metal-oxide semiconductor (LDMOS) power amplifier tube, or uniformly. It is realized by a high electron mobility transistor ( ⁇ ) power amplifier tube.
  • LDMOS laterally double-diffused metal-oxide semiconductor
  • the final stage power amplifier circuit is also implemented by the Doherty structure circuit shown in FIG. 2.
  • the high power electron mobility transistor (HEMT) power amplifier tube is used to implement the main power amplifier function and the auxiliary power amplifier function.
  • HEMT high power electron mobility transistor
  • the power amplifying device embodiment 1 is shown in FIG. 3.
  • the driving stage uses two-way Doherty structure circuit
  • the LDMOS power amplifier tube realizes the main power amplifier function and the auxiliary power amplifier function
  • the final stage uses two The Doherty structure circuit of the road
  • the HEMT power amplifier tube realizes the main power amplifier function and the auxiliary power amplifier function.
  • the boosting stage amplifying portion is implemented by a Doherty circuit structure, and both the carrier amplifier and the Peak amplifier use an LDMOS (Lateral double-diffused metal-oxide semiconductor, laterally diffused metal oxide semiconductor field effect transistor, based on Si) power amplifier tube; While promoting the Doherty circuit implemented by the LDMOS power amplifier tube, a high-electron Mobility Transistor (HEMT) based on a potassium ion iodide (GaN) power amplifier tube is used to implement the two-way Doherty circuit structure.
  • LDMOS Layer double-diffused metal-oxide semiconductor, laterally diffused metal oxide semiconductor field effect transistor, based on Si
  • HEMT high-electron Mobility Transistor
  • GaN potassium ion iodide
  • Embodiment 2 of the power amplifying device is shown in FIG. 4.
  • the two-way Doherty structure circuit is used for driving the stage, and the main power amplifier function and the auxiliary power amplifier are realized by using the LDMOS power amplifier tube.
  • the last stage uses two-way Doherty structure circuit, and uses HEMT power amplifier tube to realize main power amplifier function and auxiliary power amplifier function.
  • the boosting stage amplifying portion is implemented by a Doherty circuit structure, and both the Carrier amplifier and the Peak amplifier use an LDMOS power amplifier tube;
  • the Doherty circuit is used in the push stage, and the new multi-channel Doherty circuit structure is also used in the final stage.
  • the HEMT power amplifier tube is used as a carrier amplifier and multiple Peak amplifiers for efficiency improvement.
  • the embodiment 3 of the power amplifying device is the same as the circuit structure of the embodiment 1 in the embodiment 3, except that the pusher stage uses the HEMT power amplifier tube to realize the main power amplifier function and the auxiliary power amplifier function.
  • the embodiment 4 of the power amplifying device is the same as the circuit structure of the embodiment 2 in the fourth embodiment.
  • the difference is that the pusher stage uses the HEMT power amplifier tube to realize the main power amplifier function and the auxiliary power amplifier function.
  • the key point of the invention is that both the push stage and the final stage use a highly efficient Doherty circuit structure to achieve an overall improvement in efficiency; and at the same time take advantage of the high efficiency of the high electron mobility transistor (HEMT) power amplifier tube as a high efficiency Promote the efficiency of the carrier and Peak amplifier of the stage or final stage amplifier to improve efficiency and achieve the best performance.
  • HEMT high electron mobility transistor
  • LDMOS power amplifier tube technology is used as a carrier to promote the stage power amplifier.
  • the Peak Amplifier combines with the final stage of the HEMT power amplifier tube to achieve maximum performance.
  • the efficiency of the entire power amplifier can be greatly improved compared with the existing push level CLASS AB mode, the last stage carrier, and the Peak amplifier using the LDMOS Doherty power amplifier;
  • LDMOS devices are very mature, with a full range of medium power devices and low cost. Promote the use of LDMOS devices + Doherty structure, which not only improves efficiency, but also ensures cost; The final stage uses the HEMT device + Doherty structure to achieve maximum boost efficiency.
  • Specific implementation steps for implementing the power amplifying device of the present invention include:
  • comparative analysis determines the Doherty structure used
  • the 85W Doherty power amplifier design for 2.1GHz UMTS system applications requires the use of two power amplifier tubes for a total of at least 360W of saturated power for the final stage design.
  • two 200W LDMOS power amplifier tubes can be realized by a symmetric Doherty structure.
  • the efficiency of the single final stage power amplifier is about 52%; and the method based on the present invention is adopted.
  • Implementation Carrier amplifier and Peak amplifier both use 200W HEMT power amplifier tube), its single final stage power amplifier efficiency is about 55%, an increase of nearly 6%.
  • the push stage can use two 10W LDMOS power amplifier tubes to achieve the Doherty push level. Amplify part of the design, so that the efficiency of the push level can be increased by about 20% compared with the original CLASS AB design (for example: the efficiency of the CLASS AB design push level is 15%, and the Doherty design can reach 18%).
  • the present invention also provides a power amplifier circuit of a power amplifying device, and the power amplifier circuit With the Doherty circuit structure, a carrier amplifier and a Peak amplifier of the Doherty circuit structure are implemented using a high electron mobility transistor ( ⁇ ) power amplifier tube.
  • the power amplifier circuit may be a driving stage or a final stage of the power amplifying device, and specifically includes:
  • a main amplifier 20 connected to the output of the power distribution subcircuit, the main amplifier being implemented by a high electron mobility transistor (HEMT) power amplifier tube;
  • HEMT high electron mobility transistor
  • At least one auxiliary amplifier 30 connected to the output of the power distribution subcircuit, the auxiliary amplifier being implemented by a high electron mobility transistor (HEMT) power amplifier tube;
  • HEMT high electron mobility transistor
  • a power combining sub-circuit 40 connected to the output of the main amplifier and the auxiliary amplifier.
  • the invention is simple to implement, convenient to design and debug, and can be easily implemented by those skilled in the art in accordance with the present specification.
  • the efficiency of the Doherty amplifier can be significantly improved in the operating frequency range.
  • This device can be widely used in the design of various Doherty power amplifiers.
  • the power amplifying device and the power amplifier circuit of the embodiment of the present invention use Doherty technology, and a new combination of a carrier amplifier and a Peak amplifier is provided, which improves the efficiency of power amplification compared with the prior art.

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Description

功率放大装置及功放电路
技术领域
本发明涉及通信领域, 尤其涉及通信领域的功率放大装置及功放电路。
背景技术
面对目前日益激烈的市场竟争, 基站产品的效率高低已经成为行业竟争 的焦点, 基站中决定效率的主要部件——功放效率的提升也成了重中之重, 业界都纷纷投入进行效率提升技术的研究, 目前最为广泛应用的一种成熟技 术就是 Doherty技术, 功放厂家都已开始批量生产应用 Doherty功放, 如何 在该技术上进一步提高效率也显得尤为重要。
Doherty技术是由 W.H.Doherty于 1936年发明的, 最初应用于行波管, 为广播提供大功率发射机, 其架构简单易行, 效率高。
传统的 Doherty结构由 2个功放组成: 一个主功放 (也可称为载波功放, 即 Carrier Power Amplifier ) , —个辅助功放 (也称峰值功放, 即 Peak Power Amplifier), 主功放工作在 B类或者 AB类,辅助功放工作在 C类。 两个功放 不是轮流工作, 而是主功放一直工作, 辅助功放到设定的峰值才工作 (这个功 放也叫作 Peak power amplifier)„ 主功放后面的 90。四分之一波长线是阻抗更 换, 目的是在辅助功放工作时, 起到将主功放的视在阻抗减小的作用, 保证 辅助功放工作的时候和后面的电路组成的有源负载阻抗变低, 这样主功放输 出电流就变大。 由于主功放后面有了四分之一波长线, 为了使两个功放输出 同相, 在辅助功放前面也需要 90°相移, 如图 1所示。
主功放工作在 B类, 当输入信号比较小的时候, 只有主功放处于工作状 态; 当管子的输出电压达到峰值饱和点时, 理论上的效率能达到 78.5 %。 如 果这时候将激励加大一倍, 那么, 管子在达到峰值的一半时就出现饱和了, 效率也达到最大的 78.5 % , 此时辅助功放也开始与主放大器一起工作。 辅助 功放的引入, 使得从主功放的角度看, 负载减小了, 因为辅助功放对负载的 作用相当于串连了一个负阻抗, 所以, 即使主功放的输出电压饱和恒定, 但 输出功率因为负载的减小却持续增大 (流过负载的电流变大了)。 当达到激励 的峰值时, 辅助功放也达到了自己效率的最大点, 这样两个功放合在一起的 效率就远远高于单个 B类功放的效率。单个 B类功放的最大效率 78.5 %出现 在峰值处, 现在 78.5 %的效率在峰值的一半就出现了, 所以这种系统结构能 达到很高的效率 (每个放大器均达到最大的输出效率)。
由于基站系统对机顶输出功率的要求, 射频功放一般增益需求都在几十 dB, 这样一级放大是不够的, 一般都需要 3-4级放大, 即预推动、 推动、 末 级。 目前业界普遍釆用的链路结构为: 预推动釆用射频小信号放大器, 工作 模式为 CLASS A; 推动和末级均釆用同一类型射频功放管(目前业界釆用的 是 LDMOS器件), 推动的工作模式为 CLASS AB, 末级为 Doherty结构。
随着业界绿色环保理念的提出,运营商对通讯系统的效率要求近乎苛刻, 即使釆用了先进的 Doherty技术, 功放效率也仍然无法满足其日益提高的要 求, 因此必须在 Doherty技术的基础上不断改进, 来实现效率的不断提升。
传统的射频功放中 Doherty结构只应用于末级, 而且推动级及末级均釆 用同一类型功放管, 这样的优点是: 供电电压及偏置方式相同, 因此偏置电 路设计简单; 由于功放管为同类型, 其批量生产的离散也相对容易控制。 但 一个不容忽视的现状是: 业界主流的 LDMOS器件已经发展到第八代, 其成 本低廉,但性能的提升空间非常有限, 已远远不能满足绿色环保要求; 另夕卜, 虽然功放的效率主要由末级确定, 末级贡献了 90%的工作电流, 进一步提升 效率意义重大, 但推动级的 10%也越发不可忽视, 因此也需要在推动级进行 电路改进。
从目前通讯系统不同制式的信号功率谱分布来看,功放输出的 70%-80% 的能量集中在平均功率附近, 也就是说, 釆用 Doherty技术的末级功放工作 电流大部分由 Carrier放大器贡献, 因此, 将末级的 Carrier放大器的效率提 高对整个功放的效率提升意义重大。 同时,在推动级部分也进一步提升效率, 也能更好地实现整个功放的效率提升。
发明内容
本发明要解决的技术问题是提供一种功率放大装置及功放电路, 以解决 功放效率无法满足要求的问题。 为解决以上技术问题, 本发明提供了一种功率放大装置, 该装置包括一 个或多个串联的推动级功放电路以及与最后一个推动级功放电路的输出端连 接的末级功放电路, 所述推动级功放电路和末级功放电路均釆用 Doherty电 路结构, 所述推动级功放电路均釆用横向扩散金属氧化物半导体场效应管 ( LDMOS )功放管实现 Doherty电路结构的主( Carrier )放大器和辅助( Peak ) 放大器, 所述末级功放电路釆用高电子迁移率晶体管 (HEMT ) 功放管实现 Doherty电路结构的主(Carrier )放大器和辅助 (Peak )放大器。
为解决以上技术问题, 本发明提供了另一种功率放大装置, 该装置包括 一个或多个串联的推动级功放电路以及与最后一个推动级功放电路的输出端 连接的末级功放电路, 所述推动级功放电路和末级功放电路均釆用 Doherty 电路结构, 所述推动级功放电路和末级功放电路釆用高电子迁移率晶体管 ( HEMT )功放管实现 Doherty电路结构的主( Carrier )放大器和辅助( Peak ) 放大器。
为解决以上技术问题, 本发明还提供了一种功率放大装置的功放电路, 所述功放电路釆用 Doherty电路结构, 所述末级功放电路釆用高电子迁移率 晶体管( HEMT )功放管实现 Doherty电路结构的主( Carrier )放大器和辅助 ( Peak )放大器。
优选地, 所述功放电路是所述功率放大装置的推动级或末级。
为解决以上技术问题, 本发明提供了另一种功率放大装置的功放电路, 所述功放电路包括:
功率分配子电路; 与所述功率分配子电路输出端连接的主放大器, 所述主放大器釆用高电 子迁移率晶体管 (HEMT )功放管实现;
至少一个与所述功率分配子电路输出端连接的辅助放大器, 所述辅助放 大器釆用高电子迁移率晶体管 (HEMT )功放管实现;
以及与所述主放大器、 辅助放大器的输出端连接的功率合成子电路。 优选地, 所述功放电路是所述功率放大装置的推动级或末级。
本发明实施例功率放大装置及功放电路釆用 Doherty技术, 并给出了 Carrier放大器和 Peak放大器的全新组合, 相比于现有技术, 提升了功率放 大的效率。
附图概述
图 1为传统的 Doherty功率放大器框图;
图 2 为 Doherty电路结构的原理框图;
图 3为本发明实施例 1的原理框图;
图 4为本发明实施例 2的原理框图;
图 5为本发明实施例 3的原理框图;
图 6为本发明实施例 4的原理框图。
本发明的较佳实施方式
本发明功率放大装置在末级功放电路、 推动级功放电路均釆用高效率 Doherty 电路结构, 同时对推动级放大器和末级放大器进行全新组合, 釆用 新的组合架构来实现整个 Doherty功放效率的大幅提升。
与本发明特别相关的, 本发明功率放大装置包括一个或多个串联的推动 级功放电路(Driver Stage Power Amplifier) , 以及与最后一个推动级功放电 路的输出端连接的末级功放电路(Final Stage Power Amplifier ) , 特别地, 本发明中, 该推动级功放电路釆用 Doherty电路结构。
具体地, 如图 2所示, 该 Doherty电路结构包括: 功率分配子电路 10、 与所述功率分配子电路 10输出端连接的一个主放大器 20和至少一个辅助放 大器 30, 以及与所述主放大器、 辅助放大器的输出端连接的功率合成子电路 40。
可理解地, 主放大器 20 , 也称 Carrier (载波)放大器, 提供主要的功率 放大的功能, 如持续提供功放。 辅助放大器也称 Carrier (载波)放大器, 提 供辅助的功率放大功能, 比如仅在特定条件下 (如达到预设峰值)工作。 如 图 1所示, 功率分配子电路 10包括功率分配、 90度四分之一波长线、 相位 补偿线等一系列功能器件, 功率合成子电路 40包括 90度四分之一波长线、 相位补偿线、 阻抗变换等一系列功能器件, 器件的具体类型、 型号和连接关 系根据具体的实现需求, 进行设计、 选择及匹配, 本发明对此不做限定。
主放大器和辅助放大器可以釆用多种类型的功放管实现, 优选地, 均釆 用横向扩散金属氧化物半导体场效应管 (LDMOS , Lateral double-diffused metal-oxide semiconductor ) 功放管实现, 或均釆用釆用高电子迁移率晶体管 ( ΗΕΜΤ )功放管实现。
现有技术中,末级功放电路也釆用如图 2所示的 Doherty结构电路实现, 优选地, 釆用高电子迁移率晶体管 (HEMT ) 功放管实现主功放功能和辅助 功放功能。
下文中将结合附图对本发明的实施例进行详细说明。 需要说明的是, 在 不冲突的情况下, 本申请中的实施例及实施例中的特征可以相互组合。
实施例 1
功率放大装置实施例 1如图 3所示, 在该实施例 1中, 推动级釆用两路 的 Doherty结构电路, 且釆用 LDMOS功放管实现主功放功能及辅助功放功 能, 末级釆用两路的 Doherty结构电路, 且釆用 HEMT功放管实现主功放功 能和辅助功放功能。
具体地, 推动级放大部分釆用 Doherty电路结构实现, 其 Carrier放大器 和 Peak 放大器均使用 LDMOS ( Lateral double-diffused metal-oxide semiconductor, 横向扩散金属氧化物半导体场效应管, 基于 Si ) 功放管; 在推动级釆用 LDMOS功放管实现的 Doherty电路的同时, 在末级釆用 高电子迁移率晶体管 ( High Electron Mobility Transistor, HEMT, 基于碘化 钾(GaN ) ) 功放管来实现两路 Doherty电路结构。
对于末级的两路结构的 Doherty (含传统的两路对称 Doherty、 非对称 Doherty等)以及在此基础上演变的一个 Carrier加一个 Peak的架构, 通过釆 用 HEMT功放管来作为 Carrier放大器和 Peak放大器以实现效率提升。
实施例 2
功率放大装置的实施例 2如图 4所示, 在该实施例 2中, 推动级釆用两 路的 Doherty结构电路, 且釆用 LDMOS功放管实现主功放功能及辅助功放 功能, 末级釆用两路的 Doherty结构电路, 且釆用 HEMT功放管实现主功放 功能和辅助功放功能。
具体地, 推动级放大部分釆用 Doherty电路结构实现, 其 Carrier放大器 和 Peak放大器均使用 LDMOS功放管;
在推动级釆用 Doherty电路的同时在末级也釆用全新组合的多路 Doherty 电路结构实现。
对于末级的多路结构的 Doherty以及在此基础上演变的一个 Carrier加多 个 Peak的架构, 通过釆用 HEMT功放管来作为 Carrier放大器和多个 Peak 放大器以实现效率提升。
实施例 3
功率放大装置的实施例 3如图 5所示, 在该实施例 3与实施例 1的电路 结构相同, 不同之处在于,推动级釆用 HEMT功放管实现主功放功能及辅助 功放功能。
实施例 4
功率放大装置的实施例 4如图 6所示, 在该实施例 4与实施例 2的电路 结构相同, 不同之处在于,推动级釆用 HEMT功放管实现主功放功能及辅助 功放功能。
该发明的关键点为:推动级和末级均釆用了高效率的 Doherty电路结构, 实现效率的全面提升; 同时充分利用高电子迁移率晶体管 (HEMT ) 功放管 效率高的优势, 将其作为推动级或末级功放的 Carrier和 Peak放大器来提高 效率, 实现性能最优; 并结合 LDMOS功放管技术成熟度高、 成本低廉、 中 功率器件种类齐全的优势, 用其作为推动级功放的 Carrier和 Peak放大器, 与 HEMT功放管实现的末级灵活组合, 最终实现性能的最大提升。
釆用本发明所述方法和装置, 与现有的推动级釆用 CLASS AB模式, 末 级 Carrier, Peak放大器均釆用 LDMOS的 Doherty功放相比, 整个功放效率 可大幅提升;
LDMOS 器件发展非常成熟, 中功率器件种类齐全, 成本低廉。 推动釆 用 LDMOS器件 +Doherty结构, 既提升了效率, 又保证了成本; 末级釆用 HEMT器件 +Doherty结构, 可实现功放效率的最大提升。 实现本发明功率放大装置的具体实施步骤包括:
1、 根据不同的实现需求, 先确定末级 Carrier放大器所用的 HEMT功放 管型号;
2、 根据不同的实现需求, 对比分析确定釆用的 Doherty结构;
3、根据不同的实现需求, 确定出末级 Peak放大器所用的 HEMT功放管 型号;
4、 根据末级增益, 确定出推动级 Carrier放大器所用的 HEMT功放管或 LDMOS功放管的型号、 Peak放大器所用 HEMT功放管或 LDMOS功放管的 型号;
5、 完成末级、推动级放大管的匹配设计以及框图中的功率分配、 功率合 成部分的设计;
6、 完成本发明所述装置的其余部分设计。
例如:
针对 2.1GHz UMTS系统应用 ( PAR: 6dB ) 的 85W Doherty功放设计, 需要用到两只功放管合计至少 360W以上的饱和功率来进行末级设计。 结合 功放管厂家现有器件,可釆用两个 200W的 LDMOS功放管通过对称 Doherty 结构实现, 按照业界目前的器件水平, 其单末级功放效率约 52%左右; 而釆 用基于本发明的方法实现(Carrier放大器和 Peak放大器均釆用 200W 的 HEMT功放管) , 其单末级功放效率约 55%左右, 提高近 6%。
对于 Doherty推动设计, 由于末级至少要釆用 360W以上的饱和功率, 目前 2.1GHz的末级功放 Doherty增益在 16dB左右, 因此, 推动级可釆用两 个 10W的 LDMOS功放管来实现 Doherty推动级放大部分设计, 这样, 比原 来的 CLASS AB设计, 推动级效率还能提升 20%左右(如: 釆用 CLASS AB 设计推动级的效率在 15%, 釆用 Doherty设计则可达到 18% ) 。
因此, 釆用本发明所述的方法及装置, 整个功放的效率将大幅提升。 另外, 本发明还提供了一种功率放大装置的功放电路, 所述功放电路釆 用 Doherty电路结构,,釆用高电子迁移率晶体管( ΗΕΜΤ )功放管实现 Doherty 电路结构的主 (Carrier )放大器和辅助 (Peak )放大器。 具体地, 该功放电 路可以是功率放大装置的推动级或末级, 具体包括:
功率分配子电路 10;
与所述功率分配子电路输出端连接的主放大器 20,所述主放大器釆用高 电子迁移率晶体管 (HEMT ) 功放管实现;
至少一个与所述功率分配子电路输出端连接的辅助放大器 30 ,所述辅助 放大器釆用高电子迁移率晶体管 (HEMT )功放管实现;
以及与所述主放大器、 辅助放大器的输出端连接的功率合成子电路 40。
综上所述, 本发明的实现简单, 设计及调试方便, 同一技术领域的技 术人员按照本说明书能够很容易地实现。 在 Doherty功放的工作频带范围内 可使其效率指标显著提升, 本装置可广泛的应用于各种 Doherty功率放大器 的设计中。
工业实用性 本发明实施例功率放大装置及功放电路釆用 Doherty技术, 并给出了 Carrier放大器和 Peak放大器的全新组合, 相比于现有技术, 提升了功率放 大的效率。

Claims

权 利 要 求 书
1、 一种功率放大装置, 该装置包括一个或多个串联的推动级功放电路 以及与最后一个推动级功放电路的输出端连接的末级功放电路, 其中, 所述 推动级功放电路和末级功放电路均釆用 Doherty电路结构, 所述推动级功放 电路均釆用横向扩散金属氧化物半导体场效应管 (LDMOS ) 功放管实现 Doherty电路结构的主(Carrier )放大器和辅助(Peak )放大器, 所述末级功 放电路釆用高电子迁移率晶体管 (HEMT )功放管实现 Doherty 电路结构的 主(Carrier )放大器和辅助 (Peak )放大器。
2、 一种功率放大装置, 该装置包括一个或多个串联的推动级功放电路 以及与最后一个推动级功放电路的输出端连接的末级功放电路, 其中, 所述 推动级功放电路和末级功放电路均釆用 Doherty电路结构, 所述推动级功放 电路和末级功放电路釆用高电子迁移率晶体管( HEMT )功放管实现 Doherty 电路结构的主(Carrier )放大器和辅助 (Peak )放大器。
3、 一种功率放大装置的功放电路, 所述功放电路釆用 Doherty 电路结 构,所述末级功放电路釆用高电子迁移率晶体管( HEMT )功放管实现 Doherty 电路结构的主(Carrier )放大器和辅助 (Peak )放大器。
4、 如权利要求 3 所述的功放电路, 其中, 所述功放电路是所述功率放 大装置的推动级或末级。
5、 一种功率放大装置的功放电路, 所述功放电路包括:
功率分配子电路;
与所述功率分配子电路输出端连接的主放大器, 所述主放大器釆用高电 子迁移率晶体管 (HEMT )功放管实现;
至少一个与所述功率分配子电路输出端连接的辅助放大器, 所述辅助放 大器釆用高电子迁移率晶体管 (HEMT )功放管实现;
以及与所述主放大器、 辅助放大器的输出端连接的功率合成子电路。
6、 如权利要求 5 所述的功放电路, 其中, 所述功放电路是所述功率放 大装置的推动级或末级。
PCT/CN2011/081494 2011-04-29 2011-10-28 功率放大装置及功放电路 WO2012146017A1 (zh)

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