WO2012143325A1 - Method for etching a bst layer - Google Patents

Method for etching a bst layer Download PDF

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Publication number
WO2012143325A1
WO2012143325A1 PCT/EP2012/056901 EP2012056901W WO2012143325A1 WO 2012143325 A1 WO2012143325 A1 WO 2012143325A1 EP 2012056901 W EP2012056901 W EP 2012056901W WO 2012143325 A1 WO2012143325 A1 WO 2012143325A1
Authority
WO
WIPO (PCT)
Prior art keywords
layer
bst
etching
surfactant
etching solution
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/EP2012/056901
Other languages
French (fr)
Inventor
Vincent Caro
Davide Rodilosso
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics Tours SAS
STMicroelectronics SRL
Original Assignee
STMicroelectronics Tours SAS
STMicroelectronics SRL
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics Tours SAS, STMicroelectronics SRL filed Critical STMicroelectronics Tours SAS
Publication of WO2012143325A1 publication Critical patent/WO2012143325A1/en
Priority to US14/056,698 priority Critical patent/US20140043718A1/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G7/00—Capacitors in which the capacitance is varied by non-mechanical means; Processes of their manufacture
    • H01G7/06—Capacitors in which the capacitance is varied by non-mechanical means; Processes of their manufacture having a dielectric selected for the variation of its permittivity with applied voltage, i.e. ferroelectric capacitors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/28—Dry etching; Plasma etching; Reactive-ion etching of insulating materials
    • H10P50/282—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials
    • H10P50/283—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials by chemical means
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D1/00—Resistors, capacitors or inductors
    • H10D1/60—Capacitors
    • H10D1/68—Capacitors having no potential barriers
    • H10D1/682—Capacitors having no potential barriers having dielectrics comprising perovskite structures

Definitions

  • the present invention relates to a method of etching a ferroelectric material. It more specifically relates to a method for etching a barium strontium titanate layer (BST) , used in the fabrication of tunable capacitors.
  • BST barium strontium titanate layer
  • Figure 1A shows such a capacitor during an intermediate manufacturing step.
  • a metallic layer 3 generally in platinum.
  • a BST layer 5 has been deposited, itself covered with a photoresist 7, in which an opening 8 has been formed by photolithography at the position where it is desired to form an opening 9 in the BST layer.
  • Figure 1A shows the structure after photolithography of layer 7 and etching of layer 5.
  • Figure IB is a top view of the structure at this step.
  • the etching of the BST layer is conventionally performed using an acid etching solution of hydrofluoric acid and nitric acid. It can be noticed that the etching of the BST layer 5 suffers from several drawbacks. Firstly, the etching extends relatively far laterally under the photoresist layer 7. The lateral etching may extend under layer 7 by up to five times the thickness of the BST layer. Secondly, this lateral etching is irregular, as shown in Figure IB, and some cracks 10 extend from the edge of the opening 9 into the BST layer. These cracks are responsible for infiltrations and may damage the dielectric properties of the BST layer where they appear. As a result, a capacitor manufactured in this way does not present the characteristics that should be expected.
  • An object of an embodiment of the present invention is to solve at least one of the drawbacks of the conventional methods of etching a BST layer.
  • a more specific embodiment of the present invention provides an etching solution providing a regular etching of a BST layer.
  • an embodiment of the present invention provides a method for etching a PVD deposited barium strontium titanate (BST) layer, wherein a non-ionic surfactant at a concentration between 0.1 and 1 percent is added to an acid etching solution.
  • BST barium strontium titanate
  • the concentration of the surfactant is between 0.2 and 0.4 percent.
  • the etching solution is an aqueous solution of hydrofluoric acid and nitric acid.
  • the surfactant is alkyl- phenoxy-polyglycidol .
  • the BST layer lies on a platinum layer.
  • An embodiment of the present invention provides a tunable capacitor with a BST dielectric obtained by the above method.
  • Figure IB previously described, is a top view of the etched BST layer of Figure 1A;
  • Figure 2A illustrates schematically an etched BST layer
  • Figure 2B is a top view of the etched BST layer of
  • FIG. 2A is a cross section illustrating a tunable capacitor during an intermediate manufacturing step.
  • a substrate 1 which is for example made of glass, sapphire, alumina, quartz or which is a silicon substrate covered with an isolating layer that constitutes the top layer of a structure, is formed a layer 3 in platinum that will form the lower electrode of the capacitor.
  • a sputtered BST film 5 has been formed by physical vapor deposition (PVD) , itself covered with a photoresist layer 7, in which an opening 8 has been formed by photolithography at the position where it is desired to form an opening 19 in the BST layer.
  • PVD physical vapor deposition
  • Figure 2A shows the structure after photolithography of layer 7 and etching of layer 5.
  • Figure 2B is a top view of the structure at this particular step.
  • the etching of the BST layer has been performed by an acid etching solution that is a mixture of hydrofluoric acid and nitric acid in an aqueous solution, into which a non-ionic surfactant has been added.
  • the surfactant is for example alkyl-phenoxy-polyglycidol, at a concentration between 0.1 and 1 percent, preferably between 0.2 and 0.4 percent in volume.
  • the etching solution is for example obtained from a mixture of 1.6 liters of HF at a concentration of 1 percent, 0.14 liter of HNO3 at a concentration of 70 percent and 26.25 liters of water.
  • the lateral etching of the BST layer is regular, as shown schematically by Figure 2B, and the amount that this lateral etching of the BST layer extends under the photoresist layer 7 is roughly reduced by a factor 2 compared to the use of the same etching solution without surfactant. Additionally, no cracks 10 appear in the BST layer from the edge 19 of the opening formed in this BST layer.
  • the inventors observed that the addition of a surfactant in the acid etching solution has no influence on the etch rate of the BST layer compared to the use of the same etching solution without surfactant. It is considered that the conservation of the etch rate is related to the conservation of the acidity levels of the etching solution thanks to the non- ionic nature of the surfactant used.
  • the improvement in the lateral etching is attributed to the fact that the surfactant forms aggregates (for example micelles), that obstruct the edge of the etching area under the photoresist layer.
  • the dimensions of the opening in the photoresist layer may be chosen such that the opening in the BST layer is between several micrometers and several hundred micrometers across .
  • the invention is subject to various modifications, in particular as regards the acids usable for the etching solution. Various surfactants can also be used.
  • the metallic layer 3 that supports the BST layer and will form the lower electrode of the capacitor can be formed in a metal other than platinum. However, it will be noted that the invention specifically applies to BST layers deposited by PVD, and not to BST layers resulting from a solgel coating.

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Weting (AREA)
  • Semiconductor Memories (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

The invention concerns a method for etching a PVD deposited barium strontium titanate (BST) layer, wherein a non-ionic surfactant at a concentration between 0.1 and 1 percent is added to an acid etching solution.

Description

METHOD FOR ETCHING A BST LAYER
FIELD OF THE INVENTION
The present invention relates to a method of etching a ferroelectric material. It more specifically relates to a method for etching a barium strontium titanate layer (BST) , used in the fabrication of tunable capacitors.
BACKGROUND OF THE INVENTION
In some specific structures, there is a need for the fabrication of tunable capacitors, the capacitance of which varies as a function of the applied voltage. To manufacture such capacitors, it has been proposed to use barium strontium titanate, (BaSr)TiC>3, or BST, as a dielectric.
Figure 1A shows such a capacitor during an intermediate manufacturing step. On a substrate 1 is formed a metallic layer 3, generally in platinum. On this layer, a BST layer 5 has been deposited, itself covered with a photoresist 7, in which an opening 8 has been formed by photolithography at the position where it is desired to form an opening 9 in the BST layer.
Figure 1A shows the structure after photolithography of layer 7 and etching of layer 5. Figure IB is a top view of the structure at this step. The etching of the BST layer is conventionally performed using an acid etching solution of hydrofluoric acid and nitric acid. It can be noticed that the etching of the BST layer 5 suffers from several drawbacks. Firstly, the etching extends relatively far laterally under the photoresist layer 7. The lateral etching may extend under layer 7 by up to five times the thickness of the BST layer. Secondly, this lateral etching is irregular, as shown in Figure IB, and some cracks 10 extend from the edge of the opening 9 into the BST layer. These cracks are responsible for infiltrations and may damage the dielectric properties of the BST layer where they appear. As a result, a capacitor manufactured in this way does not present the characteristics that should be expected.
SUMMARY OF THE INVENTION
An object of an embodiment of the present invention is to solve at least one of the drawbacks of the conventional methods of etching a BST layer.
A more specific embodiment of the present invention provides an etching solution providing a regular etching of a BST layer.
Thus, an embodiment of the present invention provides a method for etching a PVD deposited barium strontium titanate (BST) layer, wherein a non-ionic surfactant at a concentration between 0.1 and 1 percent is added to an acid etching solution.
According to an embodiment, the concentration of the surfactant is between 0.2 and 0.4 percent.
According to an embodiment, the etching solution is an aqueous solution of hydrofluoric acid and nitric acid.
According to an embodiment, the surfactant is alkyl- phenoxy-polyglycidol .
According to an embodiment, the BST layer lies on a platinum layer.
An embodiment of the present invention provides a tunable capacitor with a BST dielectric obtained by the above method.
BRIEF DESCRIPTION OF THE DRAWINGS
The foregoing and other purposes, features, aspects and advantages of the invention will become apparent from the following detailed description of embodiments, given by way of illustration and not limitation with reference to the accompanying drawings, wherein: Figure 1A, previously described, illustrates schematically an etched BST layer;
Figure IB, previously described, is a top view of the etched BST layer of Figure 1A;
Figure 2A illustrates schematically an etched BST layer;
Figure 2B is a top view of the etched BST layer of
Figure 2A.
For clarity, the same elements have been designated with the same reference numerals in the different drawings, and furthermore, as is usual in the representation of semiconductor components, the various drawings are not to scale.
DETAILED DESCRIPTION OF THE INVENTION
Figure 2A is a cross section illustrating a tunable capacitor during an intermediate manufacturing step. On a substrate 1, which is for example made of glass, sapphire, alumina, quartz or which is a silicon substrate covered with an isolating layer that constitutes the top layer of a structure, is formed a layer 3 in platinum that will form the lower electrode of the capacitor. On this layer, a sputtered BST film 5 has been formed by physical vapor deposition (PVD) , itself covered with a photoresist layer 7, in which an opening 8 has been formed by photolithography at the position where it is desired to form an opening 19 in the BST layer.
Figure 2A shows the structure after photolithography of layer 7 and etching of layer 5. Figure 2B is a top view of the structure at this particular step. The etching of the BST layer has been performed by an acid etching solution that is a mixture of hydrofluoric acid and nitric acid in an aqueous solution, into which a non-ionic surfactant has been added. The surfactant is for example alkyl-phenoxy-polyglycidol, at a concentration between 0.1 and 1 percent, preferably between 0.2 and 0.4 percent in volume. The etching solution is for example obtained from a mixture of 1.6 liters of HF at a concentration of 1 percent, 0.14 liter of HNO3 at a concentration of 70 percent and 26.25 liters of water. The lateral etching of the BST layer is regular, as shown schematically by Figure 2B, and the amount that this lateral etching of the BST layer extends under the photoresist layer 7 is roughly reduced by a factor 2 compared to the use of the same etching solution without surfactant. Additionally, no cracks 10 appear in the BST layer from the edge 19 of the opening formed in this BST layer.
Moreover, the inventors observed that the addition of a surfactant in the acid etching solution has no influence on the etch rate of the BST layer compared to the use of the same etching solution without surfactant. It is considered that the conservation of the etch rate is related to the conservation of the acidity levels of the etching solution thanks to the non- ionic nature of the surfactant used.
By conserving the BST etch rate as compared to the use of the same etching solution without surfactant, the man skilled in the art is able to re-use the know-how concerning the etching of the BST layer, while taking advantage of the benefits related to the method described herein.
The improvement in the lateral etching (thinner and more regular) is attributed to the fact that the surfactant forms aggregates (for example micelles), that obstruct the edge of the etching area under the photoresist layer.
For example, the dimensions of the opening in the photoresist layer may be chosen such that the opening in the BST layer is between several micrometers and several hundred micrometers across .
The invention is subject to various modifications, in particular as regards the acids usable for the etching solution. Various surfactants can also be used. The metallic layer 3 that supports the BST layer and will form the lower electrode of the capacitor can be formed in a metal other than platinum. However, it will be noted that the invention specifically applies to BST layers deposited by PVD, and not to BST layers resulting from a solgel coating.

Claims

1. A method for etching a PVD deposited barium strontium titanate (BST) layer, wherein a non-ionic surfactant at a concentration between 0.1 and 1 percent in volume is added to a BST acid etching solution.
2. The method of claim 1, wherein the concentration of the surfactant is between 0.2 and 0.4 percent in volume.
3. The method of claim 1 or 2, wherein the etching solution is an aqueous solution of hydrofluoric acid and nitric acid.
4. The method of any of claims 1 to 3, wherein the surfactant is alkyl-phenoxy-polyglycidol .
5. The method of any of claims 1 to 4, wherein the BST layer lies on a platinum layer.
PCT/EP2012/056901 2011-04-20 2012-04-16 Method for etching a bst layer Ceased WO2012143325A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US14/056,698 US20140043718A1 (en) 2011-04-20 2013-10-17 Method for etching a bst layer

Applications Claiming Priority (2)

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EP11305473.8 2011-04-20
EP11305473A EP2515327A1 (en) 2011-04-20 2011-04-20 Method for etching a BST layer

Related Child Applications (1)

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Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0278628A2 (en) * 1987-01-27 1988-08-17 Olin Corporation Etching solutions containing ammonium fluoride

Family Cites Families (6)

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Publication number Priority date Publication date Assignee Title
KR100285066B1 (en) * 1997-12-06 2001-04-02 윤종용 Method of forming a capacitor having a high dielectric material
US6558517B2 (en) * 2000-05-26 2003-05-06 Micron Technology, Inc. Physical vapor deposition methods
EP1511074B1 (en) * 2003-08-01 2015-01-28 Imec A method for selective removal of high-K material
US20070007854A1 (en) * 2005-07-09 2007-01-11 James Oakes Ripple free tunable capacitor and method of operation and manufacture therefore
US8772214B2 (en) * 2005-10-14 2014-07-08 Air Products And Chemicals, Inc. Aqueous cleaning composition for removing residues and method using same
US20100112728A1 (en) * 2007-03-31 2010-05-06 Advanced Technology Materials, Inc. Methods for stripping material for wafer reclamation

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0278628A2 (en) * 1987-01-27 1988-08-17 Olin Corporation Etching solutions containing ammonium fluoride

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
KOUTSAROFF I P ET AL.: "Microwave properties of parallel plate capacitors based on (Ba,Sr)TiO3 thin films grown on SiO2/Al2O3 substrates", FERROELECTRIC THIN FILMS, 12TH SYMPOSIUM 1-4 DEC. 2003 BOSTON, MA, USA, vol. 784, 2004, Ferroelectric Thin Films, 12th Symposium (Mater. Res. Soc. Symposium Proceedings Vol.784) Mater. Res. Soc. Warrendale, PA, USA, pages 319 - 325, XP002647241, ISBN: 1-55899-722-9 *
ZHANG R T ET AL: "Wet chemical etching method for BST thin films annealed at high temperature", APPLIED SURFACE SCIENCE, ELSEVIER, AMSTERDAM, NL, vol. 254, no. 21, 30 August 2008 (2008-08-30), pages 6697 - 6700, XP023977138, ISSN: 0169-4332, [retrieved on 20080820], DOI: DOI:10.1016/J.APSUSC.2008.05.233 *

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EP2515327A1 (en) 2012-10-24
US20140043718A1 (en) 2014-02-13

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