WO2012126235A1

WO2012126235A1 - Uplink control method and system based on layer architecture

Info

Publication number: WO2012126235A1
Application number: PCT/CN2011/079691
Authority: WO
Inventors: 王莹
Original assignee: 中兴通讯股份有限公司
Priority date: 2011-03-24
Filing date: 2011-09-15
Publication date: 2012-09-27
Also published as: CN102137503B; CN102137503A

Abstract

Disclosed in present invention is an uplink control method based on layer architecture. The method comprises the following steps: executing resource scheduling in the process of random access, data space operation of dual-ported RAM(DPRAM) and uplink channel baseband signal processing based on layer architecture in uplink control for baseband processing in physical layer. Also disclosed in the present invention is an uplink control system based on layer architecture. The uplink control unit of the system is configured to execute resource scheduling in the process of random access, data space operation of DPRAM and uplink channel baseband signal processing based on layer architecture in uplink control for baseband processing in physical layer. With the method and system in the present invention, uplink control can be realized from the perspective of baseband processing.

Description

Uplink control method and system based on hierarchical structure

The present invention relates to the field of wireless mobile communications, and in particular, to an uplink control method and system for user equipment (UE) in baseband chip processing applied to time division duplex synchronous code division multiple access (TD-SCDMA). Background technique

The TD-SCDMA mobile communication system is a third-generation mobile communication standard proposed by China and is one of the three major standards in the world. At present, TD-SCDMA has gradually been applied in China. TD-SCDMA is a synchronous system with strict synchronization requirements for uplink and downlink. In idle mode, only downlink synchronization is established between the UE and the base station. At this time, the UE side does not know the distance to the base station, and cannot accurately know the transmission power and timing advance required for transmitting the RRC connection request message. Therefore, the UE completes the uplink synchronization process with the base station through the random access procedure. And transmitting a layer 3 message on a Physical Random Access Channel (PRACH). Similarly, after receiving the RRC connection setup message, the UE sends an RRC connection setup complete message on the dedicated physical channel (DPCH) channel according to the requirements of layer 3 signaling, and then still completes the data with the base station on the DPCH link. Interaction and signaling interaction. When there is no Media Access Control (MAC) layer valid data, the physical layer automatically sends a discontinuous transmission (DTX) burst to maintain uplink synchronization.

In the existing uplink control scheme, the problem of uplink synchronization and uplink power control of the application layer is mostly concerned, and the synchronization power control scheme of the UE and the base station side is focused. However, for the underlying physical layer, uplink control is not addressed from the perspective of baseband processing. Summary of the invention

In view of the above, it is a primary object of the present invention to provide a hierarchical structure-based uplink control method and system that solves uplink control from the perspective of baseband processing.

In order to solve the above technical problem, the technical solution of the present invention is implemented as follows:

A hierarchical structure-based uplink control method, comprising: performing resource scheduling, dual port random access memory (DPRAM) data space of a random access procedure based on a hierarchical structure in uplink control for physical layer baseband processing Operation and uplink channel baseband signal processing;

The hierarchical structure includes: a scheduling layer that organizes and manages all task scheduling and coordination within the physical layer, a device management layer that performs corresponding tasks according to resources configured by the scheduling layer, and performs baseband signals according to data acquired from the device management layer. The driver layer being processed.

The scheduling of the random access procedure resource that is performed according to the hierarchical structure specifically includes: implementing, by using the scheduling layer, resource application and scheduling, and each time a new random access procedure is initiated, calculation includes uplink (UP) transmission. Time slot, fast access indicator channel (FPACH) receive time slot and physical random access channel (PRACH) transmit time slot.

The method further includes: a module for scheduling the UP transmission slot, the FPACH receiving slot, and the PRACH transmission slot to be scheduled by the scheduling layer module and configured to the device management layer.

The operation of the DPRAM data space based on the hierarchical structure specifically includes: after acquiring the resources configured by the scheduling layer, the device management layer performs a DPRAM data space operation according to resources configured by the scheduling layer, for only normal service data. The read operation, under the control of the module of the scheduling layer, schedules the query of the data in the current DPRAM in each sub-frame. If there is data to be read, the data to be read is selected to be directly copied according to the data of the query. Move to the upstream hardware random access memory, or choose to transfer the read data to the upstream hardware random access memory by starting dynamic memory access (DMA).

The method further includes: when the module of the scheduling layer cooperates with the module of the device management layer, using a global variable flag to notify each subframe whether data is carried to the uplink hardware. Need to be sent in the reservoir;

If there is no data to send, the resource block (SB) data is transmitted using discontinuous transmission (DTX).

The processing of the uplink channel baseband signal performed based on the hierarchical structure specifically includes: when performing baseband signal processing according to data acquired from a device management layer, the N_data outputted by the input Ni is obtained by the input N_data. Delta_N, performing selected rate matching by the input Delta_N, and finally obtaining an E parameter for baseband signal transmission; wherein, Ni is the number of bits of one radio frame before the transmission channel i rate matching; N_data is a code division combined transmission channel ( CCTrCH ) The number of data bits in the frame; Ddta_N is the number of bits punched or repeated.

An uplink control system based on a hierarchical structure, comprising: an uplink control unit, configured to perform resource scheduling and DPRAM of a random access procedure based on a hierarchical structure in uplink control for physical layer baseband processing Data space operation and uplink channel baseband signal processing; the hierarchical structure includes: a scheduling layer that organizes and manages all task scheduling and coordination within the physical layer, a device management layer that performs corresponding tasks according to resources configured by the scheduling layer, and a slave device according to the slave device The data acquired by the management performs the driver layer of baseband signal processing.

The uplink control unit is further configured to: when performing the random access procedure resource scheduling based on the hierarchical structure, implement resource application and scheduling by using the scheduling layer, and initiate a new each time The random access procedure needs to calculate resources including an UP transmission slot, a FPACH reception slot, and a PRACH transmission slot.

The uplink control unit is further configured to: after performing the DPRAM data space operation based on the hierarchical structure, after the device management layer acquires the resource configured by the scheduling layer, configured according to the scheduling layer Resources, perform DPRAM data space operations, for read operations with only normal service data, under the control of the module of the scheduling layer, query the data in the current DPRAM in each sub-frame, if there is data to be read, according to the query Data situation selection, the data read is directly transferred to the uplink hardware random access memory, Or choose to transfer the read data to the upstream hardware random access memory by means of boot DMA. The uplink control unit is further configured to: when performing the uplink channel baseband signal processing based on the hierarchical structure, when performing baseband signal processing according to data acquired from a device management layer, by inputting Ni Obtaining the output N_data, obtaining the output Delta_N from the input N_data, performing the selected rate matching by the input Delta_N, and finally obtaining the E parameter for the baseband signal transmission; wherein, Ni is a radio frame before the transmission channel i rate matching Number of bits; N_data is the number of data bits in a code division combined transport channel (CCTrCH) frame; Delta_N is the number of bits punched or repeated.

In the uplink control for physical layer baseband processing, the present invention performs resource scheduling, dual port random access memory (DPRAM) data space operation, and uplink channel baseband signal processing based on a hierarchical structure; the hierarchical structure includes: A scheduling layer that organizes and manages all task scheduling and coordination within the physical layer, a device management layer that performs a corresponding task according to resources configured by the scheduling layer, and a driving layer that performs baseband signal processing according to data acquired from the device management layer. With the present invention, uplink control of the underlying physical layer can be realized by interaction and cooperation of layers in the hierarchical structure. DRAWINGS

1 is a schematic diagram of an implementation principle of an uplink layered design according to the present invention;

2 is a schematic diagram of resource application timing of a random access procedure according to the present invention;

FIG. 3 is a schematic diagram of timing of resource application for PRACH according to the present invention;

4 is a schematic diagram of timing of reading DPRAM data according to the present invention;

Figure 5 is a schematic view showing the calculation principle of Ni of the present invention;

6 is a schematic diagram of a calculation principle of N-data according to the present invention;

7 is a schematic diagram of a calculation principle of Ddta_N according to the present invention;

8 is a schematic diagram of a selection principle of a rate matching algorithm according to the present invention;

9 is a schematic diagram of the e-parameter calculation principle in the Turbo punching mode of the present invention; FIG. 10 is a schematic diagram showing the principle of e-parameter calculation in the uncoded, convolutional coded or Turbo repeat mode of the present invention. detailed description

The basic idea of the present invention is: in the uplink control for the physical layer baseband processing, performing resource scheduling, DPRAM data space operation, and uplink channel baseband signal processing of the random access procedure based on the hierarchical structure; the hierarchical structure includes: And a scheduling layer that manages all task scheduling and coordination within the physical layer, a device management layer that performs a corresponding task according to resources configured by the scheduling layer, and a driving layer that performs baseband signal processing according to data acquired from the device management layer.

The implementation of the technical solution will be further described in detail below with reference to the accompanying drawings.

The present invention is based on a hierarchical structure uplink control scheme, and for the underlying physical layer uplink control, reveals an uplink working mode of the physical layer, which is based on a hierarchical structure, interaction between layers, and coordinated processing from baseband signals. From the perspective of the uplink control, the processing of the uplink channels and the handling and signal transmission of common service data can be finally completed.

An uplink control method based on hierarchical structure mainly includes the following contents: From the perspective of physical layer software of TD-SCDMA system, the entire software architecture introduces a hierarchical structure design, which is divided into three layers: scheduling layer, device Management and driver layers, as shown in Figure 1. The scheduling layer is used to organize and manage the scheduling and coordination of all processes (also called tasks) within the physical layer; the device management layer is used to complete the corresponding tasks under the specified time and resource conditions configured by the scheduling layer, and to carry data to the driver. Layer; The driver layer is used to perform a specific independent function implementation, that is, to perform functions such as baseband signal processing based on data carried by the device management layer. All processes (also called tasks) of the physical layer are completed by interaction and cooperation of the three.

The following is a description of the various layers, and the modules that are primarily involved in each layer.

As far as the scheduling layer is concerned, for the normal uplink service, the high speed uplink packet access (HSUPA) service is not included, and the process involved in the scheduling layer includes a random access (RACH) process and a dedicated channel (DCH) transmission process, and mainly completes the uplink processes. Interaction with the protocol stack, activation deactivation, resource calculation, Resource application and delivery of network side parameters to device management. These tasks are mainly performed by the scheduling layer module, such as the master control module of the scheduling layer, a physical layer scheduling master control (LIS) module, and the LIS module scheduling control process, according to the current different physical layer states, for multiple protocols. The task request of the stack, considering the hardware design and the limitation of common resources such as radio, is used for unified resource scheduling, and the conflicting processes are allocated to execute on different time units to achieve the purpose of conflict resolution.

As far as the device management layer is concerned, the process related to the device management layer is completed by the module-receiving (RTX) module of the device management layer. Here, the RTX module is specifically divided into a TX module for controlling transmission and an RX module for controlling reception. . The main functions of the RTX module include: response to the scheduling layer commands (channel configuration, channel deletion), scheduling management of uplink physical channel processing (TX) devices, uplink transport channel processing (UTR) devices and other hardware devices, hardware-generated results Post processing. The triggering of the control process is mainly caused by the interrupt signal generated by the time management unit (TPU). The TPU advances a time offset (offset) when the timing of the transmitting event arrives, and the TX device is notified by the message, and the related data processing is completed by the TX device. In terms of performance, the TX device occupies less CPU resources for channel configuration and deletion. The main CPU usage is the post-processing part. The main algorithms are transport block cascading and segmentation algorithms, channel coding, and radio frame length. The equalization algorithm and the rate matching parameter calculation algorithm can basically meet the physical layer uplink timing and control requirements specified by the 3GPP protocol.

In terms of the driver layer, the driver layer related modules include a TX driver and a UTR driver, which perform physical channel processing and transport channel processing, respectively. The main processing tasks include: Scheduling internal events and state management by software; TX/UTR hardware register configuration by software; CRC encoding by hardware; channel coding by hardware; TFCI coding by hardware; The first interleaving of hardware implementation (also known as 1st interleaving); rate matching by hardware; bit scrambling by hardware; second interleaving by hardware, also known as 2nd interleaving (frame correlation, Time slot related); Supported by software to implement DTX.

In summary, the present invention focuses on the physical layer software of the UE in the TD-SCDMA system. In the uplink channel processing and link design, according to the physical layer behavior specification specified by 3GPP and the operating principle according to the real-time operating system (OSEck), the hierarchical division is adopted, and the hierarchy is divided by different levels, and the timing of different levels and modules is guaranteed. The relationship between logic and hardware and software fully embodies the principle of loosely coupled tight cohesion; introduces resource application to solve the problem of resource conflicts between multiple processes in the physical layer in a certain period of time; uses DPRAM data space to read and use database ping pong Buffer, to ensure the correctness of the timing of data handling and the correctness of the parameters of the switching reconfiguration; baseband signal processing is superior to the algorithm of the prior art. The key technologies adopted based on the hierarchical structure are: public resource scheduling and resource application, reading of DPRAM data space, use of ping-pong BUFFER in the database, and baseband signal processing to finally complete the processing of uplink channels and the handling of common service data. emission.

The invention is illustrated by way of example below.

Embodiment 1: Taking random access as an example, the resource scheduling of the random access process in the process of uplink channel processing is described.

The resources required for the random access process are not fixed and need to be calculated according to the configuration parameters of the protocol stack. Each time a new random access procedure is initiated, these resources need to be calculated. These resources include: 1) UP transmission time slot; FPACH receive time slot; 3) PRACH transmit time slot (or E_RUCCH transmit time slot).

The above three parts of resources need to be calculated for the random access procedure initiated by the protocol stack or the enhanced random access procedure initiated by the HSUPA. For the uplink synchronization initiated by the hard handover, only the first two resources need to be calculated.

The random access procedure is allocated resources by the LIS task, wherein the reception of the UP transmission slot and the FPACH reception slot is scheduled by the LIS module, and the transmission of the PRACH transmission slot is arranged in the RTX module due to its tight timing.

as shown in picture 2:

The 0th subframe, the protocol stack message (PS message) is delivered, and the LIS module activates the RACH process. Calculate resources and apply for resources. The resources to be applied for the normal random access procedure are the idle (IDLE) resources of the UP, FPACH, and PRACH slots of the 6th to 12th subframes. The enhanced random access also needs to apply for the 6th subframe. TX resources;

In the 1st to 5th subframes, each sub-frame LIS module applies for resources for the random access procedure. Until the fifth subframe request returns a value of True, the LIS sends a parameter configuration message (including the RSCP value) sent by the UP to the RTX module, and the RTX module configures the parameter, and opens the UP slot of the next subframe to TX;

In the sixth subframe, the RTX module sends an UP, and the LIS module sends a parameter configuration message of the FPACH reception to the RTX module, and the RTX module sends a message to the RFC module to notify the FPACH time slot of the next subframe to be RX;

In the 7th to 10th subframes, the RTX module listens to the corresponding FPACH Burst, and each subframe sends a message to the RFC module to notify that the FPACH slot of the next subframe is opened as RX;

In the 10th subframe, the RTX module successfully receives the FPACH Burst, calculates the PRACH transmission subframe number, and sets the PRACH transmission time slot to TX;

After the 12th subframe, PRACH (or E-RUCCH) is sent, the RTX (HSPA) module feeds back the message to the RACH process, and the RACH process sends the response to the random access successfully to the protocol stack.

After the UE successfully receives the FPACH, if it is a complete random access procedure, it also needs to send a PRACH physical channel. As shown in FIG. 3, a limit case is considered, that is, when the FPACH receiving time slot is TS6 and the PRACH TTI is 20 ms, the RF resource of 4 subframes needs to be applied for the PRACH transmission, because the FPACH is arbitrary in the WT subframes. Sub-frames are all possible to receive, so they are divided into the following four cases:

The FPACH is received in the nth subframe, and the transmission subframe of the PRACH is: n+2, n+3, n+4, n+5;

The FPACH is received in the n+1th subframe, and the transmitting subframe of the PRACH is: n+4, n+5, n+6, n+7; FPACH is received in the n+2th subframe, and the transmitting subframe of the PRACH is: n+4, n+5, n+6, n+7;

The FPACH is received in the n+3th subframe, and the transmission subframe of the PRACH is: n+6, n+7, n+8, n+9.

Therefore, the possible transmission slots of the PRACH occupy the resources from the n+2 subframe to the n+9th subframe, and the FPACH resources, and the entire random access procedure applies for a total of 11 subframes of radio resources.

Because the receiving time slot of the FPACH is TS6, if the RTX module successfully receives the FPACH in the nth subframe, the time point reported to the LIS module will be delayed to the n+1th subframe, then the LIS cannot reach the n+2. The PRACH slot of the subframe is set to TX and the RTX is scheduled to transmit the PRACH in the n+2th subframe. Considering the existence of such a worst case, the LIS is only likely to be used when applying for the PRACH resource. The radio frequency slot is set to IDLE, and the radio frequency slot to be sent by the RTX device layer itself is set to the TX state.

If the FPACH Burst is not successfully detected in the WT sub-frame, the RTX module will report the result of the failure in the n+4th subframe to the LIS module, and the LIS module will release the subsequent RPACH transmission in the n+5th subframe. Resources, waiting for the next re-initiation of the random access procedure.

Embodiment 2: Explain the operation of the DPRAM data space in the process of uplink channel processing.

The exchange between the physical layer and the protocol stack is performed by DPRAM. For read operations with only normal service data, it is mainly done by the LIS module. The implementation manner is as follows: The LIS module starts to query the data in the DPRAM under the scheduling of each sub-frame (ie: querying whether there is data to be read in the DPRAM), if there is data to be read, according to the data of the query, The read data is transferred to the upstream hardware RAM by direct copy or the read data is transferred to the uplink hardware RAM by means of starting DMA. The LIS module and the TX module use the global variable flag FLAG to notify whether each subframe has data to be sent to the uplink hardware and needs to be sent. If there is no data to be transmitted, the SB data is sent in the DTX mode. Move At the same time, the data needs to be stored in the device layer database together with the parameters such as the TB Size in the data header and the data tag, so that the TX module can query and use the parameter. The specific timing relationship is shown in Figure 4. It can be seen that: 1) In the absence of high-speed service HSUPA, the protocol stack sends data in the first three sub-frames of the ΤΉ boundary (arrows point to the upper dotted arrow), LIS module The upper 2 data of the first two sub-frames of the ΤΉ boundary (the arrow pointing to the upper solid arrow) identifies that there is uplink data in the DPRAM, and then the LIS module decides to copy the data in the DPRAM to the UTR by DMA or direct copy. In the hardware RAM, the RTX module will judge that there is new data to be sent in the first subframe of the ΤΉ boundary, configure the uplink hardware to do coding, etc., the hardware will take effect and transmit at the ΤΉ boundary; 2) In the case of high-speed service HSUPA In addition to the above case 1), it is also possible to send data in the first 3 frames of the ΤΉ boundary (the arrow pointing to the arrow above the arrow), and at the same time, the sub-frame breaks the line (the arrow points downwards) The UPA data is sent at the dotted arrow. The LIS module needs to move the normal uplink data to the UTR hardware RAM at the time of TS5, and move the UPA data to the high-speed uplink transmission channel. EUTR) hardware RAM, and then can update the read data position in the DPRAM, here is a bit bad because the DMA has no priority, so you need to move the normal uplink data and then move the UPA data, but consider the normal uplink data volume in the UPA data. Large, so it should not be affected; 3) From the above 1) and 2) It can be seen from the above two points that the LIS module can read ordinary data from the DPRAM to the UTR hardware in two places: 前 the first two sub-frames; TS5 of the first 3 subframes (may be a bit risky, but the old data has already been encoded in TS1 of the subframe, and the hardware will actively dump the old data into the internal RAM, so the new normal service data of TS5 will not be overwritten. Affect the old data, and when the UPA data is considered, the amount of normal uplink data is very small. It should be coded before TS5, and the new data should have no effect on the old data.)

Since the physical layer is in the channel receiving and transmitting process, the protocol stack often has parameter changes and needs to be reconfigured and switched by the physical layer. The main channel has DCH. At this time, the physical layer needs to be used simultaneously with the old and new configurations. Save two sets of configurations. This involves the number of layers in the physical layer. According to the use of the ping-pong BUFFFER in the library.

When the LIS module receives the channel new configuration, it writes the channel configuration parameters into the corresponding idle location of the device layer database, and records the current use channel storage location (that is, the A-set configuration or the B-set configuration).

When receiving the channel reconfiguration and handover, the LIS module writes the channel configuration parameters into the corresponding idle locations of the device layer database, and updates and records the current used channel storage location until the set configuration takes effect.

As can be seen from the above, the update of the parameter configuration of the LIS module/device layer database is real-time. The LIS module should save two sets of channel configuration pointers and channels and record the current use channel storage location, and pay attention to the "record the current use channel storage location" update (the updated time point is one subframe before the new parameter configuration is valid) .

Embodiment 3: Describe the baseband signal processing of the uplink channel in the uplink channel processing.

For the uplink, the possible value of N_data depends on the number of physical channels P _max allocated to the respective code division combined transport channel (CCTrCH), and also depends on their characteristics, such as spreading factor, intermediate pilot and transport format combination indication. The length of (TFCI), Transmission Power Control (TPC) and the use of multi-frame structures. The upper layer indicates a single minimum spreading factor for each physical channel, or the upper layer informs the UE to change the uplink spreading factor at its discretion.

For a radio frame or subframe, when TTI = 5 ms, the number of bits retransmitted or punctured is defined as ANy for each transport channel (TrCHi) within a radio frame or sub-frame. If ANy = 0, the rate matched output data is the same as the input data, and there is no need to perform the rate matching algorithm in the protocol. Otherwise, the rate matching mode is calculated according to the algorithm. The parameters E _ini , E _plus , pressure and Xi are required in this algorithm. Among them, E _ini , E _plus and E^us can be collectively referred to as E parameters. E _ini is the initial value of the variable E used by the rate matching algorithm; is the increment of the variable E used by the rate matching algorithm; E^us is the decrement of the variable E used by the rate matching algorithm.

(1) Calculation of Ni: Ni represents the bit of a radio frame before the transmission channel i rate matches Number. Figure 5 shows the specific calculation process of Ni, including the following steps:

Step 101: Start executing the for loop: for ( i = 0; i < MAXIMUM_UL_TRCH; i++ ). Here, i is a loop variable; MAXIMUM_UL_TRCH is the maximum number of uplink transport channels.

Step 102: Determine whether the Trch[i] state is active. If yes, execute step 103; otherwise, perform step 104. Here, Trch[i] is the i-th transport channel.

Step 103: Calculate Trch[i] the number of bits n_bits including the CRC check bit, and then perform step 105, step 111 or step 115 according to the coding type.

Here, n_bits=Trch[i] .wTb_size+Trch[i] .wCrc_ size;

N-bits=n_bits* ( Trch[i].wTb_num );

wTb_size is the transport block size; wCrc_size is the checksum size; wTb_num is the number of transport blocks.

Step 104: Ni=0 of Trch[i] returns to the for loop of step 101 until the end of the loop.

Step 105: The coding type is convolutional coding.

Step 106: The transport block cascading and the segment maximum code block length Z=504.

Step 107: Obtain the number of code blocks n_code_block and the number of bits of each code block code_block_size.

Step 108: Determine whether it is 1/2 convolutional coding. If yes, go to step 110; otherwise, go to step 109.

Step 109: Channel coding n-bits = (code_block_size * 3 + 24) * n_code_block, and then step 117 is performed.

Step 110: Channel coding n-bits = (code_block_size * 2 + 16) * n_code_block, and then step 117 is performed.

Step 111: The coding type is Turbo coding.

Step 112: The transport block cascading and the segment maximum code block length Z=5 U4. Step 113: Obtain a code block number n_code_block and a bit number code_block_size of each code block.

Step 114: Channel coding n_bits = (code_block_size * 3 + 12) * n_code_block, and then step 117 is performed.

Step 115, no coding.

Step 116, n_code_block= 1 code_block_size=n_bits.

Step 117: Radio frame length equalization Ni=n_bits/TTI.

Step 118: Obtain the Ni value of Trch[i], and return to the for loop of step 101 until the end of the loop. (2) Calculation of N_data: Calculate the number of data bits N_data in one CCTrCH frame. The calculation principle has the following contents:

, ^ tempi = PL * ^ (RM _X * N _X )

First, the calculation is true *=!

Both tempi and temp2 refer to intermediate variables; PL is the puncturing parameter; RM is the semi-static rate matching characteristic of transport channel i.

Second, calculate mp^^mpl / miniR. If the upper layer assigns a separate minimum spreading factor Spmin to each physical channel, the N_data value is selected from the following ascending order: 1 , U, + fo , U, + fo + ... + f/ p ( cp ) [

If the upper layer informs the UE that the uplink spreading factor can be changed at its own discretion, the N_data value is selected from the following sequence of ascending order: where U is the data bit variable of each physical channel; the first subscript Pmax of U is the physical channel sequence. No., the uplink Pmax is at most 2; the second subscript (SPmax) min of U is the spreading factor number.

Selection method: Starting from the left side of the sequence, select the first value greater than or equal to temp2 as the value of N_data.

3. Modify the number of physical channels and each physical channel according to the content of the second step above. Data length, calculation

Figure 6 shows the specific calculation process of N-data, including the following steps:

Step 201, initialization.

Step 202: Calculate total_RMN=∑RM[i]*N[i] and RMN[i]=RM[i]*N[i]. Step 203, RMmin = min(RM[i]).

Step 204: Calculate the initial N_data; first calculate temp2 = [PL*total_RMN/RMmin] Step 205, determine whether the UE changes the radio frequency (SF) by itself, and if yes, execute step 214; otherwise, execute step 206.

Step 206, for (t=0; t< wUl_ts_num; t++). Here, wUl_ts_num is the number of upstream slots.

Step 207, for (i=0; i< RU_Max; i++). Here, RU is the code channel; RU_Max is the maximum value of the code channel.

Step 208: Calculate a non-DATA bit of each RU ControlBitNum[i]=(TFCI codeword + TPC_SS bit).

Step 209: Press Spmin to calculate the effective number of bits RUBitNum of each RU of the radio frame,

The number of 5ms RACH bits is halved.

Step 210: Calculate each RU data bit RUBitNum=RUBitNum - ControlBitNum[i].

Step 211: Accumulate N_data= N_data+ RUBitNum. Here, RUBitNum is the number of code bits.

Step 212: Determine whether N_data>=temp2, if yes, execute step 213; otherwise, execute step 206.

Step 213: Output N_data, and end the current process.

Step 214, for (t=0; t< wUl_ts_num; t++).

Step 215, for (i=0; i<RU-Max; i++). Step 216, for(sf=16; sf>=l; sf=sf/2). Here, sf is a spreading factor.

Step 217: Calculate a non-DATA bit of each RU ControlBitNum[i]=(TFCI code word + TPC_SS bit).

Step 218: Each RU starts from SF=16, and calculates the effective number of bits RUBitNum, and the number of 5ms RACH bits is halved.

Step 219, SF_Select [i] »=1; RUBitNum «=1.

Step 220: Calculate each RU data bit RUBitNum=RUBitNum - ControlBitNum[i].

Step 221, N_data += RUBitNum.

Step 222: Determine whether N_data>=temp2 or sf to the upper layer configuration. If yes, go to step 223; otherwise, go to step 214.

Step 223: Output N_data.

(3) The calculation principle of Delta_N includes the following contents:

According to the actual number of data bits N_data that can be transmitted, and the RM parameter of each TrCH, the number of data bits that can be transmitted is proportionally allocated to each TrCH, and the number of bits punched or repeated Ddta_N is obtained.

The formula for calculating the specific proportion is as follows:

Z _n ,. = 0.

^ =^-Z^-N _{for alH =} i ... _I; Here, in the above formula, N _tJ represents the number of bits of one radio frame before the transmission channel i rate matches;

AN. If positive, represents the number of bits per radio frame repetition in transport channel i; Negative, representing the number of bits perforated in each radio frame in transport channel i;

RM _; represents a semi-static rate matching characteristic of the transmission channel i, which is set by higher layer signaling; represents the total number of bits available for one CCTrCH channel in one radio frame; I represents the number of transmission channels constituting one CCTrCH;

Is an intermediate variable used for calculations;

Figure 7 shows the specific calculation process of Ddta_N, including the following steps:

Step 301, for (i=l; i< TransNum-1; i++).

Step 302, Z[i] = (RMN[i]*N_data) I Total_RMN; Z[0] = Z[l].

Step 303: Determine whether the for loop ends. If yes, execute step 304; otherwise, perform step 301.

Step 304: Determine whether Total_RMN! = 0. If yes, execute step 305; otherwise, go to step J, and go to step 307. Here, "! =" means not equal.

Step 305: Calculate Ddta_N[i] = Z[i]-Z[i-l]-N[i]; Ddta_N[0] = Z[0]-N[0]. Step 306: Check whether N[i]+Ddta_N[i] on all channels is equal to N_data, and if yes, return a for loop; otherwise, go to step 311.

Step 307: Determine whether the N[i] cumulative sum on all transport channels is 0; if yes, go to step 308; otherwise, go to step 310.

Step 308, Ddta_N[i] = 0.

Step 309: Return UTR_IND_NO_DATA_TO_TRANSMIT, indicating that there is no data to be transmitted, and the current process is ended.

Step 310: Return UTR_ERROR_DELTA_N_IMPOSSIBLE, indicating the value of the wrong Delta_N, and ending the current process.

Step 311: Return UTR_ERROR_RM_INIT_INCORRECT, indicating a rate matching initialization error.

(4) Figure 8 shows the selection of the rate matching algorithm. The specific selection process includes the following steps: Step 401: Determine whether ΔΛ^.=0; if yes, execute step 402; otherwise, perform step 403.

Step 402: Adopt a rateless matching algorithm to end the current process.

Step 403: Determine whether AN _w >0; if yes, execute step 407; otherwise, perform step 404.

Step 404: Determine whether the coding type is Turbo coding, and if yes, perform step 405; otherwise, perform step 406.

Step 405: Select a Turbo puncturing algorithm according to the number of parameter sub-frames (frame_number) in the Fi and the state machine, and end the current process. Here, Fi is a multiple of the transmission time interval.

Step 406: Using a convolution reduction punching algorithm to end the current process.

Step 407: Adopt a repetition bit algorithm.

FIG. 9 and FIG. 10 respectively show the calculation process of the E parameter under different coding types, that is, FIG. 9 is a specific implementation process of the E parameter calculation performed by the selection of the puncturing algorithm shown in step 405; FIG. 10 is a selection step 406. The illustrated puncturing algorithm corresponds to the specific implementation process of the E parameter calculation performed.

5) As shown in FIG. 9, the process of calculating the E parameter by using the Turbo puncturing algorithm includes the following steps: Step 501: Determine whether Ddta_N=0, and if yes, return; otherwise, execute step 502. Step 502, Xi=Ni/3.

Step 503, the first parity bit, b=2, a=2.

Step 504, BitSubNum = Ddta_N>>l. "BitSubNum=Ddta_N>>l,, means that Delta-N is shifted to the right by one.

Step 505, calculate q = Xi / (-BitSubNum).

Step 506: Determine whether <=2, if yes, execute step 507; otherwise, execute step 509.

Step 507, for (i=0; i<TTI; i++). Step 508, S[(3*i+1)%TTI] = i%2, and then perform step 50 ⁷ and step 51 ⁴ .

Step 509: Determine whether (q&l) = 0. If yes, execute step 510; otherwise, execute step 517.

Step 510: Use the twisted phase division to find the greatest common divisor gcd(q, TTI).

Step 511, qnew = q-gcd/TTI.

Step 512, for (i=0; i<TTI; i++).

Step 513, S[((**qnew)%TTI+l)%TTI] = (i*qnew)/TTI, and then step 512 and step 514 are performed.

Step 514: Obtain an E parameter as:

Eplus_l = 2*Xi;

Eminus— 1 = 2*abs(BitSubNum);

Eini— 1 = (2*S[PlFi]* abs(BitSubNum) +Xi)% (2*Xi).

Step 515: Determine whether Eini_l =0, if yes, go to step 516; otherwise, return. Step 516, Eini_l = 2*Xi, and then return.

Step 517, qnew = q, and then step 512 is performed.

Step 518, the second parity bit, b=3, a=l.

Step 519, BitSubNum = (Delta_N+l)»l.

Step 520: Determine whether BitSubNum =0, and if yes, return; otherwise, go to step 521.

Step 521, calculate q = Xi / (-BitSubNum).

Step 522: Determine whether 9<=2, if yes, execute step 523; otherwise, go to step 525.

Step 523, for (i=0; i<TTI; i++).

Step 524, S[(3*i+2)%TTI] = i%2, and then step and step 530 are performed.

Step 525, determining whether (q&l)=0, if yes, executing step 526; otherwise, performing step Step 533.

Step 526, using the twisting phase division to find the greatest common divisor gcd(q, TTI).

Step 527, qnew = q-gcd/TTI.

Step 528, for (i=0; i<TTI; i++).

Step 529, S[((**qnew)%TTI+2)%TTI] = (i*qnew)/TTI, and then step 528 and step 530 are performed.

Step 530: Obtain an E parameter as:

Eplus_2 = Xi;

Eminus_2 = abs(BitSubNum);

Eini— 2 = (S[PlFi]* abs(BitSubNum) +Xi)% Xi.

Step 531: Determine whether Eini_2 =0. If yes, go to step 532; otherwise, return. Step 532, Eini_2 = Xi.

Step 533, qnew = q, and then go to step 528.

As shown in FIG. 10, the process of calculating the E parameter by using the convolution reduction puncturing algorithm includes the following steps: Step 601: Determine whether Ddta_N=0, if yes, return, otherwise, perform step 60, step 602, Xi=Ni, a=2, BitSubNum=Ddta_N.

Step 603: Calculate R = Delta_N mod Ni.

Step 604: Determine whether R≠0 and R<=Ni/2, if yes, execute step 605; otherwise, execute step 606.

Step 605: Calculate q = Ni/R, and then perform step 607.

Step 606, calculating q = Ni / (R - Ni).

Step 607: Determine whether (q&l) = 0. If yes, execute step 608; otherwise, execute step 609.

Step 608: Use the 辗 phase division to find the greatest common divisor gcd(lql, TTI).

Step 609, qnew = q, and then step 611 is performed. Step 610, qnew = q+ gcd/TTI.

Step 611, for (i=0; i<TTI; i++).

Step 612, S[(li*qnewl%TTI)%TTI] = li*qnewl/TTI, and then step 611 and step 613 are performed.

Step 613, obtaining the E parameter is:

Eplus= 2*Xi;

Eminus= 2*abs(BitSubNum);

Eini = (2*S[PlFi]* abs(BitSubNum) +1)% (2*Xi).

An uplink control system based on a hierarchical structure, the system comprising: an uplink control unit, configured to perform resource scheduling of a random access procedure based on a hierarchical structure in uplink control for physical layer baseband processing The DPRAM data space operation and the uplink channel baseband signal processing; the hierarchical structure includes: a scheduling layer that organizes and manages all task scheduling and coordination within the physical layer, a device management layer that performs corresponding tasks according to resources configured by the scheduling layer, and The data acquired from the device management layer performs the driving layer of the baseband signal processing.

Here, the uplink control unit is further configured to: when the random access procedure resource scheduling is performed based on the hierarchical structure, implement resource application and scheduling by using the scheduling layer, and initiate a new random access procedure each time. All resources including the UP transmission slot, the FPACH reception slot, and the PRACH transmission slot are calculated.

Here, the uplink control unit is further configured to: after the device management layer acquires the resource of the scheduling layer configuration, perform the DPRAM according to the resource configured by the scheduling layer, where the DPRAM data space operation is performed based on the hierarchical structure. Data space operation, for a read operation with only normal service data, under the control of the module of the scheduling layer, the data in the current DPRAM is scheduled and scheduled in each sub-frame. If there is data to be read, the data will be selected according to the queryed data. The read data is directly transferred to the uplink hardware random access memory, or the read data is transferred to the uplink hardware random access memory by using the startup DMA. Here, the uplink control unit is further configured to: when performing the uplink channel baseband signal processing based on the hierarchical structure, obtain N_data outputted from the input Ni when performing baseband signal processing according to data acquired from the device management layer. Delta_N obtained by the input N_data, performing selected rate matching by the input Delta_N, and finally obtaining an E parameter for baseband signal transmission; wherein, Ni is the number of bits of a radio frame before the transmission channel i rate matching; N_data The number of data bits in a code division combined transport channel (CCTrCH) frame; Delta_N is the number of bits that are punctured or repeated.

The above is only the preferred embodiment of the present invention and is not intended to limit the scope of the present invention.

Claims

Claim

A hierarchical structure-based uplink control method, comprising: performing resource scheduling and two-port randomization of a random access procedure based on a hierarchical structure in uplink control for physical layer baseband processing; Memory (DPRAM) data space operation and uplink channel baseband signal processing;

The method according to claim 1, wherein the scheduling of the random access procedure resource based on the hierarchical structure specifically includes: implementing resource application and scheduling by using the scheduling layer, each time starting a new The random access procedure needs to calculate resources including an uplink (UP) transmission slot, a fast access indication channel (FPACH) reception slot, and a physical random access channel (PRACH) transmission slot.

The method according to claim 2, further comprising: a module that allocates a UP transmission time slot, a FPACH reception time slot, and a PRACH transmission time slot to the device management layer after being scheduled by a module of the scheduling layer.

The method according to claim 1, wherein the operation of the DPRAM data space based on the hierarchical structure specifically includes: after the device management layer acquires the resource configured by the scheduling layer, configured according to the scheduling layer Resources, perform DPRAM data space operations, for read operations with only normal service data, under the control of the module of the scheduling layer, query the data in the current DPRAM in each sub-frame, if there is data to be read, according to the query The data case is selected to be directly copied to the upstream hardware random access memory, or the read data is transferred to the uplink hardware random access memory by using a dynamic memory access (DMA).

5. The method according to claim 4, wherein the method further comprises: a scheduling layer When the module cooperates with the module of the device management layer, the global variable flag is used to notify each subframe whether data is transferred to the uplink hardware random access memory and needs to be sent;

The method according to claim 1, wherein the processing of the uplink channel baseband signal performed based on the hierarchical structure specifically comprises: when performing baseband signal processing according to data acquired from a device management layer, Ni obtains the output N_data, the Ddta_N obtained by the input N_data, performs the selected rate matching by the input Ddta_N, and finally obtains the E parameter for the baseband signal transmission; wherein, Ni is a radio frame before the transmission channel i rate matching The number of bits; N_data is the number of data bits in a code division combined transport channel (CCTrCH) frame; Ddta_N is the number of bits punched or repeated.

A hierarchical structure-based uplink control system, comprising: an uplink control unit, configured to perform random access based on a hierarchical structure in uplink control for physical layer baseband processing Process resource scheduling, DPRAM data space operation, and uplink channel baseband signal processing; the hierarchical structure includes: a scheduling layer that organizes and manages all task scheduling and coordination within the physical layer, and performs device management of corresponding tasks according to resources configured by the scheduling layer A layer, and a driver layer that performs baseband signal processing based on data acquired from the device management layer.

The system according to claim 7, wherein the uplink control unit is further configured to: when performing the random access procedure resource scheduling based on the hierarchical structure, by using the The scheduling layer implements resource application and scheduling, and each time a new random access procedure is initiated, resources including an UP transmission slot, a FPACH reception slot, and a PRACH transmission slot are calculated.

The system according to claim 7, wherein the uplink control unit is further configured to: in a case where the DPRAM data space operation is performed based on the hierarchical structure, the device management layer acquires After the resources configured by the scheduling layer are described, according to the resources configured by the scheduling layer, Perform DPRAM data space operation. For read operations with only normal service data, under the control of the module of the scheduling layer, query the data in the current DPRAM in each sub-frame. If there is data to be read, according to the data of the query. The data to be read is directly transferred to the uplink hardware random access memory, or the read data is transferred to the uplink hardware random access memory by using the startup DMA.

The system according to claim 7, wherein the uplink control unit is further configured to: when performing the uplink channel baseband signal processing based on the hierarchical structure, according to a slave device management layer When the acquired data performs baseband signal processing, the output N_data is obtained from the input Ni, the Delta_N outputted from the input N_data, and the selected rate matching is performed by the input Delta_N, and finally the E parameter for the baseband signal transmission is obtained; Ni is the number of bits of a radio frame before the transmission channel i rate matching; N_data is the number of data bits in a code division combined transmission channel (CCTrCH) frame; Delta_N is the number of bits punched or repeated.