WO2012124995A3 - Method and system for maintaining vector clocks during synchronization for data race detection - Google Patents

Method and system for maintaining vector clocks during synchronization for data race detection Download PDF

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Publication number
WO2012124995A3
WO2012124995A3 PCT/KR2012/001880 KR2012001880W WO2012124995A3 WO 2012124995 A3 WO2012124995 A3 WO 2012124995A3 KR 2012001880 W KR2012001880 W KR 2012001880W WO 2012124995 A3 WO2012124995 A3 WO 2012124995A3
Authority
WO
WIPO (PCT)
Prior art keywords
during synchronization
data race
race detection
maintaining
clocks during
Prior art date
Application number
PCT/KR2012/001880
Other languages
French (fr)
Other versions
WO2012124995A2 (en
Inventor
Parikshit KOLIPAKA
Rahul Nagpal
Original Assignee
Samsung Electronics Co., Ltd.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co., Ltd. filed Critical Samsung Electronics Co., Ltd.
Publication of WO2012124995A2 publication Critical patent/WO2012124995A2/en
Publication of WO2012124995A3 publication Critical patent/WO2012124995A3/en

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Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/52—Program synchronisation; Mutual exclusion, e.g. by means of semaphores

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  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)

Abstract

Method and system for maintaining vector clocks during synchronization for data race detection. Embodiments herein disclose methods to reduce overheads of maintaining and updating vector clock during synchronization in vector based dynamic data race detection systems. Embodiments herein enable improvement of vector based dynamic data race detection systems orthogonally without compromising with precision of the system by using opportunistic methods to reduce overheads during synchronization of threads.
PCT/KR2012/001880 2011-03-15 2012-03-15 Method and system for maintaining vector clocks during synchronization for data race detection WO2012124995A2 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
IN793/CHE/2011 2011-03-15
IN793CH2011 2011-03-15

Publications (2)

Publication Number Publication Date
WO2012124995A2 WO2012124995A2 (en) 2012-09-20
WO2012124995A3 true WO2012124995A3 (en) 2012-12-27

Family

ID=46831224

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/KR2012/001880 WO2012124995A2 (en) 2011-03-15 2012-03-15 Method and system for maintaining vector clocks during synchronization for data race detection

Country Status (1)

Country Link
WO (1) WO2012124995A2 (en)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5261113A (en) * 1988-01-25 1993-11-09 Digital Equipment Corporation Apparatus and method for single operand register array for vector and scalar data processing operations
US6061511A (en) * 1998-06-12 2000-05-09 Ikos Systems, Inc. Reconstruction engine for a hardware circuit emulator
US20080126757A1 (en) * 2002-12-05 2008-05-29 Gheorghe Stefan Cellular engine for a data processing system
US20090300337A1 (en) * 2008-05-29 2009-12-03 Axis Semiconductor, Inc. Instruction set design, control and communication in programmable microprocessor cases and the like

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5261113A (en) * 1988-01-25 1993-11-09 Digital Equipment Corporation Apparatus and method for single operand register array for vector and scalar data processing operations
US6061511A (en) * 1998-06-12 2000-05-09 Ikos Systems, Inc. Reconstruction engine for a hardware circuit emulator
US20080126757A1 (en) * 2002-12-05 2008-05-29 Gheorghe Stefan Cellular engine for a data processing system
US20090300337A1 (en) * 2008-05-29 2009-12-03 Axis Semiconductor, Inc. Instruction set design, control and communication in programmable microprocessor cases and the like

Also Published As

Publication number Publication date
WO2012124995A2 (en) 2012-09-20

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