WO2012109026A2 - Methods of forming rutile titanium dioxide and associated methods of forming semiconductor structures - Google Patents
Methods of forming rutile titanium dioxide and associated methods of forming semiconductor structures Download PDFInfo
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- WO2012109026A2 WO2012109026A2 PCT/US2012/022766 US2012022766W WO2012109026A2 WO 2012109026 A2 WO2012109026 A2 WO 2012109026A2 US 2012022766 W US2012022766 W US 2012022766W WO 2012109026 A2 WO2012109026 A2 WO 2012109026A2
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
- H10P14/69—Inorganic materials
- H10P14/692—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses
- H10P14/6938—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses the material containing at least one metal element, e.g. metal oxides, metal oxynitrides or metal oxycarbides
- H10P14/6939—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses the material containing at least one metal element, e.g. metal oxides, metal oxynitrides or metal oxycarbides characterised by the metal
- H10P14/69394—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses the material containing at least one metal element, e.g. metal oxides, metal oxynitrides or metal oxycarbides characterised by the metal the material containing titanium, e.g. TiO2
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D1/00—Resistors, capacitors or inductors
- H10D1/60—Capacitors
- H10D1/68—Capacitors having no potential barriers
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
- H10P14/63—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
- H10P14/6326—Deposition processes
- H10P14/6328—Deposition from the gas or vapour phase
- H10P14/6334—Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
- H10P14/6339—Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition deposition by cyclic CVD, e.g. ALD, ALE or pulsed CVD
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
- H10P14/65—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials
- H10P14/6502—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed before formation of the materials
- H10P14/6506—Formation of intermediate materials
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
Definitions
- Embodiments of the present disclosure relate to semiconductor device fabrication and, more specifically, to methods of forming rutile titanium oxide on a semiconductor structure, and to methods of forming semiconductor device structures including the rutile titanium oxide.
- Ti0 2 titanium dioxide
- Ti0 2 has three main crystalline phases: rutile, anatase, and brookite. The phase of a Ti0 2 crystal may depend on conditions of the Ti0 2 growth process, such as temperature and method of deposition.
- the dielectric constant of Ti0 2 varies based on properties such as crystalline phase, orientation, and deposition method.
- Ti0 2 films grown on silicon substrates by atomic layer deposition (ALD) generally have an anatase crystalline structure, which has a dielectric constant of about 30.
- the anatase Ti0 2 may be converted to rutile Ti0 2 through an annealing process, including heating the Ti0 2 to a temperature above 800°C.
- Rutile Ti0 2 may exhibit higher dielectric constants than anatase Ti0 2 .
- the dielectric constant may be about 170, while the dielectric constant along the a-axis may be about 90. Dielectric constants above about 55 are needed to meet capacitance requirements of DRAM in size ranges currently produced. As the scale of devices decreases, anatase Ti0 2 is not generally useful because its dielectric constant is too low.
- a high deposition or anneal temperature is generally required to form rutile Ti0 2 .
- a semiconductor structure having anatase Ti0 2 thereon may be annealed by heating the anatase Ti0 2 to a temperature of about 800°C. During the anneal, the Ti0 2 crystalline structure may change from anatase to rutile. However, heating the anatase Ti0 2 to a temperature of about 800°C may damage other structures on or within the semiconductor structure. For example, metal interconnects on or in the semiconductor structure may melt under such conditions.
- Rutile Ti0 2 may also be formed directly (i.e., without annealing anatase Ti0 2 ) by deposition at high
- rutile Ti0 2 Because of the processing temperatures needed to form rutile Ti0 2 , use of rutile Ti0 2 may be limited to semiconductor structures that can tolerate high temperatures. DRAM and other structures may not withstand such temperatures. To take advantage of the high dielectric constants of rutile Ti0 2 on semiconductor structure that cannot tolerate high temperatures, it would be desirable to have a method of forming rutile Ti0 2 without using high temperatures required to deposit Ti0 2 in the rutile phase and without annealing anatase Ti0 2 .
- Japanese patent publication JP-A 2007-110111 describes a method of forming rutile Ti0 2 on a ruthenium electrode using a process temperature of less than 500°C.
- a ruthenium(IV) oxide pretreatment film is formed by exposing a ruthenium electrode to gaseous ozone (0 3 ).
- Rutile Ti0 2 is then deposited in a film over the ruthenium(IV) oxide film, and a second electrode is formed over both films.
- the present disclosure includes a method of forming rutile titanium dioxide.
- the method comprises exposing a transition metal to oxygen gas (0 2 ) to produce an oxidized transition metal and forming rutile titanium dioxide over the oxidized transition metal.
- the present disclosure includes a method of forming rutile titanium dioxide.
- the method comprises oxidizing a portion of a ruthenium material to ruthenium(IV) oxide, introducing a gaseous titanium halide precursor and water vapor to the ruthenium(IV) oxide, and forming rutile titanium dioxide on the ruthenium(IV) oxide.
- the present disclosure includes a method of forming a semiconductor structure that comprises forming ruthenium on a substrate, exposing the ruthenium to oxygen gas (0 2 ) to oxidize a portion of the ruthenium to ruthenium(IV) oxide, and exposing the ruthenium(IV) oxide to titanium tetrachloride and water to form rutile titanium dioxide on the ruthenium(IV) oxide.
- FIGS. 1 A through 1C are schematics illustrating methods of forming rutile Ti0 2 and semiconductor structures in accordance with embodiments of the present disclosure.
- FIGS. 2 A through 2D include X-ray diffraction (XRD) results showing the XRD response of semiconductor structures formed in accordance with embodiments of the present disclosure.
- XRD X-ray diffraction
- Methods of forming rutile titanium dioxide (Ti0 2 ) and methods of forming semiconductor device structures having rutile Ti0 2 are disclosed.
- the methods may be used to form a desired thickness of rutile Ti0 2 .
- Rutile Ti0 2 has a tetragonal crystal structure with a coordination number of six. Each titanium cation is surrounded by an octahedron of six oxygen atoms.
- the methods may include oxidizing a transition metal to form a transition metal oxide, then forming rutile Ti0 2 over the transition metal oxide.
- the rutile Ti0 2 may be formed by ALD.
- the transition metal oxide may be formed, for example, over a substrate.
- the rutile Ti0 2 may be formed at thicknesses of from about 30 A to about 200 A, and may be formed from two or more precursors.
- the rutile Ti0 2 may be formed by ALD using a titanium halide precursor and water, such as water vapor.
- FIG. 1A shows a semiconductor structure 100 including a substrate 102 over which metal 104 has been formed.
- the substrate 102 may be a conventional silicon substrate or other bulk substrate having a layer of semiconductor material.
- the term "bulk substrate” includes not only silicon wafers, but also
- the substrate 102 may be in the form of semiconductor wafers, wafer fragments, or assemblies of such wafers or fragments.
- Substrate 102 may have other materials or features (not shown) formed upon or within the substrate 102 (e.g., electrodes, lines, vias, traces, sources, and drains). Such features may be formed by conventional semiconductor fabrication techniques, which are not described in detail herein.
- the substrate 102 may be formed from silicon, polysilicon, titanium nitride, an oxide, or a metal.
- the metal 104 may be formed on the substrate 102 by chemical vapor deposition (CVD), ALD, physical vapor deposition (PVD), or any other deposition method known in the art.
- the metal 104 may be formed at a thickness of from about 15 A to about 100 A, such as from about 30 A to about 80 A.
- the metal 104 may be any metal in which an oxide of the metal is configured to form a crystal stmcture similar to the crystal structure of rutile Ti0 2 .
- the metal 104 may be a transition metal, such as vanadium (V), chromium (Cr), tungsten (W), manganese (Mn), ruthenium (Ru), osmium (Os), rhodium (Rh), iridium (Ir), platinum (Pt), germanium (Ge), tin (Sn), or lead (Pb).
- the metal 104 is Ru.
- an adhesion material may, optionally, be formed on the substrate 102 to promote adhesion of the metal 104 to the substrate 102. Adhesion materials are known in the art and, therefore, are not described in detail herein.
- the metal 104 may be oxidized with an oxidant, for example, by exposing the semiconductor structure 100 to the oxidant. A portion of the metal 104 may react with the oxidant to form the metal oxide 106, shown on semiconductor structure 100' in FIG. IB.
- the oxidant may be an oxidizer that is of sufficient strength to react with the metal 104 to form a metal oxide 106. However, the strength of the oxidizer may not be such as to substantially remove (i.e., etch) the metal 104.
- the oxidant may be, for example, oxygen (0 2 ), nitric oxide (NO), nitrous oxide (N 2 0), etc.
- the oxidant may be substantially pure (i.e., greater than about 95% pure, such as greater than about 99% pure or greater than about 99.9% pure), or may be mixed with an inert gas (e.g. , argon, nitrogen).
- an inert gas e.g. , argon, nitrogen.
- absolute pressure within a chamber (not shown) in which the oxidation is conducted may be maintained at a pressure from about 13 Pa (about 0.1 Torr) to about 101.3 kPa (about 760 Torr).
- the semiconductor structure 100 may be heated to a temperature of, for example, from about 150°C to about 450°C, such as from about 200°C to about 400°C, or from about 250°C to about 350°C.
- the semiconductor structure 100 may be heated in the presence of the oxidant for a time period of from about 30 seconds to about 60 minutes, such as a time period of from about 5 minutes to about 20 minutes.
- strong oxidants such as ozone (0 3 ) may be avoided, because the strong oxidant may remove at least a portion of the metal 104.
- the metal 104 may react with ozone to form Ru0 4 , which is volatile.
- the volatile Ru0 4 may vaporize, leaving little or no ruthenium on the semiconductor structure 100'. Since the metal 104 may have a thickness of less than about 100 A, removing even a portion of metal 104 may make the metal 104 too thin for effective formation of metal oxide 106 and subsequent formation of the rutile Ti0 2 thereon.
- the metal oxide 106 formed on the metal 104 may have a thickness of from about 5 A to about 10 A. In one embodiment, the metal oxide 106 is about 7 A thick.
- the metal oxide 106 may be a material having a crystalline structure similar to the crystalline structure of rutile Ti0 2 , for example, V0 2 , Cr0 2 , W0 2 , Mn0 2 , Ru0 2 , Os0 2 , Rh0 2 , Ir0 2 , Pt0 2 , Ge0 2 , Sn0 2 , or Pb0 2 .
- the metal oxide 106 is ruthenium(IV) oxide (Ru0 2 ).
- rutile Ti0 2 108 may be formed over the metal oxide 106.
- the rutile Ti0 2 108 may be formed by an ALD process that includes sequentially exposing the semiconductor structure 100' to gaseous precursors suitable for use as ALD precursors.
- the ALD precursors may include a titanium halide (T1X 4 ) precursor, where "X" is a halide, such as fluorine (F), chlorine (CI), bromine (Br), or iodine (I), and water (H 2 0), such as water vapor.
- the titanium halide precursor may be, for example, titanium tetrafluoride (T1F 4 ), titanium tetrachloride (T1CI 4 ), titanium tetrabromide (TiBr 4 ), or titanium tetraiodide (TiL;).
- the rutile Ti0 2 108 may be formed by sequentially exposing the semiconductor structure 100' to each ALD precursor in a chamber (not shown), such as an ALD chamber. Chambers for use in ALD processes are known in the art and, therefore, details of such are not described herein.
- the chamber may be maintained at a temperature, for example, of from about 150°C to about 600°C, such as a temperature from about 150°C to about 450°C. Though formation at a higher temperature may also produce rutile Ti0 2 , the surface of rutile Ti0 2 formed at a higher temperature may be too rough for use in some applications. Furthermore, some semiconductor
- the rutile Ti0 2 108 may be formed to a selected thickness, such as from about 5 A to about 200 A. By forming the rutile Ti0 2 108 by ALD, the thickness of the rutile Ti0 2 108 may depend on the number of titanium and oxygen monolayers deposited. That is, the rutile Ti0 2 108 of a selected thickness may be achieved by selecting an appropriate number of ALD cycles.
- the crystalline structure of the metal oxide 106 may enable the Ti0 2 to form in the rutile phase at a lower temperature than those temperatures conventionally utilized for the formation of rutile Ti0 2 .
- anatase Ti0 2 is, conventionally, heated to a temperature above 800°C to form rutile Ti0 2 .
- the formation of rutile Ti0 2 108 over the metal oxide 106 may be achieved at a substantially lower temperature (e.g., a temperature of less than about 600°C).
- crystalline molecular sites on a surface of the metal oxide 106 may guide titanium atoms into positions that correspond with the positions of titanium atoms in a rutile Ti0 2 crystalline structure.
- the oxygen atoms may arrange in appropriate positions to continue growth of the rutile crystalline structure.
- the metal oxide 106 may act as a template for forming the rutile Ti0 2 108. Therefore, metal oxides 106 having a crystalline structure similar to rutile Ti0 2 may be better suited to forming rutile Ti(1 ⁇ 2 108 thereupon than metal oxides 106 with less-similar crystal structures.
- the rutile Ti0 2 108 may be formed to a desired thickness, such as to a thickness of from about 30 A to about 200 A, by repeating the ALD process until a desired number of ALD cycles has been conducted.
- an additional portion of rutile Ti0 2 108' may, optionally, be formed over the rutile Ti0 2 108 as indicated by the dashed line in FIG. 1C.
- This rutile Ti0 2 108' may be formed by ALD as described above and may be formed in the same chamber or in a different chamber.
- rutile Ti0 2 108' may be formed using a T1X 4 precursor and a different oxygen-containing precursor, such as an oxygen- containing precursor having an increased oxidizing strength compared to H 2 0.
- ozone (0 3 ) may be used as the oxygen-containing precursor.
- the oxygen- containing precursor which has increased oxidizing strength compared to H 2 0, may not be suitable as an ALD precursor for forming the rutile Ti0 2 108 directly on the metal oxide 106 because the oxygen-containing precursor may damage or remove (e.g., etch) the metal oxide 106. But, if the metal oxide 106 is protected by rutile Ti0 2 108 (e.g., a rutile Ti0 2 108 having a thickness of at least about 5 A), the oxygen-containing precursor may not react with the metal oxide 106.
- rutile Ti0 2 108 without the protection provided by rutile Ti0 2 108, exposure of ruthenium or ruthenium(IV) oxide to ozone may produce ruthenium tetraoxide (Ru0 4 ), which is a volatile compound. In this situation, the Ru0 4 (metal oxide 104) may vaporize, leaving no rutile crystalline structure appropriate for forming rutile Ti0 2 108 thereon. But, once an initial portion of rutile Ti0 2 108 has been formed over the metal oxide 106, the possibility of further oxidation (and, therefore, loss) of metal oxide 106 may diminish.
- the rutile Ti0 2 108' may be formed at any selected thickness, such as from about 30 A to about 200 A.
- Rutile Ti0 2 108 Of a selected thickness may be formed by selecting an appropriate number of ALD cycles. After formation of the rutile Ti0 2 108', the rutile Ti0 2 108' may be indistinguishable from rutile Ti0 2 108 (i.e., there may be no detectable difference or interface between rutile Ti0 2 108 and rutile Ti0 2 108').
- the rutile TiO? 108 formed by the methods according to embodiments of the present disclosure may be used as an insulator in a capacitor, such as a metal-insulator- metal capacitor of a DRAM memory device or a NAND memory device. Additional fabrication acts for forming the metal-insulator-metal capacitor and the DRAM or NAND memory device are known in the art and, therefore, details of such are not provided herein.
- FIG. 2A shows the results of the XRD analysis on a semiconductor structure 100' similar to that shown in FIG. IB.
- the semiconductor structure 100' included a silicon substrate 102, ruthenium as metal 104, and ruthenium oxide as metal oxide 106.
- the semiconductor structure 100' was formed by applying Ru to the silicon substrate by a CVD process. The Ru was oxidized at a temperature of 250°C for 10 minutes in a mixture of 30% 0 2 and 70% Ar, at a chamber pressure of 133 Pa (1.0 Torr), producing Ru0 2 on the Ru.
- FIG. 2A shows peaks at measured angles (20) of about 38.5° and 44°, which correspond to known ruthenium responses.
- FIG. 2B shows the XRD results of a semiconductor structure similar to the semiconductor structure 100" shown in FIG. 1C.
- Rutile Ti0 2 was formed by ALD on the semiconductor structure 100' tested in FIG. 2A using TiCl 4 and H 2 0 as ALD precursors, forming semiconductor structure 100".
- the semiconductor structure 100' was exposed to each precursor 220 times, in series, at 400°C.
- the semiconductor structure 100" was then subjected to XRD analysis.
- 2B shows peaks at measured angles (20) of about 27.5°, 38.5°, 42.5°, and 44°.
- the peaks at 38.5°, 42.5°, and 44° correspond to known ruthenium responses.
- the peak at 27.5° corresponds to a known rutile Ti0 2 response, and its presence indicates that rutile Ti0 2 was formed over the Ru0 2 .
- FIGS. 2C and 2D show XRD results of semiconductor structures similar to the semiconductor structure 100" except that the Ti0 2 was formed using non-halide titanium precursors (i.e. titanium oxide precursors).
- FIG. 2C shows the XRD results of a semiconductor structure formed by ALD Ti0 2 deposition using CH3C 5 H 4 Ti[N(CH 3 ) 2 ]3 (TIMCTA) as the titanium precursor.
- TIMCTA CH3C 5 H 4 Ti[N(CH 3 ) 2 ]3
- Two semiconductor structures were tested having Ru and Ru0 2 applied as described with respect to FIGS. 2 A and 2B.
- Curve 1 in FIG. 2C shows the intensity of diffracted X-rays on a semiconductor structure having 100 A thick Ti0 2 formed by ALD using TIMCTA and H 2 0 as the ALD precursors. As shown in FIG.
- Curve 2 in FIG. 2C shows the intensity of diffracted X-rays on a semiconductor structure having Ti0 2 formed with two sets of ALD precursors.
- the semiconductor structure included Ru and Ru0 2 as described above.
- a 30 A layer of Ti0 2 was formed using TIMCTA and H 2 0 as the ALD precursors, and a 70 A layer of Ti0 2 was formed over the 30 A layer using TIMCTA and 0 3 as the ALD precursors.
- XRD analysis of this semiconductor structure produced the peaks for Ru, plus a peak near 25°, indicating that anatase phase Ti0 2 was formed on the semiconductor structure (see curve 2).
- the 27.5° rutile peak (as shown in FIG. 2B) was not observed, indicating that rutile Ti0 2 was not present in a significant amount on the semiconductor structure formed under these conditions.
- FIG. 2D shows the XRD results for a semiconductor structure formed by ALD Ti0 2 deposition using titanium tetraisopropoxide (Ti(OC 3 H 7 ) 4 or TTIP) and H 2 0 as the ALD precursors.
- the semiconductor structure included Ru and Ru0 2 as described above, and the Ti0 2 was formed thereover.
- the XRD analysis showed a ruthenium peak at about 44.5°, plus peaks at about 25.5° for anatase Ti0 2 , and at about 27.5° for rutile Ti0 2 .
- the presence of both anatase and rutile Ti0 2 peaks suggests that formation of ALD Ti0 2 with TTIP did not produce a uniform rutile Ti0 2 phase under these conditions.
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Abstract
Methods of forming rutile titanium dioxide. The method comprises exposing a transition metal (such as V, Cr, W, Mn, Ru, Os, Rh, Ir, Pt, Ge, Sn, or Pb) to oxygen gas (O2) to oxidize the transition metal. Rutile titanium dioxide is formed over the oxidized transition metal. The rutile titanium dioxide is formed by atomic layer deposition by introducing a gaseous titanium halide precursor and water to the oxidized transition metal. Methods of forming semiconductor structures having rutile titanium dioxide are also disclosed.
Description
TITLE
METHODS OF FORMING RUTILE TITANIUM DIOXIDE AND ASSOCIATED METHODS OF FORMING SEMICONDUCTOR STRUCTURES
PRIORITY CLAIM
This application claims the benefit of the filing date of United States Patent Application Serial Number 13/021,895, filed February 7, 201 1, for "METHODS OF FORMING RUTILE TITANIUM DIOXIDE AND ASSOCIATED METHODS OF FORMING SEMICONDUCTOR STRUCTURES."
TECHNICAL FIELD
Embodiments of the present disclosure relate to semiconductor device fabrication and, more specifically, to methods of forming rutile titanium oxide on a semiconductor structure, and to methods of forming semiconductor device structures including the rutile titanium oxide.
BACKGROUND
As conventional semiconductor memory devices, such as Flash memory and dynamic random access memory (DRAM), reach their scaling limits, research has focused on commercially viable low power, low operation voltage, high-speed, and high-density non- volatile memory devices. Materials having high dielectric constants (i.e., high static relative permittivity) are needed to provide sufficient capacitance in ever-smaller production-scale capacitor designs. Because of its high dielectric constant (or "k" value), titanium dioxide (Ti02) is being considered for use in non-volatile memory devices. Ti02 has three main crystalline phases: rutile, anatase, and brookite. The phase of a Ti02 crystal may depend on conditions of the Ti02 growth process, such as temperature and method of deposition. Of significance in semiconductor manufacture is that the dielectric constant of Ti02 varies based on properties such as crystalline phase, orientation, and deposition method. For example, Ti02 films grown on silicon substrates by atomic layer deposition (ALD) generally have an anatase crystalline structure, which has a dielectric constant of about 30. The anatase Ti02
may be converted to rutile Ti02 through an annealing process, including heating the Ti02 to a temperature above 800°C.
Rutile Ti02 may exhibit higher dielectric constants than anatase Ti02. For example, along the c-axis of the rutile Ti02, the dielectric constant may be about 170, while the dielectric constant along the a-axis may be about 90. Dielectric constants above about 55 are needed to meet capacitance requirements of DRAM in size ranges currently produced. As the scale of devices decreases, anatase Ti02 is not generally useful because its dielectric constant is too low.
A high deposition or anneal temperature is generally required to form rutile Ti02. For example, a semiconductor structure having anatase Ti02 thereon may be annealed by heating the anatase Ti02 to a temperature of about 800°C. During the anneal, the Ti02 crystalline structure may change from anatase to rutile. However, heating the anatase Ti02 to a temperature of about 800°C may damage other structures on or within the semiconductor structure. For example, metal interconnects on or in the semiconductor structure may melt under such conditions. Rutile Ti02 may also be formed directly (i.e., without annealing anatase Ti02) by deposition at high
temperature. Because of the processing temperatures needed to form rutile Ti02, use of rutile Ti02 may be limited to semiconductor structures that can tolerate high temperatures. DRAM and other structures may not withstand such temperatures. To take advantage of the high dielectric constants of rutile Ti02 on semiconductor structure that cannot tolerate high temperatures, it would be desirable to have a method of forming rutile Ti02 without using high temperatures required to deposit Ti02 in the rutile phase and without annealing anatase Ti02.
Japanese patent publication JP-A 2007-110111 describes a method of forming rutile Ti02 on a ruthenium electrode using a process temperature of less than 500°C. In that method, a ruthenium(IV) oxide pretreatment film is formed by exposing a ruthenium electrode to gaseous ozone (03). Rutile Ti02 is then deposited in a film over the ruthenium(IV) oxide film, and a second electrode is formed over both films.
SUMMARY
In one embodiment, the present disclosure includes a method of forming rutile titanium dioxide. The method comprises exposing a transition metal to oxygen gas (02) to produce an oxidized transition metal and forming rutile titanium dioxide over the oxidized transition metal.
In another embodiment, the present disclosure includes a method of forming rutile titanium dioxide. The method comprises oxidizing a portion of a ruthenium material to ruthenium(IV) oxide, introducing a gaseous titanium halide precursor and water vapor to the ruthenium(IV) oxide, and forming rutile titanium dioxide on the ruthenium(IV) oxide.
In yet another embodiment, the present disclosure includes a method of forming a semiconductor structure that comprises forming ruthenium on a substrate, exposing the ruthenium to oxygen gas (02) to oxidize a portion of the ruthenium to ruthenium(IV) oxide, and exposing the ruthenium(IV) oxide to titanium tetrachloride and water to form rutile titanium dioxide on the ruthenium(IV) oxide.
BRIEF DESCRIPTION OF THE DRAWINGS FIGS. 1 A through 1C are schematics illustrating methods of forming rutile Ti02 and semiconductor structures in accordance with embodiments of the present disclosure; and
FIGS. 2 A through 2D include X-ray diffraction (XRD) results showing the XRD response of semiconductor structures formed in accordance with embodiments of the present disclosure.
MODE(S) FOR CARRYING OUT THE INVENTION The following description provides specific details, such as material types and processing conditions, in order to provide a thorough description of embodiments of the present disclosure. However, a person of ordinary skill in the art will understand that the embodiments of the present disclosure may be practiced without employing these specific details. Indeed, the embodiments of the present disclosure may be practiced in conjunction with conventional semiconductor fabrication techniques employed in the industry. In addition, the description provided below does not form a
complete process flow for manufacturing a semiconductor device, i.e., the
semiconductor device structures described below do not form a complete
semiconductor device. Only those process acts and structures necessary to understand the embodiments of the present disclosure are described in detail below. Additional acts to form a complete semiconductor device from the semiconductor device structures may be performed by conventional semiconductor fabrication techniques, which are not described in detail herein.
Methods of forming rutile titanium dioxide (Ti02) and methods of forming semiconductor device structures having rutile Ti02 are disclosed. In particular, the methods may be used to form a desired thickness of rutile Ti02. Rutile Ti02 has a tetragonal crystal structure with a coordination number of six. Each titanium cation is surrounded by an octahedron of six oxygen atoms. The methods may include oxidizing a transition metal to form a transition metal oxide, then forming rutile Ti02 over the transition metal oxide. The rutile Ti02 may be formed by ALD. The transition metal oxide may be formed, for example, over a substrate. The rutile Ti02 may be formed at thicknesses of from about 30 A to about 200 A, and may be formed from two or more precursors. For example, the rutile Ti02 may be formed by ALD using a titanium halide precursor and water, such as water vapor.
FIG. 1A shows a semiconductor structure 100 including a substrate 102 over which metal 104 has been formed. The substrate 102 may be a conventional silicon substrate or other bulk substrate having a layer of semiconductor material. As used herein, the term "bulk substrate" includes not only silicon wafers, but also
silicon-on-insulator (SOI) substrates, silicon-on-sapphire (SOS) substrates, epitaxial layers of silicon on a base semiconductor foundation, and other semiconductor or optoelectronics materials, such as silicon-germanium, germanium, gallium arsenide, or indium phosphide. The substrate 102 may be in the form of semiconductor wafers, wafer fragments, or assemblies of such wafers or fragments. Substrate 102 may have other materials or features (not shown) formed upon or within the substrate 102 (e.g., electrodes, lines, vias, traces, sources, and drains). Such features may be formed by conventional semiconductor fabrication techniques, which are not described in detail herein. By way of example, the substrate 102 may be formed from silicon, polysilicon, titanium nitride, an oxide, or a metal. The metal 104 may be formed on the
substrate 102 by chemical vapor deposition (CVD), ALD, physical vapor deposition (PVD), or any other deposition method known in the art. The metal 104 may be formed at a thickness of from about 15 A to about 100 A, such as from about 30 A to about 80 A. The metal 104 may be any metal in which an oxide of the metal is configured to form a crystal stmcture similar to the crystal structure of rutile Ti02. The metal 104 may be a transition metal, such as vanadium (V), chromium (Cr), tungsten (W), manganese (Mn), ruthenium (Ru), osmium (Os), rhodium (Rh), iridium (Ir), platinum (Pt), germanium (Ge), tin (Sn), or lead (Pb). In one embodiment, the metal 104 is Ru. Though not shown in FIG. 1 A, an adhesion material may, optionally, be formed on the substrate 102 to promote adhesion of the metal 104 to the substrate 102. Adhesion materials are known in the art and, therefore, are not described in detail herein.
The metal 104 may be oxidized with an oxidant, for example, by exposing the semiconductor structure 100 to the oxidant. A portion of the metal 104 may react with the oxidant to form the metal oxide 106, shown on semiconductor structure 100' in FIG. IB. The oxidant may be an oxidizer that is of sufficient strength to react with the metal 104 to form a metal oxide 106. However, the strength of the oxidizer may not be such as to substantially remove (i.e., etch) the metal 104.
The oxidant may be, for example, oxygen (02), nitric oxide (NO), nitrous oxide (N20), etc. The oxidant may be substantially pure (i.e., greater than about 95% pure, such as greater than about 99% pure or greater than about 99.9% pure), or may be mixed with an inert gas (e.g. , argon, nitrogen). During the oxidation, absolute pressure within a chamber (not shown) in which the oxidation is conducted may be maintained at a pressure from about 13 Pa (about 0.1 Torr) to about 101.3 kPa (about 760 Torr). During the oxidation, the semiconductor structure 100 may be heated to a temperature of, for example, from about 150°C to about 450°C, such as from about 200°C to about 400°C, or from about 250°C to about 350°C. The semiconductor structure 100 may be heated in the presence of the oxidant for a time period of from about 30 seconds to about 60 minutes, such as a time period of from about 5 minutes to about 20 minutes.
During the oxidation, strong oxidants, such as ozone (03), may be avoided, because the strong oxidant may remove at least a portion of the metal 104. For example, if ruthenium is used as the metal 104, the ruthenium may react with ozone to
form Ru04, which is volatile. The volatile Ru04 may vaporize, leaving little or no ruthenium on the semiconductor structure 100'. Since the metal 104 may have a thickness of less than about 100 A, removing even a portion of metal 104 may make the metal 104 too thin for effective formation of metal oxide 106 and subsequent formation of the rutile Ti02 thereon.
The metal oxide 106 formed on the metal 104 may have a thickness of from about 5 A to about 10 A. In one embodiment, the metal oxide 106 is about 7 A thick. The metal oxide 106 may be a material having a crystalline structure similar to the crystalline structure of rutile Ti02, for example, V02, Cr02, W02, Mn02, Ru02, Os02, Rh02, Ir02, Pt02, Ge02, Sn02, or Pb02. In one embodiment, the metal oxide 106 is ruthenium(IV) oxide (Ru02).
Referring now to semiconductor structure 100" shown in FIG. 1C, rutile Ti02 108 may be formed over the metal oxide 106. The rutile Ti02 108 may be formed by an ALD process that includes sequentially exposing the semiconductor structure 100' to gaseous precursors suitable for use as ALD precursors. The ALD precursors may include a titanium halide (T1X4) precursor, where "X" is a halide, such as fluorine (F), chlorine (CI), bromine (Br), or iodine (I), and water (H20), such as water vapor. The titanium halide precursor may be, for example, titanium tetrafluoride (T1F4), titanium tetrachloride (T1CI4), titanium tetrabromide (TiBr4), or titanium tetraiodide (TiL;). The rutile Ti02 108 may be formed by sequentially exposing the semiconductor structure 100' to each ALD precursor in a chamber (not shown), such as an ALD chamber. Chambers for use in ALD processes are known in the art and, therefore, details of such are not described herein. The chamber may be maintained at a temperature, for example, of from about 150°C to about 600°C, such as a temperature from about 150°C to about 450°C. Though formation at a higher temperature may also produce rutile Ti02, the surface of rutile Ti02 formed at a higher temperature may be too rough for use in some applications. Furthermore, some semiconductor
structures 100' may not tolerate exposure to a higher temperature. The rutile Ti02 108 may be formed to a selected thickness, such as from about 5 A to about 200 A. By forming the rutile Ti02 108 by ALD, the thickness of the rutile Ti02 108 may depend on the number of titanium and oxygen monolayers deposited. That is, the rutile
Ti02 108 of a selected thickness may be achieved by selecting an appropriate number of ALD cycles.
The crystalline structure of the metal oxide 106 may enable the Ti02 to form in the rutile phase at a lower temperature than those temperatures conventionally utilized for the formation of rutile Ti02. For example, anatase Ti02 is, conventionally, heated to a temperature above 800°C to form rutile Ti02. However, in the methods according to embodiments of the present disclosure, the formation of rutile Ti02 108 over the metal oxide 106 may be achieved at a substantially lower temperature (e.g., a temperature of less than about 600°C). Without being bound by a particular theory, it is believed that crystalline molecular sites on a surface of the metal oxide 106 may guide titanium atoms into positions that correspond with the positions of titanium atoms in a rutile Ti02 crystalline structure. With the initial titanium atoms in place for a rutile crystalline structure, the oxygen atoms may arrange in appropriate positions to continue growth of the rutile crystalline structure. In other words, the metal oxide 106 may act as a template for forming the rutile Ti02 108. Therefore, metal oxides 106 having a crystalline structure similar to rutile Ti02 may be better suited to forming rutile Ti(½ 108 thereupon than metal oxides 106 with less-similar crystal structures. The rutile Ti02 108 may be formed to a desired thickness, such as to a thickness of from about 30 A to about 200 A, by repeating the ALD process until a desired number of ALD cycles has been conducted.
Once an initial portion of the rutile Ti02 has been formed as described above, an additional portion of rutile Ti02 108' may, optionally, be formed over the rutile Ti02 108 as indicated by the dashed line in FIG. 1C. This rutile Ti02 108' may be formed by ALD as described above and may be formed in the same chamber or in a different chamber. Alternatively, after the rutile Ti02 108 has been formed by the ALD process using T1X4 and H20 as ALD precursors, rutile Ti02 108' may be formed using a T1X4 precursor and a different oxygen-containing precursor, such as an oxygen- containing precursor having an increased oxidizing strength compared to H20. For example, ozone (03) may be used as the oxygen-containing precursor. The oxygen- containing precursor, which has increased oxidizing strength compared to H20, may not be suitable as an ALD precursor for forming the rutile Ti02 108 directly on the metal oxide 106 because the oxygen-containing precursor may damage or remove (e.g.,
etch) the metal oxide 106. But, if the metal oxide 106 is protected by rutile Ti02 108 (e.g., a rutile Ti02 108 having a thickness of at least about 5 A), the oxygen-containing precursor may not react with the metal oxide 106. For example, without the protection provided by rutile Ti02 108, exposure of ruthenium or ruthenium(IV) oxide to ozone may produce ruthenium tetraoxide (Ru04), which is a volatile compound. In this situation, the Ru04 (metal oxide 104) may vaporize, leaving no rutile crystalline structure appropriate for forming rutile Ti02 108 thereon. But, once an initial portion of rutile Ti02 108 has been formed over the metal oxide 106, the possibility of further oxidation (and, therefore, loss) of metal oxide 106 may diminish. The rutile Ti02 108' may be formed at any selected thickness, such as from about 30 A to about 200 A. Rutile Ti02 108 Of a selected thickness may be formed by selecting an appropriate number of ALD cycles. After formation of the rutile Ti02 108', the rutile Ti02 108' may be indistinguishable from rutile Ti02 108 (i.e., there may be no detectable difference or interface between rutile Ti02 108 and rutile Ti02 108').
The rutile TiO? 108 formed by the methods according to embodiments of the present disclosure may be used as an insulator in a capacitor, such as a metal-insulator- metal capacitor of a DRAM memory device or a NAND memory device. Additional fabrication acts for forming the metal-insulator-metal capacitor and the DRAM or NAND memory device are known in the art and, therefore, details of such are not provided herein.
The formation of rutile TiO? by methods according to embodiments of the present disclosure was confirmed by X-ray diffraction (XRD) of a semiconductor structure similar to semiconductor structure 100". FIG. 2A shows the results of the XRD analysis on a semiconductor structure 100' similar to that shown in FIG. IB. The semiconductor structure 100' included a silicon substrate 102, ruthenium as metal 104, and ruthenium oxide as metal oxide 106. The semiconductor structure 100' was formed by applying Ru to the silicon substrate by a CVD process. The Ru was oxidized at a temperature of 250°C for 10 minutes in a mixture of 30% 02 and 70% Ar, at a chamber pressure of 133 Pa (1.0 Torr), producing Ru02 on the Ru. The semiconductor structure 100' was then analyzed by grazing incidence X-ray diffraction (GI-XRD). FIG. 2A shows peaks at measured angles (20) of about 38.5° and 44°, which correspond to known ruthenium responses.
FIG. 2B shows the XRD results of a semiconductor structure similar to the semiconductor structure 100" shown in FIG. 1C. Rutile Ti02 was formed by ALD on the semiconductor structure 100' tested in FIG. 2A using TiCl4 and H20 as ALD precursors, forming semiconductor structure 100". The semiconductor structure 100' was exposed to each precursor 220 times, in series, at 400°C. The semiconductor structure 100" was then subjected to XRD analysis. The graph in FIG. 2B shows peaks at measured angles (20) of about 27.5°, 38.5°, 42.5°, and 44°. The peaks at 38.5°, 42.5°, and 44° correspond to known ruthenium responses. The peak at 27.5° corresponds to a known rutile Ti02 response, and its presence indicates that rutile Ti02 was formed over the Ru02.
For comparison, FIGS. 2C and 2D show XRD results of semiconductor structures similar to the semiconductor structure 100" except that the Ti02 was formed using non-halide titanium precursors (i.e. titanium oxide precursors). FIG. 2C shows the XRD results of a semiconductor structure formed by ALD Ti02 deposition using CH3C5H4Ti[N(CH3)2]3 (TIMCTA) as the titanium precursor. Two semiconductor structures were tested having Ru and Ru02 applied as described with respect to FIGS. 2 A and 2B. Curve 1 in FIG. 2C shows the intensity of diffracted X-rays on a semiconductor structure having 100 A thick Ti02 formed by ALD using TIMCTA and H20 as the ALD precursors. As shown in FIG. 2C, rutile Ti02 was not formed on the substrate (i.e., the 27.5° rutile peak, as seen in FIG. 2B, was not observed). The response curve showed only the Ru peaks at 38.5°, 42.5°, and 44°. Absence of the rutile peak indicates that rutile Ti02 was not present in significant amount on the substrate formed under these conditions.
Curve 2 in FIG. 2C shows the intensity of diffracted X-rays on a semiconductor structure having Ti02 formed with two sets of ALD precursors. The semiconductor structure included Ru and Ru02 as described above. A 30 A layer of Ti02 was formed using TIMCTA and H20 as the ALD precursors, and a 70 A layer of Ti02 was formed over the 30 A layer using TIMCTA and 03 as the ALD precursors. XRD analysis of this semiconductor structure produced the peaks for Ru, plus a peak near 25°, indicating that anatase phase Ti02 was formed on the semiconductor structure (see curve 2). The 27.5° rutile peak (as shown in FIG. 2B) was not observed, indicating that
rutile Ti02 was not present in a significant amount on the semiconductor structure formed under these conditions.
FIG. 2D shows the XRD results for a semiconductor structure formed by ALD Ti02 deposition using titanium tetraisopropoxide (Ti(OC3H7)4 or TTIP) and H20 as the ALD precursors. The semiconductor structure included Ru and Ru02 as described above, and the Ti02 was formed thereover. The XRD analysis showed a ruthenium peak at about 44.5°, plus peaks at about 25.5° for anatase Ti02, and at about 27.5° for rutile Ti02. The presence of both anatase and rutile Ti02 peaks suggests that formation of ALD Ti02 with TTIP did not produce a uniform rutile Ti02 phase under these conditions.
While the invention is susceptible to various modifications and alternative forms, specific embodiments have been shown, by way of example, in the drawings and have been described in detail herein. However, the invention is not intended to be limited to the particular forms disclosed. Rather, the invention is to cover all modifications, equivalents, and alternatives falling within the scope of the invention as defined by the following appended claims and their legal equivalents.
Claims
1. A method of forming rutile titanium dioxide, comprising:
exposing a transition metal to at least one of oxygen gas (02), nitric oxide (NO), and nitrous oxide (N20) to form an oxidized transition metal; and
forming rutile titanium dioxide over the oxidized transition metal.
2. The method of claim 1 , wherein exposing a transition metal to at least one of 02, NO, and N20 comprises exposing the transition metal on a substrate to at least one of 02, NO, and N20.
3. The method of claim 1, further comprising forming ruthenium on a substrate, and wherein:
exposing a transition metal to at least one of 02, NO, and N20 comprises exposing the ruthenium to 02 to oxidize a portion of the ruthenium to ruthenium(IV) oxide; and
forming rutile titanium dioxide over the oxidized transition metal comprises exposing the ruthenium(IV) oxide to titanium tetrachloride and water to form rutile titanium dioxide on the ruthenium(IV) oxide.
4. The method of claim 3, wherein exposing the ruthenium(IV) oxide to titanium tetrachloride and water comprises exposing the ruthenium(IV) oxide to titanium tetrachloride and water while maintaining the substrate at a temperature below about 450°C.
5. The method of claim 1, wherein exposing a transition metal to at least one of 02, NO, and N20 comprises exposing a transition metal selected from the group consisting of vanadium, chromium, tungsten, manganese, ruthenium, osmium, rhodium, iridium, platinum, germanium, tin, and lead to 02.
6. The method of claim 1, wherein exposing a transition metal to at least one of 02, NO, and N20 comprises exposing a transition metal having a thickness of from about 15 A to about 100 A to 02.
7. The method of claim 1, wherein exposing a transition metal to at least one of 02, NO, and N20 comprises exposing the transition metal to 02 at a temperature of from about 150°C to about 450°C.
8. The method of claim 1, wherein exposing a transition metal to at least one of 02, NO, and N20 comprises exposing ruthenium to at least one of 02, NO, and N20.
9. The method of claim 8, wherein exposing ruthenium to at least one of 02, NO, and N20 comprises oxidizing at least a portion of the ruthenium to ruthenium(IV) oxide.
10. The method of claim 9, wherein oxidizing at least a portion of the ruthenium to ruthenium(IV) oxide comprises forming ruthenium(IV) oxide at a thickness of from about 5 A to about 10 A.
11. The method of claim 1 , wherein forming rutile titanium dioxide over the oxidized transition metal comprises forming rutile titanium dioxide at a temperature below about 600°C.
12. The method of claim 1, wherein forming rutile titanium dioxide over the oxidized transition metal comprises forming the rutile titanium dioxide by atomic layer deposition.
13. The method of claim 12, wherein forming the rutile titanium dioxide by atomic layer deposition comprises sequentially exposing the oxidized transition metal to a titanium halide precursor and an oxidizer.
14. The method of claim 13, wherein sequentially exposing the oxidized transition metal to a titanium halide precursor and an oxidizer comprises sequentially exposing the oxidized transition metal to titanium tetrachloride and water.
15. The method of claim 13, further comprising sequentially exposing the rutile titanium dioxide to the titanium halide precursor and another oxidizer to form additional rutile titanium dioxide over the rutile titanium dioxide.
16. The method of claim 15, wherein sequentially exposing the rutile titanium dioxide to the titanium halide precursor and another oxidizer comprises exposing the rutile titanium dioxide to the titanium halide precursor and ozone.
17. The method of claim 1 , wherein forming rutile titanium dioxide over the oxidized transition metal comprises forming the rutile titanium dioxide at a thickness of from about 5 A to about 200 A.
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| CN2012800079811A CN103348455A (en) | 2011-02-07 | 2012-01-26 | Methods of forming rutile titanium dioxide and associated methods of forming semiconductor structures |
| KR1020137020474A KR101519281B1 (en) | 2011-02-07 | 2012-01-26 | Methods of forming rutile titanium dioxide and associated methods of forming semiconductor structures |
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| US13/021,895 US8609553B2 (en) | 2011-02-07 | 2011-02-07 | Methods of forming rutile titanium dioxide and associated methods of forming semiconductor structures |
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Families Citing this family (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9390909B2 (en) | 2013-11-07 | 2016-07-12 | Novellus Systems, Inc. | Soft landing nanolaminates for advanced patterning |
| US8564095B2 (en) | 2011-02-07 | 2013-10-22 | Micron Technology, Inc. | Capacitors including a rutile titanium dioxide material and semiconductor devices incorporating same |
| US8609553B2 (en) | 2011-02-07 | 2013-12-17 | Micron Technology, Inc. | Methods of forming rutile titanium dioxide and associated methods of forming semiconductor structures |
| US20140131835A1 (en) * | 2012-11-12 | 2014-05-15 | Nanya Technology Corp. | Semiconductor device with rutile titanium oxide dielectric film |
| US9917218B2 (en) * | 2014-02-06 | 2018-03-13 | Toyota Motor Europe | Process for preparing quantum dot array and quantum dot superlattice |
| US9478411B2 (en) * | 2014-08-20 | 2016-10-25 | Lam Research Corporation | Method to tune TiOx stoichiometry using atomic layer deposited Ti film to minimize contact resistance for TiOx/Ti based MIS contact scheme for CMOS |
| US9478438B2 (en) | 2014-08-20 | 2016-10-25 | Lam Research Corporation | Method and apparatus to deposit pure titanium thin film at low temperature using titanium tetraiodide precursor |
| KR20170128731A (en) * | 2016-05-13 | 2017-11-23 | 삼성전자주식회사 | Image sensor |
| CN107540014B (en) * | 2016-06-27 | 2019-08-16 | 中国科学院金属研究所 | A kind of heterogeneous seed mesoporous monocrystalline rutile titanium dioxide controllable growth preparation method |
| KR101932588B1 (en) * | 2017-02-28 | 2018-12-27 | 한국과학기술연구원 | Capacitor for semiconductor memory element and method for manufacturing the same |
| KR102559078B1 (en) * | 2020-04-13 | 2023-07-26 | 포항공과대학교 산학협력단 | Method for manufacturing a rutile titanium dioxide layer and a semiconductor device including the rutile titanium dioxide layer |
| US11466382B2 (en) | 2020-04-13 | 2022-10-11 | POSTECH Research and Business Development Foundation | Method for manufacturing rutile titanium dioxide layer and semiconductor device including the same |
| KR102707431B1 (en) * | 2021-06-23 | 2024-09-20 | 포항공과대학교 산학협력단 | Electronic device including heterogeneous single-crystal transition metal oxide layer disposed on a substrate, and method for manufacturing the same |
| WO2026005440A1 (en) * | 2024-06-25 | 2026-01-02 | 주성엔지니어링(주) | Thin film forming method |
| US20260103800A1 (en) * | 2024-10-10 | 2026-04-16 | Applied Materials, Inc. | Methods of depositing metal-containing films having a composition gradient |
Family Cites Families (26)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4200474A (en) | 1978-11-20 | 1980-04-29 | Texas Instruments Incorporated | Method of depositing titanium dioxide (rutile) as a gate dielectric for MIS device fabrication |
| FI64878C (en) | 1982-05-10 | 1984-01-10 | Lohja Ab Oy | KOMBINATIONSFILM FOER ISYNNERHET TUNNFILMELEKTROLUMINENSSTRUKTURER |
| JPH02247904A (en) | 1989-03-22 | 1990-10-03 | Taiyo Yuden Co Ltd | Ceramic dielectric thin film and manufacture thereof |
| US5228911A (en) | 1991-04-18 | 1993-07-20 | Merck Patent Gesellschaft Mit Beschrankter Haftung | Oxidized graphite flaky particles and pigments based thereon |
| US6156606A (en) | 1998-11-17 | 2000-12-05 | Siemens Aktiengesellschaft | Method of forming a trench capacitor using a rutile dielectric material |
| KR100444304B1 (en) * | 2001-12-31 | 2004-08-16 | 주식회사 하이닉스반도체 | A method for forming a capacitor of a semiconductor device |
| US7101813B2 (en) | 2002-12-04 | 2006-09-05 | Micron Technology Inc. | Atomic layer deposited Zr-Sn-Ti-O films |
| JP4124046B2 (en) | 2003-07-10 | 2008-07-23 | 株式会社大阪チタニウムテクノロジーズ | Metal oxide film forming method and vapor deposition apparatus |
| EP1550452A1 (en) * | 2003-12-29 | 2005-07-06 | Boehringer Ingelheim International GmbH | Composition comprising an aqueous extract of red vine leaves and a antthrombotic agent for the treatment of chronic venous insufficiencies |
| US7102875B2 (en) | 2003-12-29 | 2006-09-05 | Hynix Semiconductor Inc. | Capacitor with aluminum oxide and lanthanum oxide containing dielectric structure and fabrication method thereof |
| WO2005063629A1 (en) | 2003-12-31 | 2005-07-14 | Council Of Scientific & Industrial Research | Synthesis of ultrafine rutile phase titanium dioxide particles at low temperature |
| FI117728B (en) | 2004-12-21 | 2007-01-31 | Planar Systems Oy | Multilayer structure and process for its preparation |
| JP4470831B2 (en) | 2005-08-01 | 2010-06-02 | 株式会社デンソー | EL element and manufacturing method thereof |
| JP4709115B2 (en) | 2005-10-12 | 2011-06-22 | 財団法人ソウル大学校産学協力財団 | Capacitor for semiconductor device using ruthenium electrode and titanium dioxide dielectric film and method for manufacturing the same |
| KR100791948B1 (en) * | 2006-09-27 | 2008-01-04 | 삼성전자주식회사 | Carbon nanotube wiring formation method and semiconductor device wiring formation method using the same |
| US20080087890A1 (en) * | 2006-10-16 | 2008-04-17 | Micron Technology, Inc. | Methods to form dielectric structures in semiconductor devices and resulting devices |
| US8298909B2 (en) | 2006-12-27 | 2012-10-30 | Hynix Semiconductor Inc. | Semiconductor device and method for fabricating the same |
| US20090065896A1 (en) * | 2007-09-07 | 2009-03-12 | Seoul National University Industry Foundation | CAPACITOR HAVING Ru ELECTRODE AND TiO2 DIELECTRIC LAYER FOR SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME |
| JP2009218408A (en) * | 2008-03-11 | 2009-09-24 | Hitachi Ltd | Semiconductor storage device, and manufacturing method thereof |
| US8124528B2 (en) | 2008-04-10 | 2012-02-28 | Micron Technology, Inc. | Method for forming a ruthenium film |
| KR101046729B1 (en) | 2008-04-30 | 2011-07-05 | 주식회사 하이닉스반도체 | Capacitors and their manufacturing methods |
| JP2009283850A (en) | 2008-05-26 | 2009-12-03 | Elpida Memory Inc | Capacitor insulating film and method for forming the same, and capacitor and semiconductor device |
| WO2010044922A1 (en) | 2008-06-12 | 2010-04-22 | Anguel Nikolov | Thin film and optical interference filter incorporating high-index titanium dioxide and method for making them |
| JP5647792B2 (en) | 2009-04-01 | 2015-01-07 | ピーエスフォー ルクスコ エスエイアールエルPS4 Luxco S.a.r.l. | Method for manufacturing capacitor insulating film for capacitor |
| US8609553B2 (en) | 2011-02-07 | 2013-12-17 | Micron Technology, Inc. | Methods of forming rutile titanium dioxide and associated methods of forming semiconductor structures |
| US8564095B2 (en) | 2011-02-07 | 2013-10-22 | Micron Technology, Inc. | Capacitors including a rutile titanium dioxide material and semiconductor devices incorporating same |
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